diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2016-09-30 12:38:28 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-09-30 12:38:28 +0200 |
| commit | d7e25c66c9bf882450060fd9464e784bd229d3ae (patch) | |
| tree | 0fb9525f91b11226a5a4b861cefd9fc5679f5c9b /arch/x86/events | |
| parent | 907241dccb4ce5d9413cf3c030b32b0cfc184914 (diff) | |
| parent | e4aad64597d7a2455a541f904365b48d607916db (diff) | |
Merge branch 'x86/urgent' into x86/asm
Get the cr4 fixes so we can apply the final cleanup
Diffstat (limited to 'arch/x86/events')
| -rw-r--r-- | arch/x86/events/intel/bts.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c index bdcd6510992c..982c9e31daca 100644 --- a/arch/x86/events/intel/bts.c +++ b/arch/x86/events/intel/bts.c @@ -455,7 +455,7 @@ int intel_bts_interrupt(void) * The only surefire way of knowing if this NMI is ours is by checking * the write ptr against the PMI threshold. */ - if (ds->bts_index >= ds->bts_interrupt_threshold) + if (ds && (ds->bts_index >= ds->bts_interrupt_threshold)) handled = 1; /* @@ -584,7 +584,8 @@ static __init int bts_init(void) if (!boot_cpu_has(X86_FEATURE_DTES64) || !x86_pmu.bts) return -ENODEV; - bts_pmu.capabilities = PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_ITRACE; + bts_pmu.capabilities = PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_ITRACE | + PERF_PMU_CAP_EXCLUSIVE; bts_pmu.task_ctx_nr = perf_sw_context; bts_pmu.event_init = bts_event_init; bts_pmu.add = bts_event_add; |