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authorOlof Johansson <olof@lixom.net>2014-07-19 15:00:14 -0700
committerOlof Johansson <olof@lixom.net>2014-07-19 15:01:08 -0700
commitf57c0e049aa189e9683e2f013594a63bcc4f083f (patch)
treed00c834871818cd00c8bc764da6c94026d7d1cd0 /drivers/clocksource/exynos_mct.c
parentc6b659c0050429c36e3e805529d68d8680956e1a (diff)
parentfce9e5bb25264153f9f002eada41757118d25ba9 (diff)
Merge tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup for v3.17" from Kukjin Kim: Most of them are for exynos SoCs, remove useless codes and update for PMU consolidation. - remove unnecessary header file in mach-exynos/pmu.c - remove unused code in mach-exynos/common.h - remove mach-exynos/regs-pmu.h dependency from PD - remove file path from comment section in mach-exynos - move SYSREG definitions into mach-exynos/regs-sys.h - add mapping PMU base address via DT for PMU cleanup - use staic in mach-exynos/common.h - update Samsung UART config options for low-level debug * tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Add support for mapping PMU base address via DT ARM: EXYNOS: Remove "linux/bug.h" from pmu.c ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain ARM: EXYNOS: Remove file path from comment section ARM: EXYNOS: Move SYSREG definition into sys-reg specific file ARM: EXYNOS: Make exynos machine_ops as static ARM: EXYNOS: Remove unused code in common.h ARM: debug: Update Samsung UART config options + Linux 3.16-rc5 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/clocksource/exynos_mct.c')
-rw-r--r--drivers/clocksource/exynos_mct.c20
1 files changed, 18 insertions, 2 deletions
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index f71d55f5e6e5..ab51bf20a3ed 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -162,7 +162,7 @@ static void exynos4_mct_frc_start(void)
exynos4_mct_write(reg, EXYNOS4_MCT_G_TCON);
}
-static cycle_t exynos4_frc_read(struct clocksource *cs)
+static cycle_t notrace _exynos4_frc_read(void)
{
unsigned int lo, hi;
u32 hi2 = __raw_readl(reg_base + EXYNOS4_MCT_G_CNT_U);
@@ -176,6 +176,11 @@ static cycle_t exynos4_frc_read(struct clocksource *cs)
return ((cycle_t)hi << 32) | lo;
}
+static cycle_t exynos4_frc_read(struct clocksource *cs)
+{
+ return _exynos4_frc_read();
+}
+
static void exynos4_frc_resume(struct clocksource *cs)
{
exynos4_mct_frc_start();
@@ -192,13 +197,24 @@ struct clocksource mct_frc = {
static u64 notrace exynos4_read_sched_clock(void)
{
- return exynos4_frc_read(&mct_frc);
+ return _exynos4_frc_read();
+}
+
+static struct delay_timer exynos4_delay_timer;
+
+static cycles_t exynos4_read_current_timer(void)
+{
+ return _exynos4_frc_read();
}
static void __init exynos4_clocksource_init(void)
{
exynos4_mct_frc_start();
+ exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer;
+ exynos4_delay_timer.freq = clk_rate;
+ register_current_timer_delay(&exynos4_delay_timer);
+
if (clocksource_register_hz(&mct_frc, clk_rate))
panic("%s: can't register clocksource\n", mct_frc.name);