diff options
| author | Felix Kuehling <Felix.Kuehling@amd.com> | 2021-11-04 16:15:43 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-11-24 15:02:25 -0500 |
| commit | d3a21f7e353dc8d6939383578f3bd45b4ae3a946 (patch) | |
| tree | d1b51dbb2f03cc87075c74ea7360107d192dfda2 /drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | |
| parent | 136057256686de39cc3a07c2e39ef6bc43003ff6 (diff) | |
drm/amdgpu: Fix MMIO HDP flush on SRIOV
Disable HDP register remapping on SRIOV and set rmmio_remap.reg_offset
to the fixed address of the VF register for hdp_v*_flush_hdp.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Tested-by: Bokun Zhang <bokun.zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c index 4ecd2b5808ce..ee7cab37dfd5 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c @@ -359,6 +359,10 @@ static void nbio_v2_3_init_registers(struct amdgpu_device *adev) if (def != data) WREG32_PCIE(smnPCIE_CONFIG_CNTL, data); + + if (amdgpu_sriov_vf(adev)) + adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0, + mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2; } #define NAVI10_PCIE__LC_L0S_INACTIVITY_DEFAULT 0x00000000 // off by default, no gains over L1 |