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authorDerek Lai <Derek.Lai@amd.com>2018-12-11 16:27:09 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-01-14 15:40:08 -0500
commitb03a599b3e1f520e79d3dbf487179bd0d70d4681 (patch)
tree35640d1a7b0cf19d3ac5df3aed96376800d26f86 /drivers/gpu/drm/amd/display/dc/dc.h
parent7eb9097541706a71dfda01e456cae2930f24b10a (diff)
drm/amd/display: Set link rate set if eDP ver >= 1.4.
[Why] If eDP ver >= 1.4, the Source device must use LINK_RATE_SET. [How] Get LINK_RATE_SET by reading DPCD 10h-1fh, then write DPCD 00115h before link training. Signed-off-by: Derek Lai <Derek.Lai@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index f80f52ef4b01..1c46249c8240 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -659,6 +659,7 @@ struct dpcd_caps {
int8_t branch_dev_name[6];
int8_t branch_hw_revision;
int8_t branch_fw_revision[2];
+ uint8_t link_rate_set;
bool allow_invalid_MSA_timing_param;
bool panel_mode_edp;