drm/amd/display: Flattening core_dc to dc

-Flattening core_dc to dc

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4 files changed, 20 insertions, 21 deletions

diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
index c638f47acefc..b7e51c5ed1b1 100644
--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
@@ -24,7 +24,6 @@
  */
 #include "dm_services.h"
 #include "dc.h"
-#include "core_dc.h"
 #include "core_types.h"
 #include "hw_sequencer.h"
 #include "dce100_hw_sequencer.h"
@@ -71,7 +70,7 @@ static const struct dce100_hw_seq_reg_offsets reg_offsets[] = {
 /***************************PIPE_CONTROL***********************************/
 
 static bool dce100_enable_display_power_gating(
-	struct core_dc *dc,
+	struct dc *dc,
 	uint8_t controller_id,
 	struct dc_bios *dcb,
 	enum pipe_gating_control power_gating)
@@ -107,7 +106,7 @@ static bool dce100_enable_display_power_gating(
 }
 
 static void dce100_pplib_apply_display_requirements(
-	struct core_dc *dc,
+	struct dc *dc,
 	struct validate_context *context)
 {
 	struct dm_pp_display_configuration *pp_display_cfg = &context->pp_display_cfg;
@@ -127,7 +126,7 @@ static void dce100_pplib_apply_display_requirements(
 }
 
 void dce100_set_bandwidth(
-		struct core_dc *dc,
+		struct dc *dc,
 		struct validate_context *context,
 		bool decrease_allowed)
 {
@@ -143,7 +142,7 @@ void dce100_set_bandwidth(
 
 /**************************************************************************/
 
-bool dce100_hw_sequencer_construct(struct core_dc *dc)
+bool dce100_hw_sequencer_construct(struct dc *dc)
 {
 	dce110_hw_sequencer_construct(dc);
 
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h
index 24433f0e770b..c04aa15cd656 100644
--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h
@@ -28,13 +28,13 @@
 
 #include "core_types.h"
 
-struct core_dc;
+struct dc;
 struct validate_context;
 
-bool dce100_hw_sequencer_construct(struct core_dc *dc);
+bool dce100_hw_sequencer_construct(struct dc *dc);
 
 void dce100_set_bandwidth(
-		struct core_dc *dc,
+		struct dc *dc,
 		struct validate_context *context,
 		bool decrease_allowed);
 
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
index 46f0c71fbac4..b2b03633eb4f 100644
--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
@@ -652,7 +652,7 @@ static void destruct(struct dce110_resource_pool *pool)
 }
 
 static enum dc_status build_mapped_resource(
-		const struct core_dc *dc,
+		const struct dc  *dc,
 		struct validate_context *context,
 		struct validate_context *old_context)
 {
@@ -688,7 +688,7 @@ static enum dc_status build_mapped_resource(
 }
 
 bool dce100_validate_bandwidth(
-	const struct core_dc *dc,
+	struct dc  *dc,
 	struct validate_context *context)
 {
 	/* TODO implement when needed but for now hardcode max value*/
@@ -720,7 +720,7 @@ static bool dce100_validate_surface_sets(
 }
 
 enum dc_status dce100_validate_with_context(
-		const struct core_dc *dc,
+		struct dc  *dc,
 		const struct dc_validation_set set[],
 		int set_count,
 		struct validate_context *context,
@@ -764,7 +764,7 @@ enum dc_status dce100_validate_with_context(
 }
 
 enum dc_status dce100_validate_guaranteed(
-		const struct core_dc *dc,
+		struct dc  *dc,
 		struct dc_stream_state *dc_stream,
 		struct validate_context *context)
 {
@@ -784,7 +784,7 @@ enum dc_status dce100_validate_guaranteed(
 
 	if (result == DC_OK) {
 		validate_guaranteed_copy_streams(
-				context, dc->public.caps.max_streams);
+				context, dc->caps.max_streams);
 		result = resource_build_scaling_params_for_context(dc, context);
 	}
 
@@ -824,7 +824,7 @@ static const struct resource_funcs dce100_res_pool_funcs = {
 
 static bool construct(
 	uint8_t num_virtual_links,
-	struct core_dc *dc,
+	struct dc  *dc,
 	struct dce110_resource_pool *pool)
 {
 	unsigned int i;
@@ -909,9 +909,9 @@ static bool construct(
 	*************************************************/
 	pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
 	pool->base.pipe_count = res_cap.num_timing_generator;
-	dc->public.caps.max_downscale_ratio = 200;
-	dc->public.caps.i2c_speed_in_khz = 40;
-	dc->public.caps.max_cursor_size = 128;
+	dc->caps.max_downscale_ratio = 200;
+	dc->caps.i2c_speed_in_khz = 40;
+	dc->caps.max_cursor_size = 128;
 
 	for (i = 0; i < pool->base.pipe_count; i++) {
 		pool->base.timing_generators[i] =
@@ -958,7 +958,7 @@ static bool construct(
 		}
 	}
 
-	dc->public.caps.max_planes =  pool->base.pipe_count;
+	dc->caps.max_planes =  pool->base.pipe_count;
 
 	if (!resource_construct(num_virtual_links, dc, &pool->base,
 			&res_create_funcs))
@@ -978,7 +978,7 @@ res_create_fail:
 
 struct resource_pool *dce100_create_resource_pool(
 	uint8_t num_virtual_links,
-	struct core_dc *dc)
+	struct dc  *dc)
 {
 	struct dce110_resource_pool *pool =
 		dm_alloc(sizeof(struct dce110_resource_pool));
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h
index edc50caf04d1..ca7b2b7c1a48 100644
--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h
@@ -8,13 +8,13 @@
 #ifndef DCE100_RESOURCE_H_
 #define DCE100_RESOURCE_H_
 
-struct core_dc;
+struct dc;
 struct resource_pool;
 struct dc_validation_set;
 
 struct resource_pool *dce100_create_resource_pool(
 	uint8_t num_virtual_links,
-	struct core_dc *dc);
+	struct dc *dc);
 
 enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state);