diff options
| author | Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> | 2017-06-14 18:58:04 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 18:08:22 -0400 |
| commit | cfe4645e17f8dbe680c35c439d000313f2648482 (patch) | |
| tree | 24730e43ae060acc6dc6db3eab85ac8e584d5d82 /drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h | |
| parent | 7f524a0d838d8d9334003b956b73729f27a1315a (diff) | |
drm/amd/display: fix dcn pipe reset sequence
This change fixes dcn10 front end reset sequence. Previously we
would reset front end during flip which led to issues
in certain MPO and 4k/5k scenarios. We would also never properly
power gate our front end.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h index 0f9f1b97d238..fff267455a3d 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h @@ -68,6 +68,7 @@ struct dcn_mpcc_registers { SF(MPCC0_MPCC_CONTROL, MPCC_ALPHA_MULTIPLIED_MODE, mask_sh),\ SF(MPCC0_MPCC_CONTROL, MPCC_BLND_ACTIVE_OVERLAP_ONLY, mask_sh),\ SF(MPCC0_MPCC_STATUS, MPCC_IDLE, mask_sh),\ + SF(MPCC0_MPCC_STATUS, MPCC_BUSY, mask_sh),\ SF(MPCC0_MPCC_OPP_ID, MPCC_OPP_ID, mask_sh),\ SF(MPCC0_MPCC_BG_G_Y, MPCC_BG_G_Y, mask_sh),\ SF(MPCC0_MPCC_BG_R_CR, MPCC_BG_R_CR, mask_sh),\ @@ -83,6 +84,7 @@ struct dcn_mpcc_registers { type MPCC_ALPHA_MULTIPLIED_MODE;\ type MPCC_BLND_ACTIVE_OVERLAP_ONLY;\ type MPCC_IDLE;\ + type MPCC_BUSY;\ type MPCC_OPP_ID;\ type MPCC_BG_G_Y;\ type MPCC_BG_R_CR;\ @@ -103,8 +105,6 @@ struct dcn10_mpcc { const struct dcn_mpcc_registers *mpcc_regs; const struct dcn_mpcc_shift *mpcc_shift; const struct dcn_mpcc_mask *mpcc_mask; - - int opp_id; }; void dcn10_mpcc_construct(struct dcn10_mpcc *mpcc10, |