diff options
| author | Dave Airlie <airlied@redhat.com> | 2022-07-27 09:33:44 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2022-07-27 09:33:45 +1000 |
| commit | ee8b1ef9a6b089abf7a9c7d094b6e93fa05f15b9 (patch) | |
| tree | 04d9ed5e31f325b40e4d8c6af8b9de8e3c6394e5 /drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h | |
| parent | 417c1c1963549e9a48b83ada59d90258e38c6594 (diff) | |
| parent | 1b54a0121dba12af268fb75c413feabdb9f573d4 (diff) | |
Merge tag 'amd-drm-next-5.20-2022-07-26' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amdgpu:
- VCN4 fixes
- RAS support for UMC 8.10
- ACP support for jadeite platforms
- NBIO HDP flush fixes
- Misc spelling and grammar fixes
- Runtime PM fixes
- Non-DC HPD fix
- Clean up amdgpu DM code
- DSC fixes
- Expose some additional GFXOFF data via debugfs
- More FP clean up for new DCN blocks
- PPC DC FP fixes
- DCN 3.1.4 fixes
- DC DML stack usage fixes
- GMC fixes
- SPM fixes for RDNA2
amdkfd:
- MMU notifier fix
- Mutex fix
UAPI:
- Add a comment about VCN4 unified queues
- IP version information for UMDs
Proposed mesa change: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220726181536.5759-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h index 32b5593b1460..0902ce5eb8a1 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h @@ -161,11 +161,6 @@ struct dccg *dccg31_create( void dccg31_init(struct dccg *dccg); -void dccg31_set_dpstreamclk( - struct dccg *dccg, - enum streamclk_source src, - int otg_inst); - void dccg31_enable_symclk32_se( struct dccg *dccg, int hpo_se_inst, @@ -207,7 +202,8 @@ void dccg31_get_dccg_ref_freq( void dccg31_set_dpstreamclk( struct dccg *dccg, enum streamclk_source src, - int otg_inst); + int otg_inst, + int dp_hpo_inst); void dccg31_set_dtbclk_dto( struct dccg *dccg, |