diff options
| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-07-22 17:25:51 -0700 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-07-26 08:15:18 -0700 |
| commit | 816753c06f23773c83763cfef3ded32a387e54e1 (patch) | |
| tree | 081d538d1388839590e2a4a04ce5d968771c83f9 /drivers/gpu/drm/i915/gt/intel_engine_cs.c | |
| parent | bfac1e2b6e2d6b3fdb3d8f997187d6f1c63ea965 (diff) | |
drm/i915/gt: nuke gen6_hw_id
This is only used by GRAPHICS_VER == 6 and GRAPHICS_VER == 7. All other
recent platforms do not depend on this field, so it doesn't make much
sense to keep it generic like that. Instead, just do a mapping from
engine class to HW ID in the single place that is needed.
v2: use macros with the direct register address instead of calculating
from the legacy HW_ID (Matt Roper)
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210723002551.3906535-1-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_engine_cs.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_engine_cs.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index 67c61908bc82..43c3fb2aeb13 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -42,7 +42,6 @@ #define MAX_MMIO_BASES 3 struct engine_info { - u8 gen6_hw_id; u8 class; u8 instance; /* mmio bases table *must* be sorted in reverse graphics_ver order */ @@ -54,7 +53,6 @@ struct engine_info { static const struct engine_info intel_engines[] = { [RCS0] = { - .gen6_hw_id = RCS0_HW, .class = RENDER_CLASS, .instance = 0, .mmio_bases = { @@ -62,7 +60,6 @@ static const struct engine_info intel_engines[] = { }, }, [BCS0] = { - .gen6_hw_id = BCS0_HW, .class = COPY_ENGINE_CLASS, .instance = 0, .mmio_bases = { @@ -70,7 +67,6 @@ static const struct engine_info intel_engines[] = { }, }, [VCS0] = { - .gen6_hw_id = VCS0_HW, .class = VIDEO_DECODE_CLASS, .instance = 0, .mmio_bases = { @@ -130,7 +126,6 @@ static const struct engine_info intel_engines[] = { }, }, [VECS0] = { - .gen6_hw_id = VECS0_HW, .class = VIDEO_ENHANCEMENT_CLASS, .instance = 0, .mmio_bases = { @@ -334,7 +329,6 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id) engine->i915 = i915; engine->gt = gt; engine->uncore = gt->uncore; - engine->gen6_hw_id = info->gen6_hw_id; guc_class = engine_class_to_guc_class(info->class); engine->guc_id = MAKE_GUC_ID(guc_class, info->instance); engine->mmio_base = __engine_mmio_base(i915, info->mmio_bases); |