diff options
author | Dave Airlie <airlied@redhat.com> | 2021-04-08 14:02:14 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2021-04-08 14:02:21 +1000 |
commit | 9c0fed84d5750e1eea6c664e073ffa2534a17743 (patch) | |
tree | 19fd185bfceddc79ca7c9eaff670a24e35da7216 /drivers/gpu/drm/i915/gt/intel_ggtt.c | |
parent | 41d1d0c51f5ffd5c2c35e82e4a675b185cccea13 (diff) | |
parent | 81f1f8f1e1489c0bf051d5241ec10da07869b911 (diff) |
Merge tag 'drm-intel-next-2021-04-01' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Features:
- Add support for FBs requiring a power-of-two stride padding (Imre)
Refactoring:
- Disassociate display version from gen (Matt)
- Refactor legacy DP and HDMI code to separate files (Ville)
- Refactor FB plane code to a separate file (Imre)
- Refactor VBT child device info parsing and usage (Jani)
- Refactor KBL/TGL/ADL-S display and gt stepping schemes (Jani)
Fixes:
- DP Link-Training Tunable PHY Repeaters (LTTPR) fixes (Imre)
- HDCP fixes (Anshuman)
- DP 2.0 HDMI 2.1 PCON Fixed Rate Link (FRL) fixes (Ankit)
- Set HDA link parameters in driver (Kai)
- Fix enabled_planes bitmask (Ville)
- Fix transposed arguments to skl_plane_wm_level() (Ville)
- Stop adding planes to the commit needlessly (Ville)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87v996ml17.fsf@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_ggtt.c')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_ggtt.c | 56 |
1 files changed, 47 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c index c2fc49495029..670c1271e7d5 100644 --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c @@ -1267,14 +1267,16 @@ void i915_ggtt_resume(struct i915_ggtt *ggtt) static struct scatterlist * rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset, unsigned int width, unsigned int height, - unsigned int stride, + unsigned int src_stride, unsigned int dst_stride, struct sg_table *st, struct scatterlist *sg) { unsigned int column, row; unsigned int src_idx; for (column = 0; column < width; column++) { - src_idx = stride * (height - 1) + column + offset; + unsigned int left; + + src_idx = src_stride * (height - 1) + column + offset; for (row = 0; row < height; row++) { st->nents++; /* @@ -1287,8 +1289,25 @@ rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset, i915_gem_object_get_dma_address(obj, src_idx); sg_dma_len(sg) = I915_GTT_PAGE_SIZE; sg = sg_next(sg); - src_idx -= stride; + src_idx -= src_stride; } + + left = (dst_stride - height) * I915_GTT_PAGE_SIZE; + + if (!left) + continue; + + st->nents++; + + /* + * The DE ignores the PTEs for the padding tiles, the sg entry + * here is just a conenience to indicate how many padding PTEs + * to insert at this spot. + */ + sg_set_page(sg, NULL, left, 0); + sg_dma_address(sg) = 0; + sg_dma_len(sg) = left; + sg = sg_next(sg); } return sg; @@ -1317,11 +1336,12 @@ intel_rotate_pages(struct intel_rotation_info *rot_info, st->nents = 0; sg = st->sgl; - for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++) { + for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++) sg = rotate_pages(obj, rot_info->plane[i].offset, rot_info->plane[i].width, rot_info->plane[i].height, - rot_info->plane[i].stride, st, sg); - } + rot_info->plane[i].src_stride, + rot_info->plane[i].dst_stride, + st, sg); return st; @@ -1339,7 +1359,7 @@ err_st_alloc: static struct scatterlist * remap_pages(struct drm_i915_gem_object *obj, unsigned int offset, unsigned int width, unsigned int height, - unsigned int stride, + unsigned int src_stride, unsigned int dst_stride, struct sg_table *st, struct scatterlist *sg) { unsigned int row; @@ -1372,7 +1392,24 @@ remap_pages(struct drm_i915_gem_object *obj, unsigned int offset, left -= length; } - offset += stride - width; + offset += src_stride - width; + + left = (dst_stride - width) * I915_GTT_PAGE_SIZE; + + if (!left) + continue; + + st->nents++; + + /* + * The DE ignores the PTEs for the padding tiles, the sg entry + * here is just a conenience to indicate how many padding PTEs + * to insert at this spot. + */ + sg_set_page(sg, NULL, left, 0); + sg_dma_address(sg) = 0; + sg_dma_len(sg) = left; + sg = sg_next(sg); } return sg; @@ -1404,7 +1441,8 @@ intel_remap_pages(struct intel_remapped_info *rem_info, for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) { sg = remap_pages(obj, rem_info->plane[i].offset, rem_info->plane[i].width, rem_info->plane[i].height, - rem_info->plane[i].stride, st, sg); + rem_info->plane[i].src_stride, rem_info->plane[i].dst_stride, + st, sg); } i915_sg_trim(st); |