diff options
| author | Matt Roper <matthew.d.roper@intel.com> | 2021-07-16 22:14:22 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2021-07-21 10:44:36 -0700 |
| commit | 1e1824de33c1a44640778fd04106e240e819866b (patch) | |
| tree | d666eae3e38ab24e62a580ab48675c3dd1ac008a /drivers/gpu/drm/i915/i915_memcpy.h | |
| parent | 131b1252e76af0ee462e31df428d6fdafee48532 (diff) | |
drm/i915: Program DFR enable/disable as a GT workaround
DFR programming (which we enable as an optimization on gen11, but must
ensure is disabled on gen12) should be handled as a GT workaround rather
than clock gating initialization. This will ensure that the programming
of these registers is verified with our typical workaround checks.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210717051426.4120328-4-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_memcpy.h')
0 files changed, 0 insertions, 0 deletions