summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/msm
diff options
context:
space:
mode:
authorAbhinav Kumar <abhinavk@codeaurora.org>2019-06-18 13:24:12 -0700
committerRob Clark <robdclark@chromium.org>2019-06-20 08:39:24 -0700
commit217a6ddf93e0d99ac720ded6c81401030af981a7 (patch)
tree9ae9343f8d162c8ed9a83995b5c7aa7f2a463b75 /drivers/gpu/drm/msm
parenta67e13e1ee2d62871149e5ec629cf766d4127ff9 (diff)
drm/msm/dpu: add icc voting in dpu_mdss_init
dpu_mdss_destroy() can get called not just from msm_drm_uninit() but also from msm_drm_bind() in case of any failures. dpu_mdss_destroy() removes the icc voting by calling icc_put. This could accidentally remove the voting done by pm_runtime_enable. To make the voting balanced add a minimum vote in dpu_mdss_init() to avoid any unclocked access. This change depends on the following patch which introduces interconnect binding to MDSS driver: https://patchwork.codeaurora.org/patch/708155/ Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm')
-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
index b1d0437ac7b6..986915bbbc02 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
@@ -49,6 +49,16 @@ static int dpu_mdss_parse_data_bus_icc_path(struct drm_device *dev,
return 0;
}
+static void dpu_mdss_icc_request_bw(struct msm_mdss *mdss)
+{
+ struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
+ int i;
+ u64 avg_bw = dpu_mdss->num_paths ? MAX_BW / dpu_mdss->num_paths : 0;
+
+ for (i = 0; i < dpu_mdss->num_paths; i++)
+ icc_set_bw(dpu_mdss->path[i], avg_bw, kBps_to_icc(MAX_BW));
+}
+
static void dpu_mdss_irq(struct irq_desc *desc)
{
struct dpu_mdss *dpu_mdss = irq_desc_get_handler_data(desc);
@@ -160,11 +170,9 @@ static int dpu_mdss_enable(struct msm_mdss *mdss)
{
struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
struct dss_module_power *mp = &dpu_mdss->mp;
- int ret, i;
- u64 avg_bw = dpu_mdss->num_paths ? MAX_BW / dpu_mdss->num_paths : 0;
+ int ret;
- for (i = 0; i < dpu_mdss->num_paths; i++)
- icc_set_bw(dpu_mdss->path[i], avg_bw, kBps_to_icc(MAX_BW));
+ dpu_mdss_icc_request_bw(mdss);
ret = msm_dss_enable_clk(mp->clk_config, mp->num_clk, true);
if (ret)
@@ -277,6 +285,8 @@ int dpu_mdss_init(struct drm_device *dev)
pm_runtime_enable(dev->dev);
+ dpu_mdss_icc_request_bw(priv->mdss);
+
pm_runtime_get_sync(dev->dev);
dpu_mdss->hwversion = readl_relaxed(dpu_mdss->mmio);
pm_runtime_put_sync(dev->dev);