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authorAndrzej Hajda <a.hajda@samsung.com>2016-04-28 11:58:48 +0200
committerSeung-Woo Kim <sw0312.kim@samsung.com>2016-12-14 13:50:46 +0900
commit2cc7a3fd1f3b0575f8eb7f58cfa5ef0369143a93 (patch)
tree824ed9ba070132ee5a10fc65b5870e5d1429be47 /drivers/gpu/drm/panel
parenteb5798de50bc944b49fa91a9c87faf6cded7d7ec (diff)
drm/panel/s6e3ha2: fix frequency calibration on 1440p displays
The driver support 1440p and 1600p displays, to support both models correctly it should send different frequency calibration sequence. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Change-Id: Ic38d4eb357609be0d1a67c655c5c110559b08bd3
Diffstat (limited to 'drivers/gpu/drm/panel')
-rw-r--r--drivers/gpu/drm/panel/panel-s6e3ha2.c28
1 files changed, 24 insertions, 4 deletions
diff --git a/drivers/gpu/drm/panel/panel-s6e3ha2.c b/drivers/gpu/drm/panel/panel-s6e3ha2.c
index ab1e06ed90e1..7d1abad306aa 100644
--- a/drivers/gpu/drm/panel/panel-s6e3ha2.c
+++ b/drivers/gpu/drm/panel/panel-s6e3ha2.c
@@ -227,10 +227,13 @@ unsigned char VINT_TABLE[VINT_STATUS_MAX] = {
0x1D, 0x1E, 0x1F, 0x20, 0x21
};
+enum s6e3ha2_model { MODEL_1440, MODEL_1600 };
+
struct s6e3ha2 {
struct device *dev;
struct drm_panel panel;
struct backlight_device *bl_dev;
+ enum s6e3ha2_model model;
struct regulator_bulk_data supplies[2];
struct gpio_desc *reset_gpio;
@@ -315,13 +318,17 @@ static void s6e3ha2_single_dsi_set2(struct s6e3ha2 *ctx)
static void s6e3ha2_freq_calibration(struct s6e3ha2 *ctx)
{
s6e3ha2_dcs_write_seq_static(ctx, 0xfd, 0x1c);
- s6e3ha2_dcs_write_seq_static(ctx, 0xf2, 0x67, 0x40, 0xc5);
+ if (ctx->model != MODEL_1440)
+ s6e3ha2_dcs_write_seq_static(ctx, 0xf2, 0x67, 0x40, 0xc5);
s6e3ha2_dcs_write_seq_static(ctx, 0xfe, 0x20, 0x39);
s6e3ha2_dcs_write_seq_static(ctx, 0xfe, 0xa0);
s6e3ha2_dcs_write_seq_static(ctx, 0xfe, 0x20);
- s6e3ha2_dcs_write_seq_static(ctx, 0xce, 0x03, 0x3b, 0x14, 0x6d,
- 0x40, 0x80, 0xc0, 0x28, 0x28, 0x28, 0x28, 0x39, 0xc5
- );
+ if (ctx->model == MODEL_1440)
+ s6e3ha2_dcs_write_seq_static(ctx, 0xce, 0x03, 0x3b, 0x12, 0x62,
+ 0x40, 0x80, 0xc0, 0x28, 0x28, 0x28, 0x28, 0x39, 0xc5);
+ else
+ s6e3ha2_dcs_write_seq_static(ctx, 0xce, 0x03, 0x3b, 0x14, 0x6d,
+ 0x40, 0x80, 0xc0, 0x28, 0x28, 0x28, 0x28, 0x39, 0xc5);
}
static void s6e3ha2_aor_control(struct s6e3ha2 *ctx)
@@ -655,6 +662,19 @@ static int s6e3ha2_parse_dt(struct s6e3ha2 *ctx)
if (ret < 0)
return ret;
+ switch (ctx->vm.hactive) {
+ case 1440:
+ ctx->model = MODEL_1440;
+ break;
+ case 1600:
+ ctx->model = MODEL_1600;
+ break;
+ default:
+ dev_err(dev, "Unsupported panel resolution: %dx%d\n",
+ ctx->vm.hactive, ctx->vm.vactive);
+ return -EINVAL;
+ }
+
of_property_read_u32(np, "panel-width-mm", &ctx->width_mm);
of_property_read_u32(np, "panel-height-mm", &ctx->height_mm);