diff options
author | Dave Airlie <airlied@redhat.com> | 2009-09-07 13:49:07 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-09-07 13:49:07 +1000 |
commit | adf551bb25bfb83b79ce3c3887557ed817e26cc9 (patch) | |
tree | f80ea2b6183fb64c65d3749f0f490375a7f3e26c /drivers/gpu/drm/radeon/reg_srcs | |
parent | a498b8210f2f6ee0529c28048b5c4cecc17937c2 (diff) |
drm/radeon/kms: add updated registers from drm-fixes.
Fixes up the DISCARD + 2 sided stencil in the new generator scripts.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/reg_srcs')
-rw-r--r-- | drivers/gpu/drm/radeon/reg_srcs/r300 | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/reg_srcs/rs600 | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/reg_srcs/rv515 | 1 |
3 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r300 b/drivers/gpu/drm/radeon/reg_srcs/r300 index d927005c6fa2..19c4663fa9c6 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/r300 +++ b/drivers/gpu/drm/radeon/reg_srcs/r300 @@ -708,6 +708,8 @@ r300 0x4f60 0x4E80 RB3D_AARESOLVE_OFFSET 0x4E84 RB3D_AARESOLVE_PITCH 0x4E88 RB3D_AARESOLVE_CTL +0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD +0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD 0x4F04 ZB_ZSTENCILCNTL 0x4F08 ZB_STENCILREFMASK 0x4F14 ZB_ZTOP diff --git a/drivers/gpu/drm/radeon/reg_srcs/rs600 b/drivers/gpu/drm/radeon/reg_srcs/rs600 index 344405a44df9..8e3c0b807add 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/rs600 +++ b/drivers/gpu/drm/radeon/reg_srcs/rs600 @@ -708,6 +708,8 @@ rs600 0x6d40 0x4E80 RB3D_AARESOLVE_OFFSET 0x4E84 RB3D_AARESOLVE_PITCH 0x4E88 RB3D_AARESOLVE_CTL +0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD +0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD 0x4F04 ZB_ZSTENCILCNTL 0x4F08 ZB_STENCILREFMASK 0x4F14 ZB_ZTOP diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515 index 9602026ff9fe..0102a0d5735c 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/rv515 +++ b/drivers/gpu/drm/radeon/reg_srcs/rv515 @@ -483,3 +483,4 @@ rv515 0x6d40 0x4F50 ZB_HIZ_RDINDEX 0x4F54 ZB_HIZ_PITCH 0x4F58 ZB_ZPASS_DATA +0x4FD4 ZB_STENCILREFMASK_BF |