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authorImre Deak <imre.deak@intel.com>2021-01-27 13:14:14 +0000
committerDaniel Vetter <daniel.vetter@ffwll.ch>2021-03-24 19:30:36 +0100
commit7c5cc941330df5a1868da6c8fb3710d804c11bc8 (patch)
tree08beae4da52e7909b250fe187e05abd0a4b75873 /drivers/gpu
parentadeca641bcb64f9e4fd477c0d1fe482f18934e90 (diff)
drm/i915/dg1: Reserve first 1MB of local memory
On DG1 A0/B0 steppings the first 1MB of local memory must be reserved. One reason for this is that the 0xA0000-0xB0000 range is not accessible by the display, probably since this region is redirected to another memory location for legacy VGA compatibility. BSpec: 50586 Testcase: igt/kms_big_fb/linear-64bpp-rotate-0 v2: - Reserve the memory on B0 as well. v3: replace DRM_DEBUG/DRM_ERROR with drm_dbg/drm_err v4: fix the insanity Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210127131417.393872-5-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_region_lmem.c41
1 files changed, 41 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index 8ec244b02422..8c498e96b01d 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -143,6 +143,38 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt)
return mem;
}
+static bool get_legacy_lowmem_region(struct intel_uncore *uncore,
+ u64 *start, u32 *size)
+{
+ if (!IS_DG1_REVID(uncore->i915, DG1_REVID_A0, DG1_REVID_B0))
+ return false;
+
+ *start = 0;
+ *size = SZ_1M;
+
+ drm_dbg(&uncore->i915->drm, "LMEM: reserved legacy low-memory [0x%llx-0x%llx]\n",
+ *start, *start + *size);
+
+ return true;
+}
+
+static int reserve_lowmem_region(struct intel_uncore *uncore,
+ struct intel_memory_region *mem)
+{
+ u64 reserve_start;
+ u32 reserve_size;
+ int ret;
+
+ if (!get_legacy_lowmem_region(uncore, &reserve_start, &reserve_size))
+ return 0;
+
+ ret = intel_memory_region_reserve(mem, reserve_start, reserve_size);
+ if (ret)
+ drm_err(&uncore->i915->drm, "LMEM: reserving low memory region failed\n");
+
+ return ret;
+}
+
static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
{
struct drm_i915_private *i915 = gt->i915;
@@ -151,6 +183,7 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
struct intel_memory_region *mem;
resource_size_t io_start;
resource_size_t lmem_size;
+ int err;
if (!IS_DGFX(i915))
return ERR_PTR(-ENODEV);
@@ -171,6 +204,10 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
if (IS_ERR(mem))
return mem;
+ err = reserve_lowmem_region(uncore, mem);
+ if (err)
+ goto err_region_put;
+
drm_dbg(&i915->drm, "Local memory: %pR\n", &mem->region);
drm_dbg(&i915->drm, "Local memory IO start: %pa\n",
&mem->io_start);
@@ -178,6 +215,10 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
&lmem_size);
return mem;
+
+err_region_put:
+ intel_memory_region_put(mem);
+ return ERR_PTR(err);
}
struct intel_memory_region *intel_gt_setup_lmem(struct intel_gt *gt)