diff options
| author | James Clark <james.clark@arm.com> | 2022-03-04 17:19:04 +0000 |
|---|---|---|
| committer | Mathieu Poirier <mathieu.poirier@linaro.org> | 2022-04-13 11:04:56 -0600 |
| commit | eeae6dddfd34e6f0522b7bdb86d16fdd2b0fa80b (patch) | |
| tree | 97775663f20216635a1d1a05a30e1574c8e2416b /drivers/hwtracing/coresight/coresight-etm4x.h | |
| parent | 1cf50f6494644ffb67cafa8f5141cbeaf21a5102 (diff) | |
coresight: etm4x: Cleanup TRCEVENTCTL1R register accesses
This is a no-op change for style and consistency and has no effect on
the binary output by the compiler. In sysreg.h fields are defined as
the register name followed by the field name and then _MASK. This
allows for grepping for fields by name rather than using magic numbers.
Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220304171913.2292458-8-james.clark@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-etm4x.h')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-etm4x.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 4c8d7be3c159..cbba46f14ada 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -188,6 +188,14 @@ #define TRCCONFIGR_DA BIT(16) #define TRCCONFIGR_DV BIT(17) +#define TRCEVENTCTL1R_INSTEN_MASK GENMASK(3, 0) +#define TRCEVENTCTL1R_INSTEN_0 BIT(0) +#define TRCEVENTCTL1R_INSTEN_1 BIT(1) +#define TRCEVENTCTL1R_INSTEN_2 BIT(2) +#define TRCEVENTCTL1R_INSTEN_3 BIT(3) +#define TRCEVENTCTL1R_ATB BIT(11) +#define TRCEVENTCTL1R_LPOVERRIDE BIT(12) + /* * System instructions to access ETM registers. * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions |