diff options
author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2009-08-31 21:52:53 +0800 |
---|---|---|
committer | Eric Miao <eric.y.miao@gmail.com> | 2009-12-01 09:02:33 +0800 |
commit | fa3f99384c20751c66962848807403ff171dc02f (patch) | |
tree | 8a6469d9a2058a45e2aa78fe6756e1bfcf5cfa25 /drivers/mmc/host/pxamci.c | |
parent | c41562b1626b578e9ce2aae5b3363ee2f142c635 (diff) |
pxamci: introduce mmc_has_26mhz() and include pxa935
Along with more processor supporting 26MHz mode (including pxa935),
introduce an individual macro mmc_has_26mhz() for this.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'drivers/mmc/host/pxamci.c')
-rw-r--r-- | drivers/mmc/host/pxamci.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index b00d67319058..c85f6166056e 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c @@ -43,6 +43,9 @@ #define NR_SG 1 #define CLKRT_OFF (~0) +#define mmc_has_26MHz() (cpu_is_pxa300() || cpu_is_pxa310() \ + || cpu_is_pxa935()) + struct pxamci_host { struct mmc_host *mmc; spinlock_t lock; @@ -457,7 +460,7 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) clk_enable(host->clk); if (ios->clock == 26000000) { - /* to support 26MHz on pxa300/pxa310 */ + /* to support 26MHz */ host->clkrt = 7; } else { /* to handle (19.5MHz, 26MHz) */ @@ -608,8 +611,7 @@ static int pxamci_probe(struct platform_device *pdev) * Calculate minimum clock rate, rounding up. */ mmc->f_min = (host->clkrate + 63) / 64; - mmc->f_max = (cpu_is_pxa300() || cpu_is_pxa310()) ? 26000000 - : host->clkrate; + mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate; pxamci_init_ocr(host); @@ -618,7 +620,7 @@ static int pxamci_probe(struct platform_device *pdev) if (!cpu_is_pxa25x()) { mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; host->cmdat |= CMDAT_SDIO_INT_EN; - if (cpu_is_pxa300() || cpu_is_pxa310()) + if (mmc_has_26MHz()) mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED; } |