diff options
author | Stefan Roese <sr@denx.de> | 2008-04-22 10:46:42 +1000 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-04-25 02:08:06 -0400 |
commit | afd1dee896e8b1cbd24258ac673aeccd803ff582 (patch) | |
tree | 50c27c031cf6b6011d38a53c340e4a3f49769418 /drivers/net | |
parent | f34ebab68a8e3c80ff4364f4c61734faec5161d4 (diff) |
ibm_newemac: Add support for 460EX/GT-type MAL rx-channel handling
On some 4xx PPC's (e.g. 460EX/GT), the rx channel number is a multiple
of 8 (e.g. 8 for EMAC1, 16 for EMAC2), but enabling in MAL_RXCASR needs
the divided by 8 value for the bitmask.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/ibm_newemac/mal.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/net/ibm_newemac/mal.c b/drivers/net/ibm_newemac/mal.c index 6869f08c9dcb..fb9c9eb114f4 100644 --- a/drivers/net/ibm_newemac/mal.c +++ b/drivers/net/ibm_newemac/mal.c @@ -136,6 +136,14 @@ void mal_enable_rx_channel(struct mal_instance *mal, int channel) { unsigned long flags; + /* + * On some 4xx PPC's (e.g. 460EX/GT), the rx channel is a multiple + * of 8, but enabling in MAL_RXCASR needs the divided by 8 value + * for the bitmask + */ + if (!(channel % 8)) + channel >>= 3; + spin_lock_irqsave(&mal->lock, flags); MAL_DBG(mal, "enable_rx(%d)" NL, channel); @@ -148,6 +156,14 @@ void mal_enable_rx_channel(struct mal_instance *mal, int channel) void mal_disable_rx_channel(struct mal_instance *mal, int channel) { + /* + * On some 4xx PPC's (e.g. 460EX/GT), the rx channel is a multiple + * of 8, but enabling in MAL_RXCASR needs the divided by 8 value + * for the bitmask + */ + if (!(channel % 8)) + channel >>= 3; + set_mal_dcrn(mal, MAL_RXCARR, MAL_CHAN_MASK(channel)); MAL_DBG(mal, "disable_rx(%d)" NL, channel); |