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authorJaehoon Chung <jh80.chung@samsung.com>2015-04-08 20:36:59 +0900
committerSeung-Woo Kim <sw0312.kim@samsung.com>2016-12-14 13:44:35 +0900
commitd5c6befb91462b338d863fdd381dca58ea05a5a4 (patch)
tree8b38720f719367fb0f2135359844245d05d7c1cd /drivers/pci
parent8a98afa4fd6163404c1b9e6820fec1ce8f61a6cf (diff)
local/pci: pcie-designware: support arm64 without pci_sys_data
pci_sys_data has the dependent with arm architecture. So it caused compiler error for ARM64. This patch try to reduce the dependency for arm architecture.(WIP) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/host/pcie-designware.c30
-rw-r--r--drivers/pci/host/pcie-designware.h1
2 files changed, 31 insertions, 0 deletions
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index 37c4e877bd0a..e7916c3031d4 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -70,6 +70,7 @@
static unsigned long global_io_offset;
+static struct pci_ops dw_pcie_ops;
#ifdef CONFIG_ARM
static struct hw_pci dw_pci;
@@ -351,6 +352,16 @@ static const struct irq_domain_ops msi_domain_ops = {
.map = dw_pcie_msi_map,
};
+#ifndef CONFIG_ARM
+/* Workaround - For ARM64*/
+static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
+
+ return pp->irq;
+}
+#endif
+
int dw_pcie_host_init(struct pcie_port *pp)
{
struct device_node *np = pp->dev->of_node;
@@ -361,6 +372,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
u32 val, na, ns;
const __be32 *addrp;
int i, index, ret;
+ struct pci_bus *bus;
+ INIT_LIST_HEAD(&pp->resources);
/* Find the address cell size and the number of cells in order to get
* the untranslated address.
@@ -457,6 +470,11 @@ int dw_pcie_host_init(struct pcie_port *pp)
pp->mem_base = pp->mem.start;
+ ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &pp->resources,
+ &pp->io_base);
+ if (ret)
+ return -ENOMEM;
+
if (!pp->va_cfg0_base) {
pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
pp->cfg0_size);
@@ -526,6 +544,18 @@ int dw_pcie_host_init(struct pcie_port *pp)
pci_common_init_dev(pp->dev, &dw_pci);
#endif
+ /* Workaround - For ARM64 */
+ pci_add_flags(PCI_REASSIGN_ALL_RSRC);
+
+ pp->root_bus_nr = 0;
+
+ bus = pci_scan_root_bus(pp->dev, 0, &dw_pcie_ops, (void *)pp, &pp->resources);
+ if (!bus)
+ return -ENOMEM;
+
+ pci_fixup_irqs(pci_common_swizzle, dw_pcie_map_irq);
+ pci_assign_unassigned_bus_resources(bus);
+
return 0;
}
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index e14f746df8d9..97ed547b0f45 100644
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -53,6 +53,7 @@ struct pcie_port {
struct irq_domain *irq_domain;
unsigned long msi_data;
DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
+ struct list_head resources;
};
struct pcie_host_ops {