diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2012-11-20 14:28:07 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2012-11-21 08:55:17 +0100 |
| commit | 387923c585ac68ff51e6bf673807438b5e5fdaf3 (patch) | |
| tree | 1e6faaf633d5d647135ae8f86d45bd103d242fee /drivers/pinctrl/pinctrl-coh901.c | |
| parent | 9afbefb227792a3c195085d662050dcca748f521 (diff) | |
pinctrl/u300/coh901: let the gpio_chip register the range
Instead of having the pinctrl driver register the GPIO range
for the gpio_chip, making it necessary to instantiate the
pin controller from the GPIO driver and pass the GPIO chip as
platform data, now let the GPIO chip driver register it's own
ranges and have the pinctrl driver look up the GPIO chip from
the pinctrl core as necessary.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-coh901.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl-coh901.c | 47 |
1 files changed, 45 insertions, 2 deletions
diff --git a/drivers/pinctrl/pinctrl-coh901.c b/drivers/pinctrl/pinctrl-coh901.c index 1144dcdf2da0..04574308ea89 100644 --- a/drivers/pinctrl/pinctrl-coh901.c +++ b/drivers/pinctrl/pinctrl-coh901.c @@ -658,6 +658,36 @@ static inline void u300_gpio_free_ports(struct u300_gpio *gpio) } } +/* + * Here we map a GPIO in the local gpio_chip pin space to a pin in + * the local pinctrl pin space. The pin controller used is + * pinctrl-u300. + */ +struct coh901_pinpair { + unsigned int offset; + unsigned int pin_base; +}; + +#define COH901_PINRANGE(a, b) { .offset = a, .pin_base = b } + +static struct coh901_pinpair coh901_pintable[] = { + COH901_PINRANGE(10, 426), + COH901_PINRANGE(11, 180), + COH901_PINRANGE(12, 165), /* MS/MMC card insertion */ + COH901_PINRANGE(13, 179), + COH901_PINRANGE(14, 178), + COH901_PINRANGE(16, 194), + COH901_PINRANGE(17, 193), + COH901_PINRANGE(18, 192), + COH901_PINRANGE(19, 191), + COH901_PINRANGE(20, 186), + COH901_PINRANGE(21, 185), + COH901_PINRANGE(22, 184), + COH901_PINRANGE(23, 183), + COH901_PINRANGE(24, 182), + COH901_PINRANGE(25, 181), +}; + static int __init u300_gpio_probe(struct platform_device *pdev) { struct u300_gpio_platform *plat = dev_get_platdata(&pdev->dev); @@ -786,16 +816,29 @@ static int __init u300_gpio_probe(struct platform_device *pdev) goto err_no_chip; } - /* Spawn pin controller device as child of the GPIO, pass gpio chip */ - plat->pinctrl_device->dev.platform_data = &gpio->chip; + /* Spawn pin controller device as child of the GPIO */ err = platform_device_register(plat->pinctrl_device); if (err) goto err_no_pinctrl; + /* + * Add pinctrl pin ranges, the pin controller must be registered + * at this point + */ + for (i = 0; i < ARRAY_SIZE(coh901_pintable); i++) { + struct coh901_pinpair *p = &coh901_pintable[i]; + + err = gpiochip_add_pin_range(&gpio->chip, "pinctrl-u300", + p->offset, p->pin_base, 1); + if (err) + goto err_no_range; + } + platform_set_drvdata(pdev, gpio); return 0; +err_no_range: err_no_pinctrl: err = gpiochip_remove(&gpio->chip); err_no_chip: |