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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-05-31 17:05:18 +0900
committerLinus Walleij <linus.walleij@linaro.org>2016-05-31 12:50:47 +0200
commit39ec9ace7afe3a35f78eb4beffd18ad34a1e0278 (patch)
treeb40e10b3f70a0e5686e7b65955176f5ed2b235f4 /drivers/pinctrl/uniphier/pinctrl-uniphier.h
parentaa543888ca8c033a7f06499b93cdfec84ad6ab27 (diff)
pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration (pin biasing, drive strength control), but not pin-muxing. Allow to fill the mux value table with -1 for those pins; pins with mux value -1 will be skipped in the pin-mux set function. The mux value type should be changed from "unsigned" to "int" in order to accommodate -1 as a special case. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/uniphier/pinctrl-uniphier.h')
-rw-r--r--drivers/pinctrl/uniphier/pinctrl-uniphier.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
index 9941a4ceb5c5..923f36cb245d 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
@@ -148,7 +148,7 @@ struct uniphier_pinctrl_group {
const char *name;
const unsigned *pins;
unsigned num_pins;
- const unsigned *muxvals;
+ const int *muxvals;
enum uniphier_pinmux_gpio_range_type range_type;
};