diff options
| author | David Rivshin <drivshin@allworx.com> | 2016-01-29 23:26:54 -0500 |
|---|---|---|
| committer | Thierry Reding <thierry.reding@gmail.com> | 2016-03-23 17:11:48 +0100 |
| commit | 922201d129c8f9d0c3207dca90ea6ffd8e2242f0 (patch) | |
| tree | 4911766dccfe46cce732f4ccd434df7372ae8ede /drivers/pwm | |
| parent | 7b0883f33809ff0aeca9848193c31629a752bb77 (diff) | |
pwm: omap-dmtimer: Add debug message for effective period and duty cycle
After going through the math and constraints checking to compute load
and match values, it is helpful to know what the resultant period and
duty cycle are.
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm')
| -rw-r--r-- | drivers/pwm/pwm-omap-dmtimer.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/pwm/pwm-omap-dmtimer.c b/drivers/pwm/pwm-omap-dmtimer.c index e0679eb399f6..b7e6ecba7d5c 100644 --- a/drivers/pwm/pwm-omap-dmtimer.c +++ b/drivers/pwm/pwm-omap-dmtimer.c @@ -102,7 +102,8 @@ static int pwm_omap_dmtimer_config(struct pwm_chip *chip, unsigned long clk_rate; bool timer_active; - dev_dbg(chip->dev, "duty cycle: %d, period %d\n", duty_ns, period_ns); + dev_dbg(chip->dev, "requested duty cycle: %d ns, period: %d ns\n", + duty_ns, period_ns); mutex_lock(&omap->mutex); if (duty_ns == pwm_get_duty_cycle(pwm) && @@ -166,6 +167,12 @@ static int pwm_omap_dmtimer_config(struct pwm_chip *chip, duty_cycles = period_cycles - 1; } + dev_dbg(chip->dev, "effective duty cycle: %lld ns, period: %lld ns\n", + DIV_ROUND_CLOSEST_ULL((u64)NSEC_PER_SEC * duty_cycles, + clk_rate), + DIV_ROUND_CLOSEST_ULL((u64)NSEC_PER_SEC * period_cycles, + clk_rate)); + load_value = (DM_TIMER_MAX - period_cycles) + 1; match_value = load_value + duty_cycles - 1; |