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authorJack Xu <jack.xu@intel.com>2020-11-06 19:27:55 +0800
committerHerbert Xu <herbert@gondor.apana.org.au>2020-11-13 20:38:51 +1100
commit49c1327328ad2245bf06bffc2591d3eb99b51c60 (patch)
tree3e45a69a9d9d8e178bdab4ee225a39710696e04f /drivers
parentfc5f3f86e5afb4008c6dea054fe4df302edd84df (diff)
crypto: qat - replace check based on DID
Modify condition in qat_uclo_wr_mimage() to use a capability of the device (sram_visible), rather than the device ID, so the check is not specific to devices of the same type. Signed-off-by: Jack Xu <jack.xu@intel.com> Co-developed-by: Wojciech Ziemba <wojciech.ziemba@intel.com> Signed-off-by: Wojciech Ziemba <wojciech.ziemba@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/crypto/qat/qat_common/qat_uclo.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/crypto/qat/qat_common/qat_uclo.c b/drivers/crypto/qat/qat_common/qat_uclo.c
index 1533981baf3a..5774916497bd 100644
--- a/drivers/crypto/qat/qat_common/qat_uclo.c
+++ b/drivers/crypto/qat/qat_common/qat_uclo.c
@@ -1410,9 +1410,11 @@ int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle,
status = qat_uclo_auth_fw(handle, desc);
qat_uclo_ummap_auth_fw(handle, &desc);
} else {
- if (handle->pci_dev->device == PCI_DEVICE_ID_INTEL_QAT_C3XXX) {
- pr_err("QAT: C3XXX doesn't support unsigned MMP\n");
- return -EINVAL;
+ if (!handle->chip_info->sram_visible) {
+ dev_dbg(&handle->pci_dev->dev,
+ "QAT MMP fw not loaded for device 0x%x",
+ handle->pci_dev->device);
+ return status;
}
qat_uclo_wr_sram_by_words(handle, 0, addr_ptr, mem_size);
}