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author | Frank Li <Frank.Li@nxp.com> | 2022-05-24 10:21:55 -0500 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-06-23 14:56:34 -0500 |
commit | 6951ee96c649f6e963b98c11b2b1a92697d3c45c (patch) | |
tree | 3f3434e522db703507122e3fef3533b7737b01c7 /include/linux/dma/xilinx_dpdma.h | |
parent | e51b3048116a6e10b96bd5298cbcb209b6d729cd (diff) |
dmaengine: dw-edma: Rename wr(rd)_ch_cnt to ll_wr(rd)_cnt in struct dw_edma_chip
The struct dw_edma contains wr(rd)_ch_cnt fields. The EDMA driver gets
write(read) channel number from register, then saves these into dw_edma.
The wr(rd)_ch_cnt in dw_edma_chip actually means how many link list memory
are available in ll_region_wr(rd)[EDMA_MAX_WR_CH]. Rename it to
ll_wr(rd)_cnt to indicate actual usage.
Link: https://lore.kernel.org/r/20220524152159.2370739-5-Frank.Li@nxp.com
Tested-by: Serge Semin <fancer.lancer@gmail.com>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'include/linux/dma/xilinx_dpdma.h')
0 files changed, 0 insertions, 0 deletions