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authorChanwoo Choi <cw00.choi@samsung.com>2015-12-29 10:42:39 +0900
committerSeung-Woo Kim <sw0312.kim@samsung.com>2016-12-14 13:50:37 +0900
commit8678861ee4325e601154b1d4658a2bd9964ea05b (patch)
treee6b9aadc0ae2c8e53b95054c6c3f12a3bfc594ec /mm/slab_common.c
parent80c0a067818a14f016f4bb450ac794a06520fad3 (diff)
clk: samsung: exynos5420: Add pll_rate_table and clock id for EPLL
This patch add the clock id of EPLL to handle it on devicetree file and the rate tables. EPLL is used as root clock of ASS (Audio Subsystem). Change-Id: Iefcbd5ea4cb911a3b5d75888286926773a98af54 Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Diffstat (limited to 'mm/slab_common.c')
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