diff options
| author | Bjorn Andersson <bjorn.andersson@linaro.org> | 2016-07-15 17:42:14 -0700 |
|---|---|---|
| committer | Andy Gross <andy.gross@linaro.org> | 2016-08-23 22:57:35 -0500 |
| commit | e95c08f45a8ecf9fa2e106f7e8243b7c850bde7f (patch) | |
| tree | 87aa2023827f910b89214ab59c2bfda8b7bcbd28 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | fb3013d3fc984464c34c33aeffe8c0c75bc90723 (diff) | |
arm64: dts: qcom: msm8916: Add tcsr syscon
The TCSR memory segment includes various functionality, among other
things the halt-registers for the Hexagon.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions