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author | Douglas Anderson <dianders@chromium.org> | 2019-06-14 15:47:29 -0700 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2019-06-16 15:35:21 +0200 |
commit | 99b9683f2142b20bad78e61f7f829e8714e45685 (patch) | |
tree | f961562a6c5d5c4bc672827db840ecdf6a1d82e4 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | 5d4d823d0ac9cbb70f93ef02b54d270cd2cba4c7 (diff) |
drm/rockchip: Properly adjust to a true clock in adjusted_mode
When fixing up the clock in vop_crtc_mode_fixup() we're not doing it
quite correctly. Specifically if we've got the true clock 266666667 Hz,
we'll perform this calculation:
266666667 / 1000 => 266666
Later when we try to set the clock we'll do clk_set_rate(266666 *
1000). The common clock framework won't actually pick the proper clock
in this case since it always wants clocks <= the specified one.
Let's solve this by using DIV_ROUND_UP.
Fixes: b59b8de31497 ("drm/rockchip: return a true clock rate to adjusted_mode")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20190614224730.98622-1-dianders@chromium.org
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions