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authorGeert Uytterhoeven <geert+renesas@glider.be>2020-11-17 10:03:27 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-01-12 12:35:13 +0100
commit010ce438e7bba81ae1b525795ec2f5313d78485a (patch)
treeb6f90f02259cf36e1a7f01b83d73ab1adc0e0cc4 /tools/perf/scripts/python/exported-sql-viewer.py
parentf08b0d8498b07d9332485f3077b40cfd86cf6789 (diff)
clk: renesas: r8a779a0: Add MSIOF clocks
Add the module clocks used by the Clock-Synchronized Serial Interface with FIFO (MSIOF) instances on the Renesas R-Car V3U (r8a779a0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201117090329.2128904-3-geert+renesas@glider.be
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