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author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2020-05-15 22:47:06 +0200 |
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committer | Kevin Hilman <khilman@baylibre.com> | 2020-05-19 16:02:14 -0700 |
commit | 18dfc0bf8167fb0dc729da4a6a816e34d754318b (patch) | |
tree | 3f886ea793d63f0a43b40fcd2c65c3e83c6a3013 /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | 8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff) |
dt-bindings: power: meson-ee-pwrc: add support for Meson8/8b/8m2
The power domains on the 32-bit Meson8/Meson8b/Meson8m2 SoCs are very
similar to what G12A still uses. The (known) differences are:
- Meson8 doesn't use any reset lines at all
- Meson8b and Meson8m2 use the same reset lines, which are different
from what the 64-bit SoCs use
- there is no "vapb" clock on the older SoCs
- amlogic,ao-sysctrl cannot point to the whole AO sysctrl region but
only the power management related registers
Add a new compatible string and adjust clock and reset line expectations
for each SoC.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200515204709.1505498-2-martin.blumenstingl@googlemail.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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