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authorKan Liang <kan.liang@linux.intel.com>2020-07-03 05:49:18 -0700
committerPeter Zijlstra <peterz@infradead.org>2020-07-08 11:38:54 +0200
commitfda1f99f34a8f0975086bcfef34da865009995c1 (patch)
tree3605f77b3b658a2969ab06b40e89a35cbdad7057 /tools/perf/scripts/python/exported-sql-viewer.py
parent020d91e5f32da4f4b929b3a6e680135fd526107c (diff)
perf/x86/intel/lbr: Factor out rdlbr_all() and wrlbr_all()
The previous model-specific LBR and Architecture LBR (legacy way) use a similar method to save/restore the LBR information, which directly accesses the LBR registers. The codes which read/write a set of LBR registers can be shared between them. Factor out two functions which are used to read/write a set of LBR registers. Add lbr_info into structure x86_pmu, and use it to replace the hardcoded LBR INFO MSR, because the LBR INFO MSR address of the previous model-specific LBR is different from Architecture LBR. The MSR address should be assigned at boot time. For now, only Sky Lake and later platforms have the LBR INFO MSR. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/1593780569-62993-13-git-send-email-kan.liang@linux.intel.com
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