diff options
Diffstat (limited to 'arch/hexagon')
| -rw-r--r-- | arch/hexagon/include/asm/atomic.h | 1 | ||||
| -rw-r--r-- | arch/hexagon/include/asm/barrier.h | 41 | ||||
| -rw-r--r-- | arch/hexagon/include/asm/bitops.h | 1 | ||||
| -rw-r--r-- | arch/hexagon/include/asm/cmpxchg.h (renamed from arch/hexagon/include/asm/system.h) | 46 | ||||
| -rw-r--r-- | arch/hexagon/include/asm/exec.h | 28 | ||||
| -rw-r--r-- | arch/hexagon/include/asm/perf_event.h | 2 | ||||
| -rw-r--r-- | arch/hexagon/include/asm/switch_to.h | 34 | ||||
| -rw-r--r-- | arch/hexagon/kernel/ptrace.c | 1 | ||||
| -rw-r--r-- | arch/hexagon/kernel/signal.c | 12 | ||||
| -rw-r--r-- | arch/hexagon/kernel/smp.c | 11 | ||||
| -rw-r--r-- | arch/hexagon/kernel/vdso.c | 3 | ||||
| -rw-r--r-- | arch/hexagon/kernel/vm_events.c | 1 |
12 files changed, 116 insertions, 65 deletions
diff --git a/arch/hexagon/include/asm/atomic.h b/arch/hexagon/include/asm/atomic.h index e220f9053035..3e258043337b 100644 --- a/arch/hexagon/include/asm/atomic.h +++ b/arch/hexagon/include/asm/atomic.h @@ -23,6 +23,7 @@ #define _ASM_ATOMIC_H #include <linux/types.h> +#include <asm/cmpxchg.h> #define ATOMIC_INIT(i) { (i) } #define atomic_set(v, i) ((v)->counter = (i)) diff --git a/arch/hexagon/include/asm/barrier.h b/arch/hexagon/include/asm/barrier.h new file mode 100644 index 000000000000..a4ed6e26cb1d --- /dev/null +++ b/arch/hexagon/include/asm/barrier.h @@ -0,0 +1,41 @@ +/* + * Memory barrier definitions for the Hexagon architecture + * + * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#ifndef _ASM_BARRIER_H +#define _ASM_BARRIER_H + +#define rmb() barrier() +#define read_barrier_depends() barrier() +#define wmb() barrier() +#define mb() barrier() +#define smp_rmb() barrier() +#define smp_read_barrier_depends() barrier() +#define smp_wmb() barrier() +#define smp_mb() barrier() +#define smp_mb__before_atomic_dec() barrier() +#define smp_mb__after_atomic_dec() barrier() +#define smp_mb__before_atomic_inc() barrier() +#define smp_mb__after_atomic_inc() barrier() + +/* Set a value and use a memory barrier. Used by the scheduler somewhere. */ +#define set_mb(var, value) \ + do { var = value; mb(); } while (0) + +#endif /* _ASM_BARRIER_H */ diff --git a/arch/hexagon/include/asm/bitops.h b/arch/hexagon/include/asm/bitops.h index d23461e080ff..4caa649ad78b 100644 --- a/arch/hexagon/include/asm/bitops.h +++ b/arch/hexagon/include/asm/bitops.h @@ -24,7 +24,6 @@ #include <linux/compiler.h> #include <asm/byteorder.h> -#include <asm/system.h> #include <asm/atomic.h> #ifdef __KERNEL__ diff --git a/arch/hexagon/include/asm/system.h b/arch/hexagon/include/asm/cmpxchg.h index 323ed1dd65e2..c5f9527e1df6 100644 --- a/arch/hexagon/include/asm/system.h +++ b/arch/hexagon/include/asm/cmpxchg.h @@ -1,8 +1,9 @@ /* - * System level definitions for the Hexagon architecture + * xchg/cmpxchg operations for the Hexagon architecture * * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. * + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. @@ -18,37 +19,8 @@ * 02110-1301, USA. */ -#ifndef _ASM_SYSTEM_H -#define _ASM_SYSTEM_H - -#include <linux/linkage.h> -#include <linux/irqflags.h> -#include <asm/atomic.h> -#include <asm/hexagon_vm.h> - -struct thread_struct; - -extern struct task_struct *__switch_to(struct task_struct *, - struct task_struct *, - struct task_struct *); - -#define switch_to(p, n, r) do {\ - r = __switch_to((p), (n), (r));\ -} while (0) - - -#define rmb() barrier() -#define read_barrier_depends() barrier() -#define wmb() barrier() -#define mb() barrier() -#define smp_rmb() barrier() -#define smp_read_barrier_depends() barrier() -#define smp_wmb() barrier() -#define smp_mb() barrier() -#define smp_mb__before_atomic_dec() barrier() -#define smp_mb__after_atomic_dec() barrier() -#define smp_mb__before_atomic_inc() barrier() -#define smp_mb__after_atomic_inc() barrier() +#ifndef _ASM_CMPXCHG_H +#define _ASM_CMPXCHG_H /* * __xchg - atomically exchange a register and a memory location @@ -87,10 +59,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, #define xchg(ptr, v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), \ sizeof(*(ptr)))) -/* Set a value and use a memory barrier. Used by the scheduler somewhere. */ -#define set_mb(var, value) \ - do { var = value; mb(); } while (0) - /* * see rt-mutex-design.txt; cmpxchg supposedly checks if *ptr == A and swaps. * looks just like atomic_cmpxchg on our arch currently with a bunch of @@ -119,8 +87,4 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, __oldval; \ }) -/* Should probably shoot for an 8-byte aligned stack pointer */ -#define STACK_MASK (~7) -#define arch_align_stack(x) (x & STACK_MASK) - -#endif +#endif /* _ASM_CMPXCHG_H */ diff --git a/arch/hexagon/include/asm/exec.h b/arch/hexagon/include/asm/exec.h new file mode 100644 index 000000000000..350e6d497d44 --- /dev/null +++ b/arch/hexagon/include/asm/exec.h @@ -0,0 +1,28 @@ +/* + * Process execution related definitions for the Hexagon architecture + * + * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#ifndef _ASM_EXEC_H +#define _ASM_EXEC_H + +/* Should probably shoot for an 8-byte aligned stack pointer */ +#define STACK_MASK (~7) +#define arch_align_stack(x) (x & STACK_MASK) + +#endif /* _ASM_EXEC_H */ diff --git a/arch/hexagon/include/asm/perf_event.h b/arch/hexagon/include/asm/perf_event.h index 6c2910f91180..8b8526b491c7 100644 --- a/arch/hexagon/include/asm/perf_event.h +++ b/arch/hexagon/include/asm/perf_event.h @@ -19,6 +19,4 @@ #ifndef _ASM_PERF_EVENT_H #define _ASM_PERF_EVENT_H -#define PERF_EVENT_INDEX_OFFSET 0 - #endif /* _ASM_PERF_EVENT_H */ diff --git a/arch/hexagon/include/asm/switch_to.h b/arch/hexagon/include/asm/switch_to.h new file mode 100644 index 000000000000..28ca0dfb6064 --- /dev/null +++ b/arch/hexagon/include/asm/switch_to.h @@ -0,0 +1,34 @@ +/* + * Task switching definitions for the Hexagon architecture + * + * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#ifndef _ASM_SWITCH_TO_H +#define _ASM_SWITCH_TO_H + +struct thread_struct; + +extern struct task_struct *__switch_to(struct task_struct *, + struct task_struct *, + struct task_struct *); + +#define switch_to(p, n, r) do {\ + r = __switch_to((p), (n), (r));\ +} while (0) + +#endif /* _ASM_SWITCH_TO_H */ diff --git a/arch/hexagon/kernel/ptrace.c b/arch/hexagon/kernel/ptrace.c index bea3f08470fd..32342de1a79c 100644 --- a/arch/hexagon/kernel/ptrace.c +++ b/arch/hexagon/kernel/ptrace.c @@ -29,7 +29,6 @@ #include <linux/regset.h> #include <linux/user.h> -#include <asm/system.h> #include <asm/user.h> static int genregs_get(struct task_struct *target, diff --git a/arch/hexagon/kernel/signal.c b/arch/hexagon/kernel/signal.c index b45be3181193..ecbab3457606 100644 --- a/arch/hexagon/kernel/signal.c +++ b/arch/hexagon/kernel/signal.c @@ -192,12 +192,7 @@ static int handle_signal(int sig, siginfo_t *info, struct k_sigaction *ka, if (rc) return rc; - spin_lock_irq(¤t->sighand->siglock); - sigorsets(¤t->blocked, ¤t->blocked, &ka->sa.sa_mask); - if (!(ka->sa.sa_flags & SA_NODEFER)) - sigaddset(¤t->blocked, sig); - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); + block_sigmask(ka, sig); return 0; } @@ -305,10 +300,7 @@ asmlinkage int sys_rt_sigreturn(void) goto badframe; sigdelsetmask(&blocked, ~_BLOCKABLE); - spin_lock_irq(¤t->sighand->siglock); - current->blocked = blocked; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); + set_current_blocked(&blocked); if (restore_sigcontext(regs, &frame->uc.uc_mcontext)) goto badframe; diff --git a/arch/hexagon/kernel/smp.c b/arch/hexagon/kernel/smp.c index c871a2cffaef..9b44a9e2d05a 100644 --- a/arch/hexagon/kernel/smp.c +++ b/arch/hexagon/kernel/smp.c @@ -29,14 +29,13 @@ #include <linux/smp.h> #include <linux/spinlock.h> -#include <asm/system.h> /* xchg */ #include <asm/time.h> /* timer_interrupt */ #include <asm/hexagon_vm.h> #define BASE_IPI_IRQ 26 /* - * cpu_possible_map needs to be filled out prior to setup_per_cpu_areas + * cpu_possible_mask needs to be filled out prior to setup_per_cpu_areas * (which is prior to any of our smp_prepare_cpu crap), in order to set * up the... per_cpu areas. */ @@ -179,8 +178,6 @@ void __cpuinit start_secondary(void) printk(KERN_INFO "%s cpu %d\n", __func__, current_thread_info()->cpu); set_cpu_online(cpu, true); - while (!cpumask_test_cpu(cpu, cpu_active_mask)) - cpu_relax(); local_irq_enable(); cpu_idle(); @@ -211,7 +208,7 @@ int __cpuinit __cpu_up(unsigned int cpu) stack_start = ((void *) thread) + THREAD_SIZE; __vmstart(start_secondary, stack_start); - while (!cpu_isset(cpu, cpu_online_map)) + while (!cpu_online(cpu)) barrier(); return 0; @@ -232,7 +229,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) /* Right now, let's just fake it. */ for (i = 0; i < max_cpus; i++) - cpu_set(i, cpu_present_map); + set_cpu_present(i, true); /* Also need to register the interrupts for IPI */ if (max_cpus > 1) @@ -272,5 +269,5 @@ void smp_start_cpus(void) int i; for (i = 0; i < NR_CPUS; i++) - cpu_set(i, cpu_possible_map); + set_cpu_possible(i, true); } diff --git a/arch/hexagon/kernel/vdso.c b/arch/hexagon/kernel/vdso.c index 16277c33308a..f212a453b527 100644 --- a/arch/hexagon/kernel/vdso.c +++ b/arch/hexagon/kernel/vdso.c @@ -78,8 +78,7 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) /* MAYWRITE to allow gdb to COW and set breakpoints. */ ret = install_special_mapping(mm, vdso_base, PAGE_SIZE, VM_READ|VM_EXEC| - VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC| - VM_ALWAYSDUMP, + VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC, &vdso_page); if (ret) diff --git a/arch/hexagon/kernel/vm_events.c b/arch/hexagon/kernel/vm_events.c index 986a081e32ec..591fc1b68635 100644 --- a/arch/hexagon/kernel/vm_events.c +++ b/arch/hexagon/kernel/vm_events.c @@ -22,7 +22,6 @@ #include <asm/registers.h> #include <linux/irq.h> #include <linux/hardirq.h> -#include <asm/system.h> /* * show_regs - print pt_regs structure |