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-rw-r--r--arch/alpha/kernel/core_mcpcia.c2
-rw-r--r--arch/alpha/kernel/err_titan.c1
-rw-r--r--arch/alpha/kernel/module.c8
-rw-r--r--arch/alpha/kernel/sys_nautilus.c6
-rw-r--r--arch/alpha/kernel/sys_noritake.c9
-rw-r--r--arch/alpha/kernel/sys_rawhide.c15
-rw-r--r--arch/alpha/kernel/sys_sio.c14
-rw-r--r--arch/alpha/kernel/sys_sx164.c2
-rw-r--r--arch/alpha/kernel/sys_titan.c3
-rw-r--r--arch/i386/kernel/nmi.c9
-rw-r--r--arch/i386/kernel/vmlinux.lds.S2
-rw-r--r--arch/x86_64/kernel/nmi.c10
-rw-r--r--arch/x86_64/kernel/vmlinux.lds.S2
13 files changed, 58 insertions, 25 deletions
diff --git a/arch/alpha/kernel/core_mcpcia.c b/arch/alpha/kernel/core_mcpcia.c
index 8d019071190a..381fec0af52e 100644
--- a/arch/alpha/kernel/core_mcpcia.c
+++ b/arch/alpha/kernel/core_mcpcia.c
@@ -40,8 +40,6 @@
# define DBG_CFG(args)
#endif
-#define MCPCIA_MAX_HOSES 4
-
/*
* Given a bus, device, and function number, compute resulting
* configuration space address and setup the MCPCIA_HAXR2 register
diff --git a/arch/alpha/kernel/err_titan.c b/arch/alpha/kernel/err_titan.c
index febe71c6869f..543d96d7fa2b 100644
--- a/arch/alpha/kernel/err_titan.c
+++ b/arch/alpha/kernel/err_titan.c
@@ -16,6 +16,7 @@
#include <asm/smp.h>
#include <asm/err_common.h>
#include <asm/err_ev6.h>
+#include <asm/irq_regs.h>
#include "err_impl.h"
#include "proto.h"
diff --git a/arch/alpha/kernel/module.c b/arch/alpha/kernel/module.c
index aac6d4b22f7a..bd03dc94c72b 100644
--- a/arch/alpha/kernel/module.c
+++ b/arch/alpha/kernel/module.c
@@ -285,12 +285,12 @@ apply_relocate_add(Elf64_Shdr *sechdrs, const char *strtab,
reloc_overflow:
if (ELF64_ST_TYPE (sym->st_info) == STT_SECTION)
printk(KERN_ERR
- "module %s: Relocation overflow vs section %d\n",
- me->name, sym->st_shndx);
+ "module %s: Relocation (type %lu) overflow vs section %d\n",
+ me->name, r_type, sym->st_shndx);
else
printk(KERN_ERR
- "module %s: Relocation overflow vs %s\n",
- me->name, strtab + sym->st_name);
+ "module %s: Relocation (type %lu) overflow vs %s\n",
+ me->name, r_type, strtab + sym->st_name);
return -ENOEXEC;
}
}
diff --git a/arch/alpha/kernel/sys_nautilus.c b/arch/alpha/kernel/sys_nautilus.c
index e7594a7cf585..920196bcbb61 100644
--- a/arch/alpha/kernel/sys_nautilus.c
+++ b/arch/alpha/kernel/sys_nautilus.c
@@ -70,6 +70,12 @@ nautilus_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
/* Preserve the IRQ set up by the console. */
u8 irq;
+ /* UP1500: AGP INTA is actually routed to IRQ 5, not IRQ 10 as
+ console reports. Check the device id of AGP bridge to distinguish
+ UP1500 from UP1000/1100. Note: 'pin' is 2 due to bridge swizzle. */
+ if (slot == 1 && pin == 2 &&
+ dev->bus->self && dev->bus->self->device == 0x700f)
+ return 5;
pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
return irq;
}
diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c
index de6ba3432e8a..eb2a1d63f484 100644
--- a/arch/alpha/kernel/sys_noritake.c
+++ b/arch/alpha/kernel/sys_noritake.c
@@ -66,6 +66,13 @@ noritake_startup_irq(unsigned int irq)
return 0;
}
+static void
+noritake_end_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ noritake_enable_irq(irq);
+}
+
static struct hw_interrupt_type noritake_irq_type = {
.typename = "NORITAKE",
.startup = noritake_startup_irq,
@@ -73,7 +80,7 @@ static struct hw_interrupt_type noritake_irq_type = {
.enable = noritake_enable_irq,
.disable = noritake_disable_irq,
.ack = noritake_disable_irq,
- .end = noritake_enable_irq,
+ .end = noritake_end_irq,
};
static void
diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c
index 581d08c70b92..672cb2df53df 100644
--- a/arch/alpha/kernel/sys_rawhide.c
+++ b/arch/alpha/kernel/sys_rawhide.c
@@ -52,6 +52,9 @@ rawhide_update_irq_hw(int hose, int mask)
*(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose));
}
+#define hose_exists(h) \
+ (((h) < MCPCIA_MAX_HOSES) && (cached_irq_masks[(h)] != 0))
+
static inline void
rawhide_enable_irq(unsigned int irq)
{
@@ -59,6 +62,9 @@ rawhide_enable_irq(unsigned int irq)
irq -= 16;
hose = irq / 24;
+ if (!hose_exists(hose)) /* if hose non-existent, exit */
+ return;
+
irq -= hose * 24;
mask = 1 << irq;
@@ -76,6 +82,9 @@ rawhide_disable_irq(unsigned int irq)
irq -= 16;
hose = irq / 24;
+ if (!hose_exists(hose)) /* if hose non-existent, exit */
+ return;
+
irq -= hose * 24;
mask = ~(1 << irq) | hose_irq_masks[hose];
@@ -93,6 +102,9 @@ rawhide_mask_and_ack_irq(unsigned int irq)
irq -= 16;
hose = irq / 24;
+ if (!hose_exists(hose)) /* if hose non-existent, exit */
+ return;
+
irq -= hose * 24;
mask1 = 1 << irq;
mask = ~mask1 | hose_irq_masks[hose];
@@ -169,6 +181,9 @@ rawhide_init_irq(void)
mcpcia_init_hoses();
+ /* Clear them all; only hoses that exist will be non-zero. */
+ for (i = 0; i < MCPCIA_MAX_HOSES; i++) cached_irq_masks[i] = 0;
+
for (hose = hose_head; hose; hose = hose->next) {
unsigned int h = hose->index;
unsigned int mask = hose_irq_masks[h];
diff --git a/arch/alpha/kernel/sys_sio.c b/arch/alpha/kernel/sys_sio.c
index a654014d202a..14b5a753aba5 100644
--- a/arch/alpha/kernel/sys_sio.c
+++ b/arch/alpha/kernel/sys_sio.c
@@ -84,12 +84,16 @@ alphabook1_init_arch(void)
static void __init
sio_pci_route(void)
{
-#if defined(ALPHA_RESTORE_SRM_SETUP)
- /* First, read and save the original setting. */
+ unsigned int orig_route_tab;
+
+ /* First, ALWAYS read and print the original setting. */
pci_bus_read_config_dword(pci_isa_hose->bus, PCI_DEVFN(7, 0), 0x60,
- &saved_config.orig_route_tab);
+ &orig_route_tab);
printk("%s: PIRQ original 0x%x new 0x%x\n", __FUNCTION__,
- saved_config.orig_route_tab, alpha_mv.sys.sio.route_tab);
+ orig_route_tab, alpha_mv.sys.sio.route_tab);
+
+#if defined(ALPHA_RESTORE_SRM_SETUP)
+ saved_config.orig_route_tab = orig_route_tab;
#endif
/* Now override with desired setting. */
@@ -334,7 +338,7 @@ struct alpha_machine_vector avanti_mv __initmv = {
.pci_swizzle = common_swizzle,
.sys = { .sio = {
- .route_tab = 0x0b0a0e0f,
+ .route_tab = 0x0b0a050f, /* leave 14 for IDE, 9 for SND */
}}
};
ALIAS_MV(avanti)
diff --git a/arch/alpha/kernel/sys_sx164.c b/arch/alpha/kernel/sys_sx164.c
index 94ad68b7c0ae..41d4ad4c7c44 100644
--- a/arch/alpha/kernel/sys_sx164.c
+++ b/arch/alpha/kernel/sys_sx164.c
@@ -132,7 +132,7 @@ sx164_init_arch(void)
if (amask(AMASK_MAX) != 0
&& alpha_using_srm
- && (cpu->pal_revision & 0xffff) == 0x117) {
+ && (cpu->pal_revision & 0xffff) <= 0x117) {
__asm__ __volatile__(
"lda $16,8($31)\n"
"call_pal 9\n" /* Allow PALRES insns in kernel mode */
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index 29ab7db81c30..f009b7bc0943 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -257,8 +257,7 @@ titan_dispatch_irqs(u64 mask)
*/
while (mask) {
/* convert to SRM vector... priority is <63> -> <0> */
- __asm__("ctlz %1, %0" : "=r"(vector) : "r"(mask));
- vector = 63 - vector;
+ vector = 63 - __kernel_ctlz(mask);
mask &= ~(1UL << vector); /* clear it out */
vector = 0x900 + (vector << 4); /* convert to SRM vector */
diff --git a/arch/i386/kernel/nmi.c b/arch/i386/kernel/nmi.c
index a98ba88a8c0c..9f1e8c1afab7 100644
--- a/arch/i386/kernel/nmi.c
+++ b/arch/i386/kernel/nmi.c
@@ -41,16 +41,17 @@ int nmi_watchdog_enabled;
* different subsystems this reservation system just tries to coordinate
* things a little
*/
-static DEFINE_PER_CPU(unsigned long, perfctr_nmi_owner);
-static DEFINE_PER_CPU(unsigned long, evntsel_nmi_owner[3]);
-
-static cpumask_t backtrace_mask = CPU_MASK_NONE;
/* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's
* offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now)
*/
#define NMI_MAX_COUNTER_BITS 66
+#define NMI_MAX_COUNTER_LONGS BITS_TO_LONGS(NMI_MAX_COUNTER_BITS)
+static DEFINE_PER_CPU(unsigned long, perfctr_nmi_owner[NMI_MAX_COUNTER_LONGS]);
+static DEFINE_PER_CPU(unsigned long, evntsel_nmi_owner[NMI_MAX_COUNTER_LONGS]);
+
+static cpumask_t backtrace_mask = CPU_MASK_NONE;
/* nmi_active:
* >0: the lapic NMI watchdog is active, but can be disabled
* <0: the lapic NMI watchdog has not been set up, and cannot
diff --git a/arch/i386/kernel/vmlinux.lds.S b/arch/i386/kernel/vmlinux.lds.S
index ca51610955df..6f38f818380b 100644
--- a/arch/i386/kernel/vmlinux.lds.S
+++ b/arch/i386/kernel/vmlinux.lds.S
@@ -26,7 +26,7 @@ OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
ENTRY(phys_startup_32)
jiffies = jiffies_64;
-_proxy_pda = 0;
+_proxy_pda = 1;
PHDRS {
text PT_LOAD FLAGS(5); /* R_E */
diff --git a/arch/x86_64/kernel/nmi.c b/arch/x86_64/kernel/nmi.c
index a90996c27dc8..dfab9f167366 100644
--- a/arch/x86_64/kernel/nmi.c
+++ b/arch/x86_64/kernel/nmi.c
@@ -39,15 +39,17 @@ int panic_on_unrecovered_nmi;
* different subsystems this reservation system just tries to coordinate
* things a little
*/
-static DEFINE_PER_CPU(unsigned, perfctr_nmi_owner);
-static DEFINE_PER_CPU(unsigned, evntsel_nmi_owner[2]);
-
-static cpumask_t backtrace_mask = CPU_MASK_NONE;
/* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's
* offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now)
*/
#define NMI_MAX_COUNTER_BITS 66
+#define NMI_MAX_COUNTER_LONGS BITS_TO_LONGS(NMI_MAX_COUNTER_BITS)
+
+static DEFINE_PER_CPU(unsigned, perfctr_nmi_owner[NMI_MAX_COUNTER_LONGS]);
+static DEFINE_PER_CPU(unsigned, evntsel_nmi_owner[NMI_MAX_COUNTER_LONGS]);
+
+static cpumask_t backtrace_mask = CPU_MASK_NONE;
/* nmi_active:
* >0: the lapic NMI watchdog is active, but can be disabled
diff --git a/arch/x86_64/kernel/vmlinux.lds.S b/arch/x86_64/kernel/vmlinux.lds.S
index b73212c0a550..5176ecf006ee 100644
--- a/arch/x86_64/kernel/vmlinux.lds.S
+++ b/arch/x86_64/kernel/vmlinux.lds.S
@@ -13,7 +13,7 @@ OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64")
OUTPUT_ARCH(i386:x86-64)
ENTRY(phys_startup_64)
jiffies_64 = jiffies;
-_proxy_pda = 0;
+_proxy_pda = 1;
PHDRS {
text PT_LOAD FLAGS(5); /* R_E */
data PT_LOAD FLAGS(7); /* RWE */
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-06 09:13:24 +0000