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-rw-r--r--drivers/mmc/host/dw_mmc-exynos.c2
-rw-r--r--drivers/mmc/host/dw_mmc-exynos.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index 6b5843279348..6934b92c0d72 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -442,7 +442,7 @@ static inline u8 dw_mci_exynos_move_next_clksmpl(struct dw_mci *host)
sample = (clksel + 1) & 0x7;
clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample) |
- SDMMC_CLKSEL_SAMPLE_CLK_TUNING(0x3);
+ SDMMC_CLKSEL_SAMPLE_CLK_TUNING;
if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
diff --git a/drivers/mmc/host/dw_mmc-exynos.h b/drivers/mmc/host/dw_mmc-exynos.h
index 588ec167c7ea..c1f5d36e0b53 100644
--- a/drivers/mmc/host/dw_mmc-exynos.h
+++ b/drivers/mmc/host/dw_mmc-exynos.h
@@ -34,7 +34,7 @@
SDMMC_CLKSEL_CCLK_DRIVE(y) | \
SDMMC_CLKSEL_CCLK_DIVIDER(z))
#define SDMMC_CLKSEL_TIMING_MASK SDMMC_CLKSEL_TIMING(0x7, 0x7, 0x7)
-#define SDMMC_CLKSEL_SAMPLE_CLK_TUNING(x) ((x) << 6)
+#define SDMMC_CLKSEL_SAMPLE_CLK_TUNING BIT(6)
#define SDMMC_CLKSEL_WAKEUP_INT BIT(11)
/* RCLK_EN register defines */