diff options
Diffstat (limited to 'drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c')
| -rw-r--r-- | drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c | 225 |
1 files changed, 75 insertions, 150 deletions
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c index cf23414d7224..22365926a9f8 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c @@ -20,16 +20,11 @@ #define MAX_DOZE_WAITING_TIMES_9x 64 /** -* Function: phy_CalculateBitShift -* -* OverView: Get shifted position of the BitMask -* -* Input: -* u32 BitMask, -* -* Output: none -* Return: u32 Return the shift bit bit position of the mask -*/ + * phy_CalculateBitShift - Get shifted position of the BitMask. + * @BitMask: Bitmask. + * + * Return: Return the shift bit position of the mask + */ static u32 phy_CalculateBitShift(u32 BitMask) { u32 i; @@ -43,19 +38,17 @@ static u32 phy_CalculateBitShift(u32 BitMask) /** -* Function: PHY_QueryBBReg -* -* OverView: Read "specific bits" from BB register -* -* Input: -* struct adapter * Adapter, -* u32 RegAddr, The target address to be readback -* u32 BitMask The target bit position in the target address -* to be readback -* Output: None -* Return: u32 Data The readback register value -* Note: This function is equal to "GetRegSetting" in PHY programming guide -*/ + * PHY_QueryBBReg - Read "specific bits" from BB register. + * @Adapter: + * @RegAddr: The target address to be readback + * @BitMask: The target bit position in the target address + * to be readback + * + * Return: The readback register value + * + * .. Note:: This function is equal to "GetRegSetting" in PHY programming + * guide + */ u32 PHY_QueryBBReg_8723B(struct adapter *Adapter, u32 RegAddr, u32 BitMask) { u32 OriginalValue, BitShift; @@ -64,8 +57,6 @@ u32 PHY_QueryBBReg_8723B(struct adapter *Adapter, u32 RegAddr, u32 BitMask) return 0; #endif - /* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); */ - OriginalValue = rtw_read32(Adapter, RegAddr); BitShift = phy_CalculateBitShift(BitMask); @@ -75,22 +66,17 @@ u32 PHY_QueryBBReg_8723B(struct adapter *Adapter, u32 RegAddr, u32 BitMask) /** -* Function: PHY_SetBBReg -* -* OverView: Write "Specific bits" to BB register (page 8~) -* -* Input: -* struct adapter * Adapter, -* u32 RegAddr, The target address to be modified -* u32 BitMask The target bit position in the target address -* to be modified -* u32 Data The new register value in the target bit position -* of the target address -* -* Output: None -* Return: None -* Note: This function is equal to "PutRegSetting" in PHY programming guide -*/ + * PHY_SetBBReg - Write "Specific bits" to BB register (page 8~). + * @Adapter: + * @RegAddr: The target address to be modified + * @BitMask: The target bit position in the target address + * to be modified + * @Data: The new register value in the target bit position + * of the target address + * + * .. Note:: This function is equal to "PutRegSetting" in PHY programming + * guide + */ void PHY_SetBBReg_8723B( struct adapter *Adapter, @@ -106,8 +92,6 @@ void PHY_SetBBReg_8723B( return; #endif - /* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */ - if (BitMask != bMaskDWord) { /* if not "double word" write */ OriginalValue = rtw_read32(Adapter, RegAddr); BitShift = phy_CalculateBitShift(BitMask); @@ -171,40 +155,30 @@ static u32 phy_RFSerialRead_8723B( if (RfPiEnable) { /* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhySet, bLSSIReadBackData); - - /* RT_DISP(FINIT, INIT_RF, ("Readback from RF-PI : 0x%x\n", retValue)); */ } else { /* Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF */ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhySet, bLSSIReadBackData); - - /* RT_DISP(FINIT, INIT_RF, ("Readback from RF-SI : 0x%x\n", retValue)); */ } return retValue; } /** -* Function: phy_RFSerialWrite_8723B -* -* OverView: Write data to RF register (page 8~) -* -* Input: -* struct adapter * Adapter, -* RF_PATH eRFPath, Radio path of A/B/C/D -* u32 Offset, The target address to be read -* u32 Data The new register Data in the target bit position -* of the target to be read -* -* Output: None -* Return: None -* Note: Threre are three types of serial operations: -* 1. Software serial write -* 2. Hardware LSSI-Low Speed Serial Interface -* 3. Hardware HSSI-High speed -* serial write. Driver need to implement (1) and (2). -* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() + * phy_RFSerialWrite_8723B - Write data to RF register (page 8~). + * @Adapter: + * @eRFPath: Radio path of A/B/C/D + * @Offset: The target address to be read + * @Data: The new register Data in the target bit position + * of the target to be read + * + * .. Note:: Threre are three types of serial operations: + * 1. Software serial write + * 2. Hardware LSSI-Low Speed Serial Interface + * 3. Hardware HSSI-High speed + * serial write. Driver need to implement (1) and (2). + * This function is equal to the combination of RF_ReadReg() and RFLSSIRead() * - * Note: For RF8256 only + * .. Note:: For RF8256 only * The total count of RTL8256(Zebra4) register is around 36 bit it only employs * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration @@ -225,7 +199,7 @@ static u32 phy_RFSerialRead_8723B( * * * -*/ + */ static void phy_RFSerialWrite_8723B( struct adapter *Adapter, enum RF_PATH eRFPath, @@ -248,34 +222,27 @@ static void phy_RFSerialWrite_8723B( /* */ /* Put write addr in [5:0] and write data in [31:16] */ /* */ - /* DataAndAddr = (Data<<16) | (NewOffset&0x3f); */ DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; /* T65 RF */ - /* */ /* Write Operation */ /* */ PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); - /* RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]= 0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); */ - } /** -* Function: PHY_QueryRFReg -* -* OverView: Query "Specific bits" to RF register (page 8~) -* -* Input: -* struct adapter * Adapter, -* RF_PATH eRFPath, Radio path of A/B/C/D -* u32 RegAddr, The target address to be read -* u32 BitMask The target bit position in the target address -* to be read -* -* Output: None -* Return: u32 Readback value -* Note: This function is equal to "GetRFRegSetting" in PHY programming guide -*/ + * PHY_QueryRFReg - Query "Specific bits" to RF register (page 8~). + * @Adapter: + * @eRFPath: Radio path of A/B/C/D + * @RegAdd: The target address to be read + * @BitMask: The target bit position in the target address + * to be read + * + * Return: Readback value + * + * .. Note:: This function is equal to "GetRFRegSetting" in PHY + * programming guide + */ u32 PHY_QueryRFReg_8723B( struct adapter *Adapter, u8 eRFPath, @@ -296,23 +263,18 @@ u32 PHY_QueryRFReg_8723B( } /** -* Function: PHY_SetRFReg -* -* OverView: Write "Specific bits" to RF register (page 8~) -* -* Input: -* struct adapter * Adapter, -* RF_PATH eRFPath, Radio path of A/B/C/D -* u32 RegAddr, The target address to be modified -* u32 BitMask The target bit position in the target address -* to be modified -* u32 Data The new register Data in the target bit position -* of the target address -* -* Output: None -* Return: None -* Note: This function is equal to "PutRFRegSetting" in PHY programming guide -*/ + * PHY_SetRFReg - Write "Specific bits" to RF register (page 8~). + * @Adapter: + * @eRFPath: Radio path of A/B/C/D + * @RegAddr: The target address to be modified + * @BitMask: The target bit position in the target address + * to be modified + * @Data: The new register Data in the target bit position + * of the target address + * + * .. Note:: This function is equal to "PutRFRegSetting" in PHY + * programming guide. + */ void PHY_SetRFReg_8723B( struct adapter *Adapter, u8 eRFPath, @@ -344,15 +306,7 @@ void PHY_SetRFReg_8723B( /*----------------------------------------------------------------------------- - * Function: PHY_MACConfig8192C - * - * Overview: Condig MAC by header file or parameter file. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE + * PHY_MACConfig8192C - Condig MAC by header file or parameter file. * * Revised History: * When Who Remark @@ -369,17 +323,12 @@ s32 PHY_MACConfig8723B(struct adapter *Adapter) } /** -* Function: phy_InitBBRFRegisterDefinition -* -* OverView: Initialize Register definition offset for Radio Path A/B/C/D -* -* Input: -* struct adapter * Adapter, -* -* Output: None -* Return: None -* Note: The initialization value is constant and it should never be changes -*/ + * phy_InitBBRFRegisterDefinition - Initialize Register definition offset for + * Radio Path A/B/C/D + * @Adapter: + * + * .. Note:: The initialization value is constant and it should never be changes + */ static void phy_InitBBRFRegisterDefinition(struct adapter *Adapter) { struct hal_com_data *pHalData = GET_HAL_DATA(Adapter); @@ -512,7 +461,6 @@ int PHY_RFConfig8723B(struct adapter *Adapter) rtStatus = PHY_RF6052_Config8723B(Adapter); phy_LCK_8723B(Adapter); - /* PHY_BB8723B_Config_1T(Adapter); */ return rtStatus; } @@ -619,8 +567,6 @@ u8 PHY_GetTxPowerIndex( s8 txPower = 0, powerDiffByRate = 0, limit = 0; bool bIn24G = false; - /* DBG_871X("===>%s\n", __func__); */ - txPower = (s8) PHY_GetTxPowerIndexBase(padapter, RFPath, Rate, BandWidth, Channel, &bIn24G); powerDiffByRate = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, ODM_RF_PATH_A, RF_1TX, Rate); @@ -642,7 +588,6 @@ u8 PHY_GetTxPowerIndex( if (txPower > MAX_POWER_INDEX) txPower = MAX_POWER_INDEX; - /* DBG_871X("Final Tx Power(RF-%c, Channel: %d) = %d(0x%X)\n", ((RFPath == 0)?'A':'B'), Channel, txPower, txPower)); */ return (u8) txPower; } @@ -789,8 +734,6 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter) PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); -/* PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); */ - PHY_SetBBReg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT31|BIT30), 0x0); break; @@ -805,15 +748,9 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter) PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); -/* PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); */ - PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); - break; - default: - /*RT_TRACE(COMP_DBG, DBG_LOUD, ("phy_SetBWMode8723B(): unknown Bandwidth: %#X\n"\ - , pHalData->CurrentChannelBW));*/ break; } @@ -826,10 +763,8 @@ static void phy_SwChnl8723B(struct adapter *padapter) struct hal_com_data *pHalData = GET_HAL_DATA(padapter); u8 channelToSW = pHalData->CurrentChannel; - if (pHalData->rf_chip == RF_PSEUDO_11N) { - /* RT_TRACE(COMP_MLME, DBG_LOUD, ("phy_SwChnl8723B: return for PSEUDO\n")); */ + if (pHalData->rf_chip == RF_PSEUDO_11N) return; - } pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff00) | channelToSW); PHY_SetRFReg(padapter, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]); PHY_SetRFReg(padapter, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]); @@ -841,7 +776,6 @@ static void phy_SwChnlAndSetBwMode8723B(struct adapter *Adapter) { struct hal_com_data *pHalData = GET_HAL_DATA(Adapter); - /* RT_TRACE(COMP_SCAN, DBG_LOUD, ("phy_SwChnlAndSetBwMode8723B(): bSwChnl %d, bSetChnlBW %d\n", pHalData->bSwChnl, pHalData->bSetChnlBW)); */ if (Adapter->bNotifyChannelChange) { DBG_871X("[%s] bSwChnl =%d, ch =%d, bSetChnlBW =%d, bw =%d\n", __func__, @@ -886,8 +820,6 @@ static void PHY_HandleSwChnlAndSetBW8723B( u8 tmpnCur80MhzPrimeSC = pHalData->nCur80MhzPrimeSC; u8 tmpCenterFrequencyIndex1 = pHalData->CurrentCenterFrequencyIndex1; - /* DBG_871X("=> PHY_HandleSwChnlAndSetBW8812: bSwitchChannel %d, bSetBandWidth %d\n", bSwitchChannel, bSetBandWidth); */ - /* check is swchnl or setbw */ if (!bSwitchChannel && !bSetBandWidth) { DBG_871X("PHY_HandleSwChnlAndSetBW8812: not switch channel and not set bandwidth\n"); @@ -896,7 +828,6 @@ static void PHY_HandleSwChnlAndSetBW8723B( /* skip change for channel or bandwidth is the same */ if (bSwitchChannel) { - /* if (pHalData->CurrentChannel != ChannelNum) */ { if (HAL_IsLegalChannel(Adapter, ChannelNum)) pHalData->bSwChnl = true; @@ -906,10 +837,8 @@ static void PHY_HandleSwChnlAndSetBW8723B( if (bSetBandWidth) pHalData->bSetChnlBW = true; - if (!pHalData->bSetChnlBW && !pHalData->bSwChnl) { - /* DBG_871X("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d\n", pHalData->bSwChnl, pHalData->bSetChnlBW); */ + if (!pHalData->bSetChnlBW && !pHalData->bSwChnl) return; - } if (pHalData->bSwChnl) { @@ -968,9 +897,5 @@ void PHY_SetSwChnlBWMode8723B( u8 Offset80 ) { - /* DBG_871X("%s() ===>\n", __func__); */ - PHY_HandleSwChnlAndSetBW8723B(Adapter, true, true, channel, Bandwidth, Offset40, Offset80, channel); - - /* DBG_871X("<==%s()\n", __func__); */ } |