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path: root/drivers/cxl
AgeCommit message (Expand)Author
2022-04-12cxl/mem: Drop DVSEC vs EFI Memory Map sanity checkDan Williams
2022-04-12cxl/mbox: Use new return_code handlingDavidlohr Bueso
2022-04-12cxl/mbox: Improve handling of mbox_cmd hw return codesDavidlohr Bueso
2022-04-12cxl/pci: Use CXL_MBOX_SUCCESS to check against mbox_cmd return codeDavidlohr Bueso
2022-04-12cxl/mbox: Drop mbox_mutex commentDavidlohr Bueso
2022-04-12cxl/pmem: Remove CXL SET_PARTITION_INFO from exclusive_cmds listAlison Schofield
2022-04-12cxl/mbox: Block immediate mode in SET_PARTITION_INFO commandAlison Schofield
2022-04-12cxl/mbox: Move cxl_mem_command param to a local variableAlison Schofield
2022-04-12cxl/mbox: Make handle_mailbox_cmd_from_user() use a mbox paramAlison Schofield
2022-04-12cxl/mbox: Remove dependency on cxl_mem_command for a debug msgAlison Schofield
2022-04-12cxl/mbox: Construct a users cxl_mbox_cmd in the validation pathAlison Schofield
2022-04-12cxl/mbox: Move build of user mailbox cmd to a helper functionsAlison Schofield
2022-04-12cxl/mbox: Move raw command warning to raw command validationAlison Schofield
2022-04-12cxl/mbox: Move cxl_mem_command construction to helper funcsAlison Schofield
2022-04-08cxl/pci: Drop shadowed variableDan Williams
2022-03-22cxl/core/port: Fix NULL but dereferenced coccicheck errorWan Jiabing
2022-02-17cxl/port: Hold port reference until decoder releaseDan Williams
2022-02-17cxl/port: Fix endpoint refcount leakDan Williams
2022-02-11cxl/core: Fix cxl_device_lock() class detectionDan Williams
2022-02-11cxl/core/port: Fix unregister_port() lock assertionDan Williams
2022-02-08cxl/regs: Fix size of CXL Capability Header RegisterJonathan Cameron
2022-02-08cxl/core/port: Handle invalid decodersDan Williams
2022-02-08cxl/core/port: Fix / relax decoder target enumerationDan Williams
2022-02-08cxl/core/port: Add endpoint decodersBen Widawsky
2022-02-08cxl/core: Move target_list out of base decoder attributesDan Williams
2022-02-08cxl/mem: Add the cxl_mem driverBen Widawsky
2022-02-08cxl/core/port: Add switch port enumerationDan Williams
2022-02-08cxl/memdev: Add numa_node attributeDan Williams
2022-02-08cxl/pci: Emit device serial numberDan Williams
2022-02-08cxl/pci: Implement wait for media activeBen Widawsky
2022-02-08cxl/pci: Retrieve CXL DVSEC memory infoBen Widawsky
2022-02-08cxl/pci: Cache device DVSEC offsetBen Widawsky
2022-02-08cxl/pci: Store component register base in cxldsBen Widawsky
2022-02-08cxl/core/port: Remove @host argument for dport + decoder enumerationDan Williams
2022-02-08cxl/port: Add a driver for 'struct cxl_port' objectsBen Widawsky
2022-02-08cxl/core: Emit modalias for CXL devicesDan Williams
2022-02-08cxl/core/hdm: Add CXL standard decoder enumeration to the coreDan Williams
2022-02-08cxl/core: Generalize dport enumeration in the coreDan Williams
2022-02-08cxl/pci: Rename pci.h to cxlpci.hDan Williams
2022-02-08cxl/port: Up-level cxl_add_dport() locking requirements to the callerDan Williams
2022-02-08cxl/pmem: Introduce a find_cxl_root() helperDan Williams
2022-02-08cxl/port: Introduce cxl_port_to_pci_bus()Dan Williams
2022-02-08cxl/core/port: Use dedicated lock for decoder target listDan Williams
2022-02-08cxl: Prove CXL lockingDan Williams
2022-02-08cxl/core: Track port depthBen Widawsky
2022-02-08cxl/core/port: Make passthrough decoder init implicitBen Widawsky
2022-02-08cxl/core: Fix cxl_probe_component_regs() error messageDan Williams
2022-02-08cxl/core/port: Clarify decoder creationBen Widawsky
2022-02-08cxl/core: Convert decoder range to resourceBen Widawsky
2022-02-08cxl/decoder: Hide physical address information from non-rootDan Williams