From f63834e6c6145fb7667ef0c645cbc52313e71c69 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Fri, 18 Oct 2013 20:02:29 -0300 Subject: ARM: mvebu: Add Core Divider clock device-tree binding The Armada 370/XP SoCs have a Core Divider clock providing several clocks. For now, only the NAND clock is supported. Reviewed-by: Gregory CLEMENT Signed-off-by: Ezequiel Garcia Signed-off-by: Jason Cooper --- .../devicetree/bindings/clock/mvebu-corediv-clock.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt diff --git a/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt new file mode 100644 index 000000000000..c62391fc0e39 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt @@ -0,0 +1,19 @@ +* Core Divider Clock bindings for Marvell MVEBU SoCs + +The following is a list of provided IDs and clock names on Armada 370/XP: + 0 = nand (NAND clock) + +Required properties: +- compatible : must be "marvell,armada-370-corediv-clock" +- reg : must be the register address of Core Divider control register +- #clock-cells : from common clock binding; shall be set to 1 +- clocks : must be set to the parent's phandle + +Example: + +corediv_clk: corediv-clocks@18740 { + compatible = "marvell,armada-370-corediv-clock"; + reg = <0x18740 0xc>; + #clock-cells = <1>; + clocks = <&pll>; +}; -- cgit v1.2.3