From eabfbcfd8abfb5c26eeeb60a7f5d27610f3327b1 Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Wed, 8 Apr 2015 16:23:52 +0900 Subject: ARM: dts: exynos5420: fix clk of mali node Need only CLK_G3D gate clock for mali and use clk_mali name to control the clock from mali core codes. Signed-off-by: Joonyoung Shim --- arch/arm/boot/dts/exynos5420.dtsi | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 1c8122cd48e7..f15f31b76aac 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -918,11 +918,8 @@ reg = <0x11800000 0x5000>; interrupts = <0 219 0>, <0 74 0>, <0 117 0>; interrupt-names = "JOB", "MMU", "GPU"; - clocks = <&clock CLK_G3D>, <&clock CLK_MOUT_G3D>, - <&clock CLK_MOUT_VPLL>, <&clock CLK_FIN_PLL>, - <&clock CLK_FOUT_VPLL>; - clock-names = "g3d", "aclk_g3d", "mout_vpll", "ext_xtal", - "fout_vpll"; + clocks = <&clock CLK_G3D>; + clock-names = "clk_mali"; status = "disabled"; }; -- cgit v1.2.3