From 9743b38969790d33b077ab80b175ea63a0398703 Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Sat, 12 Feb 2011 18:24:32 -0800 Subject: ARM: tegra: clock: Add function to set SDMMC tap delay The SDMMC controllers have extra bits in the clock source register that adjust the delay between the clock and data to compenstate for delays on the PCB. The values need to be set from the clock code so the clock can be locked during the read-modify-write on the clock source register. Acked-by: Olof Johansson Signed-off-by: Colin Cross --- arch/arm/mach-tegra/clock.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch/arm/mach-tegra/clock.c') diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index f1f9c6d36bd2..165aa9c748f6 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -390,6 +390,20 @@ void __init tegra_init_clock(void) tegra2_init_clocks(); } +/* + * The SDMMC controllers have extra bits in the clock source register that + * adjust the delay between the clock and data to compenstate for delays + * on the PCB. + */ +void tegra_sdmmc_tap_delay(struct clk *c, int delay) +{ + unsigned long flags; + + spin_lock_irqsave(&c->spinlock, flags); + tegra2_sdmmc_tap_delay(c, delay); + spin_unlock_irqrestore(&c->spinlock, flags); +} + #ifdef CONFIG_DEBUG_FS static int __clk_lock_all_spinlocks(void) -- cgit v1.2.3