From d00e6e22e8b9f8d3b8308706f57ae82119289792 Mon Sep 17 00:00:00 2001 From: Yifeng Zhao Date: Thu, 10 Dec 2020 08:22:16 +0800 Subject: arm64: dts: rockchip: Add NFC node for PX30 SoC Add NAND FLASH Controller(NFC) node for PX30 SoC. Signed-off-by: Yifeng Zhao Link: https://lore.kernel.org/r/20201210002219.5739-1-yifeng.zhao@rock-chips.com Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/px30.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch/arm64/boot/dts/rockchip') diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index af6bcef9e848..6a3e57761b25 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -973,6 +973,21 @@ status = "disabled"; }; + nfc: nand-controller@ff3b0000 { + compatible = "rockchip,px30-nfc"; + reg = <0x0 0xff3b0000 0x0 0x4000>; + interrupts = ; + clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>; + clock-names = "ahb", "nfc"; + assigned-clocks = <&cru SCLK_NANDC>; + assigned-clock-rates = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_cs0 + &flash_rdn &flash_rdy &flash_wrn &flash_dqs>; + power-domains = <&power PX30_PD_MMC_NAND>; + status = "disabled"; + }; + gpu: gpu@ff400000 { compatible = "rockchip,px30-mali", "arm,mali-bifrost"; reg = <0x0 0xff400000 0x0 0x4000>; -- cgit v1.2.3