From f3e5996218b6d81be5a503922793900dac3b1f99 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Mon, 9 May 2022 19:56:15 +0200 Subject: ARM: dts: aspeed-g4: Set spi-max-frequency for all flashes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set "spi-max-frequency" to 50 MHz for all the flashes under the FMC controller to ensure the clock frequency is calculated correctly. Suggested-by: Cédric Le Goater Tested-by: Jae Hyun Yoo Signed-off-by: Tao Ren Signed-off-by: Cédric Le Goater Link: https://lore.kernel.org/r/20220509175616.1089346-11-clg@kaod.org Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 1c6354cec9f2..530491ae5eb2 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -72,24 +72,28 @@ reg = < 1 >; compatible = "jedec,spi-nor"; spi-rx-bus-width = <2>; + spi-max-frequency = <50000000>; status = "disabled"; }; flash@2 { reg = < 2 >; compatible = "jedec,spi-nor"; spi-rx-bus-width = <2>; + spi-max-frequency = <50000000>; status = "disabled"; }; flash@3 { reg = < 3 >; compatible = "jedec,spi-nor"; spi-rx-bus-width = <2>; + spi-max-frequency = <50000000>; status = "disabled"; }; flash@4 { reg = < 4 >; compatible = "jedec,spi-nor"; spi-rx-bus-width = <2>; + spi-max-frequency = <50000000>; status = "disabled"; }; }; -- cgit v1.2.3