From a1604f9121ee97b27d5ce308ddd4b70c3a220279 Mon Sep 17 00:00:00 2001 From: Matt Porter Date: Tue, 21 Jun 2005 17:15:22 -0700 Subject: [PATCH] cpm_uart: Route SCC2 pins for the STx GP3 board Adds SCC2 pin routing specific to the GP3 board. Signed-off-by: Matt Porter Signed-off-by: Kumar Gala Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/serial/cpm_uart/cpm_uart_cpm2.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'drivers/serial/cpm_uart') diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c index b422c3abfba6..c4c8f4b44f53 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c +++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c @@ -134,12 +134,21 @@ void scc1_lineif(struct uart_cpm_port *pinfo) void scc2_lineif(struct uart_cpm_port *pinfo) { + /* + * STx GP3 uses the SCC2 secondary option pin assignment + * which this driver doesn't account for in the static + * pin assignments. This kind of board specific info + * really has to get out of the driver so boards can + * be supported in a sane fashion. + */ +#ifndef CONFIG_STX_GP3 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; io->iop_pparb |= 0x008b0000; io->iop_pdirb |= 0x00880000; io->iop_psorb |= 0x00880000; io->iop_pdirb &= ~0x00030000; io->iop_psorb &= ~0x00030000; +#endif cpm2_immr->im_cpmux.cmx_scr &= 0xff00ffff; cpm2_immr->im_cpmux.cmx_scr |= 0x00090000; pinfo->brg = 2; -- cgit v1.2.3