// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; #include #include #include "k3-am642.dtsi" / { compatible = "ti,am642-sk", "ti,am642"; model = "Texas Instruments AM642 SK"; chosen { stdout-path = "serial2:115200n8"; bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; }; memory@80000000 { device_type = "memory"; /* 2G RAM */ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; }; reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; secure_ddr: optee@9e800000 { reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ alignment = <0x1000>; no-map; }; }; vusb_main: fixed-regulator-vusb-main5v0 { /* USB MAIN INPUT 5V DC */ compatible = "regulator-fixed"; regulator-name = "vusb_main5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; regulator-boot-on; }; vcc_3v3_sys: fixedregulator-vcc-3v3-sys { /* output of LP8733xx */ compatible = "regulator-fixed"; regulator-name = "vcc_3v3_sys"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vusb_main>; regulator-always-on; regulator-boot-on; }; vdd_mmc1: fixed-regulator-sd { /* TPS2051BD */ compatible = "regulator-fixed"; regulator-name = "vdd_mmc1"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; enable-active-high; vin-supply = <&vcc_3v3_sys>; gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; }; }; &main_pmx0 { main_mmc1_pins_default: main-mmc1-pins-default { pinctrl-single,pins = < AM64X_IOPAD(0x0294, PIN_INPUT, 0) /* (J19) MMC1_CMD */ AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */ AM64X_IOPAD(0x028c, PIN_INPUT, 0) /* (L20) MMC1_CLK */ AM64X_IOPAD(0x0288, PIN_INPUT, 0) /* (K21) MMC1_DAT0 */ AM64X_IOPAD(0x0284, PIN_INPUT, 0) /* (L21) MMC1_DAT1 */ AM64X_IOPAD(0x0280, PIN_INPUT, 0) /* (K19) MMC1_DAT2 */ AM64X_IOPAD(0x027c, PIN_INPUT, 0) /* (K18) MMC1_DAT3 */ AM64X_IOPAD(0x0298, PIN_INPUT, 0) /* (D19) MMC1_SDCD */ >; }; main_i2c1_pins_default: main-i2c1-pins-default { pinctrl-single,pins = < AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */ >; }; mdio1_pins_default: mdio1-pins-default { pinctrl-single,pins = < AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */ AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */ >; }; rgmii1_pins_default: rgmii1-pins-default { pinctrl-single,pins = < AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */ AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */ AM64X_IOPAD(0x0150, PIN_INPUT, 4) /* (Y13) PRG1_PRU1_GPO18.RGMII1_RD2 */ AM64X_IOPAD(0x0154, PIN_INPUT, 4) /* (V12) PRG1_PRU1_GPO19.RGMII1_RD3 */ AM64X_IOPAD(0x00d8, PIN_INPUT, 4) /* (W13) PRG1_PRU0_GPO8.RGMII1_RXC */ AM64X_IOPAD(0x00cc, PIN_INPUT, 4) /* (V13) PRG1_PRU0_GPO5.RGMII1_RX_CTL */ AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */ AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */ AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */ AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */ AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */ AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */ >; }; rgmii2_pins_default: rgmii2-pins-default { pinctrl-single,pins = < AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */ AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */ AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */ AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */ AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */ AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ >; }; }; &mcu_uart0 { status = "disabled"; }; &mcu_uart1 { status = "disabled"; }; &main_uart1 { /* main_uart1 is reserved for firmware usage */ status = "reserved"; }; &main_uart2 { status = "disabled"; }; &main_uart3 { status = "disabled"; }; &main_uart4 { status = "disabled"; }; &main_uart5 { status = "disabled"; }; &main_uart6 { status = "disabled"; }; &mcu_i2c0 { status = "disabled"; }; &mcu_i2c1 { status = "disabled"; }; &main_i2c1 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c1_pins_default>; clock-frequency = <400000>; exp1: gpio@70 { compatible = "nxp,pca9538"; reg = <0x70>; gpio-controller; #gpio-cells = <2>; gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", "PRU_DETECT", "MMC1_SD_EN", "VPP_LDO_EN", "RPI_PS_3V3_En", "RPI_PS_5V0_En", "RPI_HAT_DETECT"; }; }; &main_i2c3 { status = "disabled"; }; &mcu_spi0 { status = "disabled"; }; &mcu_spi1 { status = "disabled"; }; &sdhci1 { /* SD/MMC */ vmmc-supply = <&vdd_mmc1>; pinctrl-names = "default"; bus-width = <4>; pinctrl-0 = <&main_mmc1_pins_default>; ti,driver-strength-ohm = <50>; disable-wp; }; &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&mdio1_pins_default &rgmii1_pins_default &rgmii2_pins_default>; }; &cpsw_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy0>; }; &cpsw_port2 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy1>; }; &cpsw3g_mdio { cpsw3g_phy0: ethernet-phy@0 { reg = <0>; ti,rx-internal-delay = ; ti,fifo-depth = ; }; cpsw3g_phy1: ethernet-phy@1 { reg = <1>; ti,rx-internal-delay = ; ti,fifo-depth = ; }; };