<feed xmlns='http://www.w3.org/2005/Atom'>
<title>snowball/igloo-kernel.git/arch/m68k/platform/coldfire, branch integration-linux-ux500</title>
<subtitle>Igloo kernel</subtitle>
<id>https://git.etezian.org/cgit.cgi/snowball/igloo-kernel.git/atom?h=integration-linux-ux500</id>
<link rel='self' href='https://git.etezian.org/cgit.cgi/snowball/igloo-kernel.git/atom?h=integration-linux-ux500'/>
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<updated>2012-05-08T03:06:51+00:00</updated>
<entry>
<title>m68knommu: enable qspi support when SPI_COLDFIRE_QSPI = m</title>
<updated>2012-05-08T03:06:51+00:00</updated>
<author>
<name>Steven King</name>
<email>sfking@fdwdc.com</email>
</author>
<published>2012-05-06T19:22:53+00:00</published>
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<id>urn:sha1:83ca60094e5e907b8b43c60b4c29b1119604cbb8</id>
<content type='text'>
Enable Coldfire QSPI support when SPI_COLDFIRE_QSPI is built as a module.

This version of the patch combines changes to the config files and  device.c
and uses IF_ENABLED (thanks to Sam Ravnborg for the suggestion).

Signed-off-by: Steven King &lt;sfking@fdwdc.com&gt;
Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: fix id number for second eth device on 5275 ColdFire</title>
<updated>2012-04-17T06:58:35+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2012-04-17T06:58:35+00:00</published>
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<id>urn:sha1:bfdd769ac51cb68cb99902192fac81bc67cb23b0</id>
<content type='text'>
The second ColdFire FEC ethernet device should have an id number of 1,
not 0. Otherwise it clashes with the first FEC ethernet device.

On booting a kernel on a 5275 based board you will get messages out of
the kernel like this:

    &lt;4&gt;------------[ cut here ]------------
    &lt;4&gt;WARNING: at fs/sysfs/dir.c:508 0x0a8b50()
    &lt;4&gt;sysfs: cannot create duplicate filename 'fec.0'

And likely you won't be able to completely boot up after this at all.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: factor more common ColdFire cpu reset code</title>
<updated>2012-03-05T00:42:28+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2012-02-19T06:47:24+00:00</published>
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<id>urn:sha1:ae909ea4ad2431e085e6cc96446fbc1c1ae88498</id>
<content type='text'>
Most of the more modern ColdFire cores use the same code to reset the CPU
(but it is different to most of the earlier cores). Currently that is
duplicated in each of the sub-arch files. Pull out this common code and
out a single copy of it with the other common reset code.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: factor some common ColdFire cpu reset code</title>
<updated>2012-03-05T00:41:48+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2012-02-19T06:16:58+00:00</published>
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<id>urn:sha1:d894b89bf74322845f776bde4d72b70b58926886</id>
<content type='text'>
A number of the early ColdFire cores use the same code to reset the CPU.
Currently that is duplicated in each of the sub-arch files. Pull out this
common code and use a single copy of it for all CPU types that use it.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: move old ColdFire timers init from CPU init to timers code</title>
<updated>2012-03-04T23:43:10+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-12-24T04:36:27+00:00</published>
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<id>urn:sha1:440f6ffc061a84e81386a093c07af8a429c18702</id>
<content type='text'>
The original ColdFire timer interrupt setup is used by most of the users
of the original ColdFire timer code. But the code is currently duplicated
in each of the ColdFire CPU specific init files. Move it to the timers
code that it is really part of. It is strait forward to make it conditional
on also having the original interrupt engine that it needs.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: merge common ColdFire QSPI platform setup code</title>
<updated>2012-03-04T23:43:09+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-12-24T02:56:10+00:00</published>
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<id>urn:sha1:fa1fc24662d57170259948314b0759376eb75777</id>
<content type='text'>
The ColdFire QSPI is common to quite a few ColdFire CPUs. No need to duplicate
its platform setup code for every CPU family member that has it. Merge all the
setup code into a single shared file.

This also results in few platforms no longer needing any local platform
setup code. In those cases remove the empty devices array and initcall
code as well.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: merge common ColdFire FEC platform setup code</title>
<updated>2012-03-04T23:43:08+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-12-24T00:30:36+00:00</published>
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<id>urn:sha1:b7ce7f0d0efc1a95154fa6872d5d7c970d281c71</id>
<content type='text'>
The ColdFire FEC is common to quite a few ColdFire CPUs. No need to duplicate
its platform setup code for every CPU family member that has it. Merge all the
setup code into a single shared file.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: merge common ColdFire UART IRQ setup</title>
<updated>2012-03-04T23:43:08+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-12-23T15:23:35+00:00</published>
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<id>urn:sha1:55148f6f886a1b77dba1a5c3169208606827b9db</id>
<content type='text'>
Some ColdFire CPU UART hardware modules can configure the IRQ they use.
Currently the same setup code is duplicated in the init code for each of
these ColdFire CPUs. Merge all this code to a single instance.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: merge common ColdFire UART platform setup code</title>
<updated>2012-03-04T23:43:08+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-12-23T15:17:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/snowball/igloo-kernel.git/commit/?id=0d2fe946474196e586e492d9e9b381e184c774ea'/>
<id>urn:sha1:0d2fe946474196e586e492d9e9b381e184c774ea</id>
<content type='text'>
The ColdFire UART is common to all ColdFire CPU's. No need to duplicate
its platform setup code for every CPU family member. Merge all the setup
code into a single shared file.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: modify timer init code to make it consistent with m68k code</title>
<updated>2012-03-04T23:43:04+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2012-01-23T05:34:58+00:00</published>
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<id>urn:sha1:35aefb2645d1ae7576699b2d7b66d6c9503113fc</id>
<content type='text'>
With a few small changes we can make the m68knommu timer init code the
same as the m68k code. By using the mach_sched_init function pointer
and reworking the current timer initializers to keep track of the common
m68k timer_interrupt() handler we end up with almost identical code for
m68knommu.

This will allow us to more easily merge the mmu and non-mmu m68k time.c
in future patches.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
</feed>
