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<title>snowball/igloo-kernel.git/arch, branch v3.1</title>
<subtitle>Igloo kernel</subtitle>
<id>https://git.etezian.org/cgit.cgi/snowball/igloo-kernel.git/atom?h=v3.1</id>
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<updated>2011-10-24T04:55:20+00:00</updated>
<entry>
<title>x86: Fix S4 regression</title>
<updated>2011-10-24T04:55:20+00:00</updated>
<author>
<name>Takashi Iwai</name>
<email>tiwai@suse.de</email>
</author>
<published>2011-10-23T21:19:12+00:00</published>
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<id>urn:sha1:8548c84da2f47e71bbbe300f55edb768492575f7</id>
<content type='text'>
Commit 4b239f458 ("x86-64, mm: Put early page table high") causes a S4
regression since 2.6.39, namely the machine reboots occasionally at S4
resume.  It doesn't happen always, overall rate is about 1/20.  But,
like other bugs, once when this happens, it continues to happen.

This patch fixes the problem by essentially reverting the memory
assignment in the older way.

Signed-off-by: Takashi Iwai &lt;tiwai@suse.de&gt;
Cc: &lt;stable@kernel.org&gt;
Cc: Rafael J. Wysocki &lt;rjw@sisk.pl&gt;
Cc: Yinghai Lu &lt;yinghai.lu@oracle.com&gt;
[ We'll hopefully find the real fix, but that's too late for 3.1 now ]
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'samsung-fixes-4' of git://github.com/kgene/linux-samsung</title>
<updated>2011-10-23T07:44:40+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2011-10-23T07:44:40+00:00</published>
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<id>urn:sha1:1bf1aacedcda23c75e70fa3394e1caa6d4b5ee49</id>
<content type='text'>
* 'samsung-fixes-4' of git://github.com/kgene/linux-samsung:
  ARM: S3C24XX: Fix s3c24xx build errors if !CONFIG_PM
  ARM: S5P: fix offset calculation on gpio-interrupt
</content>
</entry>
<entry>
<title>ARM: S3C24XX: Fix s3c24xx build errors if !CONFIG_PM</title>
<updated>2011-10-21T19:00:53+00:00</updated>
<author>
<name>Domenico Andreoli</name>
<email>cavokz@gmail.com</email>
</author>
<published>2011-10-21T19:00:53+00:00</published>
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<id>urn:sha1:fb630b9fc902e24209166b1659a8b375bf38099c</id>
<content type='text'>
v2:
- register_syscore_ops(&amp;s3c24xx_irq_syscore_ops) does not need to be
  conditionally compiled out, it is already optimized out on !CONFIG_PM
- fix also s3c2412 and s3c2416 affected by the same build issue

v1:
s3c2440.c fails to build if !CONFIG_PM because in such case
s3c2410_pm_syscore_ops is not defined. Same error should happen also
in s3c2410.c and s3c2442.c

Signed-off-by: Domenico Andreoli &lt;cavokz@gmail.com&gt;
Signed-off-by: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
</content>
</entry>
<entry>
<title>ARM: S5P: fix offset calculation on gpio-interrupt</title>
<updated>2011-10-21T09:05:02+00:00</updated>
<author>
<name>Marek Szyprowski</name>
<email>m.szyprowski@samsung.com</email>
</author>
<published>2011-10-21T09:04:54+00:00</published>
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<id>urn:sha1:1052cff317e7636456595f2246b9f644c53eccbd</id>
<content type='text'>
Offsets of the irq controller registers were calculated
correctly only for first GPIO bank. This patch fixes
calculation of the register offsets for all GPIO banks.

Reported-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Signed-off-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Signed-off-by: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc</title>
<updated>2011-10-20T19:16:28+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2011-10-20T19:16:28+00:00</published>
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<id>urn:sha1:fd11e153b82ad1c84ccc71ba1cfedc222465198c</id>
<content type='text'>
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  sparc: Add alignment flag to PCI expansion resources
  sparc: Avoid calling sigprocmask()
  sparc: Use set_current_blocked()
  sparc32,leon: SRMMU MMU Table probe fix
</content>
</entry>
<entry>
<title>sparc: Add alignment flag to PCI expansion resources</title>
<updated>2011-10-19T23:20:50+00:00</updated>
<author>
<name>Kjetil Oftedal</name>
<email>oftedal@gmail.com</email>
</author>
<published>2011-10-19T23:20:50+00:00</published>
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<id>urn:sha1:aad4564498dcb0aad769a79e5e2aa9a661dfb51f</id>
<content type='text'>
Currently no type of alignment is specified for PCI expansion roms while 
parsing the openfirmware tree. This causes calls to pci_map_rom() to fail.
IORESOURCE_SIZEALIGN is the default alignment used for rom resouces in 
pci/probe.c, and has been verified to work with various cards on a ultra 10.

Signed-off-By: Kjetil Oftedal &lt;oftedal@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>Merge branch 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm</title>
<updated>2011-10-16T20:08:27+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2011-10-16T20:08:27+00:00</published>
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<id>urn:sha1:8bc03e8f3a334e09e89a7dffb486ee97a5ce84ae</id>
<content type='text'>
* 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm:
  ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUS
  ARM: 7122/1: localtimer: add header linux/errno.h explicitly
  ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9
  ARM: 7113/1: mm: Align bank start to MAX_ORDER_NR_PAGES
</content>
</entry>
<entry>
<title>ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUS</title>
<updated>2011-10-15T10:04:22+00:00</updated>
<author>
<name>Zoltan Devai</name>
<email>zoss@devai.org</email>
</author>
<published>2011-10-10T13:54:12+00:00</published>
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<id>urn:sha1:f8be12d15374413cf437741a282e97129e759209</id>
<content type='text'>
This is unneeded and causes an abort on the SPMP8000 platform.

Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Zoltan Devai &lt;zoss@devai.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 7122/1: localtimer: add header linux/errno.h explicitly</title>
<updated>2011-10-15T10:04:22+00:00</updated>
<author>
<name>Shawn Guo</name>
<email>shawn.guo@linaro.org</email>
</author>
<published>2011-10-06T13:57:24+00:00</published>
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<id>urn:sha1:bb1ac3ec95cf0cce5145617b140f2090ed45d565</id>
<content type='text'>
Per the text in  Documentation/SubmitChecklist as below, we should
explicitly have header linux/errno.h in localtimer.h for ENXIO
reference.

1: If you use a facility then #include the file that defines/declares
   that facility.  Don't depend on other header files pulling in ones
   that you use.

Otherwise, we may run into some compiling error like the following one,
if any file includes localtimer.h without CONFIG_LOCAL_TIMERS defined.

  arch/arm/include/asm/localtimer.h: In function ‘local_timer_setup’:
  arch/arm/include/asm/localtimer.h:53:10: error: ‘ENXIO’ undeclared (first use in this function)

Signed-off-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9</title>
<updated>2011-10-15T10:04:22+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2011-10-03T17:30:53+00:00</published>
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<id>urn:sha1:29a541f6c1f6e4a85628bb86071b9e72c9f8be2c</id>
<content type='text'>
Using COHERENT_LINE_{MISS,HIT} for cache misses and references
respectively is completely wrong. Instead, use the L1D events which
are a better and more useful approximation despite ignoring instruction
traffic.

Reported-by: Alasdair Grant &lt;alasdair.grant@arm.com&gt;
Reported-by: Matt Horsnell &lt;matt.horsnell@arm.com&gt;
Reported-by: Michael Williams &lt;michael.williams@arm.com&gt;
Cc: stable@kernel.org
Cc: Jean Pihet &lt;j-pihet@ti.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
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