Igloo kernel https://git.etezian.org/cgit.cgi/snowball/igloo-kernel.git/atom?h=u0 2011-03-25T21:58:20+00:00 2011-03-25T21:58:20+00:00 Andres Salomon dilinger@queued.net 2011-02-18T03:07:15+00:00 urn:sha1:76a244badbce1135178a17db53298c47e7adb208 The cell's platform_data is now accessed with a helper function; change clients to use that, and remove the now-unused data_size. Note that the mfd's platform_data is marked __devinitdata. This is still correct in all cases except for the timbgpio driver, whose remove hook has been changed to no longer reference the pdata. Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> (cherry picked from commit e46dccff341068d8530610a822965794f70b998f) 2011-03-25T21:27:23+00:00 Nicolas Pitre nicolas.pitre@linaro.org 2011-03-25T21:27:14+00:00 urn:sha1:6dbefa3923cce818d54f9ab70966b48fd3771183 2011-03-22T18:12:29+00:00 Viresh Kumar viresh.kumar@st.com 2011-03-22T11:57:25+00:00 urn:sha1:d42efe6bfb4eed8314c8ce3547f21954a4140399 When we try to test all channels present on our controller together, some channels of lower priority may be very slow as compared to others. If number of transfers is unlimited, some channels may timeout and will not finish within 3 seconds. Thus, while doing such regress testing we may need to have higher value of timeouts. This patch adds support for passing timeout value via module parameters. Default value is 3 msec, a negative value means max timeout possible. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> 2011-03-22T18:11:20+00:00 Uwe Kleine-König u.kleine-koenig@pengutronix.de 2011-03-22T09:35:17+00:00 urn:sha1:5b9a4f98b2e29fb92a4a54ef12b2e3940f941ed9 As a side effect this makes IMX_DMA selectable on i.MX21 again, because the symbol ARCH_MX21 doesn't exist (MACH_MX21 would have been more correct). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com> 2011-03-12T01:52:37+00:00 Ira Snyder iws@ovro.caltech.edu 2011-03-03T07:55:01+00:00 urn:sha1:a00ae34ac8bc8a5897d9b6b9b685c39b955b14b9 The original dma_halt() function set the CA (channel abort) bit on both the 83xx and 85xx controllers. This is incorrect on the 83xx, where this bit means TEM (transfer error mask) instead. The 83xx doesn't support channel abort, so we only do this operation on 85xx. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com> 2011-03-12T01:52:37+00:00 Ira Snyder iws@ovro.caltech.edu 2011-03-03T07:55:00+00:00 urn:sha1:dc8d4091575ba81e886ebcdfd1e559c981f82f86 This merges the fsl_chan_ld_cleanup() function into the dma_do_tasklet() function to reduce locking overhead. In the best case, we will be able to keep the DMA controller busy while we are freeing used descriptors. In all cases, the spinlock is grabbed two times fewer than before on each transaction. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com> 2011-03-12T01:52:37+00:00 Ira Snyder iws@ovro.caltech.edu 2011-03-03T07:54:59+00:00 urn:sha1:9c4d1e7bdeb1ed4dc0c3341d40662a6fbc5f2dc2 Previous to this patch, the dma_run_dependencies() function has been called while holding desc_lock. This function can call tx_submit() for other descriptors, which may try to re-grab the lock. Avoid this by moving the descriptors to be cleaned up to a temporary list, and dropping the lock before cleanup. At the same time, add support for automatic unmapping of src and dst buffers, as offered by the DMAEngine API. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com> 2011-03-12T01:52:36+00:00 Ira Snyder iws@ovro.caltech.edu 2011-03-03T07:54:58+00:00 urn:sha1:f04cd40701deace2efb9edd7120e59366bda2118 Enabling poisoning in the dmapool API quickly showed that the DMA controller was fetching descriptors that should not have been in use. This has caused intermittent controller lockups during testing. I have been unable to figure out the exact set of conditions which cause this to happen. However, I believe it is related to the driver using the hardware registers to track whether the controller is busy or not. The code can incorrectly decide that the hardware is idle due to lag between register writes and the hardware actually becoming busy. To fix this, the driver has been reworked to explicitly track the state of the hardware, rather than try to guess what it is doing based on the register values. This has passed dmatest with 10 threads per channel, 100000 iterations per thread several times without error. Previously, this would fail within a few seconds. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com> 2011-03-12T01:52:36+00:00 Ira Snyder iws@ovro.caltech.edu 2011-03-03T07:54:57+00:00 urn:sha1:31f4306c83a2daa3e348056b720de511bffe5a9b This fixes some minor violations of the coding style. It also changes the style of the device_prep_dma_*() function definitions so they are identical. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com> 2011-03-12T01:52:36+00:00 Ira Snyder iws@ovro.caltech.edu 2011-03-03T07:54:56+00:00 urn:sha1:0ab09c36818ca88f65c88f4d8c6d067fbf10578d This adds better tracking to link descriptor allocations, callbacks, and frees. This makes it much easier to track errors with link descriptors. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>