OMAP4: SGX-KM: Update DDK version to 1.7.17.3556

This patch updates the DDK to version 1.7.17.3556

The corresponding change in the user side most be
in place for this DDK to work.

Change-Id: I57ab5c29e7cf89bfce2388428914cc1f1474be6d
Signed-off-by: Rodrigo Obregon <robregon@ti.com>

88 files changed, 15497 insertions, 5486 deletions

diff --git a/drivers/gpu/pvr/Makefile b/drivers/gpu/pvr/Makefile
index 0dc058d364d..d537d081489 100644
--- a/drivers/gpu/pvr/Makefile
+++ b/drivers/gpu/pvr/Makefile
@@ -26,8 +26,12 @@ ccflags-y = -DLINUX -D__linux__ -Idrivers/gpu/pvr \
 	-DPVR_LINUX_MISR_USING_PRIVATE_WORKQUEUE \
 	-DSYS_CUSTOM_POWERLOCK_WRAP \
 	-DSUPPORT_SGX_NEW_STATUS_VALS \
-        -DSYS_OMAP3430_PIN_MEMORY_BUS_CLOCK \
+	-DSYS_OMAP3430_PIN_MEMORY_BUS_CLOCK \
 	-DSGX_EARLYSUSPEND \
+	-DSUPPORT_DBGDRV_EVENT_OBJECTS \
+	-DPVR_NO_OMAP_TIMER \
+	-DSUPPORT_DYNAMIC_GTF_TIMING \
+	-DSUPPORT_SGX_LOW_LATENCY_SCHEDULING \
 	-DPVRSRV_MODNAME="\"pvrsrvkm"\"
 
 ccflags-$(CONFIG_SGX540) +=  -Idrivers/gpu/pvr/omap4  -Idrivers/gpu/pvr/sgx \
@@ -48,8 +52,7 @@ ccflags-$(CONFIG_SGX_530_BUILD_RELEASE) += \
 	-DPVR_BUILD_TYPE="\"release\"" \
 	-DRELEASE \
 	-DSUPPORT_ACTIVE_POWER_MANAGEMENT \
-	-DSUPPORT_HW_RECOVERY \
-	-DSUPPORT_SGX_LOW_LATENCY_SCHEDULING
+	-DSUPPORT_HW_RECOVERY
 
 ccflags-$(CONFIG_SGX_530_BUILD_DEBUG) += \
 	-DPVR_BUILD_TYPE="\"debug\""  -DDEBUG \
@@ -65,8 +68,7 @@ ccflags-$(CONFIG_SGX_540_BUILD_RELEASE) += \
 	-DPVR_BUILD_TYPE="\"release\"" \
 	-DRELEASE \
 	-DSUPPORT_ACTIVE_POWER_MANAGEMENT \
-	-DPVR_NO_FULL_CACHE_OPS \
-	-DSUPPORT_SGX_LOW_LATENCY_SCHEDULING
+	-DPVR_NO_FULL_CACHE_OPS
 
 ccflags-$(CONFIG_SGX_540_BUILD_DEBUG) += \
 	-DPVR_BUILD_TYPE="\"debug\""  -DDEBUG \
diff --git a/drivers/gpu/pvr/bridged_pvr_bridge.c b/drivers/gpu/pvr/bridged_pvr_bridge.c
index f0dde100218..b06a7a394a6 100644
--- a/drivers/gpu/pvr/bridged_pvr_bridge.c
+++ b/drivers/gpu/pvr/bridged_pvr_bridge.c
@@ -1,26 +1,26 @@
 /**********************************************************************
  *
  * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
- * 
+ *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
  * version 2, as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope it will be useful but, except 
- * as otherwise stated in writing, without any warranty; without even the 
- * implied warranty of merchantability or fitness for a particular purpose. 
+ *
+ * This program is distributed in the hope it will be useful but, except
+ * as otherwise stated in writing, without any warranty; without even the
+ * implied warranty of merchantability or fitness for a particular purpose.
  * See the GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License along with
  * this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- * 
+ *
  * The full GNU General Public License is included in this distribution in
  * the file called "COPYING".
  *
  * Contact Information:
  * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
  *
  ******************************************************************************/
 
@@ -76,7 +76,7 @@ PVRSRV_BRIDGE_DISPATCH_TABLE_ENTRY g_BridgeDispatchTable[BRIDGE_DISPATCH_TABLE_E
 PVRSRV_BRIDGE_GLOBAL_STATS g_BridgeGlobalStats;
 #endif
 
-#if defined(PVR_SECURE_HANDLES)
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
 static IMG_BOOL abSharedDeviceMemHeap[PVRSRV_MAX_CLIENT_HEAPS];
 static IMG_BOOL *pbSharedDeviceMemHeap = abSharedDeviceMemHeap;
 #else
@@ -87,1500 +87,1972 @@ static IMG_BOOL *pbSharedDeviceMemHeap = (IMG_BOOL*)IMG_NULL;
 #if defined(DEBUG_BRIDGE_KM)
 PVRSRV_ERROR
 CopyFromUserWrapper(PVRSRV_PER_PROCESS_DATA *pProcData,
-					IMG_UINT32 ui32BridgeID,
-					IMG_VOID *pvDest,
-					IMG_VOID *pvSrc,
-					IMG_UINT32 ui32Size)
+                    IMG_UINT32 ui32BridgeID,
+                    IMG_VOID *pvDest,
+                    IMG_VOID *pvSrc,
+                    IMG_UINT32 ui32Size)
 {
-	g_BridgeDispatchTable[ui32BridgeID].ui32CopyFromUserTotalBytes+=ui32Size;
-	g_BridgeGlobalStats.ui32TotalCopyFromUserBytes+=ui32Size;
-	return OSCopyFromUser(pProcData, pvDest, pvSrc, ui32Size);
+    g_BridgeDispatchTable[ui32BridgeID].ui32CopyFromUserTotalBytes+=ui32Size;
+    g_BridgeGlobalStats.ui32TotalCopyFromUserBytes+=ui32Size;
+    return OSCopyFromUser(pProcData, pvDest, pvSrc, ui32Size);
 }
 PVRSRV_ERROR
 CopyToUserWrapper(PVRSRV_PER_PROCESS_DATA *pProcData,
-				  IMG_UINT32 ui32BridgeID,
-				  IMG_VOID *pvDest,
-				  IMG_VOID *pvSrc,
-				  IMG_UINT32 ui32Size)
+                  IMG_UINT32 ui32BridgeID,
+                  IMG_VOID *pvDest,
+                  IMG_VOID *pvSrc,
+                  IMG_UINT32 ui32Size)
 {
-	g_BridgeDispatchTable[ui32BridgeID].ui32CopyToUserTotalBytes+=ui32Size;
-	g_BridgeGlobalStats.ui32TotalCopyToUserBytes+=ui32Size;
-	return OSCopyToUser(pProcData, pvDest, pvSrc, ui32Size);
+    g_BridgeDispatchTable[ui32BridgeID].ui32CopyToUserTotalBytes+=ui32Size;
+    g_BridgeGlobalStats.ui32TotalCopyToUserBytes+=ui32Size;
+    return OSCopyToUser(pProcData, pvDest, pvSrc, ui32Size);
 }
 #endif
 
 
 static IMG_INT
 PVRSRVEnumerateDevicesBW(IMG_UINT32 ui32BridgeID,
-						 IMG_VOID *psBridgeIn,
-						 PVRSRV_BRIDGE_OUT_ENUMDEVICE *psEnumDeviceOUT,
-						 PVRSRV_PER_PROCESS_DATA *psPerProc)
+                         IMG_VOID *psBridgeIn,
+                         PVRSRV_BRIDGE_OUT_ENUMDEVICE *psEnumDeviceOUT,
+                         PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ENUM_DEVICES);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ENUM_DEVICES);
 
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
-	PVR_UNREFERENCED_PARAMETER(psBridgeIn);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVR_UNREFERENCED_PARAMETER(psBridgeIn);
 
-	psEnumDeviceOUT->eError =
-		PVRSRVEnumerateDevicesKM(&psEnumDeviceOUT->ui32NumDevices,
-								 psEnumDeviceOUT->asDeviceIdentifier);
+    psEnumDeviceOUT->eError =
+        PVRSRVEnumerateDevicesKM(&psEnumDeviceOUT->ui32NumDevices,
+                                 psEnumDeviceOUT->asDeviceIdentifier);
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVAcquireDeviceDataBW(IMG_UINT32 ui32BridgeID,
-						  PVRSRV_BRIDGE_IN_ACQUIRE_DEVICEINFO *psAcquireDevInfoIN,
-						  PVRSRV_BRIDGE_OUT_ACQUIRE_DEVICEINFO *psAcquireDevInfoOUT,
-						  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                          PVRSRV_BRIDGE_IN_ACQUIRE_DEVICEINFO *psAcquireDevInfoIN,
+                          PVRSRV_BRIDGE_OUT_ACQUIRE_DEVICEINFO *psAcquireDevInfoOUT,
+                          PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hDevCookieInt;
+    IMG_HANDLE hDevCookieInt;
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ACQUIRE_DEVICEINFO);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ACQUIRE_DEVICEINFO);
+
+    psAcquireDevInfoOUT->eError =
+        PVRSRVAcquireDeviceDataKM(psAcquireDevInfoIN->uiDevIndex,
+                                  psAcquireDevInfoIN->eDeviceType,
+                                  &hDevCookieInt);
+    if(psAcquireDevInfoOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psAcquireDevInfoOUT->eError =
-		PVRSRVAcquireDeviceDataKM(psAcquireDevInfoIN->uiDevIndex,
-								  psAcquireDevInfoIN->eDeviceType,
-								  &hDevCookieInt);
-	if(psAcquireDevInfoOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
 
-		psAcquireDevInfoOUT->eError =
-		PVRSRVAllocHandle(psPerProc->psHandleBase,
-						  &psAcquireDevInfoOUT->hDevCookie,
-						  hDevCookieInt,
-						  PVRSRV_HANDLE_TYPE_DEV_NODE,
-						  PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
+        psAcquireDevInfoOUT->eError =
+        PVRSRVAllocHandle(psPerProc->psHandleBase,
+                          &psAcquireDevInfoOUT->hDevCookie,
+                          hDevCookieInt,
+                          PVRSRV_HANDLE_TYPE_DEV_NODE,
+                          PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
 
-	return 0;
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVCreateDeviceMemContextBW(IMG_UINT32 ui32BridgeID,
-							   PVRSRV_BRIDGE_IN_CREATE_DEVMEMCONTEXT *psCreateDevMemContextIN,
-							   PVRSRV_BRIDGE_OUT_CREATE_DEVMEMCONTEXT *psCreateDevMemContextOUT,
-							   PVRSRV_PER_PROCESS_DATA *psPerProc)
+                               PVRSRV_BRIDGE_IN_CREATE_DEVMEMCONTEXT *psCreateDevMemContextIN,
+                               PVRSRV_BRIDGE_OUT_CREATE_DEVMEMCONTEXT *psCreateDevMemContextOUT,
+                               PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hDevCookieInt;
-	IMG_HANDLE hDevMemContextInt;
-	IMG_UINT32 i;
-	IMG_BOOL bCreated;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CREATE_DEVMEMCONTEXT);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psCreateDevMemContextOUT->eError, psPerProc, PVRSRV_MAX_CLIENT_HEAPS + 1)
+    IMG_HANDLE hDevCookieInt;
+    IMG_HANDLE hDevMemContextInt;
+    IMG_UINT32 i;
+    IMG_BOOL bCreated;
+#if defined (SUPPORT_SID_INTERFACE)
+    PVRSRV_HEAP_INFO_KM asHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
+#endif
 
-	psCreateDevMemContextOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
-						   psCreateDevMemContextIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CREATE_DEVMEMCONTEXT);
 
-	if(psCreateDevMemContextOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
 
-	psCreateDevMemContextOUT->eError =
-		PVRSRVCreateDeviceMemContextKM(hDevCookieInt,
-									   psPerProc,
-									   &hDevMemContextInt,
-									   &psCreateDevMemContextOUT->ui32ClientHeapCount,
-									   &psCreateDevMemContextOUT->sHeapInfo[0],
-									   &bCreated,
-									   pbSharedDeviceMemHeap);
+    NEW_HANDLE_BATCH_OR_ERROR(psCreateDevMemContextOUT->eError, psPerProc, PVRSRV_MAX_CLIENT_HEAPS + 1)
 
-	if(psCreateDevMemContextOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    psCreateDevMemContextOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
+                           psCreateDevMemContextIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
 
+    if(psCreateDevMemContextOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	if(bCreated)
-	{
-		PVRSRVAllocHandleNR(psPerProc->psHandleBase,
-						  &psCreateDevMemContextOUT->hDevMemContext,
-						  hDevMemContextInt,
-						  PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT,
-						  PVRSRV_HANDLE_ALLOC_FLAG_NONE);
-	}
-	else
-	{
-		psCreateDevMemContextOUT->eError =
-			PVRSRVFindHandle(psPerProc->psHandleBase,
-							 &psCreateDevMemContextOUT->hDevMemContext,
-							 hDevMemContextInt,
-							 PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
-		if(psCreateDevMemContextOUT->eError != PVRSRV_OK)
-		{
-			return 0;
-		}
-	}
+    psCreateDevMemContextOUT->eError =
+        PVRSRVCreateDeviceMemContextKM(hDevCookieInt,
+                                       psPerProc,
+                                       &hDevMemContextInt,
+                                       &psCreateDevMemContextOUT->ui32ClientHeapCount,
+#if defined (SUPPORT_SID_INTERFACE)
+                                       &asHeapInfo[0],
+#else
+                                       &psCreateDevMemContextOUT->sHeapInfo[0],
+#endif
+                                       &bCreated,
+                                       pbSharedDeviceMemHeap);
+
+    if(psCreateDevMemContextOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+
+    if(bCreated)
+    {
+        PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                          &psCreateDevMemContextOUT->hDevMemContext,
+                          hDevMemContextInt,
+                          PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT,
+                          PVRSRV_HANDLE_ALLOC_FLAG_NONE);
+    }
+    else
+    {
+        psCreateDevMemContextOUT->eError =
+            PVRSRVFindHandle(psPerProc->psHandleBase,
+                             &psCreateDevMemContextOUT->hDevMemContext,
+                             hDevMemContextInt,
+                             PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+        if(psCreateDevMemContextOUT->eError != PVRSRV_OK)
+        {
+            return 0;
+        }
+    }
+
+    for(i = 0; i < psCreateDevMemContextOUT->ui32ClientHeapCount; i++)
+    {
+#if defined (SUPPORT_SID_INTERFACE)
+        IMG_SID hDevMemHeapExt;
+#else
+        IMG_HANDLE hDevMemHeapExt;
+#endif
 
-	for(i = 0; i < psCreateDevMemContextOUT->ui32ClientHeapCount; i++)
-	{
-		IMG_HANDLE hDevMemHeapExt;
-
-#if defined(PVR_SECURE_HANDLES)
-		if(abSharedDeviceMemHeap[i])
-#endif
-		{
-
-			PVRSRVAllocHandleNR(psPerProc->psHandleBase, &hDevMemHeapExt,
-							  psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap,
-							  PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
-							  PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
-		}
-#if defined(PVR_SECURE_HANDLES)
-		else
-		{
-
-			if(bCreated)
-			{
-				PVRSRVAllocSubHandleNR(psPerProc->psHandleBase, &hDevMemHeapExt,
-									 psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap,
-									 PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
-									 PVRSRV_HANDLE_ALLOC_FLAG_NONE,
-									 psCreateDevMemContextOUT->hDevMemContext);
-			}
-			else
-			{
-				psCreateDevMemContextOUT->eError =
-					PVRSRVFindHandle(psPerProc->psHandleBase, &hDevMemHeapExt,
-									 psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap,
-									 PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP);
-				if(psCreateDevMemContextOUT->eError != PVRSRV_OK)
-				{
-					return 0;
-				}
-			}
-		}
-#endif
-		psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap = hDevMemHeapExt;
-	}
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+        if(abSharedDeviceMemHeap[i])
+#endif
+        {
+
+#if defined (SUPPORT_SID_INTERFACE)
+            PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                              &hDevMemHeapExt,
+                              asHeapInfo[i].hDevMemHeap,
+                              PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
+                              PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
+#else
+            PVRSRVAllocHandleNR(psPerProc->psHandleBase, &hDevMemHeapExt,
+                              psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap,
+                              PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
+                              PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
+#endif
+        }
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+        else
+        {
+
+            if(bCreated)
+            {
+#if defined (SUPPORT_SID_INTERFACE)
+                PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                                     &hDevMemHeapExt,
+                                     asHeapInfo[i].hDevMemHeap,
+                                     PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
+                                     PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                                     psCreateDevMemContextOUT->hDevMemContext);
+#else
+                PVRSRVAllocSubHandleNR(psPerProc->psHandleBase, &hDevMemHeapExt,
+                                     psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap,
+                                     PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
+                                     PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                                     psCreateDevMemContextOUT->hDevMemContext);
+#endif
+            }
+            else
+            {
+                psCreateDevMemContextOUT->eError =
+                    PVRSRVFindHandle(psPerProc->psHandleBase,
+                                     &hDevMemHeapExt,
+#if defined (SUPPORT_SID_INTERFACE)
+                                     asHeapInfo[i].hDevMemHeap,
+#else
+                                   psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap,
+#endif
+                                     PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP);
+                if(psCreateDevMemContextOUT->eError != PVRSRV_OK)
+                {
+                    return 0;
+                }
+            }
+        }
+#endif
+        psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap      = hDevMemHeapExt;
+#if defined (SUPPORT_SID_INTERFACE)
+        psCreateDevMemContextOUT->sHeapInfo[i].ui32HeapID       = asHeapInfo[i].ui32HeapID;
+        psCreateDevMemContextOUT->sHeapInfo[i].sDevVAddrBase    = asHeapInfo[i].sDevVAddrBase;
+        psCreateDevMemContextOUT->sHeapInfo[i].ui32HeapByteSize = asHeapInfo[i].ui32HeapByteSize;
+        psCreateDevMemContextOUT->sHeapInfo[i].ui32Attribs      = asHeapInfo[i].ui32Attribs;
+        psCreateDevMemContextOUT->sHeapInfo[i].ui32XTileStride  = asHeapInfo[i].ui32XTileStride;
+#endif
+    }
 
-	COMMIT_HANDLE_BATCH_OR_ERROR(psCreateDevMemContextOUT->eError, psPerProc)
+    COMMIT_HANDLE_BATCH_OR_ERROR(psCreateDevMemContextOUT->eError, psPerProc)
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVDestroyDeviceMemContextBW(IMG_UINT32 ui32BridgeID,
-								PVRSRV_BRIDGE_IN_DESTROY_DEVMEMCONTEXT *psDestroyDevMemContextIN,
-								PVRSRV_BRIDGE_RETURN *psRetOUT,
-								PVRSRV_PER_PROCESS_DATA *psPerProc)
+                                PVRSRV_BRIDGE_IN_DESTROY_DEVMEMCONTEXT *psDestroyDevMemContextIN,
+                                PVRSRV_BRIDGE_RETURN *psRetOUT,
+                                PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hDevCookieInt;
-	IMG_HANDLE hDevMemContextInt;
-	IMG_BOOL bDestroyed;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_DESTROY_DEVMEMCONTEXT);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
-						   psDestroyDevMemContextIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
-
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevMemContextInt,
-						   psDestroyDevMemContextIN->hDevMemContext,
-						   PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
-
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVDestroyDeviceMemContextKM(hDevCookieInt, hDevMemContextInt, &bDestroyed);
-
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	if(bDestroyed)
-	{
-		psRetOUT->eError =
-			PVRSRVReleaseHandle(psPerProc->psHandleBase,
-								psDestroyDevMemContextIN->hDevMemContext,
-								PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
-	}
-
-	return 0;
+    IMG_HANDLE hDevCookieInt;
+    IMG_HANDLE hDevMemContextInt;
+    IMG_BOOL bDestroyed;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_DESTROY_DEVMEMCONTEXT);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
+                           psDestroyDevMemContextIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
+
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevMemContextInt,
+                           psDestroyDevMemContextIN->hDevMemContext,
+                           PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVDestroyDeviceMemContextKM(hDevCookieInt, hDevMemContextInt, &bDestroyed);
+
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    if(bDestroyed)
+    {
+        psRetOUT->eError =
+            PVRSRVReleaseHandle(psPerProc->psHandleBase,
+                                psDestroyDevMemContextIN->hDevMemContext,
+                                PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+    }
+
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVGetDeviceMemHeapInfoBW(IMG_UINT32 ui32BridgeID,
-							   PVRSRV_BRIDGE_IN_GET_DEVMEM_HEAPINFO *psGetDevMemHeapInfoIN,
-							   PVRSRV_BRIDGE_OUT_GET_DEVMEM_HEAPINFO *psGetDevMemHeapInfoOUT,
-							   PVRSRV_PER_PROCESS_DATA *psPerProc)
+                               PVRSRV_BRIDGE_IN_GET_DEVMEM_HEAPINFO *psGetDevMemHeapInfoIN,
+                               PVRSRV_BRIDGE_OUT_GET_DEVMEM_HEAPINFO *psGetDevMemHeapInfoOUT,
+                               PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hDevCookieInt;
-	IMG_HANDLE hDevMemContextInt;
-	IMG_UINT32 i;
+    IMG_HANDLE hDevCookieInt;
+    IMG_HANDLE hDevMemContextInt;
+    IMG_UINT32 i;
+#if defined (SUPPORT_SID_INTERFACE)
+    PVRSRV_HEAP_INFO_KM asHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
+#endif
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_DEVMEM_HEAPINFO);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_DEVMEM_HEAPINFO);
 
-	NEW_HANDLE_BATCH_OR_ERROR(psGetDevMemHeapInfoOUT->eError, psPerProc, PVRSRV_MAX_CLIENT_HEAPS)
+    NEW_HANDLE_BATCH_OR_ERROR(psGetDevMemHeapInfoOUT->eError, psPerProc, PVRSRV_MAX_CLIENT_HEAPS)
 
-	psGetDevMemHeapInfoOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
-						   psGetDevMemHeapInfoIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
+    psGetDevMemHeapInfoOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
+                           psGetDevMemHeapInfoIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
 
-	if(psGetDevMemHeapInfoOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if(psGetDevMemHeapInfoOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psGetDevMemHeapInfoOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevMemContextInt,
-						   psGetDevMemHeapInfoIN->hDevMemContext,
-						   PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+    psGetDevMemHeapInfoOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevMemContextInt,
+                           psGetDevMemHeapInfoIN->hDevMemContext,
+                           PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
 
-	if(psGetDevMemHeapInfoOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if(psGetDevMemHeapInfoOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psGetDevMemHeapInfoOUT->eError =
-		PVRSRVGetDeviceMemHeapInfoKM(hDevCookieInt,
-									   hDevMemContextInt,
-									   &psGetDevMemHeapInfoOUT->ui32ClientHeapCount,
-									   &psGetDevMemHeapInfoOUT->sHeapInfo[0],
-									   pbSharedDeviceMemHeap);
+    psGetDevMemHeapInfoOUT->eError =
+        PVRSRVGetDeviceMemHeapInfoKM(hDevCookieInt,
+                                       hDevMemContextInt,
+                                       &psGetDevMemHeapInfoOUT->ui32ClientHeapCount,
+#if defined (SUPPORT_SID_INTERFACE)
+                                       &asHeapInfo[0],
+#else
+                                       &psGetDevMemHeapInfoOUT->sHeapInfo[0],
+#endif
+                                       pbSharedDeviceMemHeap);
 
-	if(psGetDevMemHeapInfoOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if(psGetDevMemHeapInfoOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	for(i = 0; i < psGetDevMemHeapInfoOUT->ui32ClientHeapCount; i++)
-	{
-		IMG_HANDLE hDevMemHeapExt;
-
-#if defined(PVR_SECURE_HANDLES)
-		if(abSharedDeviceMemHeap[i])
-#endif
-		{
-
-			PVRSRVAllocHandleNR(psPerProc->psHandleBase, &hDevMemHeapExt,
-							  psGetDevMemHeapInfoOUT->sHeapInfo[i].hDevMemHeap,
-							  PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
-							  PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
-		}
-#if defined(PVR_SECURE_HANDLES)
-		else
-		{
-
-			psGetDevMemHeapInfoOUT->eError =
-				PVRSRVFindHandle(psPerProc->psHandleBase, &hDevMemHeapExt,
-								 psGetDevMemHeapInfoOUT->sHeapInfo[i].hDevMemHeap,
-								 PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP);
-			if(psGetDevMemHeapInfoOUT->eError != PVRSRV_OK)
-			{
-				return 0;
-			}
-		}
-#endif
-		psGetDevMemHeapInfoOUT->sHeapInfo[i].hDevMemHeap = hDevMemHeapExt;
-	}
+    for(i = 0; i < psGetDevMemHeapInfoOUT->ui32ClientHeapCount; i++)
+    {
+#if defined (SUPPORT_SID_INTERFACE)
+        IMG_SID hDevMemHeapExt;
+#else
+        IMG_HANDLE hDevMemHeapExt;
+#endif
 
-	COMMIT_HANDLE_BATCH_OR_ERROR(psGetDevMemHeapInfoOUT->eError, psPerProc)
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+        if(abSharedDeviceMemHeap[i])
+#endif
+        {
+            
+#if defined (SUPPORT_SID_INTERFACE)
+            PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                                &hDevMemHeapExt,
+                                asHeapInfo[i].hDevMemHeap,
+                                PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
+                                PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
+#else
+            PVRSRVAllocHandleNR(psPerProc->psHandleBase, &hDevMemHeapExt,
+                                psGetDevMemHeapInfoOUT->sHeapInfo[i].hDevMemHeap,
+                                PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
+                                PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
+#endif
+        }
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+        else
+        {
+
+            psGetDevMemHeapInfoOUT->eError =
+                PVRSRVFindHandle(psPerProc->psHandleBase,
+                                 &hDevMemHeapExt,
+#if defined (SUPPORT_SID_INTERFACE)
+                                 asHeapInfo[i].hDevMemHeap,
+#else
+                                 psGetDevMemHeapInfoOUT->sHeapInfo[i].hDevMemHeap,
+#endif
+                                 PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP);
+            if(psGetDevMemHeapInfoOUT->eError != PVRSRV_OK)
+            {
+                return 0;
+            }
+        }
+#endif
+        psGetDevMemHeapInfoOUT->sHeapInfo[i].hDevMemHeap      = hDevMemHeapExt;
+#if defined (SUPPORT_SID_INTERFACE)
+        psGetDevMemHeapInfoOUT->sHeapInfo[i].ui32HeapID       = asHeapInfo[i].ui32HeapID;
+        psGetDevMemHeapInfoOUT->sHeapInfo[i].sDevVAddrBase    = asHeapInfo[i].sDevVAddrBase;
+        psGetDevMemHeapInfoOUT->sHeapInfo[i].ui32HeapByteSize = asHeapInfo[i].ui32HeapByteSize;
+        psGetDevMemHeapInfoOUT->sHeapInfo[i].ui32Attribs      = asHeapInfo[i].ui32Attribs;
+        psGetDevMemHeapInfoOUT->sHeapInfo[i].ui32XTileStride  = asHeapInfo[i].ui32XTileStride;
+#endif
+    }
 
-	return 0;
+    COMMIT_HANDLE_BATCH_OR_ERROR(psGetDevMemHeapInfoOUT->eError, psPerProc)
+
+    return 0;
 }
 
 
 #if defined(OS_PVRSRV_ALLOC_DEVICE_MEM_BW)
 IMG_INT
 PVRSRVAllocDeviceMemBW(IMG_UINT32 ui32BridgeID,
-					   PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM *psAllocDeviceMemIN,
-					   PVRSRV_BRIDGE_OUT_ALLOCDEVICEMEM *psAllocDeviceMemOUT,
-					   PVRSRV_PER_PROCESS_DATA *psPerProc);
+                       PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM *psAllocDeviceMemIN,
+                       PVRSRV_BRIDGE_OUT_ALLOCDEVICEMEM *psAllocDeviceMemOUT,
+                       PVRSRV_PER_PROCESS_DATA *psPerProc);
 #else
 static IMG_INT
 PVRSRVAllocDeviceMemBW(IMG_UINT32 ui32BridgeID,
-					   PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM *psAllocDeviceMemIN,
-					   PVRSRV_BRIDGE_OUT_ALLOCDEVICEMEM *psAllocDeviceMemOUT,
-					   PVRSRV_PER_PROCESS_DATA *psPerProc)
+                       PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM *psAllocDeviceMemIN,
+                       PVRSRV_BRIDGE_OUT_ALLOCDEVICEMEM *psAllocDeviceMemOUT,
+                       PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_KERNEL_MEM_INFO *psMemInfo;
-	IMG_HANDLE hDevCookieInt;
-	IMG_HANDLE hDevMemHeapInt;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ALLOC_DEVICEMEM);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psAllocDeviceMemOUT->eError, psPerProc, 2)
-
-	psAllocDeviceMemOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
-						   psAllocDeviceMemIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
-
-	if(psAllocDeviceMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psAllocDeviceMemOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevMemHeapInt,
-						   psAllocDeviceMemIN->hDevMemHeap,
-						   PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP);
-
-	if(psAllocDeviceMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psAllocDeviceMemOUT->eError =
-		PVRSRVAllocDeviceMemKM(hDevCookieInt,
-							   psPerProc,
-							   hDevMemHeapInt,
-							   psAllocDeviceMemIN->ui32Attribs,
-							   psAllocDeviceMemIN->ui32Size,
-							   psAllocDeviceMemIN->ui32Alignment,
-							   &psMemInfo,
-							   "" );
-
-	if(psAllocDeviceMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	OSMemSet(&psAllocDeviceMemOUT->sClientMemInfo,
-			 0,
-			 sizeof(psAllocDeviceMemOUT->sClientMemInfo));
-
-	psAllocDeviceMemOUT->sClientMemInfo.pvLinAddrKM =
-			psMemInfo->pvLinAddrKM;
+    PVRSRV_KERNEL_MEM_INFO *psMemInfo;
+    IMG_HANDLE hDevCookieInt;
+    IMG_HANDLE hDevMemHeapInt;
+    IMG_UINT32 ui32ShareIndex;
+    IMG_BOOL bUseShareMemWorkaround;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ALLOC_DEVICEMEM);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psAllocDeviceMemOUT->eError, psPerProc, 2)
+
+    psAllocDeviceMemOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
+                           psAllocDeviceMemIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
+
+    if(psAllocDeviceMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psAllocDeviceMemOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevMemHeapInt,
+                           psAllocDeviceMemIN->hDevMemHeap,
+                           PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP);
+
+    if(psAllocDeviceMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    
+
+    bUseShareMemWorkaround = ((psAllocDeviceMemIN->ui32Attribs & PVRSRV_MEM_XPROC) != 0) ? IMG_TRUE : IMG_FALSE;
+    ui32ShareIndex = 7654321; 
+
+    if (bUseShareMemWorkaround)
+    {
+        
+        
+
+        psAllocDeviceMemOUT->eError =
+            BM_XProcWorkaroundFindNewBufferAndSetShareIndex(&ui32ShareIndex);
+        if(psAllocDeviceMemOUT->eError != PVRSRV_OK)
+        {
+            return 0;
+        }
+    }
+
+    psAllocDeviceMemOUT->eError =
+        PVRSRVAllocDeviceMemKM(hDevCookieInt,
+                               psPerProc,
+                               hDevMemHeapInt,
+                               psAllocDeviceMemIN->ui32Attribs,
+                               psAllocDeviceMemIN->ui32Size,
+                               psAllocDeviceMemIN->ui32Alignment,
+                               &psMemInfo,
+                               "" );
+
+    if (bUseShareMemWorkaround)
+    {
+        PVR_ASSERT(ui32ShareIndex != 7654321);
+        BM_XProcWorkaroundUnsetShareIndex(ui32ShareIndex);
+    }
+
+    if(psAllocDeviceMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psMemInfo->sShareMemWorkaround.bInUse = bUseShareMemWorkaround;
+    if (bUseShareMemWorkaround)
+    {
+        PVR_ASSERT(ui32ShareIndex != 7654321);
+        psMemInfo->sShareMemWorkaround.ui32ShareIndex = ui32ShareIndex;
+        psMemInfo->sShareMemWorkaround.hDevCookieInt = hDevCookieInt;
+        psMemInfo->sShareMemWorkaround.ui32OrigReqAttribs = psAllocDeviceMemIN->ui32Attribs;
+        psMemInfo->sShareMemWorkaround.ui32OrigReqSize = (IMG_UINT32)psAllocDeviceMemIN->ui32Size;
+        psMemInfo->sShareMemWorkaround.ui32OrigReqAlignment = (IMG_UINT32)psAllocDeviceMemIN->ui32Alignment;
+    }
+
+    OSMemSet(&psAllocDeviceMemOUT->sClientMemInfo,
+             0,
+             sizeof(psAllocDeviceMemOUT->sClientMemInfo));
+
+    psAllocDeviceMemOUT->sClientMemInfo.pvLinAddrKM =
+            psMemInfo->pvLinAddrKM;
 
 #if defined (__linux__)
-	psAllocDeviceMemOUT->sClientMemInfo.pvLinAddr = 0;
+    psAllocDeviceMemOUT->sClientMemInfo.pvLinAddr = 0;
 #else
-	psAllocDeviceMemOUT->sClientMemInfo.pvLinAddr = psMemInfo->pvLinAddrKM;
+    psAllocDeviceMemOUT->sClientMemInfo.pvLinAddr = psMemInfo->pvLinAddrKM;
+#endif
+    psAllocDeviceMemOUT->sClientMemInfo.sDevVAddr = psMemInfo->sDevVAddr;
+    psAllocDeviceMemOUT->sClientMemInfo.ui32Flags = psMemInfo->ui32Flags;
+    psAllocDeviceMemOUT->sClientMemInfo.uAllocSize = psMemInfo->uAllocSize;
+#if defined (SUPPORT_SID_INTERFACE)
+#else
+  psAllocDeviceMemOUT->sClientMemInfo.hMappingInfo = psMemInfo->sMemBlk.hOSMemHandle;
 #endif
-	psAllocDeviceMemOUT->sClientMemInfo.sDevVAddr = psMemInfo->sDevVAddr;
-	psAllocDeviceMemOUT->sClientMemInfo.ui32Flags = psMemInfo->ui32Flags;
-	psAllocDeviceMemOUT->sClientMemInfo.ui32AllocSize = psMemInfo->ui32AllocSize;
-	psAllocDeviceMemOUT->sClientMemInfo.hMappingInfo = psMemInfo->sMemBlk.hOSMemHandle;
-
-	PVRSRVAllocHandleNR(psPerProc->psHandleBase,
-					  &psAllocDeviceMemOUT->sClientMemInfo.hKernelMemInfo,
-					  psMemInfo,
-					  PVRSRV_HANDLE_TYPE_MEM_INFO,
-					  PVRSRV_HANDLE_ALLOC_FLAG_NONE);
-
-	if(psAllocDeviceMemIN->ui32Attribs & PVRSRV_MEM_NO_SYNCOBJ)
-	{
-
-		OSMemSet(&psAllocDeviceMemOUT->sClientSyncInfo,
-				 0,
-				 sizeof (PVRSRV_CLIENT_SYNC_INFO));
-		psAllocDeviceMemOUT->sClientMemInfo.psClientSyncInfo = IMG_NULL;
-	}
-	else
-	{
-
 
-		psAllocDeviceMemOUT->sClientSyncInfo.psSyncData =
-			psMemInfo->psKernelSyncInfo->psSyncData;
-		psAllocDeviceMemOUT->sClientSyncInfo.sWriteOpsCompleteDevVAddr =
-			psMemInfo->psKernelSyncInfo->sWriteOpsCompleteDevVAddr;
-		psAllocDeviceMemOUT->sClientSyncInfo.sReadOpsCompleteDevVAddr =
-			psMemInfo->psKernelSyncInfo->sReadOpsCompleteDevVAddr;
+    PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                      &psAllocDeviceMemOUT->sClientMemInfo.hKernelMemInfo,
+                      psMemInfo,
+                      PVRSRV_HANDLE_TYPE_MEM_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE);
+
+ #if defined (SUPPORT_SID_INTERFACE)
+   PVR_ASSERT(psAllocDeviceMemOUT->sClientMemInfo.hKernelMemInfo != 0);
+
+    if (psMemInfo->sMemBlk.hOSMemHandle != IMG_NULL)
+    {
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                      &psAllocDeviceMemOUT->sClientMemInfo.hMappingInfo,
+                      psMemInfo->sMemBlk.hOSMemHandle,
+                      PVRSRV_HANDLE_TYPE_MEM_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                      psAllocDeviceMemOUT->sClientMemInfo.hKernelMemInfo);
+    }
+    else
+    {
+        psAllocDeviceMemOUT->sClientMemInfo.hMappingInfo = 0;
+    }
+#endif
 
-		psAllocDeviceMemOUT->sClientSyncInfo.hMappingInfo =
-			psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
+    if(psAllocDeviceMemIN->ui32Attribs & PVRSRV_MEM_NO_SYNCOBJ)
+    {
+        
+        OSMemSet(&psAllocDeviceMemOUT->sClientSyncInfo,
+                 0,
+                 sizeof (PVRSRV_CLIENT_SYNC_INFO));
+        psAllocDeviceMemOUT->sClientMemInfo.psClientSyncInfo = IMG_NULL;
+    }
+    else
+    {
+        
+
+#if !defined(PVRSRV_DISABLE_UM_SYNCOBJ_MAPPINGS)
+        psAllocDeviceMemOUT->sClientSyncInfo.psSyncData =
+            psMemInfo->psKernelSyncInfo->psSyncData;
+        psAllocDeviceMemOUT->sClientSyncInfo.sWriteOpsCompleteDevVAddr =
+            psMemInfo->psKernelSyncInfo->sWriteOpsCompleteDevVAddr;
+        psAllocDeviceMemOUT->sClientSyncInfo.sReadOpsCompleteDevVAddr =
+            psMemInfo->psKernelSyncInfo->sReadOpsCompleteDevVAddr;
+
+#if defined (SUPPORT_SID_INTERFACE)
+        if (psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle != IMG_NULL)
+        {
+                PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                                     &psAllocDeviceMemOUT->sClientSyncInfo.hMappingInfo,
+                                     psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle,
+                                     PVRSRV_HANDLE_TYPE_SYNC_INFO,
+                                     PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                                     psAllocDeviceMemOUT->sClientMemInfo.hKernelMemInfo);
+        }
+        else
+        {
+            psAllocDeviceMemOUT->sClientSyncInfo.hMappingInfo = 0;
+        }
+#else
+        psAllocDeviceMemOUT->sClientSyncInfo.hMappingInfo =
+            psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
+#endif
+#endif
 
-		PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
-							 &psAllocDeviceMemOUT->sClientSyncInfo.hKernelSyncInfo,
-							 psMemInfo->psKernelSyncInfo,
-							 PVRSRV_HANDLE_TYPE_SYNC_INFO,
-							 PVRSRV_HANDLE_ALLOC_FLAG_NONE,
-							 psAllocDeviceMemOUT->sClientMemInfo.hKernelMemInfo);
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                             &psAllocDeviceMemOUT->sClientSyncInfo.hKernelSyncInfo,
+                             psMemInfo->psKernelSyncInfo,
+                             PVRSRV_HANDLE_TYPE_SYNC_INFO,
+                             PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                             psAllocDeviceMemOUT->sClientMemInfo.hKernelMemInfo);
 
-		psAllocDeviceMemOUT->sClientMemInfo.psClientSyncInfo =
-			&psAllocDeviceMemOUT->sClientSyncInfo;
+        psAllocDeviceMemOUT->sClientMemInfo.psClientSyncInfo =
+            &psAllocDeviceMemOUT->sClientSyncInfo;
 
-	}
+    }
 
-	COMMIT_HANDLE_BATCH_OR_ERROR(psAllocDeviceMemOUT->eError, psPerProc)
+    COMMIT_HANDLE_BATCH_OR_ERROR(psAllocDeviceMemOUT->eError, psPerProc)
 
-	return 0;
+    return 0;
 }
 
-#endif
+#endif 
 
 static IMG_INT
 PVRSRVFreeDeviceMemBW(IMG_UINT32 ui32BridgeID,
-					  PVRSRV_BRIDGE_IN_FREEDEVICEMEM *psFreeDeviceMemIN,
-					  PVRSRV_BRIDGE_RETURN *psRetOUT,
-					  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                      PVRSRV_BRIDGE_IN_FREEDEVICEMEM *psFreeDeviceMemIN,
+                      PVRSRV_BRIDGE_RETURN *psRetOUT,
+                      PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hDevCookieInt;
-	IMG_VOID *pvKernelMemInfo;
+    IMG_HANDLE hDevCookieInt;
+    IMG_VOID *pvKernelMemInfo;
 
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_FREE_DEVICEMEM);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_FREE_DEVICEMEM);
 
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
-						   psFreeDeviceMemIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
+                           psFreeDeviceMemIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
 
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &pvKernelMemInfo,
-						   psFreeDeviceMemIN->psKernelMemInfo,
-						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvKernelMemInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+                           psFreeDeviceMemIN->hKernelMemInfo,
+#else
+                           psFreeDeviceMemIN->psKernelMemInfo,
+#endif
+                           PVRSRV_HANDLE_TYPE_MEM_INFO);
 
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psRetOUT->eError = PVRSRVFreeDeviceMemKM(hDevCookieInt, pvKernelMemInfo);
+    psRetOUT->eError = PVRSRVFreeDeviceMemKM(hDevCookieInt, pvKernelMemInfo);
 
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psRetOUT->eError =
-		PVRSRVReleaseHandle(psPerProc->psHandleBase,
-							psFreeDeviceMemIN->psKernelMemInfo,
-							PVRSRV_HANDLE_TYPE_MEM_INFO);
+    psRetOUT->eError =
+        PVRSRVReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+                            psFreeDeviceMemIN->hKernelMemInfo,
+#else
+                            psFreeDeviceMemIN->psKernelMemInfo,
+#endif
+                            PVRSRV_HANDLE_TYPE_MEM_INFO);
 
-	return 0;
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVExportDeviceMemBW(IMG_UINT32 ui32BridgeID,
-					  PVRSRV_BRIDGE_IN_EXPORTDEVICEMEM *psExportDeviceMemIN,
-					  PVRSRV_BRIDGE_OUT_EXPORTDEVICEMEM *psExportDeviceMemOUT,
-					  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                      PVRSRV_BRIDGE_IN_EXPORTDEVICEMEM *psExportDeviceMemIN,
+                      PVRSRV_BRIDGE_OUT_EXPORTDEVICEMEM *psExportDeviceMemOUT,
+                      PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hDevCookieInt;
-	PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EXPORT_DEVICEMEM);
-
-
-	psExportDeviceMemOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
-						   psExportDeviceMemIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
-
-	if(psExportDeviceMemOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVExportDeviceMemBW: can't find devcookie"));
-		return 0;
-	}
-
-
-	psExportDeviceMemOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, (IMG_PVOID *)&psKernelMemInfo,
-						   psExportDeviceMemIN->psKernelMemInfo,
-						   PVRSRV_HANDLE_TYPE_MEM_INFO);
-
-	if(psExportDeviceMemOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVExportDeviceMemBW: can't find kernel meminfo"));
-		return 0;
-	}
-
-
-	psExportDeviceMemOUT->eError =
-		PVRSRVFindHandle(KERNEL_HANDLE_BASE,
-							 &psExportDeviceMemOUT->hMemInfo,
-							 psKernelMemInfo,
-							 PVRSRV_HANDLE_TYPE_MEM_INFO);
-	if(psExportDeviceMemOUT->eError == PVRSRV_OK)
-	{
-
-		PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVExportDeviceMemBW: allocation is already exported"));
-		return 0;
-	}
-
-
-	psExportDeviceMemOUT->eError = PVRSRVAllocHandle(KERNEL_HANDLE_BASE,
-													&psExportDeviceMemOUT->hMemInfo,
-													psKernelMemInfo,
-													PVRSRV_HANDLE_TYPE_MEM_INFO,
-													PVRSRV_HANDLE_ALLOC_FLAG_NONE);
-	if (psExportDeviceMemOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVExportDeviceMemBW: failed to allocate handle from global handle list"));
-		return 0;
-	}
-
-
-	psKernelMemInfo->ui32Flags |= PVRSRV_MEM_EXPORTED;
+    IMG_HANDLE hDevCookieInt;
+#if defined (SUPPORT_SID_INTERFACE)
+    PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo = IMG_NULL;
+#else
+    PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
+#endif
 
-	return 0;
+    PVR_ASSERT(ui32BridgeID == PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_EXPORT_DEVICEMEM) ||
+               ui32BridgeID == PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_EXPORT_DEVICEMEM_2));
+    PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
+
+    
+    psExportDeviceMemOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &hDevCookieInt,
+                           psExportDeviceMemIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
+
+    if(psExportDeviceMemOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVExportDeviceMemBW: can't find devcookie"));
+        return 0;
+    }
+
+    
+    psExportDeviceMemOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           (IMG_PVOID *)&psKernelMemInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+                           psExportDeviceMemIN->hKernelMemInfo,
+#else
+                           psExportDeviceMemIN->psKernelMemInfo,
+#endif
+                           PVRSRV_HANDLE_TYPE_MEM_INFO);
+
+    if(psExportDeviceMemOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVExportDeviceMemBW: can't find kernel meminfo"));
+        return 0;
+    }
+
+    
+    psExportDeviceMemOUT->eError =
+        PVRSRVFindHandle(KERNEL_HANDLE_BASE,
+                             &psExportDeviceMemOUT->hMemInfo,
+                             psKernelMemInfo,
+                             PVRSRV_HANDLE_TYPE_MEM_INFO);
+    if(psExportDeviceMemOUT->eError == PVRSRV_OK)
+    {
+        
+        PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVExportDeviceMemBW: allocation is already exported"));
+        return 0;
+    }
+
+    
+    psExportDeviceMemOUT->eError = PVRSRVAllocHandle(KERNEL_HANDLE_BASE,
+                                                    &psExportDeviceMemOUT->hMemInfo,
+                                                    psKernelMemInfo,
+                                                    PVRSRV_HANDLE_TYPE_MEM_INFO,
+                                                    PVRSRV_HANDLE_ALLOC_FLAG_NONE);
+    if (psExportDeviceMemOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVExportDeviceMemBW: failed to allocate handle from global handle list"));
+        return 0;
+    }
+
+    
+    psKernelMemInfo->ui32Flags |= PVRSRV_MEM_EXPORTED;
+
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVMapDeviceMemoryBW(IMG_UINT32 ui32BridgeID,
-							 PVRSRV_BRIDGE_IN_MAP_DEV_MEMORY *psMapDevMemIN,
-							 PVRSRV_BRIDGE_OUT_MAP_DEV_MEMORY *psMapDevMemOUT,
-							 PVRSRV_PER_PROCESS_DATA *psPerProc)
+                             PVRSRV_BRIDGE_IN_MAP_DEV_MEMORY *psMapDevMemIN,
+                             PVRSRV_BRIDGE_OUT_MAP_DEV_MEMORY *psMapDevMemOUT,
+                             PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_KERNEL_MEM_INFO	*psSrcKernelMemInfo = IMG_NULL;
-	PVRSRV_KERNEL_MEM_INFO	*psDstKernelMemInfo = IMG_NULL;
-	IMG_HANDLE				hDstDevMemHeap = IMG_NULL;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MAP_DEV_MEMORY);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psMapDevMemOUT->eError, psPerProc, 2)
-
-
-	psMapDevMemOUT->eError = PVRSRVLookupHandle(KERNEL_HANDLE_BASE,
-												(IMG_VOID**)&psSrcKernelMemInfo,
-												psMapDevMemIN->hKernelMemInfo,
-												PVRSRV_HANDLE_TYPE_MEM_INFO);
-	if(psMapDevMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-
-	psMapDevMemOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-												&hDstDevMemHeap,
-												psMapDevMemIN->hDstDevMemHeap,
-												PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP);
-	if(psMapDevMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-
-	psMapDevMemOUT->eError = PVRSRVMapDeviceMemoryKM(psPerProc,
-												  psSrcKernelMemInfo,
-												  hDstDevMemHeap,
-												  &psDstKernelMemInfo);
-	if(psMapDevMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	OSMemSet(&psMapDevMemOUT->sDstClientMemInfo,
-			 0,
-			 sizeof(psMapDevMemOUT->sDstClientMemInfo));
-	OSMemSet(&psMapDevMemOUT->sDstClientSyncInfo,
-			 0,
-			 sizeof(psMapDevMemOUT->sDstClientSyncInfo));
-
-	psMapDevMemOUT->sDstClientMemInfo.pvLinAddrKM =
-			psDstKernelMemInfo->pvLinAddrKM;
-
-	psMapDevMemOUT->sDstClientMemInfo.pvLinAddr = 0;
-	psMapDevMemOUT->sDstClientMemInfo.sDevVAddr = psDstKernelMemInfo->sDevVAddr;
-	psMapDevMemOUT->sDstClientMemInfo.ui32Flags = psDstKernelMemInfo->ui32Flags;
-	psMapDevMemOUT->sDstClientMemInfo.ui32AllocSize = psDstKernelMemInfo->ui32AllocSize;
-	psMapDevMemOUT->sDstClientMemInfo.hMappingInfo = psDstKernelMemInfo->sMemBlk.hOSMemHandle;
-
+    PVRSRV_KERNEL_MEM_INFO  *psSrcKernelMemInfo = IMG_NULL;
+    PVRSRV_KERNEL_MEM_INFO  *psDstKernelMemInfo = IMG_NULL;
+    IMG_HANDLE              hDstDevMemHeap = IMG_NULL;
+
+    PVR_ASSERT(ui32BridgeID == PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_MAP_DEV_MEMORY) ||
+               ui32BridgeID == PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_MAP_DEV_MEMORY_2));
+    PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psMapDevMemOUT->eError, psPerProc, 2)
+
+    
+    psMapDevMemOUT->eError = PVRSRVLookupHandle(KERNEL_HANDLE_BASE,
+                                                (IMG_VOID**)&psSrcKernelMemInfo,
+                                                psMapDevMemIN->hKernelMemInfo,
+                                                PVRSRV_HANDLE_TYPE_MEM_INFO);
+    if(psMapDevMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    
+    psMapDevMemOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                                &hDstDevMemHeap,
+                                                psMapDevMemIN->hDstDevMemHeap,
+                                                PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP);
+    if(psMapDevMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    
+    if (psSrcKernelMemInfo->sShareMemWorkaround.bInUse)
+    {
+        PVR_DPF((PVR_DBG_MESSAGE, "using the mem wrap workaround."));
+
+        
+
+
+
+
+
+
+
+        psMapDevMemOUT->eError = BM_XProcWorkaroundSetShareIndex(psSrcKernelMemInfo->sShareMemWorkaround.ui32ShareIndex);
+        if(psMapDevMemOUT->eError != PVRSRV_OK)
+        {
+            PVR_DPF((PVR_DBG_ERROR, "PVRSRVMapDeviceMemoryBW(): failed to recycle shared buffer"));
+            return 0;
+        }
+
+        psMapDevMemOUT->eError =
+            PVRSRVAllocDeviceMemKM(psSrcKernelMemInfo->sShareMemWorkaround.hDevCookieInt,
+                                   psPerProc,
+                                   hDstDevMemHeap,
+                                   psSrcKernelMemInfo->sShareMemWorkaround.ui32OrigReqAttribs | PVRSRV_MEM_NO_SYNCOBJ,
+                                   psSrcKernelMemInfo->sShareMemWorkaround.ui32OrigReqSize,
+                                   psSrcKernelMemInfo->sShareMemWorkaround.ui32OrigReqAlignment,
+                                   &psDstKernelMemInfo,
+                                   "" );
+        
+
+        BM_XProcWorkaroundUnsetShareIndex(psSrcKernelMemInfo->sShareMemWorkaround.ui32ShareIndex);
+        if(psMapDevMemOUT->eError != PVRSRV_OK)
+        {
+            PVR_DPF((PVR_DBG_ERROR, "lakjgfgewjlrgebhe"));
+            return 0;
+        }
+
+        if(psSrcKernelMemInfo->psKernelSyncInfo)
+        {
+            psSrcKernelMemInfo->psKernelSyncInfo->ui32RefCount++;
+        }
+
+        psDstKernelMemInfo->psKernelSyncInfo = psSrcKernelMemInfo->psKernelSyncInfo;
+    }
+    else
+    {
+    
+    psMapDevMemOUT->eError = PVRSRVMapDeviceMemoryKM(psPerProc,
+                                                  psSrcKernelMemInfo,
+                                                  hDstDevMemHeap,
+                                                  &psDstKernelMemInfo);
+    if(psMapDevMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+    }
+
+    
+    psDstKernelMemInfo->sShareMemWorkaround = psSrcKernelMemInfo->sShareMemWorkaround;
+
+    OSMemSet(&psMapDevMemOUT->sDstClientMemInfo,
+             0,
+             sizeof(psMapDevMemOUT->sDstClientMemInfo));
+    OSMemSet(&psMapDevMemOUT->sDstClientSyncInfo,
+             0,
+             sizeof(psMapDevMemOUT->sDstClientSyncInfo));
+
+    psMapDevMemOUT->sDstClientMemInfo.pvLinAddrKM =
+            psDstKernelMemInfo->pvLinAddrKM;
+
+    psMapDevMemOUT->sDstClientMemInfo.pvLinAddr = 0;
+    psMapDevMemOUT->sDstClientMemInfo.sDevVAddr = psDstKernelMemInfo->sDevVAddr;
+    psMapDevMemOUT->sDstClientMemInfo.ui32Flags = psDstKernelMemInfo->ui32Flags;
+    psMapDevMemOUT->sDstClientMemInfo.uAllocSize = psDstKernelMemInfo->uAllocSize;
+#if defined (SUPPORT_SID_INTERFACE)
+#else
+    psMapDevMemOUT->sDstClientMemInfo.hMappingInfo = psDstKernelMemInfo->sMemBlk.hOSMemHandle;
+#endif
 
-	PVRSRVAllocHandleNR(psPerProc->psHandleBase,
-					  &psMapDevMemOUT->sDstClientMemInfo.hKernelMemInfo,
-					  psDstKernelMemInfo,
-					  PVRSRV_HANDLE_TYPE_MEM_INFO,
-					  PVRSRV_HANDLE_ALLOC_FLAG_NONE);
-	psMapDevMemOUT->sDstClientSyncInfo.hKernelSyncInfo = IMG_NULL;
+    
+    PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                      &psMapDevMemOUT->sDstClientMemInfo.hKernelMemInfo,
+                      psDstKernelMemInfo,
+                      PVRSRV_HANDLE_TYPE_MEM_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE);
+    psMapDevMemOUT->sDstClientSyncInfo.hKernelSyncInfo = IMG_NULL;
+
+#if defined (SUPPORT_SID_INTERFACE)
+    
+    if (psDstKernelMemInfo->sMemBlk.hOSMemHandle != IMG_NULL)
+    {
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                      &psMapDevMemOUT->sDstClientMemInfo.hMappingInfo,
+                      psDstKernelMemInfo->sMemBlk.hOSMemHandle,
+                      PVRSRV_HANDLE_TYPE_MEM_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                      psMapDevMemOUT->sDstClientMemInfo.hKernelMemInfo);
+    }
+    else
+    {
+        psMapDevMemOUT->sDstClientMemInfo.hMappingInfo = 0;
+    }
+#endif
 
+    
+    if(psDstKernelMemInfo->psKernelSyncInfo)
+    {
+#if !defined(PVRSRV_DISABLE_UM_SYNCOBJ_MAPPINGS)
+        psMapDevMemOUT->sDstClientSyncInfo.psSyncData =
+            psDstKernelMemInfo->psKernelSyncInfo->psSyncData;
+        psMapDevMemOUT->sDstClientSyncInfo.sWriteOpsCompleteDevVAddr =
+            psDstKernelMemInfo->psKernelSyncInfo->sWriteOpsCompleteDevVAddr;
+        psMapDevMemOUT->sDstClientSyncInfo.sReadOpsCompleteDevVAddr =
+            psDstKernelMemInfo->psKernelSyncInfo->sReadOpsCompleteDevVAddr;
+
+#if defined (SUPPORT_SID_INTERFACE)
+        
+        if (psDstKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle != IMG_NULL)
+        {
+            PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                          &psMapDevMemOUT->sDstClientSyncInfo.hMappingInfo,
+                          psDstKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle,
+                          PVRSRV_HANDLE_TYPE_MEM_INFO,
+                          PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                          psMapDevMemOUT->sDstClientMemInfo.hKernelMemInfo);
+        }
+        else
+        {
+            psMapDevMemOUT->sDstClientSyncInfo.hMappingInfo = 0;
+        }
+#else
+      psMapDevMemOUT->sDstClientSyncInfo.hMappingInfo =
+          psDstKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
+#endif
+#endif
 
-	if(psDstKernelMemInfo->psKernelSyncInfo)
-	{
-		psMapDevMemOUT->sDstClientSyncInfo.psSyncData =
-			psDstKernelMemInfo->psKernelSyncInfo->psSyncData;
-		psMapDevMemOUT->sDstClientSyncInfo.sWriteOpsCompleteDevVAddr =
-			psDstKernelMemInfo->psKernelSyncInfo->sWriteOpsCompleteDevVAddr;
-		psMapDevMemOUT->sDstClientSyncInfo.sReadOpsCompleteDevVAddr =
-			psDstKernelMemInfo->psKernelSyncInfo->sReadOpsCompleteDevVAddr;
-
-		psMapDevMemOUT->sDstClientSyncInfo.hMappingInfo =
-			psDstKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
-
-		psMapDevMemOUT->sDstClientMemInfo.psClientSyncInfo = &psMapDevMemOUT->sDstClientSyncInfo;
-
-		PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
-					  &psMapDevMemOUT->sDstClientSyncInfo.hKernelSyncInfo,
-					  psDstKernelMemInfo->psKernelSyncInfo,
-					  PVRSRV_HANDLE_TYPE_SYNC_INFO,
-					  PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
-					  psMapDevMemOUT->sDstClientMemInfo.hKernelMemInfo);
-	}
+        psMapDevMemOUT->sDstClientMemInfo.psClientSyncInfo = &psMapDevMemOUT->sDstClientSyncInfo;
+        
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                      &psMapDevMemOUT->sDstClientSyncInfo.hKernelSyncInfo,
+                      psDstKernelMemInfo->psKernelSyncInfo,
+                      PVRSRV_HANDLE_TYPE_SYNC_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
+                      psMapDevMemOUT->sDstClientMemInfo.hKernelMemInfo);
+    }
 
-	COMMIT_HANDLE_BATCH_OR_ERROR(psMapDevMemOUT->eError, psPerProc)
+    COMMIT_HANDLE_BATCH_OR_ERROR(psMapDevMemOUT->eError, psPerProc)
 
-	return 0;
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVUnmapDeviceMemoryBW(IMG_UINT32 ui32BridgeID,
-							 PVRSRV_BRIDGE_IN_UNMAP_DEV_MEMORY *psUnmapDevMemIN,
-							 PVRSRV_BRIDGE_RETURN *psRetOUT,
-							 PVRSRV_PER_PROCESS_DATA *psPerProc)
+                             PVRSRV_BRIDGE_IN_UNMAP_DEV_MEMORY *psUnmapDevMemIN,
+                             PVRSRV_BRIDGE_RETURN *psRetOUT,
+                             PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo = IMG_NULL;
+    PVRSRV_KERNEL_MEM_INFO  *psKernelMemInfo = IMG_NULL;
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_UNMAP_DEV_MEMORY);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_UNMAP_DEV_MEMORY);
 
-	psRetOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-											(IMG_VOID**)&psKernelMemInfo,
-											psUnmapDevMemIN->psKernelMemInfo,
-											PVRSRV_HANDLE_TYPE_MEM_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError = PVRSRVUnmapDeviceMemoryKM(psKernelMemInfo);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError = PVRSRVReleaseHandle(psPerProc->psHandleBase,
-							psUnmapDevMemIN->psKernelMemInfo,
-							PVRSRV_HANDLE_TYPE_MEM_INFO);
+    psRetOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                            (IMG_VOID**)&psKernelMemInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+                                            psUnmapDevMemIN->hKernelMemInfo,
+#else
+                                            psUnmapDevMemIN->psKernelMemInfo,
+#endif
+                                            PVRSRV_HANDLE_TYPE_MEM_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    if (psKernelMemInfo->sShareMemWorkaround.bInUse)
+    {
+        psRetOUT->eError = PVRSRVFreeDeviceMemKM(psKernelMemInfo->sShareMemWorkaround.hDevCookieInt, psKernelMemInfo);
+        if(psRetOUT->eError != PVRSRV_OK)
+        {
+            PVR_DPF((PVR_DBG_ERROR, "PVRSRVUnmapDeviceMemoryBW: internal error, should expect FreeDeviceMem to fail"));
+            return 0;
+        }
+    }
+    else
+    {
+        psRetOUT->eError = PVRSRVUnmapDeviceMemoryKM(psKernelMemInfo);
+        if(psRetOUT->eError != PVRSRV_OK)
+        {
+            return 0;
+        }
+    }
+
+    psRetOUT->eError = PVRSRVReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+                            psUnmapDevMemIN->hKernelMemInfo,
+#else
+                            psUnmapDevMemIN->psKernelMemInfo,
+#endif
+                            PVRSRV_HANDLE_TYPE_MEM_INFO);
 
-	return 0;
+    return 0;
 }
 
 
 
 static IMG_INT
 PVRSRVMapDeviceClassMemoryBW(IMG_UINT32 ui32BridgeID,
-							 PVRSRV_BRIDGE_IN_MAP_DEVICECLASS_MEMORY *psMapDevClassMemIN,
-							 PVRSRV_BRIDGE_OUT_MAP_DEVICECLASS_MEMORY *psMapDevClassMemOUT,
-							 PVRSRV_PER_PROCESS_DATA *psPerProc)
+                             PVRSRV_BRIDGE_IN_MAP_DEVICECLASS_MEMORY *psMapDevClassMemIN,
+                             PVRSRV_BRIDGE_OUT_MAP_DEVICECLASS_MEMORY *psMapDevClassMemOUT,
+                             PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_KERNEL_MEM_INFO *psMemInfo;
-	IMG_HANDLE hOSMapInfo;
-	IMG_HANDLE hDeviceClassBufferInt;
-	IMG_HANDLE hDevMemContextInt;
-	PVRSRV_HANDLE_TYPE eHandleType;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MAP_DEVICECLASS_MEMORY);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psMapDevClassMemOUT->eError, psPerProc, 2)
-
-
-	psMapDevClassMemOUT->eError =
-		PVRSRVLookupHandleAnyType(psPerProc->psHandleBase, &hDeviceClassBufferInt,
-								  &eHandleType,
-								  psMapDevClassMemIN->hDeviceClassBuffer);
-
-	if(psMapDevClassMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	
-	psMapDevClassMemOUT->eError =
-	PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevMemContextInt,
-				   psMapDevClassMemIN->hDevMemContext,
-				   PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
-
-	if(psMapDevClassMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	
-	switch(eHandleType)
-	{
-#if defined(PVR_SECURE_HANDLES)
-		case PVRSRV_HANDLE_TYPE_DISP_BUFFER:
-		case PVRSRV_HANDLE_TYPE_BUF_BUFFER:
+    PVRSRV_KERNEL_MEM_INFO *psMemInfo;
+    IMG_HANDLE hOSMapInfo;
+    IMG_HANDLE hDeviceClassBufferInt;
+    IMG_HANDLE hDevMemContextInt;
+    PVRSRV_HANDLE_TYPE eHandleType;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MAP_DEVICECLASS_MEMORY);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psMapDevClassMemOUT->eError, psPerProc, 2)
+
+    
+    psMapDevClassMemOUT->eError =
+        PVRSRVLookupHandleAnyType(psPerProc->psHandleBase,
+                                  &hDeviceClassBufferInt,
+                                  &eHandleType,
+                                  psMapDevClassMemIN->hDeviceClassBuffer);
+
+    if(psMapDevClassMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    
+    psMapDevClassMemOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &hDevMemContextInt,
+                           psMapDevClassMemIN->hDevMemContext,
+                           PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+
+    if(psMapDevClassMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    
+    switch(eHandleType)
+    {
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+       case PVRSRV_HANDLE_TYPE_DISP_BUFFER:
+        case PVRSRV_HANDLE_TYPE_BUF_BUFFER:
 #else
-		case PVRSRV_HANDLE_TYPE_NONE:
+        case PVRSRV_HANDLE_TYPE_NONE:
+#endif
+            break;
+        default:
+            psMapDevClassMemOUT->eError = PVRSRV_ERROR_INVALID_HANDLE_TYPE;
+            return 0;
+    }
+
+    psMapDevClassMemOUT->eError =
+        PVRSRVMapDeviceClassMemoryKM(psPerProc,
+                                     hDevMemContextInt,
+                                     hDeviceClassBufferInt,
+                                     &psMemInfo,
+                                     &hOSMapInfo);
+    if(psMapDevClassMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    OSMemSet(&psMapDevClassMemOUT->sClientMemInfo,
+             0,
+             sizeof(psMapDevClassMemOUT->sClientMemInfo));
+    OSMemSet(&psMapDevClassMemOUT->sClientSyncInfo,
+             0,
+             sizeof(psMapDevClassMemOUT->sClientSyncInfo));
+
+    psMapDevClassMemOUT->sClientMemInfo.pvLinAddrKM =
+            psMemInfo->pvLinAddrKM;
+
+    psMapDevClassMemOUT->sClientMemInfo.pvLinAddr = 0;
+    psMapDevClassMemOUT->sClientMemInfo.sDevVAddr = psMemInfo->sDevVAddr;
+    psMapDevClassMemOUT->sClientMemInfo.ui32Flags = psMemInfo->ui32Flags;
+    psMapDevClassMemOUT->sClientMemInfo.uAllocSize = psMemInfo->uAllocSize;
+#if defined (SUPPORT_SID_INTERFACE)
+    if (psMemInfo->sMemBlk.hOSMemHandle != 0)
+    {
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                      &psMapDevClassMemOUT->sClientMemInfo.hMappingInfo,
+                      psMemInfo->sMemBlk.hOSMemHandle,
+                      PVRSRV_HANDLE_TYPE_MEM_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                      psMapDevClassMemIN->hDeviceClassBuffer);
+    }
+    else
+    {
+         psMapDevClassMemOUT->sClientMemInfo.hMappingInfo = 0;
+    }
+#else
+  psMapDevClassMemOUT->sClientMemInfo.hMappingInfo = psMemInfo->sMemBlk.hOSMemHandle;
 #endif
-			break;
-		default:
-			psMapDevClassMemOUT->eError = PVRSRV_ERROR_INVALID_HANDLE_TYPE;
-			return 0;
-	}
 
-	psMapDevClassMemOUT->eError =
-		PVRSRVMapDeviceClassMemoryKM(psPerProc,
-									 hDevMemContextInt,
-									 hDeviceClassBufferInt,
-									 &psMemInfo,
-									 &hOSMapInfo);
-	if(psMapDevClassMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                      &psMapDevClassMemOUT->sClientMemInfo.hKernelMemInfo,
+                      psMemInfo,
+                      PVRSRV_HANDLE_TYPE_MEM_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                      psMapDevClassMemIN->hDeviceClassBuffer);
+
+    psMapDevClassMemOUT->sClientSyncInfo.hKernelSyncInfo = IMG_NULL;
+
+    
+    if(psMemInfo->psKernelSyncInfo)
+    {
+#if !defined(PVRSRV_DISABLE_UM_SYNCOBJ_MAPPINGS)
+        psMapDevClassMemOUT->sClientSyncInfo.psSyncData =
+            psMemInfo->psKernelSyncInfo->psSyncData;
+        psMapDevClassMemOUT->sClientSyncInfo.sWriteOpsCompleteDevVAddr =
+            psMemInfo->psKernelSyncInfo->sWriteOpsCompleteDevVAddr;
+        psMapDevClassMemOUT->sClientSyncInfo.sReadOpsCompleteDevVAddr =
+            psMemInfo->psKernelSyncInfo->sReadOpsCompleteDevVAddr;
+
+#if defined (SUPPORT_SID_INTERFACE)
+       if (psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle != 0)
+        {
+            PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                              &psMapDevClassMemOUT->sClientSyncInfo.hMappingInfo,
+                              psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle,
+                              PVRSRV_HANDLE_TYPE_SYNC_INFO,
+                              PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
+                              psMapDevClassMemOUT->sClientMemInfo.hKernelMemInfo);
+        }
+        else
+        {
+            psMapDevClassMemOUT->sClientSyncInfo.hMappingInfo = 0;
+        }
+#else
+      psMapDevClassMemOUT->sClientSyncInfo.hMappingInfo =
+          psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
+#endif
+#endif
 
-	OSMemSet(&psMapDevClassMemOUT->sClientMemInfo,
-			 0,
-			 sizeof(psMapDevClassMemOUT->sClientMemInfo));
-	OSMemSet(&psMapDevClassMemOUT->sClientSyncInfo,
-			 0,
-			 sizeof(psMapDevClassMemOUT->sClientSyncInfo));
-
-	psMapDevClassMemOUT->sClientMemInfo.pvLinAddrKM =
-			psMemInfo->pvLinAddrKM;
-
-	psMapDevClassMemOUT->sClientMemInfo.pvLinAddr = 0;
-	psMapDevClassMemOUT->sClientMemInfo.sDevVAddr = psMemInfo->sDevVAddr;
-	psMapDevClassMemOUT->sClientMemInfo.ui32Flags = psMemInfo->ui32Flags;
-	psMapDevClassMemOUT->sClientMemInfo.ui32AllocSize = psMemInfo->ui32AllocSize;
-	psMapDevClassMemOUT->sClientMemInfo.hMappingInfo = psMemInfo->sMemBlk.hOSMemHandle;
-
-	PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
-					  &psMapDevClassMemOUT->sClientMemInfo.hKernelMemInfo,
-					  psMemInfo,
-					  PVRSRV_HANDLE_TYPE_MEM_INFO,
-					  PVRSRV_HANDLE_ALLOC_FLAG_NONE,
-					  psMapDevClassMemIN->hDeviceClassBuffer);
-
-	psMapDevClassMemOUT->sClientSyncInfo.hKernelSyncInfo = IMG_NULL;
-
-	
-	if(psMemInfo->psKernelSyncInfo)
-	{
-		psMapDevClassMemOUT->sClientSyncInfo.psSyncData =
-			psMemInfo->psKernelSyncInfo->psSyncData;
-		psMapDevClassMemOUT->sClientSyncInfo.sWriteOpsCompleteDevVAddr =
-			psMemInfo->psKernelSyncInfo->sWriteOpsCompleteDevVAddr;
-		psMapDevClassMemOUT->sClientSyncInfo.sReadOpsCompleteDevVAddr =
-			psMemInfo->psKernelSyncInfo->sReadOpsCompleteDevVAddr;
-
-		psMapDevClassMemOUT->sClientSyncInfo.hMappingInfo =
-			psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
-
-		psMapDevClassMemOUT->sClientMemInfo.psClientSyncInfo = &psMapDevClassMemOUT->sClientSyncInfo;
-		
-		PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
-						  &psMapDevClassMemOUT->sClientSyncInfo.hKernelSyncInfo,
-						  psMemInfo->psKernelSyncInfo,
-						  PVRSRV_HANDLE_TYPE_SYNC_INFO,
-						  PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
-						  psMapDevClassMemOUT->sClientMemInfo.hKernelMemInfo);
-	}
+        psMapDevClassMemOUT->sClientMemInfo.psClientSyncInfo = &psMapDevClassMemOUT->sClientSyncInfo;
+        
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                          &psMapDevClassMemOUT->sClientSyncInfo.hKernelSyncInfo,
+                          psMemInfo->psKernelSyncInfo,
+                          PVRSRV_HANDLE_TYPE_SYNC_INFO,
+                          PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
+                          psMapDevClassMemOUT->sClientMemInfo.hKernelMemInfo);
+    }
 
-	COMMIT_HANDLE_BATCH_OR_ERROR(psMapDevClassMemOUT->eError, psPerProc)
+    COMMIT_HANDLE_BATCH_OR_ERROR(psMapDevClassMemOUT->eError, psPerProc)
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVUnmapDeviceClassMemoryBW(IMG_UINT32 ui32BridgeID,
-							   PVRSRV_BRIDGE_IN_UNMAP_DEVICECLASS_MEMORY *psUnmapDevClassMemIN,
-							   PVRSRV_BRIDGE_RETURN *psRetOUT,
-							   PVRSRV_PER_PROCESS_DATA *psPerProc)
+                               PVRSRV_BRIDGE_IN_UNMAP_DEVICECLASS_MEMORY *psUnmapDevClassMemIN,
+                               PVRSRV_BRIDGE_RETURN *psRetOUT,
+                               PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvKernelMemInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_UNMAP_DEVICECLASS_MEMORY);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &pvKernelMemInfo,
-						   psUnmapDevClassMemIN->psKernelMemInfo,
-						   PVRSRV_HANDLE_TYPE_MEM_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    IMG_VOID *pvKernelMemInfo;
 
-	psRetOUT->eError = PVRSRVUnmapDeviceClassMemoryKM(pvKernelMemInfo);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_UNMAP_DEVICECLASS_MEMORY);
 
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVReleaseHandle(psPerProc->psHandleBase,
-							psUnmapDevClassMemIN->psKernelMemInfo,
-							PVRSRV_HANDLE_TYPE_MEM_INFO);
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &pvKernelMemInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+                           psUnmapDevClassMemIN->hKernelMemInfo,
+#else
+                           psUnmapDevClassMemIN->psKernelMemInfo,
+#endif
+                           PVRSRV_HANDLE_TYPE_MEM_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError = PVRSRVUnmapDeviceClassMemoryKM(pvKernelMemInfo);
+
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+                            psUnmapDevClassMemIN->hKernelMemInfo,
+#else
+                            psUnmapDevClassMemIN->psKernelMemInfo,
+#endif
+                            PVRSRV_HANDLE_TYPE_MEM_INFO);
 
-	return 0;
+    return 0;
 }
 
 
 #if defined(OS_PVRSRV_WRAP_EXT_MEM_BW)
 IMG_INT
 PVRSRVWrapExtMemoryBW(IMG_UINT32 ui32BridgeID,
-					  PVRSRV_BRIDGE_IN_WRAP_EXT_MEMORY *psWrapExtMemIN,
-					  PVRSRV_BRIDGE_OUT_WRAP_EXT_MEMORY *psWrapExtMemOUT,
-					  PVRSRV_PER_PROCESS_DATA *psPerProc);
+                      PVRSRV_BRIDGE_IN_WRAP_EXT_MEMORY *psWrapExtMemIN,
+                      PVRSRV_BRIDGE_OUT_WRAP_EXT_MEMORY *psWrapExtMemOUT,
+                      PVRSRV_PER_PROCESS_DATA *psPerProc);
 #else 
 static IMG_INT
 PVRSRVWrapExtMemoryBW(IMG_UINT32 ui32BridgeID,
-					  PVRSRV_BRIDGE_IN_WRAP_EXT_MEMORY *psWrapExtMemIN,
-					  PVRSRV_BRIDGE_OUT_WRAP_EXT_MEMORY *psWrapExtMemOUT,
-					  PVRSRV_PER_PROCESS_DATA *psPerProc)
-{
-	IMG_HANDLE hDevCookieInt;
-	IMG_HANDLE hDevMemContextInt;
-	PVRSRV_KERNEL_MEM_INFO *psMemInfo;
-	IMG_SYS_PHYADDR *psSysPAddr = IMG_NULL;
+                      PVRSRV_BRIDGE_IN_WRAP_EXT_MEMORY *psWrapExtMemIN,
+                      PVRSRV_BRIDGE_OUT_WRAP_EXT_MEMORY *psWrapExtMemOUT,
+                      PVRSRV_PER_PROCESS_DATA *psPerProc)
+{
+    IMG_HANDLE hDevCookieInt;
+    IMG_HANDLE hDevMemContextInt;
+    PVRSRV_KERNEL_MEM_INFO *psMemInfo;
+    IMG_SYS_PHYADDR *psSysPAddr = IMG_NULL;
         IMG_UINT32 ui32PageTableSize = 0;
-	
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_WRAP_EXT_MEMORY);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psWrapExtMemOUT->eError, psPerProc, 2)
-
-	
-	psWrapExtMemOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
-						   psWrapExtMemIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
-	if(psWrapExtMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	
-	psWrapExtMemOUT->eError =
-	PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevMemContextInt,
-				   psWrapExtMemIN->hDevMemContext,
-				   PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
-
-	if(psWrapExtMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	if(psWrapExtMemIN->ui32NumPageTableEntries)
-	{
-		ui32PageTableSize = psWrapExtMemIN->ui32NumPageTableEntries
-						* sizeof(IMG_SYS_PHYADDR);
-
-		ASSIGN_AND_EXIT_ON_ERROR(psWrapExtMemOUT->eError,
-				  OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
-				  ui32PageTableSize,
-				  (IMG_VOID **)&psSysPAddr, 0,
-				  "Page Table"));
-
-		if(CopyFromUserWrapper(psPerProc,
-							   ui32BridgeID,
-							   psSysPAddr,
-							   psWrapExtMemIN->psSysPAddr,
-							   ui32PageTableSize) != PVRSRV_OK)
-		{
-			OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, 	ui32PageTableSize, (IMG_VOID *)psSysPAddr, 0);
-			
-			return -EFAULT;
-		}
-	}
-		
-	psWrapExtMemOUT->eError =
-		PVRSRVWrapExtMemoryKM(hDevCookieInt,
-							  psPerProc,
-							  hDevMemContextInt,
-							  psWrapExtMemIN->ui32ByteSize,
-							  psWrapExtMemIN->ui32PageOffset,
-							  psWrapExtMemIN->bPhysContig,
-							  psSysPAddr,
-							  psWrapExtMemIN->pvLinAddr,
-							  psWrapExtMemIN->ui32Flags,
-							  &psMemInfo);
-
-	if(psWrapExtMemIN->ui32NumPageTableEntries)
-	{
-		OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
-			  ui32PageTableSize,
-			  (IMG_VOID *)psSysPAddr, 0);
-		
-	}
-	
-	if(psWrapExtMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psWrapExtMemOUT->sClientMemInfo.pvLinAddrKM =
-			psMemInfo->pvLinAddrKM;
-
-	
-	psWrapExtMemOUT->sClientMemInfo.pvLinAddr = 0;
-	psWrapExtMemOUT->sClientMemInfo.sDevVAddr = psMemInfo->sDevVAddr;
-	psWrapExtMemOUT->sClientMemInfo.ui32Flags = psMemInfo->ui32Flags;
-	psWrapExtMemOUT->sClientMemInfo.ui32AllocSize = psMemInfo->ui32AllocSize;
-	psWrapExtMemOUT->sClientMemInfo.hMappingInfo = psMemInfo->sMemBlk.hOSMemHandle;
 
-	PVRSRVAllocHandleNR(psPerProc->psHandleBase,
-					  &psWrapExtMemOUT->sClientMemInfo.hKernelMemInfo,
-					  psMemInfo,
-					  PVRSRV_HANDLE_TYPE_MEM_INFO,
-					  PVRSRV_HANDLE_ALLOC_FLAG_NONE);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_WRAP_EXT_MEMORY);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psWrapExtMemOUT->eError, psPerProc, 2)
+
+    
+    psWrapExtMemOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
+                           psWrapExtMemIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
+    if(psWrapExtMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    
+    psWrapExtMemOUT->eError =
+    PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevMemContextInt,
+                   psWrapExtMemIN->hDevMemContext,
+                   PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+
+    if(psWrapExtMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    if(psWrapExtMemIN->ui32NumPageTableEntries)
+    {
+        ui32PageTableSize = psWrapExtMemIN->ui32NumPageTableEntries
+                        * sizeof(IMG_SYS_PHYADDR);
+
+        ASSIGN_AND_EXIT_ON_ERROR(psWrapExtMemOUT->eError,
+                  OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+                  ui32PageTableSize,
+                  (IMG_VOID **)&psSysPAddr, 0,
+                  "Page Table"));
+
+        if(CopyFromUserWrapper(psPerProc,
+                               ui32BridgeID,
+                               psSysPAddr,
+                               psWrapExtMemIN->psSysPAddr,
+                               ui32PageTableSize) != PVRSRV_OK)
+        {
+            OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,  ui32PageTableSize, (IMG_VOID *)psSysPAddr, 0);
+            
+            return -EFAULT;
+        }
+    }
+
+    psWrapExtMemOUT->eError =
+        PVRSRVWrapExtMemoryKM(hDevCookieInt,
+                              psPerProc,
+                              hDevMemContextInt,
+                              psWrapExtMemIN->ui32ByteSize,
+                              psWrapExtMemIN->ui32PageOffset,
+                              psWrapExtMemIN->bPhysContig,
+                              psSysPAddr,
+                              psWrapExtMemIN->pvLinAddr,
+                              psWrapExtMemIN->ui32Flags,
+                              &psMemInfo);
+
+    if(psWrapExtMemIN->ui32NumPageTableEntries)
+    {
+        OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
+              ui32PageTableSize,
+              (IMG_VOID *)psSysPAddr, 0);
+        
+    }
+
+    if(psWrapExtMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psWrapExtMemOUT->sClientMemInfo.pvLinAddrKM =
+            psMemInfo->pvLinAddrKM;
+
+    
+    psWrapExtMemOUT->sClientMemInfo.pvLinAddr = 0;
+    psWrapExtMemOUT->sClientMemInfo.sDevVAddr = psMemInfo->sDevVAddr;
+    psWrapExtMemOUT->sClientMemInfo.ui32Flags = psMemInfo->ui32Flags;
+    psWrapExtMemOUT->sClientMemInfo.uAllocSize = psMemInfo->uAllocSize;
+#if defined (SUPPORT_SID_INTERFACE)
+#else
+    psWrapExtMemOUT->sClientMemInfo.hMappingInfo = psMemInfo->sMemBlk.hOSMemHandle;
+#endif
 
-	
-	psWrapExtMemOUT->sClientSyncInfo.psSyncData =
-		psMemInfo->psKernelSyncInfo->psSyncData;
-	psWrapExtMemOUT->sClientSyncInfo.sWriteOpsCompleteDevVAddr =
-		psMemInfo->psKernelSyncInfo->sWriteOpsCompleteDevVAddr;
-	psWrapExtMemOUT->sClientSyncInfo.sReadOpsCompleteDevVAddr =
-		psMemInfo->psKernelSyncInfo->sReadOpsCompleteDevVAddr;
+    PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                      &psWrapExtMemOUT->sClientMemInfo.hKernelMemInfo,
+                      psMemInfo,
+                      PVRSRV_HANDLE_TYPE_MEM_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE);
+
+#if defined (SUPPORT_SID_INTERFACE)
+    
+    if (psMemInfo->sMemBlk.hOSMemHandle != IMG_NULL)
+    {
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                      &psWrapExtMemOUT->sClientMemInfo.hMappingInfo,
+                      psMemInfo->sMemBlk.hOSMemHandle,
+                      PVRSRV_HANDLE_TYPE_MEM_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                      psWrapExtMemOUT->sClientMemInfo.hKernelMemInfo);
+    }
+    else
+    {
+        psWrapExtMemOUT->sClientMemInfo.hMappingInfo = 0;
+    }
+#endif
 
-	psWrapExtMemOUT->sClientSyncInfo.hMappingInfo =
-		psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
+    
+#if !defined(PVRSRV_DISABLE_UM_SYNCOBJ_MAPPINGS)
+    psWrapExtMemOUT->sClientSyncInfo.psSyncData =
+        psMemInfo->psKernelSyncInfo->psSyncData;
+    psWrapExtMemOUT->sClientSyncInfo.sWriteOpsCompleteDevVAddr =
+        psMemInfo->psKernelSyncInfo->sWriteOpsCompleteDevVAddr;
+    psWrapExtMemOUT->sClientSyncInfo.sReadOpsCompleteDevVAddr =
+        psMemInfo->psKernelSyncInfo->sReadOpsCompleteDevVAddr;
+
+#if defined (SUPPORT_SID_INTERFACE)
+    
+    if (psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle != IMG_NULL)
+    {
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                      &psWrapExtMemOUT->sClientSyncInfo.hMappingInfo,
+                      psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle,
+                      PVRSRV_HANDLE_TYPE_MEM_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                      psWrapExtMemOUT->sClientMemInfo.hKernelMemInfo);
+    }
+    else
+    {
+        psWrapExtMemOUT->sClientSyncInfo.hMappingInfo = 0;
+    }
+#else
+    psWrapExtMemOUT->sClientSyncInfo.hMappingInfo =
+        psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
+#endif
+#endif
 
-	psWrapExtMemOUT->sClientMemInfo.psClientSyncInfo = &psWrapExtMemOUT->sClientSyncInfo;
+    psWrapExtMemOUT->sClientMemInfo.psClientSyncInfo = &psWrapExtMemOUT->sClientSyncInfo;
 
-	PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
-					  &psWrapExtMemOUT->sClientSyncInfo.hKernelSyncInfo,
-					  (IMG_HANDLE)psMemInfo->psKernelSyncInfo,
-					  PVRSRV_HANDLE_TYPE_SYNC_INFO,
-					  PVRSRV_HANDLE_ALLOC_FLAG_NONE,
-					  psWrapExtMemOUT->sClientMemInfo.hKernelMemInfo);
+    PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                      &psWrapExtMemOUT->sClientSyncInfo.hKernelSyncInfo,
+                      (IMG_HANDLE)psMemInfo->psKernelSyncInfo,
+                      PVRSRV_HANDLE_TYPE_SYNC_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                      psWrapExtMemOUT->sClientMemInfo.hKernelMemInfo);
 
-	COMMIT_HANDLE_BATCH_OR_ERROR(psWrapExtMemOUT->eError, psPerProc)
+    COMMIT_HANDLE_BATCH_OR_ERROR(psWrapExtMemOUT->eError, psPerProc)
 
-	return 0;
+    return 0;
 }
 #endif 
 
 static IMG_INT
 PVRSRVUnwrapExtMemoryBW(IMG_UINT32 ui32BridgeID,
-						PVRSRV_BRIDGE_IN_UNWRAP_EXT_MEMORY *psUnwrapExtMemIN,
-						PVRSRV_BRIDGE_RETURN *psRetOUT,
-						PVRSRV_PER_PROCESS_DATA *psPerProc)
+                        PVRSRV_BRIDGE_IN_UNWRAP_EXT_MEMORY *psUnwrapExtMemIN,
+                        PVRSRV_BRIDGE_RETURN *psRetOUT,
+                        PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvMemInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_UNWRAP_EXT_MEMORY);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvMemInfo,
-						   psUnwrapExtMemIN->hKernelMemInfo,
-						   PVRSRV_HANDLE_TYPE_MEM_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVUnwrapExtMemoryKM((PVRSRV_KERNEL_MEM_INFO *)pvMemInfo);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVReleaseHandle(psPerProc->psHandleBase,
-						   psUnwrapExtMemIN->hKernelMemInfo,
-						   PVRSRV_HANDLE_TYPE_MEM_INFO);
-
-	return 0;
+    IMG_VOID *pvMemInfo;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_UNWRAP_EXT_MEMORY);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvMemInfo,
+                           psUnwrapExtMemIN->hKernelMemInfo,
+                           PVRSRV_HANDLE_TYPE_MEM_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVUnwrapExtMemoryKM((PVRSRV_KERNEL_MEM_INFO *)pvMemInfo);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVReleaseHandle(psPerProc->psHandleBase,
+                           psUnwrapExtMemIN->hKernelMemInfo,
+                           PVRSRV_HANDLE_TYPE_MEM_INFO);
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVGetFreeDeviceMemBW(IMG_UINT32 ui32BridgeID,
-						 PVRSRV_BRIDGE_IN_GETFREEDEVICEMEM *psGetFreeDeviceMemIN,
-						 PVRSRV_BRIDGE_OUT_GETFREEDEVICEMEM *psGetFreeDeviceMemOUT,
-						 PVRSRV_PER_PROCESS_DATA *psPerProc)
+                         PVRSRV_BRIDGE_IN_GETFREEDEVICEMEM *psGetFreeDeviceMemIN,
+                         PVRSRV_BRIDGE_OUT_GETFREEDEVICEMEM *psGetFreeDeviceMemOUT,
+                         PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GETFREE_DEVICEMEM);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GETFREE_DEVICEMEM);
 
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
 
-	psGetFreeDeviceMemOUT->eError =
-		PVRSRVGetFreeDeviceMemKM(psGetFreeDeviceMemIN->ui32Flags,
-								 &psGetFreeDeviceMemOUT->ui32Total,
-								 &psGetFreeDeviceMemOUT->ui32Free,
-								 &psGetFreeDeviceMemOUT->ui32LargestBlock);
+    psGetFreeDeviceMemOUT->eError =
+        PVRSRVGetFreeDeviceMemKM(psGetFreeDeviceMemIN->ui32Flags,
+                                 &psGetFreeDeviceMemOUT->ui32Total,
+                                 &psGetFreeDeviceMemOUT->ui32Free,
+                                 &psGetFreeDeviceMemOUT->ui32LargestBlock);
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRMMapOSMemHandleToMMapDataBW(IMG_UINT32 ui32BridgeID,
-								  PVRSRV_BRIDGE_IN_MHANDLE_TO_MMAP_DATA *psMMapDataIN,
-								  PVRSRV_BRIDGE_OUT_MHANDLE_TO_MMAP_DATA *psMMapDataOUT,
-								  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                                  PVRSRV_BRIDGE_IN_MHANDLE_TO_MMAP_DATA *psMMapDataIN,
+                                  PVRSRV_BRIDGE_OUT_MHANDLE_TO_MMAP_DATA *psMMapDataOUT,
+                                  PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MHANDLE_TO_MMAP_DATA);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MHANDLE_TO_MMAP_DATA);
 
 #if defined (__linux__)
-	psMMapDataOUT->eError =
-		PVRMMapOSMemHandleToMMapData(psPerProc,
-										psMMapDataIN->hMHandle,
-										&psMMapDataOUT->ui32MMapOffset,
-										&psMMapDataOUT->ui32ByteOffset,
-										&psMMapDataOUT->ui32RealByteSize,
-										&psMMapDataOUT->ui32UserVAddr);
-#else	
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
-	PVR_UNREFERENCED_PARAMETER(psMMapDataIN);
+    psMMapDataOUT->eError =
+        PVRMMapOSMemHandleToMMapData(psPerProc,
+                                        psMMapDataIN->hMHandle,
+                                        &psMMapDataOUT->ui32MMapOffset,
+                                        &psMMapDataOUT->ui32ByteOffset,
+                                        &psMMapDataOUT->ui32RealByteSize,
+                                        &psMMapDataOUT->ui32UserVAddr);
+#else
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVR_UNREFERENCED_PARAMETER(psMMapDataIN);
 
-	psMMapDataOUT->eError = PVRSRV_ERROR_NOT_SUPPORTED;
-#endif	
-	return 0;
+    psMMapDataOUT->eError = PVRSRV_ERROR_NOT_SUPPORTED;
+#endif
+    return 0;
 }
 
 
 static IMG_INT
 PVRMMapReleaseMMapDataBW(IMG_UINT32 ui32BridgeID,
-								  PVRSRV_BRIDGE_IN_RELEASE_MMAP_DATA *psMMapDataIN,
-								  PVRSRV_BRIDGE_OUT_RELEASE_MMAP_DATA *psMMapDataOUT,
-								  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                                  PVRSRV_BRIDGE_IN_RELEASE_MMAP_DATA *psMMapDataIN,
+                                  PVRSRV_BRIDGE_OUT_RELEASE_MMAP_DATA *psMMapDataOUT,
+                                  PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_RELEASE_MMAP_DATA);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_RELEASE_MMAP_DATA);
 
 #if defined (__linux__)
-	psMMapDataOUT->eError =
-		PVRMMapReleaseMMapData(psPerProc,
-										psMMapDataIN->hMHandle,
-										&psMMapDataOUT->bMUnmap,
-										&psMMapDataOUT->ui32RealByteSize,
-										&psMMapDataOUT->ui32UserVAddr);
+    psMMapDataOUT->eError =
+        PVRMMapReleaseMMapData(psPerProc,
+                                        psMMapDataIN->hMHandle,
+                                        &psMMapDataOUT->bMUnmap,
+                                        &psMMapDataOUT->ui32RealByteSize,
+                                        &psMMapDataOUT->ui32UserVAddr);
 #else
-	
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
-	PVR_UNREFERENCED_PARAMETER(psMMapDataIN);
 
-	psMMapDataOUT->eError = PVRSRV_ERROR_NOT_SUPPORTED;
-#endif	
-	return 0;
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVR_UNREFERENCED_PARAMETER(psMMapDataIN);
+
+    psMMapDataOUT->eError = PVRSRV_ERROR_NOT_SUPPORTED;
+#endif
+    return 0;
+}
+
+
+#if defined (SUPPORT_SID_INTERFACE)
+static IMG_INT
+PVRSRVChangeDeviceMemoryAttributesBW(IMG_UINT32 ui32BridgeID,
+                                     PVRSRV_BRIDGE_IN_CHG_DEV_MEM_ATTRIBS *psChgMemAttribIN,
+                                     PVRSRV_BRIDGE_RETURN *psRetOUT,
+                                     PVRSRV_PER_PROCESS_DATA *psPerProc)
+{
+    IMG_HANDLE hKernelMemInfo;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CHG_DEV_MEM_ATTRIBS);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &hKernelMemInfo,
+                           psChgMemAttribIN->hKernelMemInfo,
+                           PVRSRV_HANDLE_TYPE_MEM_INFO);
+
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVChangeDeviceMemoryAttributesKM(hKernelMemInfo, psChgMemAttribIN->ui32Attribs);
+
+    return 0;
 }
+#else
+static IMG_INT
+PVRSRVChangeDeviceMemoryAttributesBW(IMG_UINT32 ui32BridgeID,
+                                     PVRSRV_BRIDGE_IN_CHG_DEV_MEM_ATTRIBS *psChgMemAttribIN,
+                                     PVRSRV_BRIDGE_RETURN *psRetOUT,
+                                     PVRSRV_PER_PROCESS_DATA *psPerProc)
+{
+    PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
+    PVR_UNREFERENCED_PARAMETER(psChgMemAttribIN);
+    PVR_UNREFERENCED_PARAMETER(psRetOUT);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
 
+    return 0;
+}
+#endif
 
 #ifdef PDUMP
 static IMG_INT
 PDumpIsCaptureFrameBW(IMG_UINT32 ui32BridgeID,
-					  IMG_VOID *psBridgeIn,
-					  PVRSRV_BRIDGE_OUT_PDUMP_ISCAPTURING *psPDumpIsCapturingOUT,
-					  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                      IMG_VOID *psBridgeIn,
+                      PVRSRV_BRIDGE_OUT_PDUMP_ISCAPTURING *psPDumpIsCapturingOUT,
+                      PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_ISCAPTURING);
-	PVR_UNREFERENCED_PARAMETER(psBridgeIn);
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_ISCAPTURING);
+    PVR_UNREFERENCED_PARAMETER(psBridgeIn);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
 
-	psPDumpIsCapturingOUT->bIsCapturing = PDumpIsCaptureFrameKM();
-	psPDumpIsCapturingOUT->eError = PVRSRV_OK;
+    psPDumpIsCapturingOUT->bIsCapturing = PDumpIsCaptureFrameKM();
+    psPDumpIsCapturingOUT->eError = PVRSRV_OK;
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PDumpCommentBW(IMG_UINT32 ui32BridgeID,
-			   PVRSRV_BRIDGE_IN_PDUMP_COMMENT *psPDumpCommentIN,
-			   PVRSRV_BRIDGE_RETURN *psRetOUT,
-			   PVRSRV_PER_PROCESS_DATA *psPerProc)
+               PVRSRV_BRIDGE_IN_PDUMP_COMMENT *psPDumpCommentIN,
+               PVRSRV_BRIDGE_RETURN *psRetOUT,
+               PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_COMMENT);
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_COMMENT);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
 
-	psRetOUT->eError = PDumpCommentKM(&psPDumpCommentIN->szComment[0],
-									  psPDumpCommentIN->ui32Flags);
-	return 0;
+    psRetOUT->eError = PDumpCommentKM(&psPDumpCommentIN->szComment[0],
+                                      psPDumpCommentIN->ui32Flags);
+    return 0;
 }
 
 static IMG_INT
 PDumpSetFrameBW(IMG_UINT32 ui32BridgeID,
-				PVRSRV_BRIDGE_IN_PDUMP_SETFRAME *psPDumpSetFrameIN,
-				PVRSRV_BRIDGE_RETURN *psRetOUT,
-				PVRSRV_PER_PROCESS_DATA *psPerProc)
+                PVRSRV_BRIDGE_IN_PDUMP_SETFRAME *psPDumpSetFrameIN,
+                PVRSRV_BRIDGE_RETURN *psRetOUT,
+                PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_SETFRAME);
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_SETFRAME);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
 
-	psRetOUT->eError = PDumpSetFrameKM(psPDumpSetFrameIN->ui32Frame);
+    psRetOUT->eError = PDumpSetFrameKM(psPDumpSetFrameIN->ui32Frame);
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PDumpRegWithFlagsBW(IMG_UINT32 ui32BridgeID,
-					PVRSRV_BRIDGE_IN_PDUMP_DUMPREG *psPDumpRegDumpIN,
-					PVRSRV_BRIDGE_RETURN *psRetOUT,
-					PVRSRV_PER_PROCESS_DATA *psPerProc)
+                    PVRSRV_BRIDGE_IN_PDUMP_DUMPREG *psPDumpRegDumpIN,
+                    PVRSRV_BRIDGE_RETURN *psRetOUT,
+                    PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_DEVICE_NODE *psDeviceNode;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_REG);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, 
-						   (IMG_VOID **)&psDeviceNode, 
-						   psPDumpRegDumpIN->hDevCookie, 
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError = PDumpRegWithFlagsKM (psPDumpRegDumpIN->szRegRegion,
-											psPDumpRegDumpIN->sHWReg.ui32RegAddr,
-											psPDumpRegDumpIN->sHWReg.ui32RegVal,
-											psPDumpRegDumpIN->ui32Flags);
-
-	return 0;
+    PVRSRV_DEVICE_NODE *psDeviceNode;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_REG);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           (IMG_VOID **)&psDeviceNode,
+                           psPDumpRegDumpIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError = PDumpRegWithFlagsKM (psPDumpRegDumpIN->szRegRegion,
+                                            psPDumpRegDumpIN->sHWReg.ui32RegAddr,
+                                            psPDumpRegDumpIN->sHWReg.ui32RegVal,
+                                            psPDumpRegDumpIN->ui32Flags);
+
+    return 0;
 }
 
 static IMG_INT
 PDumpRegPolBW(IMG_UINT32 ui32BridgeID,
-			  PVRSRV_BRIDGE_IN_PDUMP_REGPOL *psPDumpRegPolIN,
-			  PVRSRV_BRIDGE_RETURN *psRetOUT,
-			  PVRSRV_PER_PROCESS_DATA *psPerProc)
+              PVRSRV_BRIDGE_IN_PDUMP_REGPOL *psPDumpRegPolIN,
+              PVRSRV_BRIDGE_RETURN *psRetOUT,
+              PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_DEVICE_NODE *psDeviceNode;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_REGPOL);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, 
-						   (IMG_VOID **)&psDeviceNode, 
-						   psPDumpRegPolIN->hDevCookie, 
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-
-	psRetOUT->eError = 
-		PDumpRegPolWithFlagsKM(psPDumpRegPolIN->szRegRegion,
-							   psPDumpRegPolIN->sHWReg.ui32RegAddr,	
-							   psPDumpRegPolIN->sHWReg.ui32RegVal,
-							   psPDumpRegPolIN->ui32Mask,
-							   psPDumpRegPolIN->ui32Flags);
-
-	return 0;
+    PVRSRV_DEVICE_NODE *psDeviceNode;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_REGPOL);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           (IMG_VOID **)&psDeviceNode,
+                           psPDumpRegPolIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+
+    psRetOUT->eError =
+        PDumpRegPolWithFlagsKM(psPDumpRegPolIN->szRegRegion,
+                               psPDumpRegPolIN->sHWReg.ui32RegAddr,
+                               psPDumpRegPolIN->sHWReg.ui32RegVal,
+                               psPDumpRegPolIN->ui32Mask,
+                               psPDumpRegPolIN->ui32Flags,
+                               PDUMP_POLL_OPERATOR_EQUAL);
+
+    return 0;
 }
 
 static IMG_INT
 PDumpMemPolBW(IMG_UINT32 ui32BridgeID,
-			  PVRSRV_BRIDGE_IN_PDUMP_MEMPOL *psPDumpMemPolIN,
-			  PVRSRV_BRIDGE_RETURN *psRetOUT,
-			  PVRSRV_PER_PROCESS_DATA *psPerProc)
+              PVRSRV_BRIDGE_IN_PDUMP_MEMPOL *psPDumpMemPolIN,
+              PVRSRV_BRIDGE_RETURN *psRetOUT,
+              PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvMemInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_MEMPOL);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvMemInfo,
-						   psPDumpMemPolIN->psKernelMemInfo,
-						   PVRSRV_HANDLE_TYPE_MEM_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    IMG_VOID *pvMemInfo;
 
-	psRetOUT->eError =
-		PDumpMemPolKM(((PVRSRV_KERNEL_MEM_INFO *)pvMemInfo),
-					  psPDumpMemPolIN->ui32Offset,
-					  psPDumpMemPolIN->ui32Value,
-					  psPDumpMemPolIN->ui32Mask,
-					  psPDumpMemPolIN->eOperator,
-					  psPDumpMemPolIN->ui32Flags,
-					  MAKEUNIQUETAG(pvMemInfo));
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_MEMPOL);
 
-	return 0;
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvMemInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+                           psPDumpMemPolIN->hKernelMemInfo,
+#else
+                           psPDumpMemPolIN->psKernelMemInfo,
+#endif
+                           PVRSRV_HANDLE_TYPE_MEM_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PDumpMemPolKM(((PVRSRV_KERNEL_MEM_INFO *)pvMemInfo),
+                      psPDumpMemPolIN->ui32Offset,
+                      psPDumpMemPolIN->ui32Value,
+                      psPDumpMemPolIN->ui32Mask,
+                      psPDumpMemPolIN->eOperator,
+                      psPDumpMemPolIN->ui32Flags,
+                      MAKEUNIQUETAG(pvMemInfo));
+
+    return 0;
 }
 
 static IMG_INT
 PDumpMemBW(IMG_UINT32 ui32BridgeID,
-		   PVRSRV_BRIDGE_IN_PDUMP_DUMPMEM *psPDumpMemDumpIN,
-		   PVRSRV_BRIDGE_RETURN *psRetOUT,
-		   PVRSRV_PER_PROCESS_DATA *psPerProc)
+           PVRSRV_BRIDGE_IN_PDUMP_DUMPMEM *psPDumpMemDumpIN,
+           PVRSRV_BRIDGE_RETURN *psRetOUT,
+           PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvMemInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_DUMPMEM);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvMemInfo,
-						   psPDumpMemDumpIN->psKernelMemInfo,
-						   PVRSRV_HANDLE_TYPE_MEM_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    IMG_VOID *pvMemInfo;
 
-	psRetOUT->eError =
-		PDumpMemUM(psPerProc,
-				   psPDumpMemDumpIN->pvAltLinAddr,
-				   psPDumpMemDumpIN->pvLinAddr,
-				   pvMemInfo,
-				   psPDumpMemDumpIN->ui32Offset,
-				   psPDumpMemDumpIN->ui32Bytes,
-				   psPDumpMemDumpIN->ui32Flags,
-				   MAKEUNIQUETAG(pvMemInfo));
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_DUMPMEM);
 
-	return 0;
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvMemInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+                           psPDumpMemDumpIN->hKernelMemInfo,
+#else
+                           psPDumpMemDumpIN->psKernelMemInfo,
+#endif
+                           PVRSRV_HANDLE_TYPE_MEM_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PDumpMemUM(psPerProc,
+                   psPDumpMemDumpIN->pvAltLinAddr,
+                   psPDumpMemDumpIN->pvLinAddr,
+                   pvMemInfo,
+                   psPDumpMemDumpIN->ui32Offset,
+                   psPDumpMemDumpIN->ui32Bytes,
+                   psPDumpMemDumpIN->ui32Flags,
+                   MAKEUNIQUETAG(pvMemInfo));
+
+    return 0;
 }
 
 static IMG_INT
 PDumpBitmapBW(IMG_UINT32 ui32BridgeID,
-			  PVRSRV_BRIDGE_IN_PDUMP_BITMAP *psPDumpBitmapIN,
-			  PVRSRV_BRIDGE_RETURN *psRetOUT,
-			  PVRSRV_PER_PROCESS_DATA *psPerProc)
-{
-	PVRSRV_DEVICE_NODE *psDeviceNode;
-	IMG_HANDLE hDevMemContextInt;
-	
-	PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, (IMG_VOID **)&psDeviceNode,
-						   psPDumpBitmapIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(	psPerProc->psHandleBase,
-							&hDevMemContextInt,
-							psPDumpBitmapIN->hDevMemContext,
-							PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
-
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-						
-	psRetOUT->eError =
-		PDumpBitmapKM(psDeviceNode,
-					  &psPDumpBitmapIN->szFileName[0],
-					  psPDumpBitmapIN->ui32FileOffset,
-					  psPDumpBitmapIN->ui32Width,
-					  psPDumpBitmapIN->ui32Height,
-					  psPDumpBitmapIN->ui32StrideInBytes,
-					  psPDumpBitmapIN->sDevBaseAddr,
-					  hDevMemContextInt,
-					  psPDumpBitmapIN->ui32Size,
-					  psPDumpBitmapIN->ePixelFormat,
-					  psPDumpBitmapIN->eMemFormat,
-					  psPDumpBitmapIN->ui32Flags);
-
-	return 0;
+              PVRSRV_BRIDGE_IN_PDUMP_BITMAP *psPDumpBitmapIN,
+              PVRSRV_BRIDGE_RETURN *psRetOUT,
+              PVRSRV_PER_PROCESS_DATA *psPerProc)
+{
+    PVRSRV_DEVICE_NODE *psDeviceNode;
+    IMG_HANDLE hDevMemContextInt;
+
+    PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, (IMG_VOID **)&psDeviceNode,
+                           psPDumpBitmapIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle( psPerProc->psHandleBase,
+                            &hDevMemContextInt,
+                            psPDumpBitmapIN->hDevMemContext,
+                            PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PDumpBitmapKM(psDeviceNode,
+                      &psPDumpBitmapIN->szFileName[0],
+                      psPDumpBitmapIN->ui32FileOffset,
+                      psPDumpBitmapIN->ui32Width,
+                      psPDumpBitmapIN->ui32Height,
+                      psPDumpBitmapIN->ui32StrideInBytes,
+                      psPDumpBitmapIN->sDevBaseAddr,
+                      hDevMemContextInt,
+                      psPDumpBitmapIN->ui32Size,
+                      psPDumpBitmapIN->ePixelFormat,
+                      psPDumpBitmapIN->eMemFormat,
+                      psPDumpBitmapIN->ui32Flags);
+
+    return 0;
 }
 
 static IMG_INT
 PDumpReadRegBW(IMG_UINT32 ui32BridgeID,
-			   PVRSRV_BRIDGE_IN_PDUMP_READREG *psPDumpReadRegIN,
-			   PVRSRV_BRIDGE_RETURN *psRetOUT,
-			   PVRSRV_PER_PROCESS_DATA *psPerProc)
+               PVRSRV_BRIDGE_IN_PDUMP_READREG *psPDumpReadRegIN,
+               PVRSRV_BRIDGE_RETURN *psRetOUT,
+               PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_DEVICE_NODE *psDeviceNode;
+    PVRSRV_DEVICE_NODE *psDeviceNode;
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_DUMPREADREG);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_DUMPREADREG);
 
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, (IMG_VOID **)&psDeviceNode,
-						   psPDumpReadRegIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, (IMG_VOID **)&psDeviceNode,
+                           psPDumpReadRegIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
 
-	psRetOUT->eError =
-		PDumpReadRegKM(&psPDumpReadRegIN->szRegRegion[0],
-					   &psPDumpReadRegIN->szFileName[0],
-					   psPDumpReadRegIN->ui32FileOffset,
-					   psPDumpReadRegIN->ui32Address,
-					   psPDumpReadRegIN->ui32Size,
-					   psPDumpReadRegIN->ui32Flags);
+    psRetOUT->eError =
+        PDumpReadRegKM(&psPDumpReadRegIN->szRegRegion[0],
+                       &psPDumpReadRegIN->szFileName[0],
+                       psPDumpReadRegIN->ui32FileOffset,
+                       psPDumpReadRegIN->ui32Address,
+                       psPDumpReadRegIN->ui32Size,
+                       psPDumpReadRegIN->ui32Flags);
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
-PDumpDriverInfoBW(IMG_UINT32 ui32BridgeID,
-				  PVRSRV_BRIDGE_IN_PDUMP_DRIVERINFO *psPDumpDriverInfoIN,
-				  PVRSRV_BRIDGE_RETURN *psRetOUT,
-				  PVRSRV_PER_PROCESS_DATA *psPerProc)
+PDumpMemPagesBW(IMG_UINT32 ui32BridgeID,
+                  PVRSRV_BRIDGE_IN_PDUMP_MEMPAGES *psPDumpMemPagesIN,
+                  PVRSRV_BRIDGE_RETURN *psRetOUT,
+                  PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_UINT32 ui32PDumpFlags;
+    PVRSRV_DEVICE_NODE *psDeviceNode;
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_DRIVERINFO);
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_MEMPAGES);
 
-	ui32PDumpFlags = 0;
-	if(psPDumpDriverInfoIN->bContinuous)
-	{
-		ui32PDumpFlags |= PDUMP_FLAGS_CONTINUOUS;
-	}
-	psRetOUT->eError =
-		PDumpDriverInfoKM(&psPDumpDriverInfoIN->szString[0],
-						  ui32PDumpFlags);
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           (IMG_VOID **)&psDeviceNode,
+                           psPDumpMemPagesIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
 
-	return 0;
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+
+    return 0;
 }
 
 static IMG_INT
-PDumpSyncDumpBW(IMG_UINT32 ui32BridgeID,
-				PVRSRV_BRIDGE_IN_PDUMP_DUMPSYNC *psPDumpSyncDumpIN,
-				PVRSRV_BRIDGE_RETURN *psRetOUT,
-				PVRSRV_PER_PROCESS_DATA *psPerProc)
+PDumpDriverInfoBW(IMG_UINT32 ui32BridgeID,
+                  PVRSRV_BRIDGE_IN_PDUMP_DRIVERINFO *psPDumpDriverInfoIN,
+                  PVRSRV_BRIDGE_RETURN *psRetOUT,
+                  PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_UINT32 ui32Bytes = psPDumpSyncDumpIN->ui32Bytes;
-	IMG_VOID *pvSyncInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_DUMPSYNC);
+    IMG_UINT32 ui32PDumpFlags;
 
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &pvSyncInfo,
-						   psPDumpSyncDumpIN->psKernelSyncInfo,
-						   PVRSRV_HANDLE_TYPE_SYNC_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_DRIVERINFO);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
 
-	psRetOUT->eError =
-		PDumpMemUM(psPerProc,
-				   psPDumpSyncDumpIN->pvAltLinAddr,
-				   IMG_NULL,
-				   ((PVRSRV_KERNEL_SYNC_INFO *)pvSyncInfo)->psSyncDataMemInfoKM,
-				   psPDumpSyncDumpIN->ui32Offset,
-				   ui32Bytes,
-				   0,
-				   MAKEUNIQUETAG(((PVRSRV_KERNEL_SYNC_INFO *)pvSyncInfo)->psSyncDataMemInfoKM));
+    ui32PDumpFlags = 0;
+    if(psPDumpDriverInfoIN->bContinuous)
+    {
+        ui32PDumpFlags |= PDUMP_FLAGS_CONTINUOUS;
+    }
+    psRetOUT->eError =
+        PDumpDriverInfoKM(&psPDumpDriverInfoIN->szString[0],
+                          ui32PDumpFlags);
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
-PDumpSyncPolBW(IMG_UINT32 ui32BridgeID,
-			   PVRSRV_BRIDGE_IN_PDUMP_SYNCPOL *psPDumpSyncPolIN,
-			   PVRSRV_BRIDGE_RETURN *psRetOUT,
-			   PVRSRV_PER_PROCESS_DATA *psPerProc)
+PDumpSyncDumpBW(IMG_UINT32 ui32BridgeID,
+                PVRSRV_BRIDGE_IN_PDUMP_DUMPSYNC *psPDumpSyncDumpIN,
+                PVRSRV_BRIDGE_RETURN *psRetOUT,
+                PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_UINT32 ui32Offset;
-	IMG_VOID *pvSyncInfo;
+    IMG_UINT32 ui32Bytes = psPDumpSyncDumpIN->ui32Bytes;
+    IMG_VOID *pvSyncInfo;
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_SYNCPOL);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_DUMPSYNC);
 
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &pvSyncInfo,
-						   psPDumpSyncPolIN->psKernelSyncInfo,
-						   PVRSRV_HANDLE_TYPE_SYNC_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	if(psPDumpSyncPolIN->bIsRead)
-	{
-		ui32Offset = offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete);
-	}
-	else
-	{
-		ui32Offset = offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete);
-	}
-
-	psRetOUT->eError =
-		PDumpMemPolKM(((PVRSRV_KERNEL_SYNC_INFO *)pvSyncInfo)->psSyncDataMemInfoKM,
-					  ui32Offset,
-					  psPDumpSyncPolIN->ui32Value,
-					  psPDumpSyncPolIN->ui32Mask,
-					  PDUMP_POLL_OPERATOR_EQUAL,
-					  0,
-					  MAKEUNIQUETAG(((PVRSRV_KERNEL_SYNC_INFO *)pvSyncInfo)->psSyncDataMemInfoKM));
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &pvSyncInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+                           psPDumpSyncDumpIN->hKernelSyncInfo,
+#else
+                           psPDumpSyncDumpIN->psKernelSyncInfo,
+#endif
+                           PVRSRV_HANDLE_TYPE_SYNC_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PDumpMemUM(psPerProc,
+                   psPDumpSyncDumpIN->pvAltLinAddr,
+                   IMG_NULL,
+                   ((PVRSRV_KERNEL_SYNC_INFO *)pvSyncInfo)->psSyncDataMemInfoKM,
+                   psPDumpSyncDumpIN->ui32Offset,
+                   ui32Bytes,
+                   0,
+                   MAKEUNIQUETAG(((PVRSRV_KERNEL_SYNC_INFO *)pvSyncInfo)->psSyncDataMemInfoKM));
+
+    return 0;
+}
 
-	return 0;
+static IMG_INT
+PDumpSyncPolBW(IMG_UINT32 ui32BridgeID,
+               PVRSRV_BRIDGE_IN_PDUMP_SYNCPOL *psPDumpSyncPolIN,
+               PVRSRV_BRIDGE_RETURN *psRetOUT,
+               PVRSRV_PER_PROCESS_DATA *psPerProc)
+{
+    IMG_UINT32 ui32Offset;
+    IMG_VOID *pvSyncInfo;
+    IMG_UINT32 ui32Value;
+    IMG_UINT32 ui32Mask;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_SYNCPOL);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvSyncInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+                           psPDumpSyncPolIN->hKernelSyncInfo,
+#else
+                           psPDumpSyncPolIN->psKernelSyncInfo,
+#endif
+                           PVRSRV_HANDLE_TYPE_SYNC_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    if(psPDumpSyncPolIN->bIsRead)
+    {
+        ui32Offset = offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete);
+    }
+    else
+    {
+        ui32Offset = offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete);
+    }
+
+    
+    if (psPDumpSyncPolIN->bUseLastOpDumpVal)
+    {
+        if(psPDumpSyncPolIN->bIsRead)
+        {
+            ui32Value = ((PVRSRV_KERNEL_SYNC_INFO *)pvSyncInfo)->psSyncData->ui32LastReadOpDumpVal;
+        }
+        else
+        {
+            ui32Value = ((PVRSRV_KERNEL_SYNC_INFO *)pvSyncInfo)->psSyncData->ui32LastOpDumpVal;
+        }
+        ui32Mask = 0xffffffff;
+    }
+    else
+    {
+        ui32Value = psPDumpSyncPolIN->ui32Value;
+        ui32Mask =  psPDumpSyncPolIN->ui32Mask;
+    }
+
+    psRetOUT->eError =
+        PDumpMemPolKM(((PVRSRV_KERNEL_SYNC_INFO *)pvSyncInfo)->psSyncDataMemInfoKM,
+                      ui32Offset,
+                      ui32Value,
+                      ui32Mask,
+                      PDUMP_POLL_OPERATOR_EQUAL,
+                      0,
+                      MAKEUNIQUETAG(((PVRSRV_KERNEL_SYNC_INFO *)pvSyncInfo)->psSyncDataMemInfoKM));
+
+    return 0;
 }
 
 
 static IMG_INT
 PDumpCycleCountRegReadBW(IMG_UINT32 ui32BridgeID,
-						 PVRSRV_BRIDGE_IN_PDUMP_CYCLE_COUNT_REG_READ *psPDumpCycleCountRegReadIN,
-						 PVRSRV_BRIDGE_RETURN *psRetOUT,
-						 PVRSRV_PER_PROCESS_DATA *psPerProc)
-{
-	PVRSRV_DEVICE_NODE *psDeviceNode;
-	
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_CYCLE_COUNT_REG_READ);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, 
-						   (IMG_VOID **)&psDeviceNode, 
-						   psPDumpCycleCountRegReadIN->hDevCookie, 
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+                         PVRSRV_BRIDGE_IN_PDUMP_CYCLE_COUNT_REG_READ *psPDumpCycleCountRegReadIN,
+                         PVRSRV_BRIDGE_RETURN *psRetOUT,
+                         PVRSRV_PER_PROCESS_DATA *psPerProc)
+{
+    PVRSRV_DEVICE_NODE *psDeviceNode;
 
-	PDumpCycleCountRegRead(&psDeviceNode->sDevId,
-						   psPDumpCycleCountRegReadIN->ui32RegOffset,
-						   psPDumpCycleCountRegReadIN->bLastFrame);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_CYCLE_COUNT_REG_READ);
 
-	psRetOUT->eError = PVRSRV_OK;
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           (IMG_VOID **)&psDeviceNode,
+                           psPDumpCycleCountRegReadIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	return 0;
+    PDumpCycleCountRegRead(&psDeviceNode->sDevId,
+                           psPDumpCycleCountRegReadIN->ui32RegOffset,
+                           psPDumpCycleCountRegReadIN->bLastFrame);
+
+    psRetOUT->eError = PVRSRV_OK;
+
+    return 0;
 }
 
 static IMG_INT
 PDumpPDDevPAddrBW(IMG_UINT32 ui32BridgeID,
-				  PVRSRV_BRIDGE_IN_PDUMP_DUMPPDDEVPADDR *psPDumpPDDevPAddrIN,
-				  PVRSRV_BRIDGE_RETURN *psRetOUT,
-				  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                  PVRSRV_BRIDGE_IN_PDUMP_DUMPPDDEVPADDR *psPDumpPDDevPAddrIN,
+                  PVRSRV_BRIDGE_RETURN *psRetOUT,
+                  PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvMemInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_DUMPPDDEVPADDR);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &pvMemInfo,
-						   psPDumpPDDevPAddrIN->hKernelMemInfo,
-						   PVRSRV_HANDLE_TYPE_MEM_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PDumpPDDevPAddrKM((PVRSRV_KERNEL_MEM_INFO *)pvMemInfo,
-						  psPDumpPDDevPAddrIN->ui32Offset,
-						  psPDumpPDDevPAddrIN->sPDDevPAddr,
-						  MAKEUNIQUETAG(pvMemInfo),
-						  PDUMP_PD_UNIQUETAG);
-	return 0;
+    IMG_VOID *pvMemInfo;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_DUMPPDDEVPADDR);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &pvMemInfo,
+                           psPDumpPDDevPAddrIN->hKernelMemInfo,
+                           PVRSRV_HANDLE_TYPE_MEM_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PDumpPDDevPAddrKM((PVRSRV_KERNEL_MEM_INFO *)pvMemInfo,
+                          psPDumpPDDevPAddrIN->ui32Offset,
+                          psPDumpPDDevPAddrIN->sPDDevPAddr,
+                          MAKEUNIQUETAG(pvMemInfo),
+                          PDUMP_PD_UNIQUETAG);
+    return 0;
 }
 
 static IMG_INT
 PDumpStartInitPhaseBW(IMG_UINT32 ui32BridgeID,
-					  IMG_VOID *psBridgeIn,
-					  PVRSRV_BRIDGE_RETURN *psRetOUT,
-					  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                      IMG_VOID *psBridgeIn,
+                      PVRSRV_BRIDGE_RETURN *psRetOUT,
+                      PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_STARTINITPHASE);
-	PVR_UNREFERENCED_PARAMETER(psBridgeIn);
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_STARTINITPHASE);
+    PVR_UNREFERENCED_PARAMETER(psBridgeIn);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
 
-	psRetOUT->eError = PDumpStartInitPhaseKM();
+    psRetOUT->eError = PDumpStartInitPhaseKM();
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PDumpStopInitPhaseBW(IMG_UINT32 ui32BridgeID,
-					  IMG_VOID *psBridgeIn,
-					  PVRSRV_BRIDGE_RETURN *psRetOUT,
-					  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                      IMG_VOID *psBridgeIn,
+                      PVRSRV_BRIDGE_RETURN *psRetOUT,
+                      PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_STOPINITPHASE);
-	PVR_UNREFERENCED_PARAMETER(psBridgeIn);
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_PDUMP_STOPINITPHASE);
+    PVR_UNREFERENCED_PARAMETER(psBridgeIn);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
 
-	psRetOUT->eError = PDumpStopInitPhaseKM();
+    psRetOUT->eError = PDumpStopInitPhaseKM();
 
-	return 0;
+    return 0;
 }
 
 #endif 
@@ -1588,2307 +2060,2677 @@ PDumpStopInitPhaseBW(IMG_UINT32 ui32BridgeID,
 
 static IMG_INT
 PVRSRVGetMiscInfoBW(IMG_UINT32 ui32BridgeID,
-					PVRSRV_BRIDGE_IN_GET_MISC_INFO *psGetMiscInfoIN,
-					PVRSRV_BRIDGE_OUT_GET_MISC_INFO *psGetMiscInfoOUT,
-					PVRSRV_PER_PROCESS_DATA *psPerProc)
+                    PVRSRV_BRIDGE_IN_GET_MISC_INFO *psGetMiscInfoIN,
+                    PVRSRV_BRIDGE_OUT_GET_MISC_INFO *psGetMiscInfoOUT,
+                    PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_ERROR eError;
+#if defined (SUPPORT_SID_INTERFACE)
+    PVRSRV_MISC_INFO_KM sMiscInfo = {0};
+#endif
+    PVRSRV_ERROR eError;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_MISC_INFO);
+#if defined (SUPPORT_SID_INTERFACE)
+    sMiscInfo.ui32StateRequest = psGetMiscInfoIN->sMiscInfo.ui32StateRequest;
+    sMiscInfo.ui32StatePresent = psGetMiscInfoIN->sMiscInfo.ui32StatePresent;
+    sMiscInfo.ui32MemoryStrLen = psGetMiscInfoIN->sMiscInfo.ui32MemoryStrLen;
+    sMiscInfo.pszMemoryStr     = psGetMiscInfoIN->sMiscInfo.pszMemoryStr;
+
+    OSMemCopy(&sMiscInfo.sCacheOpCtl,
+              &psGetMiscInfoIN->sMiscInfo.sCacheOpCtl,
+              sizeof(sMiscInfo.sCacheOpCtl));
+#else
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_MISC_INFO);
+    OSMemCopy(&psGetMiscInfoOUT->sMiscInfo,
+              &psGetMiscInfoIN->sMiscInfo,
+              sizeof(PVRSRV_MISC_INFO));
+#endif
 
-	OSMemCopy(&psGetMiscInfoOUT->sMiscInfo,
-	          &psGetMiscInfoIN->sMiscInfo,
-	          sizeof(PVRSRV_MISC_INFO));
+    if (((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT) != 0) &&
+        ((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_DDKVERSION_PRESENT) != 0) &&
+        ((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_FREEMEM_PRESENT) != 0))
+    {
+        
+        psGetMiscInfoOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
+        return 0;
+    }
+
+    if (((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT) != 0) ||
+        ((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_DDKVERSION_PRESENT) != 0) ||
+        ((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_FREEMEM_PRESENT) != 0))
+    {
+        
+#if defined (SUPPORT_SID_INTERFACE)
+        ASSIGN_AND_EXIT_ON_ERROR(psGetMiscInfoOUT->eError,
+                    OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+                            psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
+                            (IMG_VOID **)&sMiscInfo.pszMemoryStr, 0,
+                            "Output string buffer"));
+        psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&sMiscInfo);
+
+        
+        eError = CopyToUserWrapper(psPerProc, ui32BridgeID,
+                                   psGetMiscInfoIN->sMiscInfo.pszMemoryStr,
+                                   sMiscInfo.pszMemoryStr,
+                                   sMiscInfo.ui32MemoryStrLen);
+#else
+        ASSIGN_AND_EXIT_ON_ERROR(psGetMiscInfoOUT->eError,
+                    OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+                            psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
+                            (IMG_VOID **)&psGetMiscInfoOUT->sMiscInfo.pszMemoryStr, 0,
+                            "Output string buffer"));
+
+        psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&psGetMiscInfoOUT->sMiscInfo);
+
+        
+        eError = CopyToUserWrapper(psPerProc, ui32BridgeID,
+                                   psGetMiscInfoIN->sMiscInfo.pszMemoryStr,
+                                   psGetMiscInfoOUT->sMiscInfo.pszMemoryStr,
+                                   psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen);
+#endif
 
-	if (((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT) != 0) &&
-	    ((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_DDKVERSION_PRESENT) != 0) &&
-	    ((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_FREEMEM_PRESENT) != 0))
-	{
-		
-		psGetMiscInfoOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
-		return 0;
-	}
+        
+#if defined (SUPPORT_SID_INTERFACE)
+        OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
+                  sMiscInfo.ui32MemoryStrLen,
+                 (IMG_VOID *)sMiscInfo.pszMemoryStr, 0);
+#else
+        OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
+                  psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
+                 (IMG_VOID *)psGetMiscInfoOUT->sMiscInfo.pszMemoryStr, 0);
+#endif
 
-	if (((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT) != 0) ||
-	    ((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_DDKVERSION_PRESENT) != 0) ||
-	    ((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_FREEMEM_PRESENT) != 0))
-	{
-		
-		ASSIGN_AND_EXIT_ON_ERROR(psGetMiscInfoOUT->eError,
-				    OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
-		                    psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
-		                    (IMG_VOID **)&psGetMiscInfoOUT->sMiscInfo.pszMemoryStr, 0,
-							"Output string buffer"));
-
-		psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&psGetMiscInfoOUT->sMiscInfo);
-
-		
-		eError = CopyToUserWrapper(psPerProc, ui32BridgeID,
-		                           psGetMiscInfoIN->sMiscInfo.pszMemoryStr,
-		                           psGetMiscInfoOUT->sMiscInfo.pszMemoryStr,
-		                           psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen);
-
-		
-		OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
-		          psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
-		         (IMG_VOID *)psGetMiscInfoOUT->sMiscInfo.pszMemoryStr, 0);
-		psGetMiscInfoOUT->sMiscInfo.pszMemoryStr = IMG_NULL;
-
-		
-		psGetMiscInfoOUT->sMiscInfo.pszMemoryStr = psGetMiscInfoIN->sMiscInfo.pszMemoryStr;
-
-		if(eError != PVRSRV_OK)
-		{
-			
-			PVR_DPF((PVR_DBG_ERROR, "PVRSRVGetMiscInfoBW Error copy to user"));
-			return -EFAULT;
-		}
-	}
-	else
-	{
-		psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&psGetMiscInfoOUT->sMiscInfo);
-	}
+        
+        psGetMiscInfoOUT->sMiscInfo.pszMemoryStr = psGetMiscInfoIN->sMiscInfo.pszMemoryStr;
+
+        if(eError != PVRSRV_OK)
+        {
+            
+            PVR_DPF((PVR_DBG_ERROR, "PVRSRVGetMiscInfoBW Error copy to user"));
+            return -EFAULT;
+        }
+    }
+    else
+    {
+#if defined (SUPPORT_SID_INTERFACE)
+        psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&sMiscInfo);
+#else
+        psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&psGetMiscInfoOUT->sMiscInfo);
+#endif
+    }
 
-	
-	if (psGetMiscInfoOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    
+    if (psGetMiscInfoOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	
-	if (psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT)
-	{
-		psGetMiscInfoOUT->eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
-													&psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.hOSEventKM,
-													psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.hOSEventKM,
-													PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT,
-													PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
-
-			if (psGetMiscInfoOUT->eError != PVRSRV_OK)
-			{
-				return 0;
-			}
-	}
+    
+#if defined (SUPPORT_SID_INTERFACE)
+    if (sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT)
+#else
+    if (psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT)
+#endif
+    {
+        psGetMiscInfoOUT->eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
+                                                    &psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.hOSEventKM,
+#if defined (SUPPORT_SID_INTERFACE)
+                                                    sMiscInfo.sGlobalEventObject.hOSEventKM,
+#else
+                                                    psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.hOSEventKM,
+#endif
+                                                    PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT,
+                                                    PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
 
-	if (psGetMiscInfoOUT->sMiscInfo.hSOCTimerRegisterOSMemHandle)
-	{
-		
-		psGetMiscInfoOUT->eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
-						  &psGetMiscInfoOUT->sMiscInfo.hSOCTimerRegisterOSMemHandle,
-						  psGetMiscInfoOUT->sMiscInfo.hSOCTimerRegisterOSMemHandle,
-						  PVRSRV_HANDLE_TYPE_SOC_TIMER,
-						  PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
-
-		if (psGetMiscInfoOUT->eError != PVRSRV_OK)
-		{
-			return 0;
-		}
-	}
+        if (psGetMiscInfoOUT->eError != PVRSRV_OK)
+        {
+            return 0;
+        }
+
+#if defined (SUPPORT_SID_INTERFACE)
+        OSMemCopy(&psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.szName,
+                           sMiscInfo.sGlobalEventObject.szName,
+                           EVENTOBJNAME_MAXLENGTH);
+
+#endif
+    }
 
-	return 0;
+#if defined (SUPPORT_SID_INTERFACE)
+    if (sMiscInfo.hSOCTimerRegisterOSMemHandle)
+#else
+    if (psGetMiscInfoOUT->sMiscInfo.hSOCTimerRegisterOSMemHandle)
+#endif
+    {
+        
+        psGetMiscInfoOUT->eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
+                          &psGetMiscInfoOUT->sMiscInfo.hSOCTimerRegisterOSMemHandle,
+#if defined (SUPPORT_SID_INTERFACE)
+                          sMiscInfo.hSOCTimerRegisterOSMemHandle,
+#else
+                          psGetMiscInfoOUT->sMiscInfo.hSOCTimerRegisterOSMemHandle,
+#endif
+                          PVRSRV_HANDLE_TYPE_SOC_TIMER,
+                          PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
+
+        if (psGetMiscInfoOUT->eError != PVRSRV_OK)
+        {
+            return 0;
+        }
+    }
+#if defined (SUPPORT_SID_INTERFACE)
+    else
+    {
+        psGetMiscInfoOUT->sMiscInfo.hSOCTimerRegisterOSMemHandle = 0;
+    }
+
+    
+    psGetMiscInfoOUT->sMiscInfo.ui32StateRequest = sMiscInfo.ui32StateRequest;
+    psGetMiscInfoOUT->sMiscInfo.ui32StatePresent = sMiscInfo.ui32StatePresent;
+
+    psGetMiscInfoOUT->sMiscInfo.pvSOCTimerRegisterKM = sMiscInfo.pvSOCTimerRegisterKM;
+    psGetMiscInfoOUT->sMiscInfo.pvSOCTimerRegisterUM = sMiscInfo.pvSOCTimerRegisterUM;
+    psGetMiscInfoOUT->sMiscInfo.pvSOCClockGateRegs   = sMiscInfo.pvSOCClockGateRegs;
+
+    psGetMiscInfoOUT->sMiscInfo.ui32SOCClockGateRegsSize = sMiscInfo.ui32SOCClockGateRegsSize;
+
+    OSMemCopy(&psGetMiscInfoOUT->sMiscInfo.aui32DDKVersion,
+              &sMiscInfo.aui32DDKVersion,
+              sizeof(psGetMiscInfoOUT->sMiscInfo.aui32DDKVersion));
+    OSMemCopy(&psGetMiscInfoOUT->sMiscInfo.sCacheOpCtl,
+              &sMiscInfo.sCacheOpCtl,
+              sizeof(psGetMiscInfoOUT->sMiscInfo.sCacheOpCtl));
+#endif
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVConnectBW(IMG_UINT32 ui32BridgeID,
-				PVRSRV_BRIDGE_IN_CONNECT_SERVICES *psConnectServicesIN,
-				PVRSRV_BRIDGE_OUT_CONNECT_SERVICES *psConnectServicesOUT,
-				PVRSRV_PER_PROCESS_DATA *psPerProc)
+                PVRSRV_BRIDGE_IN_CONNECT_SERVICES *psConnectServicesIN,
+                PVRSRV_BRIDGE_OUT_CONNECT_SERVICES *psConnectServicesOUT,
+                PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CONNECT_SERVICES);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CONNECT_SERVICES);
 
 #if defined(PDUMP)
-
-	psPerProc->bPDumpPersistent |= ( (psConnectServicesIN->ui32Flags & SRV_FLAGS_PERSIST) != 0) ? IMG_TRUE : IMG_FALSE;
+    
+	if ((psConnectServicesIN->ui32Flags & SRV_FLAGS_PERSIST) != 0)
+	{
+    	psPerProc->bPDumpPersistent = IMG_TRUE;
+	}
 
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
-
-	psPerProc->bPDumpActive |= ( (psConnectServicesIN->ui32Flags & SRV_FLAGS_PDUMP_ACTIVE) != 0) ? IMG_TRUE : IMG_FALSE;
-#endif
+    
+	if ((psConnectServicesIN->ui32Flags & SRV_FLAGS_PDUMP_ACTIVE) != 0)
+	{
+    	psPerProc->bPDumpActive = IMG_TRUE;
+	}
+#endif 
 #else
-	PVR_UNREFERENCED_PARAMETER(psConnectServicesIN);
+    PVR_UNREFERENCED_PARAMETER(psConnectServicesIN);
 #endif
-	psConnectServicesOUT->hKernelServices = psPerProc->hPerProcData;
-	psConnectServicesOUT->eError = PVRSRV_OK;
+    psConnectServicesOUT->hKernelServices = psPerProc->hPerProcData;
+    psConnectServicesOUT->eError = PVRSRV_OK;
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVDisconnectBW(IMG_UINT32 ui32BridgeID,
-				   IMG_VOID *psBridgeIn,
-				   PVRSRV_BRIDGE_RETURN *psRetOUT,
-				   PVRSRV_PER_PROCESS_DATA *psPerProc)
+                   IMG_VOID *psBridgeIn,
+                   PVRSRV_BRIDGE_RETURN *psRetOUT,
+                   PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
-	PVR_UNREFERENCED_PARAMETER(psBridgeIn);
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_DISCONNECT_SERVICES);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVR_UNREFERENCED_PARAMETER(psBridgeIn);
 
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_DISCONNECT_SERVICES);
 
-	psRetOUT->eError = PVRSRV_OK;
+    
+    psRetOUT->eError = PVRSRV_OK;
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVEnumerateDCBW(IMG_UINT32 ui32BridgeID,
-					PVRSRV_BRIDGE_IN_ENUMCLASS *psEnumDispClassIN,
-					PVRSRV_BRIDGE_OUT_ENUMCLASS *psEnumDispClassOUT,
-					PVRSRV_PER_PROCESS_DATA *psPerProc)
+                    PVRSRV_BRIDGE_IN_ENUMCLASS *psEnumDispClassIN,
+                    PVRSRV_BRIDGE_OUT_ENUMCLASS *psEnumDispClassOUT,
+                    PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ENUM_CLASS);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ENUM_CLASS);
 
-	psEnumDispClassOUT->eError =
-		PVRSRVEnumerateDCKM(psEnumDispClassIN->sDeviceClass,
-							&psEnumDispClassOUT->ui32NumDevices,
-							&psEnumDispClassOUT->ui32DevID[0]);
+    psEnumDispClassOUT->eError =
+        PVRSRVEnumerateDCKM(psEnumDispClassIN->sDeviceClass,
+                            &psEnumDispClassOUT->ui32NumDevices,
+                            &psEnumDispClassOUT->ui32DevID[0]);
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVOpenDCDeviceBW(IMG_UINT32 ui32BridgeID,
-					 PVRSRV_BRIDGE_IN_OPEN_DISPCLASS_DEVICE *psOpenDispClassDeviceIN,
-					 PVRSRV_BRIDGE_OUT_OPEN_DISPCLASS_DEVICE *psOpenDispClassDeviceOUT,
-					 PVRSRV_PER_PROCESS_DATA *psPerProc)
+                     PVRSRV_BRIDGE_IN_OPEN_DISPCLASS_DEVICE *psOpenDispClassDeviceIN,
+                     PVRSRV_BRIDGE_OUT_OPEN_DISPCLASS_DEVICE *psOpenDispClassDeviceOUT,
+                     PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hDevCookieInt;
-	IMG_HANDLE hDispClassInfoInt;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_OPEN_DISPCLASS_DEVICE);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psOpenDispClassDeviceOUT->eError, psPerProc, 1)
-
-	psOpenDispClassDeviceOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &hDevCookieInt,
-						   psOpenDispClassDeviceIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
-	if(psOpenDispClassDeviceOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psOpenDispClassDeviceOUT->eError =
-		PVRSRVOpenDCDeviceKM(psPerProc,
-							 psOpenDispClassDeviceIN->ui32DeviceID,
-							 hDevCookieInt,
-							 &hDispClassInfoInt);
-
-	if(psOpenDispClassDeviceOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	PVRSRVAllocHandleNR(psPerProc->psHandleBase,
-					  &psOpenDispClassDeviceOUT->hDeviceKM,
-					  hDispClassInfoInt,
-					  PVRSRV_HANDLE_TYPE_DISP_INFO,
-					  PVRSRV_HANDLE_ALLOC_FLAG_NONE);
-	COMMIT_HANDLE_BATCH_OR_ERROR(psOpenDispClassDeviceOUT->eError, psPerProc)
-
-	return 0;
+    IMG_HANDLE hDevCookieInt;
+    IMG_HANDLE hDispClassInfoInt;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_OPEN_DISPCLASS_DEVICE);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psOpenDispClassDeviceOUT->eError, psPerProc, 1)
+
+    psOpenDispClassDeviceOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &hDevCookieInt,
+                           psOpenDispClassDeviceIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
+    if(psOpenDispClassDeviceOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psOpenDispClassDeviceOUT->eError =
+        PVRSRVOpenDCDeviceKM(psPerProc,
+                             psOpenDispClassDeviceIN->ui32DeviceID,
+                             hDevCookieInt,
+                             &hDispClassInfoInt);
+
+    if(psOpenDispClassDeviceOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                      &psOpenDispClassDeviceOUT->hDeviceKM,
+                      hDispClassInfoInt,
+                      PVRSRV_HANDLE_TYPE_DISP_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE);
+    COMMIT_HANDLE_BATCH_OR_ERROR(psOpenDispClassDeviceOUT->eError, psPerProc)
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVCloseDCDeviceBW(IMG_UINT32 ui32BridgeID,
-					  PVRSRV_BRIDGE_IN_CLOSE_DISPCLASS_DEVICE *psCloseDispClassDeviceIN,
-					  PVRSRV_BRIDGE_RETURN *psRetOUT,
-					  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                      PVRSRV_BRIDGE_IN_CLOSE_DISPCLASS_DEVICE *psCloseDispClassDeviceIN,
+                      PVRSRV_BRIDGE_RETURN *psRetOUT,
+                      PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfoInt;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CLOSE_DISPCLASS_DEVICE);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfoInt,
-						   psCloseDispClassDeviceIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError = PVRSRVCloseDCDeviceKM(pvDispClassInfoInt, IMG_FALSE);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVReleaseHandle(psPerProc->psHandleBase,
-							psCloseDispClassDeviceIN->hDeviceKM,
-							PVRSRV_HANDLE_TYPE_DISP_INFO);
-	return 0;
+    IMG_VOID *pvDispClassInfoInt;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CLOSE_DISPCLASS_DEVICE);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfoInt,
+                           psCloseDispClassDeviceIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError = PVRSRVCloseDCDeviceKM(pvDispClassInfoInt, IMG_FALSE);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVReleaseHandle(psPerProc->psHandleBase,
+                            psCloseDispClassDeviceIN->hDeviceKM,
+                            PVRSRV_HANDLE_TYPE_DISP_INFO);
+    return 0;
 }
 
 static IMG_INT
 PVRSRVEnumDCFormatsBW(IMG_UINT32 ui32BridgeID,
-					  PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_FORMATS *psEnumDispClassFormatsIN,
-					  PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_FORMATS *psEnumDispClassFormatsOUT,
-					  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                      PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_FORMATS *psEnumDispClassFormatsIN,
+                      PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_FORMATS *psEnumDispClassFormatsOUT,
+                      PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfoInt;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ENUM_DISPCLASS_FORMATS);
-
-	psEnumDispClassFormatsOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfoInt,
-						   psEnumDispClassFormatsIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-	if(psEnumDispClassFormatsOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psEnumDispClassFormatsOUT->eError =
-		PVRSRVEnumDCFormatsKM(pvDispClassInfoInt,
-							  &psEnumDispClassFormatsOUT->ui32Count,
-							  psEnumDispClassFormatsOUT->asFormat);
-
-	return 0;
+    IMG_VOID *pvDispClassInfoInt;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ENUM_DISPCLASS_FORMATS);
+
+    psEnumDispClassFormatsOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfoInt,
+                           psEnumDispClassFormatsIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+    if(psEnumDispClassFormatsOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psEnumDispClassFormatsOUT->eError =
+        PVRSRVEnumDCFormatsKM(pvDispClassInfoInt,
+                              &psEnumDispClassFormatsOUT->ui32Count,
+                              psEnumDispClassFormatsOUT->asFormat);
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVEnumDCDimsBW(IMG_UINT32 ui32BridgeID,
-				   PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_DIMS *psEnumDispClassDimsIN,
-				   PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_DIMS *psEnumDispClassDimsOUT,
-				   PVRSRV_PER_PROCESS_DATA *psPerProc)
+                   PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_DIMS *psEnumDispClassDimsIN,
+                   PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_DIMS *psEnumDispClassDimsOUT,
+                   PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfoInt;
+    IMG_VOID *pvDispClassInfoInt;
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ENUM_DISPCLASS_DIMS);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ENUM_DISPCLASS_DIMS);
 
-	psEnumDispClassDimsOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfoInt,
-						   psEnumDispClassDimsIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
+    psEnumDispClassDimsOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfoInt,
+                           psEnumDispClassDimsIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
 
-	if(psEnumDispClassDimsOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if(psEnumDispClassDimsOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psEnumDispClassDimsOUT->eError =
-		PVRSRVEnumDCDimsKM(pvDispClassInfoInt,
-						   &psEnumDispClassDimsIN->sFormat,
-						   &psEnumDispClassDimsOUT->ui32Count,
-						   psEnumDispClassDimsOUT->asDim);
+    psEnumDispClassDimsOUT->eError =
+        PVRSRVEnumDCDimsKM(pvDispClassInfoInt,
+                           &psEnumDispClassDimsIN->sFormat,
+                           &psEnumDispClassDimsOUT->ui32Count,
+                           psEnumDispClassDimsOUT->asDim);
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVGetDCSystemBufferBW(IMG_UINT32 ui32BridgeID,
-						  PVRSRV_BRIDGE_IN_GET_DISPCLASS_SYSBUFFER *psGetDispClassSysBufferIN,
-						  PVRSRV_BRIDGE_OUT_GET_DISPCLASS_SYSBUFFER *psGetDispClassSysBufferOUT,
-						  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                          PVRSRV_BRIDGE_IN_GET_DISPCLASS_SYSBUFFER *psGetDispClassSysBufferIN,  
+                          PVRSRV_BRIDGE_OUT_GET_DISPCLASS_SYSBUFFER *psGetDispClassSysBufferOUT,
+                          PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hBufferInt;
-	IMG_VOID *pvDispClassInfoInt;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_DISPCLASS_SYSBUFFER);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psGetDispClassSysBufferOUT->eError, psPerProc, 1)
-
-	psGetDispClassSysBufferOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfoInt,
-						   psGetDispClassSysBufferIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-	if(psGetDispClassSysBufferOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psGetDispClassSysBufferOUT->eError =
-		PVRSRVGetDCSystemBufferKM(pvDispClassInfoInt,
-								  &hBufferInt);
-
-	if(psGetDispClassSysBufferOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-
-	PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
-						 &psGetDispClassSysBufferOUT->hBuffer,
-						 hBufferInt,
-						 PVRSRV_HANDLE_TYPE_DISP_BUFFER,
-						 (PVRSRV_HANDLE_ALLOC_FLAG)(PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE | PVRSRV_HANDLE_ALLOC_FLAG_SHARED),
-						 psGetDispClassSysBufferIN->hDeviceKM);
-
-	COMMIT_HANDLE_BATCH_OR_ERROR(psGetDispClassSysBufferOUT->eError, psPerProc)
-
-	return 0;
+    IMG_HANDLE hBufferInt;
+    IMG_VOID *pvDispClassInfoInt;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_DISPCLASS_SYSBUFFER);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psGetDispClassSysBufferOUT->eError, psPerProc, 1)
+
+    psGetDispClassSysBufferOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfoInt,
+                           psGetDispClassSysBufferIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+    if(psGetDispClassSysBufferOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psGetDispClassSysBufferOUT->eError =
+        PVRSRVGetDCSystemBufferKM(pvDispClassInfoInt,
+                                  &hBufferInt);
+
+    if(psGetDispClassSysBufferOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+     
+    PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                         &psGetDispClassSysBufferOUT->hBuffer,
+                         hBufferInt,
+                         PVRSRV_HANDLE_TYPE_DISP_BUFFER,
+                         (PVRSRV_HANDLE_ALLOC_FLAG)(PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE | PVRSRV_HANDLE_ALLOC_FLAG_SHARED),
+                         psGetDispClassSysBufferIN->hDeviceKM);
+
+    COMMIT_HANDLE_BATCH_OR_ERROR(psGetDispClassSysBufferOUT->eError, psPerProc)
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVGetDCInfoBW(IMG_UINT32 ui32BridgeID,
-				  PVRSRV_BRIDGE_IN_GET_DISPCLASS_INFO *psGetDispClassInfoIN,
-				  PVRSRV_BRIDGE_OUT_GET_DISPCLASS_INFO *psGetDispClassInfoOUT,
-				  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                  PVRSRV_BRIDGE_IN_GET_DISPCLASS_INFO *psGetDispClassInfoIN,
+                  PVRSRV_BRIDGE_OUT_GET_DISPCLASS_INFO *psGetDispClassInfoOUT,
+                  PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfo;
+    IMG_VOID *pvDispClassInfo;
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_DISPCLASS_INFO);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_DISPCLASS_INFO);
 
-	psGetDispClassInfoOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfo,
-						   psGetDispClassInfoIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-	if(psGetDispClassInfoOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    psGetDispClassInfoOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfo,
+                           psGetDispClassInfoIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+    if(psGetDispClassInfoOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psGetDispClassInfoOUT->eError =
-		PVRSRVGetDCInfoKM(pvDispClassInfo,
-						  &psGetDispClassInfoOUT->sDisplayInfo);
+    psGetDispClassInfoOUT->eError =
+        PVRSRVGetDCInfoKM(pvDispClassInfo,
+                          &psGetDispClassInfoOUT->sDisplayInfo);
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVCreateDCSwapChainBW(IMG_UINT32 ui32BridgeID,
-						  PVRSRV_BRIDGE_IN_CREATE_DISPCLASS_SWAPCHAIN *psCreateDispClassSwapChainIN,
-						  PVRSRV_BRIDGE_OUT_CREATE_DISPCLASS_SWAPCHAIN *psCreateDispClassSwapChainOUT,
-						  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                          PVRSRV_BRIDGE_IN_CREATE_DISPCLASS_SWAPCHAIN *psCreateDispClassSwapChainIN,
+                          PVRSRV_BRIDGE_OUT_CREATE_DISPCLASS_SWAPCHAIN *psCreateDispClassSwapChainOUT,
+                          PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfo;
-	IMG_HANDLE hSwapChainInt;
-	IMG_UINT32	ui32SwapChainID;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CREATE_DISPCLASS_SWAPCHAIN);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psCreateDispClassSwapChainOUT->eError, psPerProc, 1)
-
-	psCreateDispClassSwapChainOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfo,
-						   psCreateDispClassSwapChainIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-
-	if(psCreateDispClassSwapChainOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-
-	ui32SwapChainID = psCreateDispClassSwapChainIN->ui32SwapChainID;
-
-	psCreateDispClassSwapChainOUT->eError =
-		PVRSRVCreateDCSwapChainKM(psPerProc, pvDispClassInfo,
-								  psCreateDispClassSwapChainIN->ui32Flags,
-								  &psCreateDispClassSwapChainIN->sDstSurfAttrib,
-								  &psCreateDispClassSwapChainIN->sSrcSurfAttrib,
-								  psCreateDispClassSwapChainIN->ui32BufferCount,
-								  psCreateDispClassSwapChainIN->ui32OEMFlags,
-								  &hSwapChainInt,
-								  &ui32SwapChainID);
-
-	if(psCreateDispClassSwapChainOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-
-	psCreateDispClassSwapChainOUT->ui32SwapChainID = ui32SwapChainID;
-
-	PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
-					  &psCreateDispClassSwapChainOUT->hSwapChain,
-					  hSwapChainInt,
-					  PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN,
-					  PVRSRV_HANDLE_ALLOC_FLAG_NONE,
-					  psCreateDispClassSwapChainIN->hDeviceKM);
-
-	COMMIT_HANDLE_BATCH_OR_ERROR(psCreateDispClassSwapChainOUT->eError, psPerProc)
-
-	return 0;
+    IMG_VOID *pvDispClassInfo;
+    IMG_HANDLE hSwapChainInt;
+    IMG_UINT32  ui32SwapChainID;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CREATE_DISPCLASS_SWAPCHAIN);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psCreateDispClassSwapChainOUT->eError, psPerProc, 1)
+
+    psCreateDispClassSwapChainOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfo,
+                           psCreateDispClassSwapChainIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+
+    if(psCreateDispClassSwapChainOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    
+    ui32SwapChainID = psCreateDispClassSwapChainIN->ui32SwapChainID;
+
+    psCreateDispClassSwapChainOUT->eError =
+        PVRSRVCreateDCSwapChainKM(psPerProc, pvDispClassInfo,
+                                  psCreateDispClassSwapChainIN->ui32Flags,
+                                  &psCreateDispClassSwapChainIN->sDstSurfAttrib,
+                                  &psCreateDispClassSwapChainIN->sSrcSurfAttrib,
+                                  psCreateDispClassSwapChainIN->ui32BufferCount,
+                                  psCreateDispClassSwapChainIN->ui32OEMFlags,
+                                  &hSwapChainInt,
+                                  &ui32SwapChainID);
+
+    if(psCreateDispClassSwapChainOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    
+    psCreateDispClassSwapChainOUT->ui32SwapChainID = ui32SwapChainID;
+
+    PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                      &psCreateDispClassSwapChainOUT->hSwapChain,
+                      hSwapChainInt,
+                      PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE,
+                      psCreateDispClassSwapChainIN->hDeviceKM);
+
+    COMMIT_HANDLE_BATCH_OR_ERROR(psCreateDispClassSwapChainOUT->eError, psPerProc)
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVDestroyDCSwapChainBW(IMG_UINT32 ui32BridgeID,
-						   PVRSRV_BRIDGE_IN_DESTROY_DISPCLASS_SWAPCHAIN *psDestroyDispClassSwapChainIN,
-						   PVRSRV_BRIDGE_RETURN *psRetOUT,
-						   PVRSRV_PER_PROCESS_DATA *psPerProc)
+                           PVRSRV_BRIDGE_IN_DESTROY_DISPCLASS_SWAPCHAIN *psDestroyDispClassSwapChainIN,
+                           PVRSRV_BRIDGE_RETURN *psRetOUT,
+                           PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvSwapChain;
+    IMG_VOID *pvSwapChain;
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_DESTROY_DISPCLASS_SWAPCHAIN);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_DESTROY_DISPCLASS_SWAPCHAIN);
 
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &pvSwapChain,
-						   psDestroyDispClassSwapChainIN->hSwapChain,
-						   PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &pvSwapChain,
+                           psDestroyDispClassSwapChainIN->hSwapChain,
+                           PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psRetOUT->eError =
-		PVRSRVDestroyDCSwapChainKM(pvSwapChain);
+    psRetOUT->eError =
+        PVRSRVDestroyDCSwapChainKM(pvSwapChain);
 
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psRetOUT->eError =
-		PVRSRVReleaseHandle(psPerProc->psHandleBase,
-							psDestroyDispClassSwapChainIN->hSwapChain,
-							PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
+    psRetOUT->eError =
+        PVRSRVReleaseHandle(psPerProc->psHandleBase,
+                            psDestroyDispClassSwapChainIN->hSwapChain,
+                            PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVSetDCDstRectBW(IMG_UINT32 ui32BridgeID,
-					 PVRSRV_BRIDGE_IN_SET_DISPCLASS_RECT *psSetDispClassDstRectIN,
-					 PVRSRV_BRIDGE_RETURN *psRetOUT,
-					 PVRSRV_PER_PROCESS_DATA *psPerProc)
+                     PVRSRV_BRIDGE_IN_SET_DISPCLASS_RECT *psSetDispClassDstRectIN,
+                     PVRSRV_BRIDGE_RETURN *psRetOUT,
+                     PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfo;
-	IMG_VOID *pvSwapChain;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SET_DISPCLASS_DSTRECT);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfo,
-						   psSetDispClassDstRectIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvSwapChain,
-						   psSetDispClassDstRectIN->hSwapChain,
-						   PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
-
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVSetDCDstRectKM(pvDispClassInfo,
-							 pvSwapChain,
-							 &psSetDispClassDstRectIN->sRect);
-
-	return 0;
+    IMG_VOID *pvDispClassInfo;
+    IMG_VOID *pvSwapChain;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SET_DISPCLASS_DSTRECT);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfo,
+                           psSetDispClassDstRectIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvSwapChain,
+                           psSetDispClassDstRectIN->hSwapChain,
+                           PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
+
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVSetDCDstRectKM(pvDispClassInfo,
+                             pvSwapChain,
+                             &psSetDispClassDstRectIN->sRect);
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVSetDCSrcRectBW(IMG_UINT32 ui32BridgeID,
-					 PVRSRV_BRIDGE_IN_SET_DISPCLASS_RECT *psSetDispClassSrcRectIN,
-					 PVRSRV_BRIDGE_RETURN *psRetOUT,
-					 PVRSRV_PER_PROCESS_DATA *psPerProc)
+                     PVRSRV_BRIDGE_IN_SET_DISPCLASS_RECT *psSetDispClassSrcRectIN,
+                     PVRSRV_BRIDGE_RETURN *psRetOUT,
+                     PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfo;
-	IMG_VOID *pvSwapChain;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SET_DISPCLASS_SRCRECT);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfo,
-						   psSetDispClassSrcRectIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvSwapChain,
-						   psSetDispClassSrcRectIN->hSwapChain,
-						   PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVSetDCSrcRectKM(pvDispClassInfo,
-							 pvSwapChain,
-							 &psSetDispClassSrcRectIN->sRect);
-
-	return 0;
+    IMG_VOID *pvDispClassInfo;
+    IMG_VOID *pvSwapChain;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SET_DISPCLASS_SRCRECT);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfo,
+                           psSetDispClassSrcRectIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvSwapChain,
+                           psSetDispClassSrcRectIN->hSwapChain,
+                           PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVSetDCSrcRectKM(pvDispClassInfo,
+                             pvSwapChain,
+                             &psSetDispClassSrcRectIN->sRect);
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVSetDCDstColourKeyBW(IMG_UINT32 ui32BridgeID,
-						  PVRSRV_BRIDGE_IN_SET_DISPCLASS_COLOURKEY *psSetDispClassColKeyIN,
-						  PVRSRV_BRIDGE_RETURN *psRetOUT,
-						  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                          PVRSRV_BRIDGE_IN_SET_DISPCLASS_COLOURKEY *psSetDispClassColKeyIN,
+                          PVRSRV_BRIDGE_RETURN *psRetOUT,
+                          PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfo;
-	IMG_VOID *pvSwapChain;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SET_DISPCLASS_DSTCOLOURKEY);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfo,
-						   psSetDispClassColKeyIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvSwapChain,
-						   psSetDispClassColKeyIN->hSwapChain,
-						   PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVSetDCDstColourKeyKM(pvDispClassInfo,
-								  pvSwapChain,
-								  psSetDispClassColKeyIN->ui32CKColour);
-
-	return 0;
+    IMG_VOID *pvDispClassInfo;
+    IMG_VOID *pvSwapChain;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SET_DISPCLASS_DSTCOLOURKEY);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfo,
+                           psSetDispClassColKeyIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvSwapChain,
+                           psSetDispClassColKeyIN->hSwapChain,
+                           PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVSetDCDstColourKeyKM(pvDispClassInfo,
+                                  pvSwapChain,
+                                  psSetDispClassColKeyIN->ui32CKColour);
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVSetDCSrcColourKeyBW(IMG_UINT32 ui32BridgeID,
-						  PVRSRV_BRIDGE_IN_SET_DISPCLASS_COLOURKEY *psSetDispClassColKeyIN,
-						  PVRSRV_BRIDGE_RETURN *psRetOUT,
-						  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                          PVRSRV_BRIDGE_IN_SET_DISPCLASS_COLOURKEY *psSetDispClassColKeyIN,
+                          PVRSRV_BRIDGE_RETURN *psRetOUT,
+                          PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfo;
-	IMG_VOID *pvSwapChain;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SET_DISPCLASS_SRCCOLOURKEY);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfo,
-						   psSetDispClassColKeyIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvSwapChain,
-						   psSetDispClassColKeyIN->hSwapChain,
-						   PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVSetDCSrcColourKeyKM(pvDispClassInfo,
-								  pvSwapChain,
-								  psSetDispClassColKeyIN->ui32CKColour);
-
-	return 0;
+    IMG_VOID *pvDispClassInfo;
+    IMG_VOID *pvSwapChain;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SET_DISPCLASS_SRCCOLOURKEY);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfo,
+                           psSetDispClassColKeyIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvSwapChain,
+                           psSetDispClassColKeyIN->hSwapChain,
+                           PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVSetDCSrcColourKeyKM(pvDispClassInfo,
+                                  pvSwapChain,
+                                  psSetDispClassColKeyIN->ui32CKColour);
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVGetDCBuffersBW(IMG_UINT32 ui32BridgeID,
-					 PVRSRV_BRIDGE_IN_GET_DISPCLASS_BUFFERS *psGetDispClassBuffersIN,
-					 PVRSRV_BRIDGE_OUT_GET_DISPCLASS_BUFFERS *psGetDispClassBuffersOUT,
-					 PVRSRV_PER_PROCESS_DATA *psPerProc)
+                     PVRSRV_BRIDGE_IN_GET_DISPCLASS_BUFFERS *psGetDispClassBuffersIN,
+                     PVRSRV_BRIDGE_OUT_GET_DISPCLASS_BUFFERS *psGetDispClassBuffersOUT,
+                     PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfo;
-	IMG_VOID *pvSwapChain;
-	IMG_UINT32 i;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_DISPCLASS_BUFFERS);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psGetDispClassBuffersOUT->eError, psPerProc, PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS)
-
-	psGetDispClassBuffersOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfo,
-						   psGetDispClassBuffersIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-	if(psGetDispClassBuffersOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    IMG_VOID    *pvDispClassInfo;
+    IMG_VOID    *pvSwapChain;
+    IMG_UINT32   i;
+#if defined (SUPPORT_SID_INTERFACE)
+    IMG_HANDLE  *pahBuffer;
+#endif
 
-	psGetDispClassBuffersOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvSwapChain,
-						   psGetDispClassBuffersIN->hSwapChain,
-						   PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
-	if(psGetDispClassBuffersOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_DISPCLASS_BUFFERS);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psGetDispClassBuffersOUT->eError, psPerProc, PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS)
+
+    psGetDispClassBuffersOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfo,
+                           psGetDispClassBuffersIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+    if(psGetDispClassBuffersOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psGetDispClassBuffersOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvSwapChain,
+                           psGetDispClassBuffersIN->hSwapChain,
+                           PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN);
+    if(psGetDispClassBuffersOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+#if defined (SUPPORT_SID_INTERFACE)
+    psGetDispClassBuffersOUT->eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+                                                  sizeof(IMG_HANDLE) * PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS,
+                                                  (IMG_PVOID *)&pahBuffer, 0,
+                                                  "Temp Swapchain Buffers");
+
+    if (psGetDispClassBuffersOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+#endif
 
-	psGetDispClassBuffersOUT->eError =
-		PVRSRVGetDCBuffersKM(pvDispClassInfo,
-							 pvSwapChain,
-							 &psGetDispClassBuffersOUT->ui32BufferCount,
-							 psGetDispClassBuffersOUT->ahBuffer);
-	if (psGetDispClassBuffersOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    psGetDispClassBuffersOUT->eError =
+        PVRSRVGetDCBuffersKM(pvDispClassInfo,
+                             pvSwapChain,
+                             &psGetDispClassBuffersOUT->ui32BufferCount,
+#if defined (SUPPORT_SID_INTERFACE)
+                             pahBuffer);
+#else
+                             psGetDispClassBuffersOUT->ahBuffer);
+#endif
+    if (psGetDispClassBuffersOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	PVR_ASSERT(psGetDispClassBuffersOUT->ui32BufferCount <= PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS);
+    PVR_ASSERT(psGetDispClassBuffersOUT->ui32BufferCount <= PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS);
 
-	for(i = 0; i < psGetDispClassBuffersOUT->ui32BufferCount; i++)
-	{
-		IMG_HANDLE hBufferExt;
+    for(i = 0; i < psGetDispClassBuffersOUT->ui32BufferCount; i++)
+    {
+#if defined (SUPPORT_SID_INTERFACE)
+        IMG_SID hBufferExt;
+#else
+        IMG_HANDLE hBufferExt;
+#endif
 
+         
+#if defined (SUPPORT_SID_INTERFACE)
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                             &hBufferExt,
+                             pahBuffer[i],
+                             PVRSRV_HANDLE_TYPE_DISP_BUFFER,
+                             (PVRSRV_HANDLE_ALLOC_FLAG)(PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE | PVRSRV_HANDLE_ALLOC_FLAG_SHARED),
+                             psGetDispClassBuffersIN->hSwapChain);
+#else
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                             &hBufferExt,
+                             psGetDispClassBuffersOUT->ahBuffer[i],
+                             PVRSRV_HANDLE_TYPE_DISP_BUFFER,
+                             (PVRSRV_HANDLE_ALLOC_FLAG)(PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE | PVRSRV_HANDLE_ALLOC_FLAG_SHARED),
+                             psGetDispClassBuffersIN->hSwapChain);
+#endif
 
-		PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
-							 &hBufferExt,
-							 psGetDispClassBuffersOUT->ahBuffer[i],
-							 PVRSRV_HANDLE_TYPE_DISP_BUFFER,
-							 (PVRSRV_HANDLE_ALLOC_FLAG)(PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE | PVRSRV_HANDLE_ALLOC_FLAG_SHARED),
-							 psGetDispClassBuffersIN->hSwapChain);
+        psGetDispClassBuffersOUT->ahBuffer[i] = hBufferExt;
+    }
 
-		psGetDispClassBuffersOUT->ahBuffer[i] = hBufferExt;
-	}
+#if defined (SUPPORT_SID_INTERFACE)
+    OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
+              sizeof(IMG_HANDLE) * PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS,
+              (IMG_PVOID)pahBuffer, 0);
+#endif
 
-	COMMIT_HANDLE_BATCH_OR_ERROR(psGetDispClassBuffersOUT->eError, psPerProc)
+    COMMIT_HANDLE_BATCH_OR_ERROR(psGetDispClassBuffersOUT->eError, psPerProc)
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVSwapToDCBufferBW(IMG_UINT32 ui32BridgeID,
-					   PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER *psSwapDispClassBufferIN,
-					   PVRSRV_BRIDGE_RETURN *psRetOUT,
-					   PVRSRV_PER_PROCESS_DATA *psPerProc)
+                       PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER *psSwapDispClassBufferIN,
+                       PVRSRV_BRIDGE_RETURN *psRetOUT,
+                       PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfo;
-	IMG_VOID *pvSwapChainBuf;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER);
+    IMG_VOID  *pvDispClassInfo;
+    IMG_VOID  *pvSwapChainBuf;
+#if defined (SUPPORT_SID_INTERFACE)
+    IMG_HANDLE hPrivateTag;
+#endif
 
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfo,
-						   psSwapDispClassBufferIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfo,
+                           psSwapDispClassBufferIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVLookupSubHandle(psPerProc->psHandleBase,
+                           &pvSwapChainBuf,
+                           psSwapDispClassBufferIN->hBuffer,
+                           PVRSRV_HANDLE_TYPE_DISP_BUFFER,
+                           psSwapDispClassBufferIN->hDeviceKM);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+#if defined (SUPPORT_SID_INTERFACE)
+    if (psSwapDispClassBufferIN->hPrivateTag != 0)
+    {
+        psRetOUT->eError =
+            PVRSRVLookupSubHandle(psPerProc->psHandleBase,
+                               &hPrivateTag,
+                               psSwapDispClassBufferIN->hPrivateTag,
+                               PVRSRV_HANDLE_TYPE_DISP_BUFFER,
+                               psSwapDispClassBufferIN->hDeviceKM);
+        if(psRetOUT->eError != PVRSRV_OK)
+        {
+            return 0;
+        }
+    }
+    else
+    {
+        hPrivateTag = IMG_NULL;
+    }
+#endif
 
-	psRetOUT->eError =
-		PVRSRVLookupSubHandle(psPerProc->psHandleBase,
-						   &pvSwapChainBuf,
-						   psSwapDispClassBufferIN->hBuffer,
-						   PVRSRV_HANDLE_TYPE_DISP_BUFFER,
-						   psSwapDispClassBufferIN->hDeviceKM);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
 
-	psRetOUT->eError =
-		PVRSRVSwapToDCBufferKM(pvDispClassInfo,
-							   pvSwapChainBuf,
-							   psSwapDispClassBufferIN->ui32SwapInterval,
-							   psSwapDispClassBufferIN->hPrivateTag,
-							   psSwapDispClassBufferIN->ui32ClipRectCount,
-							   psSwapDispClassBufferIN->sClipRect);
+    psRetOUT->eError =
+        PVRSRVSwapToDCBufferKM(pvDispClassInfo,
+                               pvSwapChainBuf,
+                               psSwapDispClassBufferIN->ui32SwapInterval,
+#if defined (SUPPORT_SID_INTERFACE)
+                               hPrivateTag,
+#else
+                               psSwapDispClassBufferIN->hPrivateTag,
+#endif
+                               psSwapDispClassBufferIN->ui32ClipRectCount,
+                               psSwapDispClassBufferIN->sClipRect);
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVSwapToDCSystemBW(IMG_UINT32 ui32BridgeID,
-					   PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_SYSTEM *psSwapDispClassSystemIN,
-					   PVRSRV_BRIDGE_RETURN *psRetOUT,
-					   PVRSRV_PER_PROCESS_DATA *psPerProc)
+                       PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_SYSTEM *psSwapDispClassSystemIN,
+                       PVRSRV_BRIDGE_RETURN *psRetOUT,
+                       PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvDispClassInfo;
-	IMG_VOID *pvSwapChain;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_SYSTEM);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvDispClassInfo,
-						   psSwapDispClassSystemIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_DISP_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError =
-		PVRSRVLookupSubHandle(psPerProc->psHandleBase,
-						   &pvSwapChain,
-						   psSwapDispClassSystemIN->hSwapChain,
-						   PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN,
-						   psSwapDispClassSystemIN->hDeviceKM);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-	psRetOUT->eError =
-		PVRSRVSwapToDCSystemKM(pvDispClassInfo,
-							   pvSwapChain);
-
-	return 0;
+    IMG_VOID *pvDispClassInfo;
+    IMG_VOID *pvSwapChain;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_SYSTEM);
+
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvDispClassInfo,
+                           psSwapDispClassSystemIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_DISP_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError =
+        PVRSRVLookupSubHandle(psPerProc->psHandleBase,
+                           &pvSwapChain,
+                           psSwapDispClassSystemIN->hSwapChain,
+                           PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN,
+                           psSwapDispClassSystemIN->hDeviceKM);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+    psRetOUT->eError =
+        PVRSRVSwapToDCSystemKM(pvDispClassInfo,
+                               pvSwapChain);
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVOpenBCDeviceBW(IMG_UINT32 ui32BridgeID,
-					 PVRSRV_BRIDGE_IN_OPEN_BUFFERCLASS_DEVICE *psOpenBufferClassDeviceIN,
-					 PVRSRV_BRIDGE_OUT_OPEN_BUFFERCLASS_DEVICE *psOpenBufferClassDeviceOUT,
-					 PVRSRV_PER_PROCESS_DATA *psPerProc)
+                     PVRSRV_BRIDGE_IN_OPEN_BUFFERCLASS_DEVICE *psOpenBufferClassDeviceIN,
+                     PVRSRV_BRIDGE_OUT_OPEN_BUFFERCLASS_DEVICE *psOpenBufferClassDeviceOUT,
+                     PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hDevCookieInt;
-	IMG_HANDLE hBufClassInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_OPEN_BUFFERCLASS_DEVICE);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psOpenBufferClassDeviceOUT->eError, psPerProc, 1)
-
-	psOpenBufferClassDeviceOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &hDevCookieInt,
-						   psOpenBufferClassDeviceIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE);
-	if(psOpenBufferClassDeviceOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psOpenBufferClassDeviceOUT->eError =
-		PVRSRVOpenBCDeviceKM(psPerProc,
-							 psOpenBufferClassDeviceIN->ui32DeviceID,
-							 hDevCookieInt,
-							 &hBufClassInfo);
-	if(psOpenBufferClassDeviceOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	PVRSRVAllocHandleNR(psPerProc->psHandleBase,
-					  &psOpenBufferClassDeviceOUT->hDeviceKM,
-					  hBufClassInfo,
-					  PVRSRV_HANDLE_TYPE_BUF_INFO,
-					  PVRSRV_HANDLE_ALLOC_FLAG_NONE);
-
-	COMMIT_HANDLE_BATCH_OR_ERROR(psOpenBufferClassDeviceOUT->eError, psPerProc)
-
-	return 0;
+    IMG_HANDLE hDevCookieInt;
+    IMG_HANDLE hBufClassInfo;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_OPEN_BUFFERCLASS_DEVICE);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psOpenBufferClassDeviceOUT->eError, psPerProc, 1)
+
+    psOpenBufferClassDeviceOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &hDevCookieInt,
+                           psOpenBufferClassDeviceIN->hDevCookie,
+                           PVRSRV_HANDLE_TYPE_DEV_NODE);
+    if(psOpenBufferClassDeviceOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psOpenBufferClassDeviceOUT->eError =
+        PVRSRVOpenBCDeviceKM(psPerProc,
+                             psOpenBufferClassDeviceIN->ui32DeviceID,
+                             hDevCookieInt,
+                             &hBufClassInfo);
+    if(psOpenBufferClassDeviceOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                      &psOpenBufferClassDeviceOUT->hDeviceKM,
+                      hBufClassInfo,
+                      PVRSRV_HANDLE_TYPE_BUF_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE);
+
+    COMMIT_HANDLE_BATCH_OR_ERROR(psOpenBufferClassDeviceOUT->eError, psPerProc)
+
+    return 0;
 }
 
 static IMG_INT
 PVRSRVCloseBCDeviceBW(IMG_UINT32 ui32BridgeID,
-					  PVRSRV_BRIDGE_IN_CLOSE_BUFFERCLASS_DEVICE *psCloseBufferClassDeviceIN,
-					  PVRSRV_BRIDGE_RETURN *psRetOUT,
-					  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                      PVRSRV_BRIDGE_IN_CLOSE_BUFFERCLASS_DEVICE *psCloseBufferClassDeviceIN,
+                      PVRSRV_BRIDGE_RETURN *psRetOUT,
+                      PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvBufClassInfo;
+    IMG_VOID *pvBufClassInfo;
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CLOSE_BUFFERCLASS_DEVICE);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CLOSE_BUFFERCLASS_DEVICE);
 
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvBufClassInfo,
-						   psCloseBufferClassDeviceIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_BUF_INFO);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvBufClassInfo,
+                           psCloseBufferClassDeviceIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_BUF_INFO);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psRetOUT->eError =
-		PVRSRVCloseBCDeviceKM(pvBufClassInfo, IMG_FALSE);
+    psRetOUT->eError =
+        PVRSRVCloseBCDeviceKM(pvBufClassInfo, IMG_FALSE);
 
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psRetOUT->eError = PVRSRVReleaseHandle(psPerProc->psHandleBase,
-										   psCloseBufferClassDeviceIN->hDeviceKM,
-										   PVRSRV_HANDLE_TYPE_BUF_INFO);
+    psRetOUT->eError = PVRSRVReleaseHandle(psPerProc->psHandleBase,
+                                           psCloseBufferClassDeviceIN->hDeviceKM,
+                                           PVRSRV_HANDLE_TYPE_BUF_INFO);
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVGetBCInfoBW(IMG_UINT32 ui32BridgeID,
-				  PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_INFO *psGetBufferClassInfoIN,
-				  PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_INFO *psGetBufferClassInfoOUT,
-				  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                  PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_INFO *psGetBufferClassInfoIN,
+                  PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_INFO *psGetBufferClassInfoOUT,
+                  PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvBufClassInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_BUFFERCLASS_INFO);
-
-	psGetBufferClassInfoOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvBufClassInfo,
-						   psGetBufferClassInfoIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_BUF_INFO);
-	if(psGetBufferClassInfoOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psGetBufferClassInfoOUT->eError =
-		PVRSRVGetBCInfoKM(pvBufClassInfo,
-						  &psGetBufferClassInfoOUT->sBufferInfo);
-	return 0;
+    IMG_VOID *pvBufClassInfo;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_BUFFERCLASS_INFO);
+
+    psGetBufferClassInfoOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvBufClassInfo,
+                           psGetBufferClassInfoIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_BUF_INFO);
+    if(psGetBufferClassInfoOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psGetBufferClassInfoOUT->eError =
+        PVRSRVGetBCInfoKM(pvBufClassInfo,
+                          &psGetBufferClassInfoOUT->sBufferInfo);
+    return 0;
 }
 
 static IMG_INT
 PVRSRVGetBCBufferBW(IMG_UINT32 ui32BridgeID,
-					PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_BUFFER *psGetBufferClassBufferIN,
-					PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_BUFFER *psGetBufferClassBufferOUT,
-					PVRSRV_PER_PROCESS_DATA *psPerProc)
+                    PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_BUFFER *psGetBufferClassBufferIN,
+                    PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_BUFFER *psGetBufferClassBufferOUT,
+                    PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_VOID *pvBufClassInfo;
-	IMG_HANDLE hBufferInt;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_BUFFERCLASS_BUFFER);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psGetBufferClassBufferOUT->eError, psPerProc, 1)
-
-	psGetBufferClassBufferOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &pvBufClassInfo,
-						   psGetBufferClassBufferIN->hDeviceKM,
-						   PVRSRV_HANDLE_TYPE_BUF_INFO);
-	if(psGetBufferClassBufferOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psGetBufferClassBufferOUT->eError =
-		PVRSRVGetBCBufferKM(pvBufClassInfo,
-							psGetBufferClassBufferIN->ui32BufferIndex,
-							&hBufferInt);
-
-	if(psGetBufferClassBufferOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-
-	PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
-						 &psGetBufferClassBufferOUT->hBuffer,
-						 hBufferInt,
-						 PVRSRV_HANDLE_TYPE_BUF_BUFFER,
-						 (PVRSRV_HANDLE_ALLOC_FLAG)(PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE |  PVRSRV_HANDLE_ALLOC_FLAG_SHARED),
-						 psGetBufferClassBufferIN->hDeviceKM);
-
-	COMMIT_HANDLE_BATCH_OR_ERROR(psGetBufferClassBufferOUT->eError, psPerProc)
-
-	return 0;
+    IMG_VOID *pvBufClassInfo;
+    IMG_HANDLE hBufferInt;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_BUFFERCLASS_BUFFER);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psGetBufferClassBufferOUT->eError, psPerProc, 1)
+
+    psGetBufferClassBufferOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &pvBufClassInfo,
+                           psGetBufferClassBufferIN->hDeviceKM,
+                           PVRSRV_HANDLE_TYPE_BUF_INFO);
+    if(psGetBufferClassBufferOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psGetBufferClassBufferOUT->eError =
+        PVRSRVGetBCBufferKM(pvBufClassInfo,
+                            psGetBufferClassBufferIN->ui32BufferIndex,
+                            &hBufferInt);
+
+    if(psGetBufferClassBufferOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+     
+    PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                         &psGetBufferClassBufferOUT->hBuffer,
+                         hBufferInt,
+                         PVRSRV_HANDLE_TYPE_BUF_BUFFER,
+                         (PVRSRV_HANDLE_ALLOC_FLAG)(PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE |  PVRSRV_HANDLE_ALLOC_FLAG_SHARED),
+                         psGetBufferClassBufferIN->hDeviceKM);
+
+    COMMIT_HANDLE_BATCH_OR_ERROR(psGetBufferClassBufferOUT->eError, psPerProc)
+
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVAllocSharedSysMemoryBW(IMG_UINT32 ui32BridgeID,
-							 PVRSRV_BRIDGE_IN_ALLOC_SHARED_SYS_MEM *psAllocSharedSysMemIN,
-							 PVRSRV_BRIDGE_OUT_ALLOC_SHARED_SYS_MEM *psAllocSharedSysMemOUT,
-							 PVRSRV_PER_PROCESS_DATA *psPerProc)
+                             PVRSRV_BRIDGE_IN_ALLOC_SHARED_SYS_MEM *psAllocSharedSysMemIN,
+                             PVRSRV_BRIDGE_OUT_ALLOC_SHARED_SYS_MEM *psAllocSharedSysMemOUT,
+                             PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ALLOC_SHARED_SYS_MEM);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psAllocSharedSysMemOUT->eError, psPerProc, 1)
-
-	psAllocSharedSysMemOUT->eError =
-		PVRSRVAllocSharedSysMemoryKM(psPerProc,
-									 psAllocSharedSysMemIN->ui32Flags,
-									 psAllocSharedSysMemIN->ui32Size,
-									 &psKernelMemInfo);
-	if(psAllocSharedSysMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	OSMemSet(&psAllocSharedSysMemOUT->sClientMemInfo,
-			 0,
-			 sizeof(psAllocSharedSysMemOUT->sClientMemInfo));
-
-	psAllocSharedSysMemOUT->sClientMemInfo.pvLinAddrKM =
-			psKernelMemInfo->pvLinAddrKM;
-
-	psAllocSharedSysMemOUT->sClientMemInfo.pvLinAddr = 0;
-	psAllocSharedSysMemOUT->sClientMemInfo.ui32Flags =
-		psKernelMemInfo->ui32Flags;
-	psAllocSharedSysMemOUT->sClientMemInfo.ui32AllocSize =
-		psKernelMemInfo->ui32AllocSize;
-	psAllocSharedSysMemOUT->sClientMemInfo.hMappingInfo = psKernelMemInfo->sMemBlk.hOSMemHandle;
+    PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ALLOC_SHARED_SYS_MEM);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psAllocSharedSysMemOUT->eError, psPerProc, 1)
+
+    psAllocSharedSysMemOUT->eError =
+        PVRSRVAllocSharedSysMemoryKM(psPerProc,
+                                     psAllocSharedSysMemIN->ui32Flags,
+                                     psAllocSharedSysMemIN->ui32Size,
+                                     &psKernelMemInfo);
+    if(psAllocSharedSysMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    OSMemSet(&psAllocSharedSysMemOUT->sClientMemInfo,
+             0,
+             sizeof(psAllocSharedSysMemOUT->sClientMemInfo));
+
+    psAllocSharedSysMemOUT->sClientMemInfo.pvLinAddrKM =
+            psKernelMemInfo->pvLinAddrKM;
+
+    psAllocSharedSysMemOUT->sClientMemInfo.pvLinAddr = 0;
+    psAllocSharedSysMemOUT->sClientMemInfo.ui32Flags =
+        psKernelMemInfo->ui32Flags;
+    psAllocSharedSysMemOUT->sClientMemInfo.uAllocSize =
+        psKernelMemInfo->uAllocSize;
+#if defined (SUPPORT_SID_INTERFACE)
+    if (psKernelMemInfo->sMemBlk.hOSMemHandle != IMG_NULL)
+    {
+        PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                          &psAllocSharedSysMemOUT->sClientMemInfo.hMappingInfo,
+                          psKernelMemInfo->sMemBlk.hOSMemHandle,
+                          PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO,
+                          PVRSRV_HANDLE_ALLOC_FLAG_NONE);
+    }
+    else
+    {
+        psAllocSharedSysMemOUT->sClientMemInfo.hMappingInfo = 0;
+    }
+#else
+    psAllocSharedSysMemOUT->sClientMemInfo.hMappingInfo = psKernelMemInfo->sMemBlk.hOSMemHandle;
+#endif
 
-	PVRSRVAllocHandleNR(psPerProc->psHandleBase,
-					  &psAllocSharedSysMemOUT->sClientMemInfo.hKernelMemInfo,
-					  psKernelMemInfo,
-					  PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO,
-					  PVRSRV_HANDLE_ALLOC_FLAG_NONE);
+    PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                      &psAllocSharedSysMemOUT->sClientMemInfo.hKernelMemInfo,
+                      psKernelMemInfo,
+                      PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO,
+                      PVRSRV_HANDLE_ALLOC_FLAG_NONE);
 
-	COMMIT_HANDLE_BATCH_OR_ERROR(psAllocSharedSysMemOUT->eError, psPerProc)
+    COMMIT_HANDLE_BATCH_OR_ERROR(psAllocSharedSysMemOUT->eError, psPerProc)
 
-	return 0;
+    return 0;
 }
 
 static IMG_INT
 PVRSRVFreeSharedSysMemoryBW(IMG_UINT32 ui32BridgeID,
-							PVRSRV_BRIDGE_IN_FREE_SHARED_SYS_MEM *psFreeSharedSysMemIN,
-							PVRSRV_BRIDGE_OUT_FREE_SHARED_SYS_MEM *psFreeSharedSysMemOUT,
-							PVRSRV_PER_PROCESS_DATA *psPerProc)
+                            PVRSRV_BRIDGE_IN_FREE_SHARED_SYS_MEM *psFreeSharedSysMemIN,
+                            PVRSRV_BRIDGE_OUT_FREE_SHARED_SYS_MEM *psFreeSharedSysMemOUT,
+                            PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_FREE_SHARED_SYS_MEM);
+    PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
 
-	psFreeSharedSysMemOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   (IMG_VOID **)&psKernelMemInfo,
-						   psFreeSharedSysMemIN->psKernelMemInfo,
-																   PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_FREE_SHARED_SYS_MEM);
 
-	if(psFreeSharedSysMemOUT->eError != PVRSRV_OK)
-		return 0;
-
-	psFreeSharedSysMemOUT->eError =
-		PVRSRVFreeSharedSysMemoryKM(psKernelMemInfo);
-	if(psFreeSharedSysMemOUT->eError != PVRSRV_OK)
-		return 0;
+    psFreeSharedSysMemOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           (IMG_VOID **)&psKernelMemInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+                           psFreeSharedSysMemIN->hKernelMemInfo,
+#else
+                           psFreeSharedSysMemIN->psKernelMemInfo,
+#endif
+                           PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO);
+
+    if(psFreeSharedSysMemOUT->eError != PVRSRV_OK)
+        return 0;
+
+    psFreeSharedSysMemOUT->eError =
+        PVRSRVFreeSharedSysMemoryKM(psKernelMemInfo);
+    if(psFreeSharedSysMemOUT->eError != PVRSRV_OK)
+        return 0;
+#if defined (SUPPORT_SID_INTERFACE)
+    if (psFreeSharedSysMemIN->hMappingInfo != 0)
+    {
+        psFreeSharedSysMemOUT->eError =
+            PVRSRVReleaseHandle(psPerProc->psHandleBase,
+                                psFreeSharedSysMemIN->hMappingInfo,
+                                PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO);
+        if(psFreeSharedSysMemOUT->eError != PVRSRV_OK)
+        {
+            return 0;
+        }
+    }
+#endif
 
-	psFreeSharedSysMemOUT->eError =
-		PVRSRVReleaseHandle(psPerProc->psHandleBase,
-							psFreeSharedSysMemIN->psKernelMemInfo,
-							PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO);
-	return 0;
+    psFreeSharedSysMemOUT->eError =
+        PVRSRVReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+                            psFreeSharedSysMemIN->hKernelMemInfo,
+#else
+                            psFreeSharedSysMemIN->psKernelMemInfo,
+#endif
+                            PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO);
+    return 0;
 }
 
 static IMG_INT
 PVRSRVMapMemInfoMemBW(IMG_UINT32 ui32BridgeID,
-					  PVRSRV_BRIDGE_IN_MAP_MEMINFO_MEM *psMapMemInfoMemIN,
-					  PVRSRV_BRIDGE_OUT_MAP_MEMINFO_MEM *psMapMemInfoMemOUT,
-					  PVRSRV_PER_PROCESS_DATA *psPerProc)
-{
-	PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-	PVRSRV_HANDLE_TYPE eHandleType;
-	IMG_HANDLE	hParent;
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MAP_MEMINFO_MEM);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psMapMemInfoMemOUT->eError, psPerProc, 2)
-
-	psMapMemInfoMemOUT->eError =
-		PVRSRVLookupHandleAnyType(psPerProc->psHandleBase,
-						   (IMG_VOID **)&psKernelMemInfo,
-						   &eHandleType,
-						   psMapMemInfoMemIN->hKernelMemInfo);
-	if(psMapMemInfoMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	switch (eHandleType)
-	{
-#if defined(PVR_SECURE_HANDLES)
-		case PVRSRV_HANDLE_TYPE_MEM_INFO:
-		case PVRSRV_HANDLE_TYPE_MEM_INFO_REF:
-		case PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO:
+                      PVRSRV_BRIDGE_IN_MAP_MEMINFO_MEM *psMapMemInfoMemIN,
+                      PVRSRV_BRIDGE_OUT_MAP_MEMINFO_MEM *psMapMemInfoMemOUT,
+                      PVRSRV_PER_PROCESS_DATA *psPerProc)
+{
+    PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
+    PVRSRV_HANDLE_TYPE eHandleType;
+#if defined (SUPPORT_SID_INTERFACE)
+    IMG_SID     hParent;
 #else
-		case PVRSRV_HANDLE_TYPE_NONE:
+    IMG_HANDLE  hParent;
+#endif
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MAP_MEMINFO_MEM);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psMapMemInfoMemOUT->eError, psPerProc, 2)
+
+    psMapMemInfoMemOUT->eError =
+        PVRSRVLookupHandleAnyType(psPerProc->psHandleBase,
+                           (IMG_VOID **)&psKernelMemInfo,
+                           &eHandleType,
+                           psMapMemInfoMemIN->hKernelMemInfo);
+    if(psMapMemInfoMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    switch (eHandleType)
+    {
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+        case PVRSRV_HANDLE_TYPE_MEM_INFO:
+        case PVRSRV_HANDLE_TYPE_MEM_INFO_REF:
+        case PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO:
+#else
+        case PVRSRV_HANDLE_TYPE_NONE:
+#endif
+            break;
+        default:
+            psMapMemInfoMemOUT->eError = PVRSRV_ERROR_INVALID_HANDLE_TYPE;
+            return 0;
+    }
+
+    
+    psMapMemInfoMemOUT->eError =
+        PVRSRVGetParentHandle(psPerProc->psHandleBase,
+                    &hParent,
+                    psMapMemInfoMemIN->hKernelMemInfo,
+                    eHandleType);
+    if (psMapMemInfoMemOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+#if defined (SUPPORT_SID_INTERFACE)
+    if (hParent == 0)
+#else
+    if (hParent == IMG_NULL)
+#endif
+    {
+        hParent = psMapMemInfoMemIN->hKernelMemInfo;
+    }
+
+    OSMemSet(&psMapMemInfoMemOUT->sClientMemInfo,
+             0,
+             sizeof(psMapMemInfoMemOUT->sClientMemInfo));
+
+    psMapMemInfoMemOUT->sClientMemInfo.pvLinAddrKM =
+            psKernelMemInfo->pvLinAddrKM;
+
+    psMapMemInfoMemOUT->sClientMemInfo.pvLinAddr = 0;
+    psMapMemInfoMemOUT->sClientMemInfo.sDevVAddr =
+        psKernelMemInfo->sDevVAddr;
+    psMapMemInfoMemOUT->sClientMemInfo.ui32Flags =
+        psKernelMemInfo->ui32Flags;
+    psMapMemInfoMemOUT->sClientMemInfo.uAllocSize =
+        psKernelMemInfo->uAllocSize;
+#if defined (SUPPORT_SID_INTERFACE)
+    if (psKernelMemInfo->sMemBlk.hOSMemHandle != IMG_NULL)
+    {
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                          &psMapMemInfoMemOUT->sClientMemInfo.hMappingInfo,
+                          psKernelMemInfo->sMemBlk.hOSMemHandle,
+                          PVRSRV_HANDLE_TYPE_MEM_INFO_REF,
+                          PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
+                          hParent);
+    }
+    else
+    {
+        psMapMemInfoMemOUT->sClientMemInfo.hMappingInfo = 0;
+    }
+#else
+    psMapMemInfoMemOUT->sClientMemInfo.hMappingInfo = psKernelMemInfo->sMemBlk.hOSMemHandle;
 #endif
-			break;
-		default:
-			psMapMemInfoMemOUT->eError = PVRSRV_ERROR_INVALID_HANDLE_TYPE;
-			return 0;
-	}
-
-
-	psMapMemInfoMemOUT->eError =
-		PVRSRVGetParentHandle(psPerProc->psHandleBase,
-					&hParent,
-					psMapMemInfoMemIN->hKernelMemInfo,
-					eHandleType);
-	if (psMapMemInfoMemOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-	if (hParent == IMG_NULL)
-	{
-		hParent = psMapMemInfoMemIN->hKernelMemInfo;
-	}
-
-	OSMemSet(&psMapMemInfoMemOUT->sClientMemInfo,
-			 0,
-			 sizeof(psMapMemInfoMemOUT->sClientMemInfo));
-
-	psMapMemInfoMemOUT->sClientMemInfo.pvLinAddrKM =
-			psKernelMemInfo->pvLinAddrKM;
-
-	psMapMemInfoMemOUT->sClientMemInfo.pvLinAddr = 0;
-	psMapMemInfoMemOUT->sClientMemInfo.sDevVAddr =
-		psKernelMemInfo->sDevVAddr;
-	psMapMemInfoMemOUT->sClientMemInfo.ui32Flags =
-		psKernelMemInfo->ui32Flags;
-	psMapMemInfoMemOUT->sClientMemInfo.ui32AllocSize =
-		psKernelMemInfo->ui32AllocSize;
-	psMapMemInfoMemOUT->sClientMemInfo.hMappingInfo = psKernelMemInfo->sMemBlk.hOSMemHandle;
-
-	PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
-					  &psMapMemInfoMemOUT->sClientMemInfo.hKernelMemInfo,
-					  psKernelMemInfo,
-					  PVRSRV_HANDLE_TYPE_MEM_INFO_REF,
-					  PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
-					  hParent);
-
-	if(psKernelMemInfo->ui32Flags & PVRSRV_MEM_NO_SYNCOBJ)
-	{
-
-		OSMemSet(&psMapMemInfoMemOUT->sClientSyncInfo,
-				 0,
-				 sizeof (PVRSRV_CLIENT_SYNC_INFO));
-	}
-	else
-	{
-
-		psMapMemInfoMemOUT->sClientSyncInfo.psSyncData =
-			psKernelMemInfo->psKernelSyncInfo->psSyncData;
-		psMapMemInfoMemOUT->sClientSyncInfo.sWriteOpsCompleteDevVAddr =
-			psKernelMemInfo->psKernelSyncInfo->sWriteOpsCompleteDevVAddr;
-		psMapMemInfoMemOUT->sClientSyncInfo.sReadOpsCompleteDevVAddr =
-			psKernelMemInfo->psKernelSyncInfo->sReadOpsCompleteDevVAddr;
 
-		psMapMemInfoMemOUT->sClientSyncInfo.hMappingInfo =
-			psKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
+    PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                      &psMapMemInfoMemOUT->sClientMemInfo.hKernelMemInfo,
+                      psKernelMemInfo,
+                      PVRSRV_HANDLE_TYPE_MEM_INFO_REF,
+                      PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
+                      hParent);
+
+    if(psKernelMemInfo->ui32Flags & PVRSRV_MEM_NO_SYNCOBJ)
+    {
+        
+        OSMemSet(&psMapMemInfoMemOUT->sClientSyncInfo,
+                 0,
+                 sizeof (PVRSRV_CLIENT_SYNC_INFO));
+    }
+    else
+    {
+        
+#if !defined(PVRSRV_DISABLE_UM_SYNCOBJ_MAPPINGS)
+        psMapMemInfoMemOUT->sClientSyncInfo.psSyncData =
+            psKernelMemInfo->psKernelSyncInfo->psSyncData;
+        psMapMemInfoMemOUT->sClientSyncInfo.sWriteOpsCompleteDevVAddr =
+            psKernelMemInfo->psKernelSyncInfo->sWriteOpsCompleteDevVAddr;
+        psMapMemInfoMemOUT->sClientSyncInfo.sReadOpsCompleteDevVAddr =
+            psKernelMemInfo->psKernelSyncInfo->sReadOpsCompleteDevVAddr;
+
+#if defined (SUPPORT_SID_INTERFACE)
+    if (psKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle != IMG_NULL)
+    {
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                             &psMapMemInfoMemOUT->sClientSyncInfo.hMappingInfo,
+                             psKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle,
+                             PVRSRV_HANDLE_TYPE_SYNC_INFO,
+                             PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
+                             psMapMemInfoMemOUT->sClientMemInfo.hKernelMemInfo);
+    }
+    else
+    {
+        psMapMemInfoMemOUT->sClientSyncInfo.hMappingInfo = 0;
+    }
+#else
+        psMapMemInfoMemOUT->sClientSyncInfo.hMappingInfo =
+            psKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
+#endif
+#endif
 
-		psMapMemInfoMemOUT->sClientMemInfo.psClientSyncInfo = &psMapMemInfoMemOUT->sClientSyncInfo;
+        psMapMemInfoMemOUT->sClientMemInfo.psClientSyncInfo = &psMapMemInfoMemOUT->sClientSyncInfo;
 
-		PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
-							 &psMapMemInfoMemOUT->sClientSyncInfo.hKernelSyncInfo,
-							 psKernelMemInfo->psKernelSyncInfo,
-							 PVRSRV_HANDLE_TYPE_SYNC_INFO,
-							 PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
-							 psMapMemInfoMemOUT->sClientMemInfo.hKernelMemInfo);
-	}
+        PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
+                               &psMapMemInfoMemOUT->sClientSyncInfo.hKernelSyncInfo,
+                               psKernelMemInfo->psKernelSyncInfo,
+                               PVRSRV_HANDLE_TYPE_SYNC_INFO,
+                               PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
+                               psMapMemInfoMemOUT->sClientMemInfo.hKernelMemInfo);
+    }
 
-	COMMIT_HANDLE_BATCH_OR_ERROR(psMapMemInfoMemOUT->eError, psPerProc)
+    COMMIT_HANDLE_BATCH_OR_ERROR(psMapMemInfoMemOUT->eError, psPerProc)
 
-	return 0;
+    return 0;
 }
 
 
 
 static IMG_INT
 MMU_GetPDDevPAddrBW(IMG_UINT32 ui32BridgeID,
-					PVRSRV_BRIDGE_IN_GETMMU_PD_DEVPADDR *psGetMmuPDDevPAddrIN,
-					PVRSRV_BRIDGE_OUT_GETMMU_PD_DEVPADDR *psGetMmuPDDevPAddrOUT,
-					PVRSRV_PER_PROCESS_DATA *psPerProc)
+                    PVRSRV_BRIDGE_IN_GETMMU_PD_DEVPADDR *psGetMmuPDDevPAddrIN,
+                    PVRSRV_BRIDGE_OUT_GETMMU_PD_DEVPADDR *psGetMmuPDDevPAddrOUT,
+                    PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hDevMemContextInt;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GETMMU_PD_DEVPADDR);
-
-	psGetMmuPDDevPAddrOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevMemContextInt,
-						   psGetMmuPDDevPAddrIN->hDevMemContext,
-						   PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
-	if(psGetMmuPDDevPAddrOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psGetMmuPDDevPAddrOUT->sPDDevPAddr =
-		BM_GetDeviceNode(hDevMemContextInt)->pfnMMUGetPDDevPAddr(BM_GetMMUContextFromMemContext(hDevMemContextInt));
-	if(psGetMmuPDDevPAddrOUT->sPDDevPAddr.uiAddr)
-	{
-		psGetMmuPDDevPAddrOUT->eError = PVRSRV_OK;
-	}
-	else
-	{
-		psGetMmuPDDevPAddrOUT->eError = PVRSRV_ERROR_INVALID_PHYS_ADDR;
-	}
-	return 0;
+    IMG_HANDLE hDevMemContextInt;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GETMMU_PD_DEVPADDR);
+
+    psGetMmuPDDevPAddrOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevMemContextInt,
+                           psGetMmuPDDevPAddrIN->hDevMemContext,
+                           PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+    if(psGetMmuPDDevPAddrOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psGetMmuPDDevPAddrOUT->sPDDevPAddr =
+        BM_GetDeviceNode(hDevMemContextInt)->pfnMMUGetPDDevPAddr(BM_GetMMUContextFromMemContext(hDevMemContextInt));
+    if(psGetMmuPDDevPAddrOUT->sPDDevPAddr.uiAddr)
+    {
+        psGetMmuPDDevPAddrOUT->eError = PVRSRV_OK;
+    }
+    else
+    {
+        psGetMmuPDDevPAddrOUT->eError = PVRSRV_ERROR_INVALID_PHYS_ADDR;
+    }
+    return 0;
 }
 
 
 
 IMG_INT
 DummyBW(IMG_UINT32 ui32BridgeID,
-		IMG_VOID *psBridgeIn,
-		IMG_VOID *psBridgeOut,
-		PVRSRV_PER_PROCESS_DATA *psPerProc)
+        IMG_VOID *psBridgeIn,
+        IMG_VOID *psBridgeOut,
+        PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
 #if !defined(DEBUG)
-	PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
+    PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
 #endif
-	PVR_UNREFERENCED_PARAMETER(psBridgeIn);
-	PVR_UNREFERENCED_PARAMETER(psBridgeOut);
-	PVR_UNREFERENCED_PARAMETER(psPerProc);
+    PVR_UNREFERENCED_PARAMETER(psBridgeIn);
+    PVR_UNREFERENCED_PARAMETER(psBridgeOut);
+    PVR_UNREFERENCED_PARAMETER(psPerProc);
 
 #if defined(DEBUG_BRIDGE_KM)
-	PVR_DPF((PVR_DBG_ERROR, "%s: BRIDGE ERROR: BridgeID %u (%s) mapped to "
-			 "Dummy Wrapper (probably not what you want!)",
-			 __FUNCTION__, ui32BridgeID, g_BridgeDispatchTable[ui32BridgeID].pszIOCName));
+    PVR_DPF((PVR_DBG_ERROR, "%s: BRIDGE ERROR: BridgeID %u (%s) mapped to "
+             "Dummy Wrapper (probably not what you want!)",
+             __FUNCTION__, ui32BridgeID, g_BridgeDispatchTable[ui32BridgeID].pszIOCName));
 #else
-	PVR_DPF((PVR_DBG_ERROR, "%s: BRIDGE ERROR: BridgeID %u mapped to "
-			 "Dummy Wrapper (probably not what you want!)",
-			 __FUNCTION__, ui32BridgeID));
+    PVR_DPF((PVR_DBG_ERROR, "%s: BRIDGE ERROR: BridgeID %u mapped to "
+             "Dummy Wrapper (probably not what you want!)",
+             __FUNCTION__, ui32BridgeID));
 #endif
-	return -ENOTTY;
+    return -ENOTTY;
 }
 
 
 IMG_VOID
 _SetDispatchTableEntry(IMG_UINT32 ui32Index,
-					   const IMG_CHAR *pszIOCName,
-					   BridgeWrapperFunction pfFunction,
-					   const IMG_CHAR *pszFunctionName)
+                       const IMG_CHAR *pszIOCName,
+                       BridgeWrapperFunction pfFunction,
+                       const IMG_CHAR *pszFunctionName)
 {
-	static IMG_UINT32 ui32PrevIndex = ~0UL;
+    static IMG_UINT32 ui32PrevIndex = ~0UL;     
 #if !defined(DEBUG)
-	PVR_UNREFERENCED_PARAMETER(pszIOCName);
+    PVR_UNREFERENCED_PARAMETER(pszIOCName);
 #endif
 #if !defined(DEBUG_BRIDGE_KM_DISPATCH_TABLE) && !defined(DEBUG_BRIDGE_KM)
-	PVR_UNREFERENCED_PARAMETER(pszFunctionName);
+    PVR_UNREFERENCED_PARAMETER(pszFunctionName);
 #endif
 
 #if defined(DEBUG_BRIDGE_KM_DISPATCH_TABLE)
-
-	PVR_DPF((PVR_DBG_WARNING, "%s: %d %s %s", __FUNCTION__, ui32Index, pszIOCName, pszFunctionName));
+    
+    PVR_DPF((PVR_DBG_WARNING, "%s: %d %s %s", __FUNCTION__, ui32Index, pszIOCName, pszFunctionName));
 #endif
 
-
-	if(g_BridgeDispatchTable[ui32Index].pfFunction)
-	{
+    
+    if(g_BridgeDispatchTable[ui32Index].pfFunction)
+    {
 #if defined(DEBUG_BRIDGE_KM)
-		PVR_DPF((PVR_DBG_ERROR,
-				 "%s: BUG!: Adding dispatch table entry for %s clobbers an existing entry for %s",
-				 __FUNCTION__, pszIOCName, g_BridgeDispatchTable[ui32Index].pszIOCName));
+        PVR_DPF((PVR_DBG_ERROR,
+                 "%s: BUG!: Adding dispatch table entry for %s clobbers an existing entry for %s",
+                 __FUNCTION__, pszIOCName, g_BridgeDispatchTable[ui32Index].pszIOCName));
 #else
-		PVR_DPF((PVR_DBG_ERROR,
-				 "%s: BUG!: Adding dispatch table entry for %s clobbers an existing entry (index=%u)",
-				 __FUNCTION__, pszIOCName, ui32Index));
+        PVR_DPF((PVR_DBG_ERROR,
+                 "%s: BUG!: Adding dispatch table entry for %s clobbers an existing entry (index=%u)",
+                 __FUNCTION__, pszIOCName, ui32Index));
 #endif
-		PVR_DPF((PVR_DBG_ERROR, "NOTE: Enabling DEBUG_BRIDGE_KM_DISPATCH_TABLE may help debug this issue."));
-	}
-
-
-	if((ui32PrevIndex != ~0UL) &&
-	   ((ui32Index >= ui32PrevIndex + DISPATCH_TABLE_GAP_THRESHOLD) ||
-		(ui32Index <= ui32PrevIndex)))
-	{
+        PVR_DPF((PVR_DBG_ERROR, "NOTE: Enabling DEBUG_BRIDGE_KM_DISPATCH_TABLE may help debug this issue."));
+    }
+
+    
+    if((ui32PrevIndex != ~0UL) &&
+       ((ui32Index >= ui32PrevIndex + DISPATCH_TABLE_GAP_THRESHOLD) ||
+        (ui32Index <= ui32PrevIndex)))
+    {
 #if defined(DEBUG_BRIDGE_KM)
-		PVR_DPF((PVR_DBG_WARNING,
-				 "%s: There is a gap in the dispatch table between indices %u (%s) and %u (%s)",
-				 __FUNCTION__, ui32PrevIndex, g_BridgeDispatchTable[ui32PrevIndex].pszIOCName,
-				 ui32Index, pszIOCName));
+        PVR_DPF((PVR_DBG_WARNING,
+                 "%s: There is a gap in the dispatch table between indices %u (%s) and %u (%s)",
+                 __FUNCTION__, ui32PrevIndex, g_BridgeDispatchTable[ui32PrevIndex].pszIOCName,
+                 ui32Index, pszIOCName));
 #else
-		PVR_DPF((PVR_DBG_WARNING,
-				 "%s: There is a gap in the dispatch table between indices %u and %u (%s)",
-				 __FUNCTION__, (IMG_UINT)ui32PrevIndex, (IMG_UINT)ui32Index, pszIOCName));
+        PVR_DPF((PVR_DBG_WARNING,
+                 "%s: There is a gap in the dispatch table between indices %u and %u (%s)",
+                 __FUNCTION__, (IMG_UINT)ui32PrevIndex, (IMG_UINT)ui32Index, pszIOCName));
 #endif
-		PVR_DPF((PVR_DBG_ERROR, "NOTE: Enabling DEBUG_BRIDGE_KM_DISPATCH_TABLE may help debug this issue."));
-	}
+        PVR_DPF((PVR_DBG_ERROR, "NOTE: Enabling DEBUG_BRIDGE_KM_DISPATCH_TABLE may help debug this issue."));
+    }
 
-	g_BridgeDispatchTable[ui32Index].pfFunction = pfFunction;
+    g_BridgeDispatchTable[ui32Index].pfFunction = pfFunction;
 #if defined(DEBUG_BRIDGE_KM)
-	g_BridgeDispatchTable[ui32Index].pszIOCName = pszIOCName;
-	g_BridgeDispatchTable[ui32Index].pszFunctionName = pszFunctionName;
-	g_BridgeDispatchTable[ui32Index].ui32CallCount = 0;
-	g_BridgeDispatchTable[ui32Index].ui32CopyFromUserTotalBytes = 0;
+    g_BridgeDispatchTable[ui32Index].pszIOCName = pszIOCName;
+    g_BridgeDispatchTable[ui32Index].pszFunctionName = pszFunctionName;
+    g_BridgeDispatchTable[ui32Index].ui32CallCount = 0;
+    g_BridgeDispatchTable[ui32Index].ui32CopyFromUserTotalBytes = 0;
 #endif
 
-	ui32PrevIndex = ui32Index;
+    ui32PrevIndex = ui32Index;
 }
 
 static IMG_INT
 PVRSRVInitSrvConnectBW(IMG_UINT32 ui32BridgeID,
-					   IMG_VOID *psBridgeIn,
-					   PVRSRV_BRIDGE_RETURN *psRetOUT,
-					   PVRSRV_PER_PROCESS_DATA *psPerProc)
+                       IMG_VOID *psBridgeIn,
+                       PVRSRV_BRIDGE_RETURN *psRetOUT,
+                       PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVR_UNREFERENCED_PARAMETER(psBridgeIn);
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_INITSRV_CONNECT);
-	PVR_UNREFERENCED_PARAMETER(psBridgeIn);
+    PVR_UNREFERENCED_PARAMETER(psBridgeIn);
 
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_INITSRV_CONNECT);
+    PVR_UNREFERENCED_PARAMETER(psBridgeIn);
 
-	if((OSProcHasPrivSrvInit() == IMG_FALSE) || PVRSRVGetInitServerState(PVRSRV_INIT_SERVER_RUNNING) || PVRSRVGetInitServerState(PVRSRV_INIT_SERVER_RAN))
-	{
-		psRetOUT->eError = PVRSRV_ERROR_SRV_CONNECT_FAILED;
-		return 0;
-	}
+     
+    if((OSProcHasPrivSrvInit() == IMG_FALSE) || PVRSRVGetInitServerState(PVRSRV_INIT_SERVER_RUNNING) || PVRSRVGetInitServerState(PVRSRV_INIT_SERVER_RAN))
+    {
+        psRetOUT->eError = PVRSRV_ERROR_SRV_CONNECT_FAILED;
+        return 0;
+    }
 
 #if defined (__linux__)
-	PVRSRVSetInitServerState(PVRSRV_INIT_SERVER_RUNNING, IMG_TRUE);
+    PVRSRVSetInitServerState(PVRSRV_INIT_SERVER_RUNNING, IMG_TRUE);
 #endif
-	psPerProc->bInitProcess = IMG_TRUE;
+    psPerProc->bInitProcess = IMG_TRUE;
 
-	psRetOUT->eError = PVRSRV_OK;
+    psRetOUT->eError = PVRSRV_OK;
 
-	return 0;
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVInitSrvDisconnectBW(IMG_UINT32 ui32BridgeID,
-						  PVRSRV_BRIDGE_IN_INITSRV_DISCONNECT *psInitSrvDisconnectIN,
-						  PVRSRV_BRIDGE_RETURN *psRetOUT,
-						  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                          PVRSRV_BRIDGE_IN_INITSRV_DISCONNECT *psInitSrvDisconnectIN,
+                          PVRSRV_BRIDGE_RETURN *psRetOUT,
+                          PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_INITSRV_DISCONNECT);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_INITSRV_DISCONNECT);
 
-	if(!psPerProc->bInitProcess)
-	{
-		psRetOUT->eError = PVRSRV_ERROR_SRV_DISCONNECT_FAILED;
-		return 0;
-	}
+    if(!psPerProc->bInitProcess)
+    {
+        psRetOUT->eError = PVRSRV_ERROR_SRV_DISCONNECT_FAILED;
+        return 0;
+    }
 
-	psPerProc->bInitProcess = IMG_FALSE;
+    psPerProc->bInitProcess = IMG_FALSE;
 
-	PVRSRVSetInitServerState(PVRSRV_INIT_SERVER_RUNNING, IMG_FALSE);
-	PVRSRVSetInitServerState(PVRSRV_INIT_SERVER_RAN, IMG_TRUE);
+    PVRSRVSetInitServerState(PVRSRV_INIT_SERVER_RUNNING, IMG_FALSE);
+    PVRSRVSetInitServerState(PVRSRV_INIT_SERVER_RAN, IMG_TRUE);
 
-	psRetOUT->eError = PVRSRVFinaliseSystem(psInitSrvDisconnectIN->bInitSuccesful);
+    psRetOUT->eError = PVRSRVFinaliseSystem(psInitSrvDisconnectIN->bInitSuccesful);
 
-	PVRSRVSetInitServerState( PVRSRV_INIT_SERVER_SUCCESSFUL ,
-				((psRetOUT->eError == PVRSRV_OK) && (psInitSrvDisconnectIN->bInitSuccesful))
-				? IMG_TRUE : IMG_FALSE);
+    PVRSRVSetInitServerState( PVRSRV_INIT_SERVER_SUCCESSFUL ,
+                ((psRetOUT->eError == PVRSRV_OK) && (psInitSrvDisconnectIN->bInitSuccesful))
+                ? IMG_TRUE : IMG_FALSE);
 
-	return 0;
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVEventObjectWaitBW(IMG_UINT32 ui32BridgeID,
-						  PVRSRV_BRIDGE_IN_EVENT_OBJECT_WAIT *psEventObjectWaitIN,
-						  PVRSRV_BRIDGE_RETURN *psRetOUT,
-						  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                          PVRSRV_BRIDGE_IN_EVENT_OBJECT_WAIT *psEventObjectWaitIN,
+                          PVRSRV_BRIDGE_RETURN *psRetOUT,
+                          PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hOSEventKM;
+    IMG_HANDLE hOSEventKM;
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_WAIT);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_WAIT);
 
-	psRetOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &hOSEventKM,
-						   psEventObjectWaitIN->hOSEventKM,
-						   PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT);
+    psRetOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                           &hOSEventKM,
+                           psEventObjectWaitIN->hOSEventKM,
+                           PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT);
 
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psRetOUT->eError = OSEventObjectWait(hOSEventKM);
+    psRetOUT->eError = OSEventObjectWaitKM(hOSEventKM);
 
-	return 0;
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVEventObjectOpenBW(IMG_UINT32 ui32BridgeID,
-						  PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN *psEventObjectOpenIN,
-						  PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN *psEventObjectOpenOUT,
-						  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                          PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN *psEventObjectOpenIN,
+                          PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN *psEventObjectOpenOUT,
+                          PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
+#if defined (SUPPORT_SID_INTERFACE)
+    PVRSRV_EVENTOBJECT_KM sEventObject;
+    IMG_HANDLE hOSEvent;
+#endif
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_OPEN);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_OPEN);
 
-	NEW_HANDLE_BATCH_OR_ERROR(psEventObjectOpenOUT->eError, psPerProc, 1)
+    NEW_HANDLE_BATCH_OR_ERROR(psEventObjectOpenOUT->eError, psPerProc, 1)
 
-	psEventObjectOpenOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &psEventObjectOpenIN->sEventObject.hOSEventKM,
-						   psEventObjectOpenIN->sEventObject.hOSEventKM,
-						   PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT);
+    psEventObjectOpenOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+                           &sEventObject.hOSEventKM,
+#else
+                           &psEventObjectOpenIN->sEventObject.hOSEventKM,
+#endif
+                           psEventObjectOpenIN->sEventObject.hOSEventKM,
+                           PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT);
 
-	if(psEventObjectOpenOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if(psEventObjectOpenOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psEventObjectOpenOUT->eError = OSEventObjectOpen(&psEventObjectOpenIN->sEventObject, &psEventObjectOpenOUT->hOSEvent);
+#if defined (SUPPORT_SID_INTERFACE)
+    OSMemCopy(&sEventObject.szName,
+                           &psEventObjectOpenIN->sEventObject.szName,
+              EVENTOBJNAME_MAXLENGTH);
 
-	if(psEventObjectOpenOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    psEventObjectOpenOUT->eError = OSEventObjectOpenKM(&sEventObject, &hOSEvent);
+#else
+    psEventObjectOpenOUT->eError = OSEventObjectOpenKM(&psEventObjectOpenIN->sEventObject, &psEventObjectOpenOUT->hOSEvent);
+#endif
 
-	PVRSRVAllocHandleNR(psPerProc->psHandleBase,
-					  &psEventObjectOpenOUT->hOSEvent,
-					  psEventObjectOpenOUT->hOSEvent,
-					  PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT,
-					  PVRSRV_HANDLE_ALLOC_FLAG_MULTI);
+    if(psEventObjectOpenOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+#if defined (SUPPORT_SID_INTERFACE)
+#if !defined (WINXP) && !defined(SUPPORT_VISTA)
+    PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                      &psEventObjectOpenOUT->hOSEvent,
+                      hOSEvent,
+                      PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT,
+                      PVRSRV_HANDLE_ALLOC_FLAG_MULTI);
+#endif
+#else
+    PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+                      &psEventObjectOpenOUT->hOSEvent,
+                      psEventObjectOpenOUT->hOSEvent,
+                      PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT,
+                      PVRSRV_HANDLE_ALLOC_FLAG_MULTI);
+#endif
 
-	COMMIT_HANDLE_BATCH_OR_ERROR(psEventObjectOpenOUT->eError, psPerProc)
+    COMMIT_HANDLE_BATCH_OR_ERROR(psEventObjectOpenOUT->eError, psPerProc)
 
-	return 0;
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVEventObjectCloseBW(IMG_UINT32 ui32BridgeID,
-						  PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE *psEventObjectCloseIN,
-						  PVRSRV_BRIDGE_RETURN *psRetOUT,
-						  PVRSRV_PER_PROCESS_DATA *psPerProc)
+                          PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE *psEventObjectCloseIN,
+                          PVRSRV_BRIDGE_RETURN *psRetOUT,
+                          PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
-	IMG_HANDLE hOSEventKM;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE);
-
-	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase,
-						   &psEventObjectCloseIN->sEventObject.hOSEventKM,
-						   psEventObjectCloseIN->sEventObject.hOSEventKM,
-						   PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT);
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
-
-	psRetOUT->eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-						   &hOSEventKM,
-						   psEventObjectCloseIN->hOSEventKM,
-						   PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT);
+    IMG_HANDLE hOSEventKM;
+#if defined (SUPPORT_SID_INTERFACE)
+    PVRSRV_EVENTOBJECT_KM sEventObject;
+#endif
 
-	if(psRetOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE);
 
-	psRetOUT->eError = OSEventObjectClose(&psEventObjectCloseIN->sEventObject, hOSEventKM);
+    psRetOUT->eError =
+        PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+                           &sEventObject.hOSEventKM,
+#else
+                           &psEventObjectCloseIN->sEventObject.hOSEventKM,
+#endif
+                           psEventObjectCloseIN->sEventObject.hOSEventKM,
+                           PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT);
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+    psRetOUT->eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+                           &hOSEventKM,
+                           psEventObjectCloseIN->hOSEventKM,
+                           PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT);
+
+    if(psRetOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
+
+#if defined (SUPPORT_SID_INTERFACE)
+    if(CopyFromUserWrapper(psPerProc, ui32BridgeID,
+                           &sEventObject.szName,
+                           &psEventObjectCloseIN->sEventObject.szName,
+                           EVENTOBJNAME_MAXLENGTH) != PVRSRV_OK)
+    {
+        
+        return -EFAULT;
+    }
+
+    psRetOUT->eError = OSEventObjectCloseKM(&sEventObject, hOSEventKM);
+#else
+    psRetOUT->eError = OSEventObjectCloseKM(&psEventObjectCloseIN->sEventObject, hOSEventKM);
+#endif
 
-	return 0;
+    return 0;
 }
 
 
 typedef struct _MODIFY_SYNC_OP_INFO
 {
-	IMG_HANDLE  hResItem;
-	PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
-	IMG_UINT32	ui32ModifyFlags;
-	IMG_UINT32	ui32ReadOpsPendingSnapShot;
-	IMG_UINT32	ui32WriteOpsPendingSnapShot;
+    IMG_HANDLE  hResItem;
+    PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
+    IMG_UINT32  ui32ModifyFlags;
+    IMG_UINT32  ui32ReadOpsPendingSnapShot;
+    IMG_UINT32  ui32WriteOpsPendingSnapShot;
 } MODIFY_SYNC_OP_INFO;
 
 
-static PVRSRV_ERROR DoQuerySyncOpsSatisfied(MODIFY_SYNC_OP_INFO *psModSyncOpInfo)
+static PVRSRV_ERROR DoQuerySyncOpsSatisfied(PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo,
+                                            IMG_UINT32 ui32ReadOpsPendingSnapShot,
+                                            IMG_UINT32 ui32WriteOpsPendingSnapShot)
 {
-	PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
+    IMG_UINT32 ui32WriteOpsPending;
+    IMG_UINT32 ui32ReadOpsPending;
 
-	psKernelSyncInfo = psModSyncOpInfo->psKernelSyncInfo;
+    
+    if (!psKernelSyncInfo)
+    {
+        return PVRSRV_ERROR_INVALID_PARAMS;
+    }
 
-	if (!psKernelSyncInfo)
-	{
-		return PVRSRV_ERROR_INVALID_PARAMS;
-	}
+    
 
-	if((psModSyncOpInfo->ui32WriteOpsPendingSnapShot == psKernelSyncInfo->psSyncData->ui32WriteOpsComplete)
-	   && (psModSyncOpInfo->ui32ReadOpsPendingSnapShot == psKernelSyncInfo->psSyncData->ui32ReadOpsComplete))
-	{
-#if defined(PDUMP)
 
 
 
-		PDumpComment("Poll for read ops complete to reach value (%u)", psModSyncOpInfo->ui32ReadOpsPendingSnapShot);
-		PDumpMemPolKM(psKernelSyncInfo->psSyncDataMemInfoKM,
-						  offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete),
-						  psModSyncOpInfo->ui32ReadOpsPendingSnapShot,
-						  0xFFFFFFFF,
-						  PDUMP_POLL_OPERATOR_EQUAL,
-						  0,
-						  MAKEUNIQUETAG(psKernelSyncInfo->psSyncDataMemInfoKM));
 
 
-		PDumpComment("Poll for write ops complete to reach value (%u)", psModSyncOpInfo->ui32WriteOpsPendingSnapShot);
-		PDumpMemPolKM(psKernelSyncInfo->psSyncDataMemInfoKM,
-						  offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete),
-						  psModSyncOpInfo->ui32WriteOpsPendingSnapShot,
-						  0xFFFFFFFF,
-						  PDUMP_POLL_OPERATOR_EQUAL,
-						  0,
-						  MAKEUNIQUETAG(psKernelSyncInfo->psSyncDataMemInfoKM));
-#endif
-		return PVRSRV_OK;
-	}
-	else
-	{
-		return PVRSRV_ERROR_RETRY;
-	}
-}
-
-static PVRSRV_ERROR DoModifyCompleteSyncOps(MODIFY_SYNC_OP_INFO *psModSyncOpInfo)
-{
-	PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
 
-	psKernelSyncInfo = psModSyncOpInfo->psKernelSyncInfo;
-
-	if (!psKernelSyncInfo)
-	{
-		return PVRSRV_ERROR_INVALID_PARAMS;
-	}
-
-
-	if((psModSyncOpInfo->ui32WriteOpsPendingSnapShot != psKernelSyncInfo->psSyncData->ui32WriteOpsComplete)
-	   || (psModSyncOpInfo->ui32ReadOpsPendingSnapShot != psKernelSyncInfo->psSyncData->ui32ReadOpsComplete))
-	{
-		return PVRSRV_ERROR_BAD_SYNC_STATE;
-	}
 
 
-	if(psModSyncOpInfo->ui32ModifyFlags & PVRSRV_MODIFYSYNCOPS_FLAGS_WO_INC)
-	{
-		psKernelSyncInfo->psSyncData->ui32WriteOpsComplete++;
-	}
+    ui32WriteOpsPending = psKernelSyncInfo->psSyncData->ui32WriteOpsPending;
+    ui32ReadOpsPending = psKernelSyncInfo->psSyncData->ui32ReadOpsPending;
 
+    if((ui32WriteOpsPending - ui32WriteOpsPendingSnapShot >=
+        ui32WriteOpsPending - psKernelSyncInfo->psSyncData->ui32WriteOpsComplete) &&
+       (ui32ReadOpsPending - ui32ReadOpsPendingSnapShot >=
+        ui32ReadOpsPending - psKernelSyncInfo->psSyncData->ui32ReadOpsComplete))
+    {
+#if defined(PDUMP) && !defined(SUPPORT_VGX)
+        
+        PDumpComment("Poll for read ops complete to reach value (pdump: %u, actual snapshot: %u)",
+                     psKernelSyncInfo->psSyncData->ui32LastReadOpDumpVal,
+                     ui32ReadOpsPendingSnapShot);
+        PDumpMemPolKM(psKernelSyncInfo->psSyncDataMemInfoKM,
+                          offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete),
+                      psKernelSyncInfo->psSyncData->ui32LastReadOpDumpVal,
+                          0xFFFFFFFF,
+                      PDUMP_POLL_OPERATOR_EQUAL, 
+                          0,
+                          MAKEUNIQUETAG(psKernelSyncInfo->psSyncDataMemInfoKM));
 
-	if(psModSyncOpInfo->ui32ModifyFlags & PVRSRV_MODIFYSYNCOPS_FLAGS_RO_INC)
-	{
-		psKernelSyncInfo->psSyncData->ui32ReadOpsComplete++;
-	}
+        
+        PDumpComment("Poll for write ops complete to reach value (pdump: %u, actual snapshot: %u)",
+                     psKernelSyncInfo->psSyncData->ui32LastOpDumpVal,
+                     ui32WriteOpsPendingSnapShot);
+        PDumpMemPolKM(psKernelSyncInfo->psSyncDataMemInfoKM,
+                          offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete),
+                      psKernelSyncInfo->psSyncData->ui32LastOpDumpVal,
+                          0xFFFFFFFF,
+                      PDUMP_POLL_OPERATOR_EQUAL, 
+                          0,
+                          MAKEUNIQUETAG(psKernelSyncInfo->psSyncDataMemInfoKM));
+        
 
-	return PVRSRV_OK;
+#endif
+        return PVRSRV_OK;
+    }
+    else
+    {
+        return PVRSRV_ERROR_RETRY;
+    }
 }
 
 
-static PVRSRV_ERROR ModifyCompleteSyncOpsCallBack(IMG_PVOID		pvParam,
-													IMG_UINT32	ui32Param)
+static PVRSRV_ERROR DoModifyCompleteSyncOps(MODIFY_SYNC_OP_INFO *psModSyncOpInfo)
 {
-	MODIFY_SYNC_OP_INFO		*psModSyncOpInfo;
-
-	PVR_UNREFERENCED_PARAMETER(ui32Param);
-
-	if (!pvParam)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "ModifyCompleteSyncOpsCallBack: invalid parameter"));
-		return PVRSRV_ERROR_INVALID_PARAMS;
-	}
-
-	psModSyncOpInfo = (MODIFY_SYNC_OP_INFO*)pvParam;
-
-	if (psModSyncOpInfo->psKernelSyncInfo)
-	{
-
-		LOOP_UNTIL_TIMEOUT(MAX_HW_TIME_US)
-		{
-			if (DoQuerySyncOpsSatisfied(psModSyncOpInfo) == PVRSRV_OK)
-			{
-				goto OpFlushedComplete;
-			}
-			PVR_DPF((PVR_DBG_WARNING, "ModifyCompleteSyncOpsCallBack: waiting for current Ops to flush"));
-			OSSleepms(1);
-		} END_LOOP_UNTIL_TIMEOUT();
-
-		PVR_DPF((PVR_DBG_ERROR, "ModifyCompleteSyncOpsCallBack: timeout whilst waiting for current Ops to flush."));
-		PVR_DPF((PVR_DBG_ERROR, "  Write ops pending snapshot = %d, write ops complete = %d",
-				 psModSyncOpInfo->ui32WriteOpsPendingSnapShot,
-				 psModSyncOpInfo->psKernelSyncInfo->psSyncData->ui32WriteOpsComplete));
-		PVR_DPF((PVR_DBG_ERROR, "  Read ops pending snapshot = %d, write ops complete = %d",
-				 psModSyncOpInfo->ui32ReadOpsPendingSnapShot,
-				 psModSyncOpInfo->psKernelSyncInfo->psSyncData->ui32ReadOpsComplete));
-
-		return PVRSRV_ERROR_TIMEOUT;
-
-	OpFlushedComplete:
-
-		DoModifyCompleteSyncOps(psModSyncOpInfo);
-	}
-
-	OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,	sizeof(MODIFY_SYNC_OP_INFO), (IMG_VOID *)psModSyncOpInfo, 0);
-
-
+    PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
+
+    psKernelSyncInfo = psModSyncOpInfo->psKernelSyncInfo;
+
+    if (!psKernelSyncInfo)
+    {
+        return PVRSRV_ERROR_INVALID_PARAMS;
+    }
+
+    
+    if((psModSyncOpInfo->ui32WriteOpsPendingSnapShot != psKernelSyncInfo->psSyncData->ui32WriteOpsComplete)
+       || (psModSyncOpInfo->ui32ReadOpsPendingSnapShot != psKernelSyncInfo->psSyncData->ui32ReadOpsComplete))
+    {
+        return PVRSRV_ERROR_BAD_SYNC_STATE;
+    }
+
+    
+    if(psModSyncOpInfo->ui32ModifyFlags & PVRSRV_MODIFYSYNCOPS_FLAGS_WO_INC)
+    {
+        psKernelSyncInfo->psSyncData->ui32WriteOpsComplete++;
+    }
+
+    
+    if(psModSyncOpInfo->ui32ModifyFlags & PVRSRV_MODIFYSYNCOPS_FLAGS_RO_INC)
+    {
+        psKernelSyncInfo->psSyncData->ui32ReadOpsComplete++;
+    }
+
+    return PVRSRV_OK;
+}
 
-	PVRSRVScheduleDeviceCallbacks();
 
-	return PVRSRV_OK;
+static PVRSRV_ERROR ModifyCompleteSyncOpsCallBack(IMG_PVOID     pvParam,
+                                                    IMG_UINT32  ui32Param)
+{
+    MODIFY_SYNC_OP_INFO     *psModSyncOpInfo;
+
+    PVR_UNREFERENCED_PARAMETER(ui32Param);
+
+    if (!pvParam)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "ModifyCompleteSyncOpsCallBack: invalid parameter"));
+        return PVRSRV_ERROR_INVALID_PARAMS;
+    }
+
+    psModSyncOpInfo = (MODIFY_SYNC_OP_INFO*)pvParam;
+
+    if (psModSyncOpInfo->psKernelSyncInfo)
+    {
+        
+        LOOP_UNTIL_TIMEOUT(MAX_HW_TIME_US)
+        {
+            if (DoQuerySyncOpsSatisfied(psModSyncOpInfo->psKernelSyncInfo,
+                                        psModSyncOpInfo->ui32ReadOpsPendingSnapShot,
+                                        psModSyncOpInfo->ui32WriteOpsPendingSnapShot) == PVRSRV_OK)
+            {
+                goto OpFlushedComplete;
+            }
+            PVR_DPF((PVR_DBG_WARNING, "ModifyCompleteSyncOpsCallBack: waiting for current Ops to flush"));
+            OSSleepms(1);
+        } END_LOOP_UNTIL_TIMEOUT();
+
+        PVR_DPF((PVR_DBG_ERROR, "ModifyCompleteSyncOpsCallBack: timeout whilst waiting for current Ops to flush."));
+        PVR_DPF((PVR_DBG_ERROR, "  Write ops pending snapshot = %d, write ops complete = %d",
+                 psModSyncOpInfo->ui32WriteOpsPendingSnapShot,
+                 psModSyncOpInfo->psKernelSyncInfo->psSyncData->ui32WriteOpsComplete));
+        PVR_DPF((PVR_DBG_ERROR, "  Read ops pending snapshot = %d, write ops complete = %d",
+                 psModSyncOpInfo->ui32ReadOpsPendingSnapShot,
+                 psModSyncOpInfo->psKernelSyncInfo->psSyncData->ui32ReadOpsComplete));
+
+        return PVRSRV_ERROR_TIMEOUT;
+
+    OpFlushedComplete:
+
+        DoModifyCompleteSyncOps(psModSyncOpInfo);
+    }
+
+    OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,  sizeof(MODIFY_SYNC_OP_INFO), (IMG_VOID *)psModSyncOpInfo, 0);
+    
+
+    
+    PVRSRVScheduleDeviceCallbacks();
+
+    return PVRSRV_OK;
 }
 
 
 static IMG_INT
 PVRSRVCreateSyncInfoModObjBW(IMG_UINT32                                         ui32BridgeID,
-									 IMG_VOID                                           *psBridgeIn,
-									 PVRSRV_BRIDGE_OUT_CREATE_SYNC_INFO_MOD_OBJ  *psCreateSyncInfoModObjOUT,
-									 PVRSRV_PER_PROCESS_DATA				            *psPerProc)
+                                     IMG_VOID                                           *psBridgeIn,
+                                     PVRSRV_BRIDGE_OUT_CREATE_SYNC_INFO_MOD_OBJ  *psCreateSyncInfoModObjOUT,
+                                     PVRSRV_PER_PROCESS_DATA                            *psPerProc)
 {
-	MODIFY_SYNC_OP_INFO		*psModSyncOpInfo;
+    MODIFY_SYNC_OP_INFO     *psModSyncOpInfo;
 
-	PVR_UNREFERENCED_PARAMETER(psBridgeIn);
+    PVR_UNREFERENCED_PARAMETER(psBridgeIn);
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CREATE_SYNC_INFO_MOD_OBJ);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CREATE_SYNC_INFO_MOD_OBJ);
 
-	NEW_HANDLE_BATCH_OR_ERROR(psCreateSyncInfoModObjOUT->eError, psPerProc, 1)
+    NEW_HANDLE_BATCH_OR_ERROR(psCreateSyncInfoModObjOUT->eError, psPerProc, 1)
 
-	ASSIGN_AND_EXIT_ON_ERROR(psCreateSyncInfoModObjOUT->eError,
-			  OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
-			  sizeof(MODIFY_SYNC_OP_INFO),
-			  (IMG_VOID **)&psModSyncOpInfo, 0,
-			  "ModSyncOpInfo (MODIFY_SYNC_OP_INFO)"));
+    ASSIGN_AND_EXIT_ON_ERROR(psCreateSyncInfoModObjOUT->eError,
+              OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+              sizeof(MODIFY_SYNC_OP_INFO),
+              (IMG_VOID **)&psModSyncOpInfo, 0,
+              "ModSyncOpInfo (MODIFY_SYNC_OP_INFO)"));
 
-	psModSyncOpInfo->psKernelSyncInfo = IMG_NULL;
+    psModSyncOpInfo->psKernelSyncInfo = IMG_NULL; 
 
-	psCreateSyncInfoModObjOUT->eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
-																  &psCreateSyncInfoModObjOUT->hKernelSyncInfoModObj,
-																  psModSyncOpInfo,
-																  PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ,
-																  PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE);
+    psCreateSyncInfoModObjOUT->eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
+                                                                  &psCreateSyncInfoModObjOUT->hKernelSyncInfoModObj,
+                                                                  psModSyncOpInfo,
+                                                                  PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ,
+                                                                  PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE);
 
-	if (psCreateSyncInfoModObjOUT->eError != PVRSRV_OK)
-	{
-		return 0;
-	}
+    if (psCreateSyncInfoModObjOUT->eError != PVRSRV_OK)
+    {
+        return 0;
+    }
 
-	psModSyncOpInfo->hResItem = ResManRegisterRes(psPerProc->hResManContext,
-												  RESMAN_TYPE_MODIFY_SYNC_OPS,
-												  psModSyncOpInfo,
-												  0,
-												  &ModifyCompleteSyncOpsCallBack);
+    psModSyncOpInfo->hResItem = ResManRegisterRes(psPerProc->hResManContext,
+                                                  RESMAN_TYPE_MODIFY_SYNC_OPS,
+                                                  psModSyncOpInfo,
+                                                  0,
+                                                  &ModifyCompleteSyncOpsCallBack);
 
-	COMMIT_HANDLE_BATCH_OR_ERROR(psCreateSyncInfoModObjOUT->eError, psPerProc)
+    COMMIT_HANDLE_BATCH_OR_ERROR(psCreateSyncInfoModObjOUT->eError, psPerProc)
 
-	return 0;
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVDestroySyncInfoModObjBW(IMG_UINT32                                          ui32BridgeID,
-							  PVRSRV_BRIDGE_IN_DESTROY_SYNC_INFO_MOD_OBJ          *psDestroySyncInfoModObjIN,
-							  PVRSRV_BRIDGE_RETURN                                *psDestroySyncInfoModObjOUT,
-							  PVRSRV_PER_PROCESS_DATA				              *psPerProc)
+                              PVRSRV_BRIDGE_IN_DESTROY_SYNC_INFO_MOD_OBJ          *psDestroySyncInfoModObjIN,
+                              PVRSRV_BRIDGE_RETURN                                *psDestroySyncInfoModObjOUT,
+                              PVRSRV_PER_PROCESS_DATA                             *psPerProc)
 {
-	MODIFY_SYNC_OP_INFO		*psModSyncOpInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_DESTROY_SYNC_INFO_MOD_OBJ);
-
-	psDestroySyncInfoModObjOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-																	(IMG_VOID**)&psModSyncOpInfo,
-																	psDestroySyncInfoModObjIN->hKernelSyncInfoModObj,
-																	PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ);
-	if (psDestroySyncInfoModObjOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVDestroySyncInfoModObjBW: PVRSRVLookupHandle failed"));
-		return 0;
-	}
-
-	if(psModSyncOpInfo->psKernelSyncInfo != IMG_NULL)
-	{
-
-		psDestroySyncInfoModObjOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
-		return 0;
-	}
-
-	psDestroySyncInfoModObjOUT->eError = PVRSRVReleaseHandle(psPerProc->psHandleBase,
-																	 psDestroySyncInfoModObjIN->hKernelSyncInfoModObj,
-																	 PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ);
-
-	if (psDestroySyncInfoModObjOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVDestroySyncInfoModObjBW: PVRSRVReleaseHandle failed"));
-		return 0;
-	}
-
-	psDestroySyncInfoModObjOUT->eError = ResManFreeResByPtr(psModSyncOpInfo->hResItem);
-	if (psDestroySyncInfoModObjOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVDestroySyncInfoModObjBW: ResManFreeResByPtr failed"));
-		return 0;
-	}
-
-	return 0;
+    MODIFY_SYNC_OP_INFO     *psModSyncOpInfo;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_DESTROY_SYNC_INFO_MOD_OBJ);
+
+    psDestroySyncInfoModObjOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                                                    (IMG_VOID**)&psModSyncOpInfo,
+                                                                    psDestroySyncInfoModObjIN->hKernelSyncInfoModObj,
+                                                                    PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ);
+    if (psDestroySyncInfoModObjOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVDestroySyncInfoModObjBW: PVRSRVLookupHandle failed"));
+        return 0;
+    }
+
+    if(psModSyncOpInfo->psKernelSyncInfo != IMG_NULL)
+    {
+        
+        psDestroySyncInfoModObjOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
+        return 0;
+    }
+
+    psDestroySyncInfoModObjOUT->eError = PVRSRVReleaseHandle(psPerProc->psHandleBase,
+                                                                     psDestroySyncInfoModObjIN->hKernelSyncInfoModObj,
+                                                                     PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ);
+
+    if (psDestroySyncInfoModObjOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVDestroySyncInfoModObjBW: PVRSRVReleaseHandle failed"));
+        return 0;
+    }
+
+    psDestroySyncInfoModObjOUT->eError = ResManFreeResByPtr(psModSyncOpInfo->hResItem);
+    if (psDestroySyncInfoModObjOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVDestroySyncInfoModObjBW: ResManFreeResByPtr failed"));
+        return 0;
+    }
+
+    return 0;
 }
 
 
 static IMG_INT
-PVRSRVModifyPendingSyncOpsBW(IMG_UINT32									ui32BridgeID,
-						      PVRSRV_BRIDGE_IN_MODIFY_PENDING_SYNC_OPS	*psModifySyncOpsIN,
-							  PVRSRV_BRIDGE_OUT_MODIFY_PENDING_SYNC_OPS	*psModifySyncOpsOUT,
-							  PVRSRV_PER_PROCESS_DATA					*psPerProc)
+PVRSRVModifyPendingSyncOpsBW(IMG_UINT32                                 ui32BridgeID,
+                              PVRSRV_BRIDGE_IN_MODIFY_PENDING_SYNC_OPS  *psModifySyncOpsIN,
+                              PVRSRV_BRIDGE_OUT_MODIFY_PENDING_SYNC_OPS *psModifySyncOpsOUT,
+                              PVRSRV_PER_PROCESS_DATA                   *psPerProc)
 {
-	PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
-	MODIFY_SYNC_OP_INFO		*psModSyncOpInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MODIFY_PENDING_SYNC_OPS);
-
-	psModifySyncOpsOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-													(IMG_VOID**)&psModSyncOpInfo,
-													psModifySyncOpsIN->hKernelSyncInfoModObj,
-													PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ);
-	if (psModifySyncOpsOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVModifyPendingSyncOpsBW: PVRSRVLookupHandle failed"));
-		return 0;
-	}
-
-	psModifySyncOpsOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-													(IMG_VOID**)&psKernelSyncInfo,
-													psModifySyncOpsIN->hKernelSyncInfo,
-													PVRSRV_HANDLE_TYPE_SYNC_INFO);
-	if (psModifySyncOpsOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVModifyPendingSyncOpsBW: PVRSRVLookupHandle failed"));
-		return 0;
-	}
-
-	if(psModSyncOpInfo->psKernelSyncInfo)
-	{
-
-		psModifySyncOpsOUT->eError = PVRSRV_ERROR_RETRY;
-		PVR_DPF((PVR_DBG_VERBOSE, "PVRSRVModifyPendingSyncOpsBW: SyncInfo Modification object is not empty"));
-		return 0;
-	}
+    PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
+    MODIFY_SYNC_OP_INFO     *psModSyncOpInfo;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MODIFY_PENDING_SYNC_OPS);
+
+    psModifySyncOpsOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                                    (IMG_VOID**)&psModSyncOpInfo,
+                                                    psModifySyncOpsIN->hKernelSyncInfoModObj,
+                                                    PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ);
+    if (psModifySyncOpsOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVModifyPendingSyncOpsBW: PVRSRVLookupHandle failed"));
+        return 0;
+    }
+
+    psModifySyncOpsOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                                    (IMG_VOID**)&psKernelSyncInfo,
+                                                    psModifySyncOpsIN->hKernelSyncInfo,
+                                                    PVRSRV_HANDLE_TYPE_SYNC_INFO);
+    if (psModifySyncOpsOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVModifyPendingSyncOpsBW: PVRSRVLookupHandle failed"));
+        return 0;
+    }
+
+    if(psModSyncOpInfo->psKernelSyncInfo)
+    {
+        
+        psModifySyncOpsOUT->eError = PVRSRV_ERROR_RETRY;
+        PVR_DPF((PVR_DBG_VERBOSE, "PVRSRVModifyPendingSyncOpsBW: SyncInfo Modification object is not empty"));
+        return 0;
+    }
+
+    
+    psModSyncOpInfo->psKernelSyncInfo = psKernelSyncInfo;
+    psModSyncOpInfo->ui32ModifyFlags = psModifySyncOpsIN->ui32ModifyFlags;
+    psModSyncOpInfo->ui32ReadOpsPendingSnapShot = psKernelSyncInfo->psSyncData->ui32ReadOpsPending;
+    psModSyncOpInfo->ui32WriteOpsPendingSnapShot = psKernelSyncInfo->psSyncData->ui32WriteOpsPending;
+
+    
+
+    psModifySyncOpsOUT->ui32ReadOpsPending = psKernelSyncInfo->psSyncData->ui32ReadOpsPending;
+    psModifySyncOpsOUT->ui32WriteOpsPending = psKernelSyncInfo->psSyncData->ui32WriteOpsPending;
+
+    if(psModifySyncOpsIN->ui32ModifyFlags & PVRSRV_MODIFYSYNCOPS_FLAGS_WO_INC)
+    {
+        psKernelSyncInfo->psSyncData->ui32WriteOpsPending++;
+    }
+
+    if(psModifySyncOpsIN->ui32ModifyFlags & PVRSRV_MODIFYSYNCOPS_FLAGS_RO_INC)
+    {
+        psKernelSyncInfo->psSyncData->ui32ReadOpsPending++;
+    }
+
+    
+    psModifySyncOpsOUT->eError = ResManDissociateRes(psModSyncOpInfo->hResItem,
+                                                     psPerProc->hResManContext);
+
+    if (psModifySyncOpsOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVModifyPendingSyncOpsBW: PVRSRVLookupHandle failed"));
+        return 0;
+    }
+
+    return 0;
+}
 
 
-	psModSyncOpInfo->psKernelSyncInfo = psKernelSyncInfo;
-	psModSyncOpInfo->ui32ModifyFlags = psModifySyncOpsIN->ui32ModifyFlags;
-	psModSyncOpInfo->ui32ReadOpsPendingSnapShot = psKernelSyncInfo->psSyncData->ui32ReadOpsPending;
-	psModSyncOpInfo->ui32WriteOpsPendingSnapShot = psKernelSyncInfo->psSyncData->ui32WriteOpsPending;
+static IMG_INT
+PVRSRVModifyCompleteSyncOpsBW(IMG_UINT32                            ui32BridgeID,
+                      PVRSRV_BRIDGE_IN_MODIFY_COMPLETE_SYNC_OPS     *psModifySyncOpsIN,
+                      PVRSRV_BRIDGE_RETURN                          *psModifySyncOpsOUT,
+                      PVRSRV_PER_PROCESS_DATA                       *psPerProc)
+{
+    MODIFY_SYNC_OP_INFO     *psModSyncOpInfo;
 
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MODIFY_COMPLETE_SYNC_OPS);
 
+    psModifySyncOpsOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                                    (IMG_VOID**)&psModSyncOpInfo,
+                                                    psModifySyncOpsIN->hKernelSyncInfoModObj,
+                                                    PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ);
+    if (psModifySyncOpsOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVModifyCompleteSyncOpsBW: PVRSRVLookupHandle failed"));
+        return 0;
+    }
 
-	psModifySyncOpsOUT->ui32ReadOpsPending = psKernelSyncInfo->psSyncData->ui32ReadOpsPending;
-	psModifySyncOpsOUT->ui32WriteOpsPending = psKernelSyncInfo->psSyncData->ui32WriteOpsPending;
+    if(psModSyncOpInfo->psKernelSyncInfo == IMG_NULL)
+    {
+        
+        psModifySyncOpsOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
+        return 0;
+    }
 
-	if(psModifySyncOpsIN->ui32ModifyFlags & PVRSRV_MODIFYSYNCOPS_FLAGS_WO_INC)
-	{
-		psKernelSyncInfo->psSyncData->ui32WriteOpsPending++;
-	}
+    psModifySyncOpsOUT->eError = DoModifyCompleteSyncOps(psModSyncOpInfo);
 
-	if(psModifySyncOpsIN->ui32ModifyFlags & PVRSRV_MODIFYSYNCOPS_FLAGS_RO_INC)
-	{
-		psKernelSyncInfo->psSyncData->ui32ReadOpsPending++;
-	}
+    if (psModifySyncOpsOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVModifyCompleteSyncOpsBW: DoModifyCompleteSyncOps failed"));
+        return 0;
+    }
 
+    psModSyncOpInfo->psKernelSyncInfo = IMG_NULL;
 
-	psModifySyncOpsOUT->eError = ResManDissociateRes(psModSyncOpInfo->hResItem,
-													 psPerProc->hResManContext);
+    
+    PVRSRVScheduleDeviceCallbacks();
 
-	if (psModifySyncOpsOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVModifyPendingSyncOpsBW: PVRSRVLookupHandle failed"));
-		return 0;
-	}
-
-	return 0;
+    return 0;
 }
 
 
 static IMG_INT
-PVRSRVModifyCompleteSyncOpsBW(IMG_UINT32							ui32BridgeID,
-				      PVRSRV_BRIDGE_IN_MODIFY_COMPLETE_SYNC_OPS		*psModifySyncOpsIN,
-					  PVRSRV_BRIDGE_RETURN							*psModifySyncOpsOUT,
-					  PVRSRV_PER_PROCESS_DATA						*psPerProc)
+PVRSRVSyncOpsTakeTokenBW(IMG_UINT32                                 ui32BridgeID,
+                         PVRSRV_BRIDGE_IN_SYNC_OPS_TAKE_TOKEN       *psSyncOpsTakeTokenIN,
+                         PVRSRV_BRIDGE_OUT_SYNC_OPS_TAKE_TOKEN      *psSyncOpsTakeTokenOUT,
+                         PVRSRV_PER_PROCESS_DATA                    *psPerProc)
 {
-	MODIFY_SYNC_OP_INFO		*psModSyncOpInfo;
+    PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
 
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MODIFY_COMPLETE_SYNC_OPS);
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SYNC_OPS_TAKE_TOKEN);
 
-	psModifySyncOpsOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-													(IMG_VOID**)&psModSyncOpInfo,
-													psModifySyncOpsIN->hKernelSyncInfoModObj,
-													PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ);
-	if (psModifySyncOpsOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVModifyCompleteSyncOpsBW: PVRSRVLookupHandle failed"));
-		return 0;
-	}
+    psSyncOpsTakeTokenOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                                       (IMG_VOID**)&psKernelSyncInfo,
+                                                       psSyncOpsTakeTokenIN->hKernelSyncInfo,
+                                                       PVRSRV_HANDLE_TYPE_SYNC_INFO);
+    if (psSyncOpsTakeTokenOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVSyncOpsTakeTokenBW: PVRSRVLookupHandle failed"));
+        return 0;
+    }
 
-	if(psModSyncOpInfo->psKernelSyncInfo == IMG_NULL)
-	{
+    
 
-		psModifySyncOpsOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
-		return 0;
-	}
-
-	psModifySyncOpsOUT->eError = DoModifyCompleteSyncOps(psModSyncOpInfo);
-
-	if (psModifySyncOpsOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVModifyCompleteSyncOpsBW: DoModifyCompleteSyncOps failed"));
-		return 0;
-	}
-
-	psModSyncOpInfo->psKernelSyncInfo = IMG_NULL;
+    psSyncOpsTakeTokenOUT->ui32ReadOpsPending = psKernelSyncInfo->psSyncData->ui32ReadOpsPending;
+    psSyncOpsTakeTokenOUT->ui32WriteOpsPending = psKernelSyncInfo->psSyncData->ui32WriteOpsPending;
 
+    return 0;
+}
 
-	PVRSRVScheduleDeviceCallbacks();
 
-	return 0;
+static IMG_INT
+PVRSRVSyncOpsFlushToTokenBW(IMG_UINT32                                         ui32BridgeID,
+                            PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_TOKEN           *psSyncOpsFlushToTokenIN,
+                            PVRSRV_BRIDGE_RETURN                               *psSyncOpsFlushToTokenOUT,
+                            PVRSRV_PER_PROCESS_DATA                            *psPerProc)
+{
+    PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
+    IMG_UINT32 ui32ReadOpsPendingSnapshot;
+    IMG_UINT32 ui32WriteOpsPendingSnapshot;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_TOKEN);
+
+    psSyncOpsFlushToTokenOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                                          (IMG_VOID**)&psKernelSyncInfo,
+                                                          psSyncOpsFlushToTokenIN->hKernelSyncInfo,
+                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
+    if (psSyncOpsFlushToTokenOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVSyncOpsFlushToTokenBW: PVRSRVLookupHandle failed"));
+        return 0;
+    }
+
+    ui32ReadOpsPendingSnapshot = psSyncOpsFlushToTokenIN->ui32ReadOpsPendingSnapshot;
+    ui32WriteOpsPendingSnapshot = psSyncOpsFlushToTokenIN->ui32WriteOpsPendingSnapshot;
+
+    psSyncOpsFlushToTokenOUT->eError = DoQuerySyncOpsSatisfied(psKernelSyncInfo,
+                                                               ui32ReadOpsPendingSnapshot,
+                                                               ui32WriteOpsPendingSnapshot);
+
+    if (psSyncOpsFlushToTokenOUT->eError != PVRSRV_OK && psSyncOpsFlushToTokenOUT->eError != PVRSRV_ERROR_RETRY)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVSyncOpsFlushToTokenBW: DoQuerySyncOpsSatisfied failed"));
+        return 0;
+    }
+
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVSyncOpsFlushToModObjBW(IMG_UINT32                                         ui32BridgeID,
-							 PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_MOD_OBJ		    *psSyncOpsFlushToModObjIN,
-							 PVRSRV_BRIDGE_RETURN						        *psSyncOpsFlushToModObjOUT,
-							 PVRSRV_PER_PROCESS_DATA				            *psPerProc)
+                             PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_MOD_OBJ         *psSyncOpsFlushToModObjIN,
+                             PVRSRV_BRIDGE_RETURN                               *psSyncOpsFlushToModObjOUT,
+                             PVRSRV_PER_PROCESS_DATA                            *psPerProc)
 {
-	MODIFY_SYNC_OP_INFO		*psModSyncOpInfo;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_MOD_OBJ);
-
-	psSyncOpsFlushToModObjOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-														   (IMG_VOID**)&psModSyncOpInfo,
-														   psSyncOpsFlushToModObjIN->hKernelSyncInfoModObj,
-														   PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ);
-	if (psSyncOpsFlushToModObjOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVSyncOpsFlushToModObjBW: PVRSRVLookupHandle failed"));
-		return 0;
-	}
-
-	if(psModSyncOpInfo->psKernelSyncInfo == IMG_NULL)
-	{
-
-		psSyncOpsFlushToModObjOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
-		return 0;
-	}
-
-	psSyncOpsFlushToModObjOUT->eError = DoQuerySyncOpsSatisfied(psModSyncOpInfo);
-
-	if (psSyncOpsFlushToModObjOUT->eError != PVRSRV_OK && psSyncOpsFlushToModObjOUT->eError != PVRSRV_ERROR_RETRY)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVSyncOpsFlushToModObjBW: DoQuerySyncOpsSatisfied failed"));
-		return 0;
-	}
-
-	return 0;
+    MODIFY_SYNC_OP_INFO     *psModSyncOpInfo;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_MOD_OBJ);
+
+    psSyncOpsFlushToModObjOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                                           (IMG_VOID**)&psModSyncOpInfo,
+                                                           psSyncOpsFlushToModObjIN->hKernelSyncInfoModObj,
+                                                           PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ);
+    if (psSyncOpsFlushToModObjOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVSyncOpsFlushToModObjBW: PVRSRVLookupHandle failed"));
+        return 0;
+    }
+
+    if(psModSyncOpInfo->psKernelSyncInfo == IMG_NULL)
+    {
+        
+        psSyncOpsFlushToModObjOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
+        return 0;
+    }
+
+    psSyncOpsFlushToModObjOUT->eError = DoQuerySyncOpsSatisfied(psModSyncOpInfo->psKernelSyncInfo,
+                                                                psModSyncOpInfo->ui32ReadOpsPendingSnapShot,
+                                                                psModSyncOpInfo->ui32WriteOpsPendingSnapShot);
+
+    if (psSyncOpsFlushToModObjOUT->eError != PVRSRV_OK && psSyncOpsFlushToModObjOUT->eError != PVRSRV_ERROR_RETRY)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVSyncOpsFlushToModObjBW: DoQuerySyncOpsSatisfied failed"));
+        return 0;
+    }
+
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVSyncOpsFlushToDeltaBW(IMG_UINT32                                         ui32BridgeID,
-							PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_DELTA		   *psSyncOpsFlushToDeltaIN,
-							PVRSRV_BRIDGE_RETURN						       *psSyncOpsFlushToDeltaOUT,
-							PVRSRV_PER_PROCESS_DATA				               *psPerProc)
+                            PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_DELTA           *psSyncOpsFlushToDeltaIN,
+                            PVRSRV_BRIDGE_RETURN                               *psSyncOpsFlushToDeltaOUT,
+                            PVRSRV_PER_PROCESS_DATA                            *psPerProc)
 {
-	PVRSRV_KERNEL_SYNC_INFO		*psSyncInfo;
-	IMG_UINT32 ui32DeltaRead;
-	IMG_UINT32 ui32DeltaWrite;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_DELTA);
-
-	psSyncOpsFlushToDeltaOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-														  (IMG_VOID**)&psSyncInfo,
-														  psSyncOpsFlushToDeltaIN->hKernelSyncInfo,
-														  PVRSRV_HANDLE_TYPE_SYNC_INFO);
-	if (psSyncOpsFlushToDeltaOUT->eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVSyncOpsFlushToDeltaBW: PVRSRVLookupHandle failed"));
-		return 0;
-	}
-
-	ui32DeltaRead = psSyncInfo->psSyncData->ui32ReadOpsPending - psSyncInfo->psSyncData->ui32ReadOpsComplete;
-	ui32DeltaWrite = psSyncInfo->psSyncData->ui32WriteOpsPending - psSyncInfo->psSyncData->ui32WriteOpsComplete;
+    PVRSRV_KERNEL_SYNC_INFO     *psSyncInfo;
+    IMG_UINT32 ui32DeltaRead;
+    IMG_UINT32 ui32DeltaWrite;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_DELTA);
+
+    psSyncOpsFlushToDeltaOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                                          (IMG_VOID**)&psSyncInfo,
+                                                          psSyncOpsFlushToDeltaIN->hKernelSyncInfo,
+                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
+    if (psSyncOpsFlushToDeltaOUT->eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVSyncOpsFlushToDeltaBW: PVRSRVLookupHandle failed"));
+        return 0;
+    }
+
+    
+    ui32DeltaRead = psSyncInfo->psSyncData->ui32ReadOpsPending - psSyncInfo->psSyncData->ui32ReadOpsComplete;
+    ui32DeltaWrite = psSyncInfo->psSyncData->ui32WriteOpsPending - psSyncInfo->psSyncData->ui32WriteOpsComplete;
+
+    if (ui32DeltaRead <= psSyncOpsFlushToDeltaIN->ui32Delta && ui32DeltaWrite <= psSyncOpsFlushToDeltaIN->ui32Delta)
+    {
+#if defined(PDUMP) && !defined(SUPPORT_VGX)
+        
+        PDumpComment("Poll for read ops complete to delta (%u)",
+                     psSyncOpsFlushToDeltaIN->ui32Delta);
+        psSyncOpsFlushToDeltaOUT->eError =
+            PDumpMemPolKM(psSyncInfo->psSyncDataMemInfoKM,
+                          offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete),
+                          psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
+                          0xFFFFFFFF,
+                          PDUMP_POLL_OPERATOR_GREATEREQUAL,
+                          0,
+                          MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
+
+        
+        PDumpComment("Poll for write ops complete to delta (%u)",
+                     psSyncOpsFlushToDeltaIN->ui32Delta);
+        psSyncOpsFlushToDeltaOUT->eError =
+            PDumpMemPolKM(psSyncInfo->psSyncDataMemInfoKM,
+                          offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete),
+                          psSyncInfo->psSyncData->ui32LastOpDumpVal,
+                          0xFFFFFFFF,
+                          PDUMP_POLL_OPERATOR_GREATEREQUAL,
+                          0,
+                          MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
+#endif
 
-	if (ui32DeltaRead <= psSyncOpsFlushToDeltaIN->ui32Delta && ui32DeltaWrite <= psSyncOpsFlushToDeltaIN->ui32Delta)
-	{
-#if defined(PDUMP)
-		IMG_UINT32 ui32MinimumReadOpsComplete;
-
-		ui32MinimumReadOpsComplete = psSyncInfo->psSyncData->ui32ReadOpsPending;
-		if (ui32MinimumReadOpsComplete < psSyncOpsFlushToDeltaIN->ui32Delta)
-		{
-			ui32MinimumReadOpsComplete = 0;
-		}
-		else
-		{
-			ui32MinimumReadOpsComplete = ui32MinimumReadOpsComplete - psSyncOpsFlushToDeltaIN->ui32Delta;
-		}
-
-
-		PDumpComment("Poll for read ops complete to delta (%u)",
-					 psSyncOpsFlushToDeltaIN->ui32Delta);
-		psSyncOpsFlushToDeltaOUT->eError =
-			PDumpMemPolKM(psSyncInfo->psSyncDataMemInfoKM,
-						  offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete),
-						  psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
-						  0xFFFFFFFF,
-						  PDUMP_POLL_OPERATOR_GREATEREQUAL,
-						  0,
-						  MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
-
-
-		PDumpComment("Poll for write ops complete to delta (%u)",
-					 psSyncOpsFlushToDeltaIN->ui32Delta);
-		psSyncOpsFlushToDeltaOUT->eError =
-			PDumpMemPolKM(psSyncInfo->psSyncDataMemInfoKM,
-						  offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete),
-						  psSyncInfo->psSyncData->ui32LastOpDumpVal,
-						  0xFFFFFFFF,
-						  PDUMP_POLL_OPERATOR_GREATEREQUAL,
-						  0,
-						  MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
-#endif
-
-		psSyncOpsFlushToDeltaOUT->eError = PVRSRV_OK;
-	}
-	else
-	{
-		psSyncOpsFlushToDeltaOUT->eError = PVRSRV_ERROR_RETRY;
-	}
+        psSyncOpsFlushToDeltaOUT->eError = PVRSRV_OK;
+    }
+    else
+    {
+        psSyncOpsFlushToDeltaOUT->eError = PVRSRV_ERROR_RETRY;
+    }
 
-	return 0;
+    return 0;
 }
 
 
 static PVRSRV_ERROR
-FreeSyncInfoCallback(IMG_PVOID	pvParam,
-					 IMG_UINT32	ui32Param)
+FreeSyncInfoCallback(IMG_PVOID  pvParam,
+                     IMG_UINT32 ui32Param)
 {
-	PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
-	PVRSRV_ERROR eError;
+    PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
+    PVRSRV_ERROR eError;
 
-	PVR_UNREFERENCED_PARAMETER(ui32Param);
+    PVR_UNREFERENCED_PARAMETER(ui32Param);
 
-	psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)pvParam;
+    psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)pvParam;
 
-	eError = PVRSRVFreeSyncInfoKM(psSyncInfo);
-	if (eError != PVRSRV_OK)
-	{
-		return eError;
-	}
+    eError = PVRSRVFreeSyncInfoKM(psSyncInfo);
+    if (eError != PVRSRV_OK)
+    {
+        return eError;
+    }
 
-	return PVRSRV_OK;
+    return PVRSRV_OK;
 }
 
 
 static IMG_INT
 PVRSRVAllocSyncInfoBW(IMG_UINT32                                         ui32BridgeID,
-					  PVRSRV_BRIDGE_IN_ALLOC_SYNC_INFO                  *psAllocSyncInfoIN,
-					  PVRSRV_BRIDGE_OUT_ALLOC_SYNC_INFO                 *psAllocSyncInfoOUT,
-					  PVRSRV_PER_PROCESS_DATA				            *psPerProc)
+                      PVRSRV_BRIDGE_IN_ALLOC_SYNC_INFO                  *psAllocSyncInfoIN,
+                      PVRSRV_BRIDGE_OUT_ALLOC_SYNC_INFO                 *psAllocSyncInfoOUT,
+                      PVRSRV_PER_PROCESS_DATA                           *psPerProc)
 {
-	PVRSRV_KERNEL_SYNC_INFO		*psSyncInfo;
-	PVRSRV_ERROR eError;
-	PVRSRV_DEVICE_NODE *psDeviceNode;
-	IMG_HANDLE hDevMemContext;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ALLOC_SYNC_INFO);
-
-	NEW_HANDLE_BATCH_OR_ERROR(psAllocSyncInfoOUT->eError, psPerProc, 1)
-
-	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-								(IMG_HANDLE *)&psDeviceNode,
-								psAllocSyncInfoIN->hDevCookie,
-								PVRSRV_HANDLE_TYPE_DEV_NODE);
-	if(eError != PVRSRV_OK)
-	{
-		goto allocsyncinfo_errorexit;
-	}
-
-	hDevMemContext = psDeviceNode->sDevMemoryInfo.pBMKernelContext;
-
-	eError = PVRSRVAllocSyncInfoKM(psDeviceNode,
-								   hDevMemContext,
-								   &psSyncInfo);
-
-	if (eError != PVRSRV_OK)
-	{
-		goto allocsyncinfo_errorexit;
-	}
-
-	eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
-							   &psAllocSyncInfoOUT->hKernelSyncInfo,
-							   psSyncInfo,
-							   PVRSRV_HANDLE_TYPE_SYNC_INFO,
-							   PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE);
-
-	if(eError != PVRSRV_OK)
-	{
-		goto allocsyncinfo_errorexit_freesyncinfo;
-	}
-
-	psSyncInfo->hResItem = ResManRegisterRes(psPerProc->hResManContext,
-											   RESMAN_TYPE_SYNC_INFO,
-											   psSyncInfo,
-											   0,
-											   FreeSyncInfoCallback);
-
-
-	goto allocsyncinfo_commit;
-
-
+    PVRSRV_KERNEL_SYNC_INFO     *psSyncInfo;
+    PVRSRV_ERROR eError;
+    PVRSRV_DEVICE_NODE *psDeviceNode;
+    IMG_HANDLE hDevMemContext;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_ALLOC_SYNC_INFO);
+
+    NEW_HANDLE_BATCH_OR_ERROR(psAllocSyncInfoOUT->eError, psPerProc, 1)
+
+    eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                (IMG_HANDLE *)&psDeviceNode,
+                                psAllocSyncInfoIN->hDevCookie,
+                                PVRSRV_HANDLE_TYPE_DEV_NODE);
+    if(eError != PVRSRV_OK)
+    {
+        goto allocsyncinfo_errorexit;
+    }
+
+    hDevMemContext = psDeviceNode->sDevMemoryInfo.pBMKernelContext;
+
+    eError = PVRSRVAllocSyncInfoKM(psDeviceNode,
+                                   hDevMemContext,
+                                   &psSyncInfo);
+
+    if (eError != PVRSRV_OK)
+    {
+        goto allocsyncinfo_errorexit;
+    }
+
+    eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
+                               &psAllocSyncInfoOUT->hKernelSyncInfo,
+                               psSyncInfo,
+                               PVRSRV_HANDLE_TYPE_SYNC_INFO,
+                               PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE);
+
+    if(eError != PVRSRV_OK)
+    {
+        goto allocsyncinfo_errorexit_freesyncinfo;
+    }
+
+    psSyncInfo->hResItem = ResManRegisterRes(psPerProc->hResManContext,
+                                               RESMAN_TYPE_SYNC_INFO,
+                                               psSyncInfo,
+                                               0,
+                                               FreeSyncInfoCallback);
+
+    
+    goto allocsyncinfo_commit;
+
+    
  allocsyncinfo_errorexit_freesyncinfo:
-	PVRSRVFreeSyncInfoKM(psSyncInfo);
+    PVRSRVFreeSyncInfoKM(psSyncInfo);
 
  allocsyncinfo_errorexit:
 
-
+    
  allocsyncinfo_commit:
-	psAllocSyncInfoOUT->eError = eError;
-	COMMIT_HANDLE_BATCH_OR_ERROR(eError, psPerProc);
+    psAllocSyncInfoOUT->eError = eError;
+    COMMIT_HANDLE_BATCH_OR_ERROR(eError, psPerProc);
 
-	return 0;
+    return 0;
 }
 
 
 static IMG_INT
 PVRSRVFreeSyncInfoBW(IMG_UINT32                                          ui32BridgeID,
-					 PVRSRV_BRIDGE_IN_FREE_SYNC_INFO                     *psFreeSyncInfoIN,
-					 PVRSRV_BRIDGE_RETURN                                *psFreeSyncInfoOUT,
-					 PVRSRV_PER_PROCESS_DATA				             *psPerProc)
+                     PVRSRV_BRIDGE_IN_FREE_SYNC_INFO                     *psFreeSyncInfoIN,
+                     PVRSRV_BRIDGE_RETURN                                *psFreeSyncInfoOUT,
+                     PVRSRV_PER_PROCESS_DATA                             *psPerProc)
 {
-	PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
-	PVRSRV_ERROR eError;
-
-	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_FREE_SYNC_INFO);
-
-	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-								(IMG_VOID**)&psSyncInfo,
-								psFreeSyncInfoIN->hKernelSyncInfo,
-								PVRSRV_HANDLE_TYPE_SYNC_INFO);
-	if (eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVFreeSyncInfoBW: PVRSRVLookupHandle failed"));
-		psFreeSyncInfoOUT->eError = eError;
-		return 0;
-	}
-
-	eError = PVRSRVReleaseHandle(psPerProc->psHandleBase,
-								 psFreeSyncInfoIN->hKernelSyncInfo,
-								 PVRSRV_HANDLE_TYPE_SYNC_INFO);
-
-	if (eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVFreeSyncInfoBW: PVRSRVReleaseHandle failed"));
-		psFreeSyncInfoOUT->eError = eError;
-		return 0;
-	}
-
-	eError = ResManFreeResByPtr(psSyncInfo->hResItem);
-	if (eError != PVRSRV_OK)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "PVRSRVFreeSyncInfoBW: ResManFreeResByPtr failed"));
-		psFreeSyncInfoOUT->eError = eError;
-		return 0;
-	}
-
-	return 0;
+    PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
+    PVRSRV_ERROR eError;
+
+    PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_FREE_SYNC_INFO);
+
+    eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+                                (IMG_VOID**)&psSyncInfo,
+                                psFreeSyncInfoIN->hKernelSyncInfo,
+                                PVRSRV_HANDLE_TYPE_SYNC_INFO);
+    if (eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVFreeSyncInfoBW: PVRSRVLookupHandle failed"));
+        psFreeSyncInfoOUT->eError = eError;
+        return 0;
+    }
+
+    eError = PVRSRVReleaseHandle(psPerProc->psHandleBase,
+                                 psFreeSyncInfoIN->hKernelSyncInfo,
+                                 PVRSRV_HANDLE_TYPE_SYNC_INFO);
+
+    if (eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVFreeSyncInfoBW: PVRSRVReleaseHandle failed"));
+        psFreeSyncInfoOUT->eError = eError;
+        return 0;
+    }
+
+    eError = ResManFreeResByPtr(psSyncInfo->hResItem);
+    if (eError != PVRSRV_OK)
+    {
+        PVR_DPF((PVR_DBG_ERROR, "PVRSRVFreeSyncInfoBW: ResManFreeResByPtr failed"));
+        psFreeSyncInfoOUT->eError = eError;
+        return 0;
+    }
+
+    return 0;
 }
 
 
 PVRSRV_ERROR
 CommonBridgeInit(IMG_VOID)
 {
-	IMG_UINT32 i;
-
-	SetDispatchTableEntry(PVRSRV_BRIDGE_ENUM_DEVICES, PVRSRVEnumerateDevicesBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_ACQUIRE_DEVICEINFO, PVRSRVAcquireDeviceDataBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_RELEASE_DEVICEINFO, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_CREATE_DEVMEMCONTEXT, PVRSRVCreateDeviceMemContextBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_DESTROY_DEVMEMCONTEXT, PVRSRVDestroyDeviceMemContextBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GET_DEVMEM_HEAPINFO, PVRSRVGetDeviceMemHeapInfoBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_ALLOC_DEVICEMEM, PVRSRVAllocDeviceMemBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_FREE_DEVICEMEM, PVRSRVFreeDeviceMemBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GETFREE_DEVICEMEM, PVRSRVGetFreeDeviceMemBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_CREATE_COMMANDQUEUE, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_DESTROY_COMMANDQUEUE, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_MHANDLE_TO_MMAP_DATA, PVRMMapOSMemHandleToMMapDataBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_CONNECT_SERVICES, PVRSRVConnectBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_DISCONNECT_SERVICES, PVRSRVDisconnectBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_WRAP_DEVICE_MEM, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GET_DEVICEMEMINFO, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_RESERVE_DEV_VIRTMEM	, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_FREE_DEV_VIRTMEM, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_MAP_EXT_MEMORY, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_UNMAP_EXT_MEMORY, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_MAP_DEV_MEMORY, PVRSRVMapDeviceMemoryBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_UNMAP_DEV_MEMORY, PVRSRVUnmapDeviceMemoryBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_MAP_DEVICECLASS_MEMORY, PVRSRVMapDeviceClassMemoryBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_UNMAP_DEVICECLASS_MEMORY, PVRSRVUnmapDeviceClassMemoryBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_MAP_MEM_INFO_TO_USER, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_UNMAP_MEM_INFO_FROM_USER, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_EXPORT_DEVICEMEM, PVRSRVExportDeviceMemBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_RELEASE_MMAP_DATA, PVRMMapReleaseMMapDataBW);
-
-
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PROCESS_SIMISR_EVENT, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_REGISTER_SIM_PROCESS, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_UNREGISTER_SIM_PROCESS, DummyBW);
-
-
-	SetDispatchTableEntry(PVRSRV_BRIDGE_MAPPHYSTOUSERSPACE, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_UNMAPPHYSTOUSERSPACE, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GETPHYSTOUSERSPACEMAP, DummyBW);
-
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GET_FB_STATS, DummyBW);
-
-
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GET_MISC_INFO, PVRSRVGetMiscInfoBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_RELEASE_MISC_INFO, DummyBW);
-
-
+    IMG_UINT32 i;
+
+    SetDispatchTableEntry(PVRSRV_BRIDGE_ENUM_DEVICES, PVRSRVEnumerateDevicesBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_ACQUIRE_DEVICEINFO, PVRSRVAcquireDeviceDataBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_RELEASE_DEVICEINFO, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_CREATE_DEVMEMCONTEXT, PVRSRVCreateDeviceMemContextBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_DESTROY_DEVMEMCONTEXT, PVRSRVDestroyDeviceMemContextBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GET_DEVMEM_HEAPINFO, PVRSRVGetDeviceMemHeapInfoBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_ALLOC_DEVICEMEM, PVRSRVAllocDeviceMemBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_FREE_DEVICEMEM, PVRSRVFreeDeviceMemBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GETFREE_DEVICEMEM, PVRSRVGetFreeDeviceMemBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_CREATE_COMMANDQUEUE, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_DESTROY_COMMANDQUEUE, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_MHANDLE_TO_MMAP_DATA, PVRMMapOSMemHandleToMMapDataBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_CONNECT_SERVICES, PVRSRVConnectBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_DISCONNECT_SERVICES, PVRSRVDisconnectBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_WRAP_DEVICE_MEM, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GET_DEVICEMEMINFO, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_RESERVE_DEV_VIRTMEM , DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_FREE_DEV_VIRTMEM, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_MAP_EXT_MEMORY, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_UNMAP_EXT_MEMORY, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_MAP_DEV_MEMORY, PVRSRVMapDeviceMemoryBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_UNMAP_DEV_MEMORY, PVRSRVUnmapDeviceMemoryBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_MAP_DEVICECLASS_MEMORY, PVRSRVMapDeviceClassMemoryBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_UNMAP_DEVICECLASS_MEMORY, PVRSRVUnmapDeviceClassMemoryBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_MAP_MEM_INFO_TO_USER, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_UNMAP_MEM_INFO_FROM_USER, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_EXPORT_DEVICEMEM, PVRSRVExportDeviceMemBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_RELEASE_MMAP_DATA, PVRMMapReleaseMMapDataBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_CHG_DEV_MEM_ATTRIBS, PVRSRVChangeDeviceMemoryAttributesBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_MAP_DEV_MEMORY_2, PVRSRVMapDeviceMemoryBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_EXPORT_DEVICEMEM_2, PVRSRVExportDeviceMemBW);
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PROCESS_SIMISR_EVENT, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_REGISTER_SIM_PROCESS, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_UNREGISTER_SIM_PROCESS, DummyBW);
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_MAPPHYSTOUSERSPACE, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_UNMAPPHYSTOUSERSPACE, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GETPHYSTOUSERSPACEMAP, DummyBW);
+
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GET_FB_STATS, DummyBW);
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GET_MISC_INFO, PVRSRVGetMiscInfoBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_RELEASE_MISC_INFO, DummyBW);
+
+    
 #if defined (SUPPORT_OVERLAY_ROTATE_BLIT)
-	SetDispatchTableEntry(PVRSRV_BRIDGE_INIT_3D_OVL_BLT_RES, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_DEINIT_3D_OVL_BLT_RES, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_INIT_3D_OVL_BLT_RES, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_DEINIT_3D_OVL_BLT_RES, DummyBW);
 #endif
 
 
-
+    
 #if defined(PDUMP)
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_INIT, DummyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_MEMPOL, PDumpMemPolBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DUMPMEM, PDumpMemBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_REG, PDumpRegWithFlagsBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_REGPOL, PDumpRegPolBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_COMMENT, PDumpCommentBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_SETFRAME, PDumpSetFrameBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_ISCAPTURING, PDumpIsCaptureFrameBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DUMPBITMAP, PDumpBitmapBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DUMPREADREG, PDumpReadRegBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_SYNCPOL, PDumpSyncPolBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DUMPSYNC, PDumpSyncDumpBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DRIVERINFO, PDumpDriverInfoBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DUMPPDDEVPADDR, PDumpPDDevPAddrBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_CYCLE_COUNT_REG_READ, PDumpCycleCountRegReadBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_STARTINITPHASE, PDumpStartInitPhaseBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_STOPINITPHASE, PDumpStopInitPhaseBW);
-#endif
-
-
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GET_OEMJTABLE, DummyBW);
-
-
-	SetDispatchTableEntry(PVRSRV_BRIDGE_ENUM_CLASS, PVRSRVEnumerateDCBW);
-
-
-	SetDispatchTableEntry(PVRSRV_BRIDGE_OPEN_DISPCLASS_DEVICE, PVRSRVOpenDCDeviceBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_CLOSE_DISPCLASS_DEVICE, PVRSRVCloseDCDeviceBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_ENUM_DISPCLASS_FORMATS, PVRSRVEnumDCFormatsBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_ENUM_DISPCLASS_DIMS, PVRSRVEnumDCDimsBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GET_DISPCLASS_SYSBUFFER, PVRSRVGetDCSystemBufferBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GET_DISPCLASS_INFO, PVRSRVGetDCInfoBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_CREATE_DISPCLASS_SWAPCHAIN, PVRSRVCreateDCSwapChainBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_DESTROY_DISPCLASS_SWAPCHAIN, PVRSRVDestroyDCSwapChainBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_SET_DISPCLASS_DSTRECT, PVRSRVSetDCDstRectBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_SET_DISPCLASS_SRCRECT, PVRSRVSetDCSrcRectBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_SET_DISPCLASS_DSTCOLOURKEY, PVRSRVSetDCDstColourKeyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_SET_DISPCLASS_SRCCOLOURKEY, PVRSRVSetDCSrcColourKeyBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GET_DISPCLASS_BUFFERS, PVRSRVGetDCBuffersBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER, PVRSRVSwapToDCBufferBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_SYSTEM, PVRSRVSwapToDCSystemBW);
-
-	
-	SetDispatchTableEntry(PVRSRV_BRIDGE_OPEN_BUFFERCLASS_DEVICE, PVRSRVOpenBCDeviceBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_CLOSE_BUFFERCLASS_DEVICE, PVRSRVCloseBCDeviceBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GET_BUFFERCLASS_INFO, PVRSRVGetBCInfoBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GET_BUFFERCLASS_BUFFER, PVRSRVGetBCBufferBW);
-
-	
-	SetDispatchTableEntry(PVRSRV_BRIDGE_WRAP_EXT_MEMORY, PVRSRVWrapExtMemoryBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_UNWRAP_EXT_MEMORY, PVRSRVUnwrapExtMemoryBW);
-
-	
-	SetDispatchTableEntry(PVRSRV_BRIDGE_ALLOC_SHARED_SYS_MEM, PVRSRVAllocSharedSysMemoryBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_FREE_SHARED_SYS_MEM, PVRSRVFreeSharedSysMemoryBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_MAP_MEMINFO_MEM, PVRSRVMapMemInfoMemBW);
-
-	
-	SetDispatchTableEntry(PVRSRV_BRIDGE_GETMMU_PD_DEVPADDR, MMU_GetPDDevPAddrBW);
-
-	
-	SetDispatchTableEntry(PVRSRV_BRIDGE_INITSRV_CONNECT,	&PVRSRVInitSrvConnectBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_INITSRV_DISCONNECT, &PVRSRVInitSrvDisconnectBW);
-
-	
-	SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_WAIT,	&PVRSRVEventObjectWaitBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_OPEN,	&PVRSRVEventObjectOpenBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE, &PVRSRVEventObjectCloseBW);
-
-	SetDispatchTableEntry(PVRSRV_BRIDGE_CREATE_SYNC_INFO_MOD_OBJ, PVRSRVCreateSyncInfoModObjBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_DESTROY_SYNC_INFO_MOD_OBJ, PVRSRVDestroySyncInfoModObjBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_MODIFY_PENDING_SYNC_OPS, PVRSRVModifyPendingSyncOpsBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_MODIFY_COMPLETE_SYNC_OPS, PVRSRVModifyCompleteSyncOpsBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_MOD_OBJ, PVRSRVSyncOpsFlushToModObjBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_DELTA, PVRSRVSyncOpsFlushToDeltaBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_ALLOC_SYNC_INFO, PVRSRVAllocSyncInfoBW);
-	SetDispatchTableEntry(PVRSRV_BRIDGE_FREE_SYNC_INFO, PVRSRVFreeSyncInfoBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_INIT, DummyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_MEMPOL, PDumpMemPolBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DUMPMEM, PDumpMemBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_REG, PDumpRegWithFlagsBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_REGPOL, PDumpRegPolBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_COMMENT, PDumpCommentBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_SETFRAME, PDumpSetFrameBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_ISCAPTURING, PDumpIsCaptureFrameBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DUMPBITMAP, PDumpBitmapBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DUMPREADREG, PDumpReadRegBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_SYNCPOL, PDumpSyncPolBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DUMPSYNC, PDumpSyncDumpBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_MEMPAGES, PDumpMemPagesBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DRIVERINFO, PDumpDriverInfoBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_DUMPPDDEVPADDR, PDumpPDDevPAddrBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_CYCLE_COUNT_REG_READ, PDumpCycleCountRegReadBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_STARTINITPHASE, PDumpStartInitPhaseBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_PDUMP_STOPINITPHASE, PDumpStopInitPhaseBW);
+#endif 
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GET_OEMJTABLE, DummyBW);
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_ENUM_CLASS, PVRSRVEnumerateDCBW);
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_OPEN_DISPCLASS_DEVICE, PVRSRVOpenDCDeviceBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_CLOSE_DISPCLASS_DEVICE, PVRSRVCloseDCDeviceBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_ENUM_DISPCLASS_FORMATS, PVRSRVEnumDCFormatsBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_ENUM_DISPCLASS_DIMS, PVRSRVEnumDCDimsBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GET_DISPCLASS_SYSBUFFER, PVRSRVGetDCSystemBufferBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GET_DISPCLASS_INFO, PVRSRVGetDCInfoBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_CREATE_DISPCLASS_SWAPCHAIN, PVRSRVCreateDCSwapChainBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_DESTROY_DISPCLASS_SWAPCHAIN, PVRSRVDestroyDCSwapChainBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_SET_DISPCLASS_DSTRECT, PVRSRVSetDCDstRectBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_SET_DISPCLASS_SRCRECT, PVRSRVSetDCSrcRectBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_SET_DISPCLASS_DSTCOLOURKEY, PVRSRVSetDCDstColourKeyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_SET_DISPCLASS_SRCCOLOURKEY, PVRSRVSetDCSrcColourKeyBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GET_DISPCLASS_BUFFERS, PVRSRVGetDCBuffersBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER, PVRSRVSwapToDCBufferBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_SYSTEM, PVRSRVSwapToDCSystemBW);
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_OPEN_BUFFERCLASS_DEVICE, PVRSRVOpenBCDeviceBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_CLOSE_BUFFERCLASS_DEVICE, PVRSRVCloseBCDeviceBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GET_BUFFERCLASS_INFO, PVRSRVGetBCInfoBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GET_BUFFERCLASS_BUFFER, PVRSRVGetBCBufferBW);
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_WRAP_EXT_MEMORY, PVRSRVWrapExtMemoryBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_UNWRAP_EXT_MEMORY, PVRSRVUnwrapExtMemoryBW);
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_ALLOC_SHARED_SYS_MEM, PVRSRVAllocSharedSysMemoryBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_FREE_SHARED_SYS_MEM, PVRSRVFreeSharedSysMemoryBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_MAP_MEMINFO_MEM, PVRSRVMapMemInfoMemBW);
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_GETMMU_PD_DEVPADDR, MMU_GetPDDevPAddrBW);
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_INITSRV_CONNECT,    &PVRSRVInitSrvConnectBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_INITSRV_DISCONNECT, &PVRSRVInitSrvDisconnectBW);
+
+    
+    SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_WAIT,  &PVRSRVEventObjectWaitBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_OPEN,  &PVRSRVEventObjectOpenBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE, &PVRSRVEventObjectCloseBW);
+
+    SetDispatchTableEntry(PVRSRV_BRIDGE_CREATE_SYNC_INFO_MOD_OBJ, PVRSRVCreateSyncInfoModObjBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_DESTROY_SYNC_INFO_MOD_OBJ, PVRSRVDestroySyncInfoModObjBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_MODIFY_PENDING_SYNC_OPS, PVRSRVModifyPendingSyncOpsBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_MODIFY_COMPLETE_SYNC_OPS, PVRSRVModifyCompleteSyncOpsBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_SYNC_OPS_TAKE_TOKEN, PVRSRVSyncOpsTakeTokenBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_TOKEN, PVRSRVSyncOpsFlushToTokenBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_MOD_OBJ, PVRSRVSyncOpsFlushToModObjBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_DELTA, PVRSRVSyncOpsFlushToDeltaBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_ALLOC_SYNC_INFO, PVRSRVAllocSyncInfoBW);
+    SetDispatchTableEntry(PVRSRV_BRIDGE_FREE_SYNC_INFO, PVRSRVFreeSyncInfoBW);
 
 #if defined (SUPPORT_SGX)
-	SetSGXDispatchTableEntry();
+    SetSGXDispatchTableEntry();
 #endif
 #if defined (SUPPORT_VGX)
-	SetVGXDispatchTableEntry();
+    SetVGXDispatchTableEntry();
 #endif
 #if defined (SUPPORT_MSVDX)
-	SetMSVDXDispatchTableEntry();
+    SetMSVDXDispatchTableEntry();
 #endif
 
 
-	
-	
-	for(i=0;i<BRIDGE_DISPATCH_TABLE_ENTRY_COUNT;i++)
-	{
-		if(!g_BridgeDispatchTable[i].pfFunction)
-		{
-			g_BridgeDispatchTable[i].pfFunction = &DummyBW;
+    
+    
+    for(i=0;i<BRIDGE_DISPATCH_TABLE_ENTRY_COUNT;i++)
+    {
+        if(!g_BridgeDispatchTable[i].pfFunction)
+        {
+            g_BridgeDispatchTable[i].pfFunction = &DummyBW;
 #if defined(DEBUG_BRIDGE_KM)
-			g_BridgeDispatchTable[i].pszIOCName = "_PVRSRV_BRIDGE_DUMMY";
-			g_BridgeDispatchTable[i].pszFunctionName = "DummyBW";
-			g_BridgeDispatchTable[i].ui32CallCount = 0;
-			g_BridgeDispatchTable[i].ui32CopyFromUserTotalBytes = 0;
-			g_BridgeDispatchTable[i].ui32CopyToUserTotalBytes = 0;
+            g_BridgeDispatchTable[i].pszIOCName = "_PVRSRV_BRIDGE_DUMMY";
+            g_BridgeDispatchTable[i].pszFunctionName = "DummyBW";
+            g_BridgeDispatchTable[i].ui32CallCount = 0;
+            g_BridgeDispatchTable[i].ui32CopyFromUserTotalBytes = 0;
+            g_BridgeDispatchTable[i].ui32CopyToUserTotalBytes = 0;
 #endif
-		}
-	}
+        }
+    }
 
-	return PVRSRV_OK;
+    return PVRSRV_OK;
 }
 
 IMG_INT BridgedDispatchKM(PVRSRV_PER_PROCESS_DATA * psPerProc,
-					  PVRSRV_BRIDGE_PACKAGE   * psBridgePackageKM)
+                      PVRSRV_BRIDGE_PACKAGE   * psBridgePackageKM)
 {
 
-	IMG_VOID   * psBridgeIn;
-	IMG_VOID   * psBridgeOut;
-	BridgeWrapperFunction pfBridgeHandler;
-	IMG_UINT32   ui32BridgeID = psBridgePackageKM->ui32BridgeID;
-	IMG_INT      err          = -EFAULT;
+    IMG_VOID   * psBridgeIn;
+    IMG_VOID   * psBridgeOut;
+    BridgeWrapperFunction pfBridgeHandler;
+    IMG_UINT32   ui32BridgeID = psBridgePackageKM->ui32BridgeID;
+    IMG_INT      err          = -EFAULT;
 
 #if defined(DEBUG_TRACE_BRIDGE_KM)
-	PVR_DPF((PVR_DBG_ERROR, "%s: %s",
-			 __FUNCTION__,
-			 g_BridgeDispatchTable[ui32BridgeID].pszIOCName));
+    PVR_DPF((PVR_DBG_ERROR, "%s: %s",
+             __FUNCTION__,
+             g_BridgeDispatchTable[ui32BridgeID].pszIOCName));
 #endif
 
 #if defined(DEBUG_BRIDGE_KM)
-	g_BridgeDispatchTable[ui32BridgeID].ui32CallCount++;
-	g_BridgeGlobalStats.ui32IOCTLCount++;
+    g_BridgeDispatchTable[ui32BridgeID].ui32CallCount++;
+    g_BridgeGlobalStats.ui32IOCTLCount++;
 #endif
 
-	if(!psPerProc->bInitProcess)
-	{
-		if(PVRSRVGetInitServerState(PVRSRV_INIT_SERVER_RAN))
-		{
-			if(!PVRSRVGetInitServerState(PVRSRV_INIT_SERVER_SUCCESSFUL))
-			{
-				PVR_DPF((PVR_DBG_ERROR, "%s: Initialisation failed.  Driver unusable.",
-						 __FUNCTION__));
-				goto return_fault;
-			}
-		}
-		else
-		{
-			if(PVRSRVGetInitServerState(PVRSRV_INIT_SERVER_RUNNING))
-			{
-				PVR_DPF((PVR_DBG_ERROR, "%s: Initialisation is in progress",
-						 __FUNCTION__));
-				goto return_fault;
-			}
-			else
-			{
-				
-				switch(ui32BridgeID)
-				{
-					case PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_CONNECT_SERVICES):
-					case PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_DISCONNECT_SERVICES):
-					case PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_INITSRV_CONNECT):
-					case PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_INITSRV_DISCONNECT):
-						break;
-					default:
-						PVR_DPF((PVR_DBG_ERROR, "%s: Driver initialisation not completed yet.",
-								 __FUNCTION__));
-						goto return_fault;
-				}
-			}
-		}
-	}
+    if(!psPerProc->bInitProcess)
+    {
+        if(PVRSRVGetInitServerState(PVRSRV_INIT_SERVER_RAN))
+        {
+            if(!PVRSRVGetInitServerState(PVRSRV_INIT_SERVER_SUCCESSFUL))
+            {
+                PVR_DPF((PVR_DBG_ERROR, "%s: Initialisation failed.  Driver unusable.",
+                         __FUNCTION__));
+                goto return_fault;
+            }
+        }
+        else
+        {
+            if(PVRSRVGetInitServerState(PVRSRV_INIT_SERVER_RUNNING))
+            {
+                PVR_DPF((PVR_DBG_ERROR, "%s: Initialisation is in progress",
+                         __FUNCTION__));
+                goto return_fault;
+            }
+            else
+            {
+                
+                switch(ui32BridgeID)
+                {
+                    case PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_CONNECT_SERVICES):
+                    case PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_DISCONNECT_SERVICES):
+                    case PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_INITSRV_CONNECT):
+                    case PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_INITSRV_DISCONNECT):
+                        break;
+                    default:
+                        PVR_DPF((PVR_DBG_ERROR, "%s: Driver initialisation not completed yet.",
+                                 __FUNCTION__));
+                        goto return_fault;
+                }
+            }
+        }
+    }
 
 
 
 #if defined(__linux__)
-	{
-		
-		SYS_DATA *psSysData;
+    {
+        
+        SYS_DATA *psSysData;
 
-		SysAcquireData(&psSysData);
+        SysAcquireData(&psSysData);
 
-		
-		psBridgeIn = ((ENV_DATA *)psSysData->pvEnvSpecificData)->pvBridgeData;
-		psBridgeOut = (IMG_PVOID)((IMG_PBYTE)psBridgeIn + PVRSRV_MAX_BRIDGE_IN_SIZE);
+        
+        psBridgeIn = ((ENV_DATA *)psSysData->pvEnvSpecificData)->pvBridgeData;
+        psBridgeOut = (IMG_PVOID)((IMG_PBYTE)psBridgeIn + PVRSRV_MAX_BRIDGE_IN_SIZE);
 
-		
+        
 #if defined(DEBUG)
-		PVR_ASSERT(psBridgePackageKM->ui32InBufferSize < PVRSRV_MAX_BRIDGE_IN_SIZE);
-		PVR_ASSERT(psBridgePackageKM->ui32OutBufferSize < PVRSRV_MAX_BRIDGE_OUT_SIZE);
-#endif
-
-		if(psBridgePackageKM->ui32InBufferSize > 0)
-		{
-			if(!OSAccessOK(PVR_VERIFY_READ,
-							psBridgePackageKM->pvParamIn,
-							psBridgePackageKM->ui32InBufferSize))
-			{
-				PVR_DPF((PVR_DBG_ERROR, "%s: Invalid pvParamIn pointer", __FUNCTION__));
-			}
-
-			if(CopyFromUserWrapper(psPerProc,
-					               ui32BridgeID,
-								   psBridgeIn,
-								   psBridgePackageKM->pvParamIn,
-								   psBridgePackageKM->ui32InBufferSize)
-			  != PVRSRV_OK)
-			{
-				goto return_fault;
-			}
-		}
-	}
+        PVR_ASSERT(psBridgePackageKM->ui32InBufferSize < PVRSRV_MAX_BRIDGE_IN_SIZE);
+        PVR_ASSERT(psBridgePackageKM->ui32OutBufferSize < PVRSRV_MAX_BRIDGE_OUT_SIZE);
+#endif
+
+        if(psBridgePackageKM->ui32InBufferSize > 0)
+        {
+            if(!OSAccessOK(PVR_VERIFY_READ,
+                            psBridgePackageKM->pvParamIn,
+                            psBridgePackageKM->ui32InBufferSize))
+            {
+                PVR_DPF((PVR_DBG_ERROR, "%s: Invalid pvParamIn pointer", __FUNCTION__));
+            }
+
+            if(CopyFromUserWrapper(psPerProc,
+                                   ui32BridgeID,
+                                   psBridgeIn,
+                                   psBridgePackageKM->pvParamIn,
+                                   psBridgePackageKM->ui32InBufferSize)
+              != PVRSRV_OK)
+            {
+                goto return_fault;
+            }
+        }
+    }
 #else
-	psBridgeIn  = psBridgePackageKM->pvParamIn;
-	psBridgeOut = psBridgePackageKM->pvParamOut;
+    psBridgeIn  = psBridgePackageKM->pvParamIn;
+    psBridgeOut = psBridgePackageKM->pvParamOut;
 #endif
 
-	if(ui32BridgeID >= (BRIDGE_DISPATCH_TABLE_ENTRY_COUNT))
-	{
-		PVR_DPF((PVR_DBG_ERROR, "%s: ui32BridgeID = %d is out if range!",
-				 __FUNCTION__, ui32BridgeID));
-		goto return_fault;
-	}
-	pfBridgeHandler =
-		(BridgeWrapperFunction)g_BridgeDispatchTable[ui32BridgeID].pfFunction;
-	err = pfBridgeHandler(ui32BridgeID,
-						  psBridgeIn,
-						  psBridgeOut,
-						  psPerProc);
-	if(err < 0)
-	{
-		goto return_fault;
-	}
+    if(ui32BridgeID >= (BRIDGE_DISPATCH_TABLE_ENTRY_COUNT))
+    {
+        PVR_DPF((PVR_DBG_ERROR, "%s: ui32BridgeID = %d is out if range!",
+                 __FUNCTION__, ui32BridgeID));
+        goto return_fault;
+    }
+    pfBridgeHandler =
+        (BridgeWrapperFunction)g_BridgeDispatchTable[ui32BridgeID].pfFunction;
+    err = pfBridgeHandler(ui32BridgeID,
+                          psBridgeIn,
+                          psBridgeOut,
+                          psPerProc);
+    if(err < 0)
+    {
+        goto return_fault;
+    }
 
 
 #if defined(__linux__)
-	
-	if(CopyToUserWrapper(psPerProc,
-						 ui32BridgeID,
-						 psBridgePackageKM->pvParamOut,
-						 psBridgeOut,
-						 psBridgePackageKM->ui32OutBufferSize)
-	   != PVRSRV_OK)
-	{
-		goto return_fault;
-	}
+    
+    if(CopyToUserWrapper(psPerProc,
+                         ui32BridgeID,
+                         psBridgePackageKM->pvParamOut,
+                         psBridgeOut,
+                         psBridgePackageKM->ui32OutBufferSize)
+       != PVRSRV_OK)
+    {
+        goto return_fault;
+    }
 #endif
 
-	err = 0;
+    err = 0;
 return_fault:
-	ReleaseHandleBatch(psPerProc);
-	return err;
+
+    ReleaseHandleBatch(psPerProc);
+    return err;
 }
 
diff --git a/drivers/gpu/pvr/bridged_pvr_bridge.h b/drivers/gpu/pvr/bridged_pvr_bridge.h
index 004257429bd..6106e6f8bdb 100644
--- a/drivers/gpu/pvr/bridged_pvr_bridge.h
+++ b/drivers/gpu/pvr/bridged_pvr_bridge.h
@@ -83,7 +83,7 @@ CopyToUserWrapper(PVRSRV_PER_PROCESS_DATA *pProcData,
 #define ASSIGN_AND_EXIT_ON_ERROR(error, src)		\
 	ASSIGN_AND_RETURN_ON_ERROR(error, src, 0)
 
-#if defined (PVR_SECURE_HANDLES)
+#if defined (PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
 #ifdef INLINE_IS_PRAGMA
 #pragma inline(NewHandleBatch)
 #endif
diff --git a/drivers/gpu/pvr/bridged_support.c b/drivers/gpu/pvr/bridged_support.c
index e10e577121f..de95ef82d0a 100644
--- a/drivers/gpu/pvr/bridged_support.c
+++ b/drivers/gpu/pvr/bridged_support.c
@@ -30,7 +30,11 @@
 
 
 PVRSRV_ERROR
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRVLookupOSMemHandle(PVRSRV_HANDLE_BASE *psHandleBase, IMG_HANDLE *phOSMemHandle, IMG_SID hMHandle)
+#else
 PVRSRVLookupOSMemHandle(PVRSRV_HANDLE_BASE *psHandleBase, IMG_HANDLE *phOSMemHandle, IMG_HANDLE hMHandle)
+#endif
 {
 	IMG_HANDLE hMHandleInt;
 	PVRSRV_HANDLE_TYPE eHandleType;
@@ -47,7 +51,7 @@ PVRSRVLookupOSMemHandle(PVRSRV_HANDLE_BASE *psHandleBase, IMG_HANDLE *phOSMemHan
 
 	switch(eHandleType)
 	{
-#if defined(PVR_SECURE_HANDLES)
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
 		case PVRSRV_HANDLE_TYPE_MEM_INFO:
 		case PVRSRV_HANDLE_TYPE_MEM_INFO_REF:
 		case PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO:
diff --git a/drivers/gpu/pvr/bridged_support.h b/drivers/gpu/pvr/bridged_support.h
index 371715d6ea8..3c222e5b351 100644
--- a/drivers/gpu/pvr/bridged_support.h
+++ b/drivers/gpu/pvr/bridged_support.h
@@ -33,7 +33,11 @@
 extern "C" {
 #endif
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRSRVLookupOSMemHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phOSMemHandle, IMG_SID hMHandle);
+#else
 PVRSRV_ERROR PVRSRVLookupOSMemHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phOSMemHandle, IMG_HANDLE hMHandle);
+#endif
 
 #if defined (__cplusplus)
 }
diff --git a/drivers/gpu/pvr/buffer_manager.c b/drivers/gpu/pvr/buffer_manager.c
index 32367e215f8..7026a58d1bc 100644
--- a/drivers/gpu/pvr/buffer_manager.c
+++ b/drivers/gpu/pvr/buffer_manager.c
@@ -787,8 +787,11 @@ static PVRSRV_ERROR BM_DestroyContextCallBack(IMG_PVOID		pvParam,
 	}
 	else
 	{
-		
-		List_BM_CONTEXT_Remove(pBMContext);
+	    if (pBMContext->ppsThis != IMG_NULL)
+	    {
+		    
+		    List_BM_CONTEXT_Remove(pBMContext);
+		}
 	}
 
 	OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(BM_CONTEXT), pBMContext, IMG_NULL);
@@ -1006,6 +1009,11 @@ BM_CreateHeap (IMG_HANDLE hBMContext,
 	psDeviceNode = pBMContext->psDeviceNode;
 
 	
+ 
+	PVR_ASSERT((psDevMemHeapInfo->ui32HeapSize & (psDevMemHeapInfo->ui32DataPageSize - 1)) == 0);
+	PVR_ASSERT(psDevMemHeapInfo->ui32HeapSize > 0);
+
+	
 
 
 
@@ -1096,7 +1104,7 @@ ErrorExit:
 	if (psBMHeap->pMMUHeap != IMG_NULL)
 	{
 		psDeviceNode->pfnMMUDelete (psBMHeap->pMMUHeap);
-		psDeviceNode->pfnMMUFinalise (pBMContext->psMMUContext);
+		
 	}
 
 	
@@ -1379,6 +1387,11 @@ BM_Wrap (	IMG_HANDLE hDevMemHeap,
 
 			return IMG_TRUE;
 		}
+		else
+		{
+		  
+			HASH_Remove(psBMContext->pBufferHash, (IMG_UINTPTR_T)sHashAddress.uiAddr);
+		}	
 	}
 
 	
@@ -1567,7 +1580,7 @@ DevMemoryAlloc (BM_CONTEXT *pBMContext,
 {
 	PVRSRV_DEVICE_NODE *psDeviceNode;
 #ifdef PDUMP
-	IMG_UINT32 ui32PDumpSize = pMapping->uSize;
+	IMG_UINT32 ui32PDumpSize = (IMG_UINT32)pMapping->uSize;
 #endif
 
 	psDeviceNode = pBMContext->psDeviceNode;
@@ -1613,8 +1626,8 @@ DevMemoryAlloc (BM_CONTEXT *pBMContext,
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
 					 psDeviceNode->pfnMMUIsHeapShared(pMapping->pBMHeap->pMMUHeap),
 #else
-					 IMG_FALSE,
-#endif
+					 IMG_FALSE, 
+#endif 
 					 (IMG_HANDLE)pMapping);
 #endif
 
@@ -1677,35 +1690,321 @@ static IMG_VOID
 DevMemoryFree (BM_MAPPING *pMapping)
 {
 	PVRSRV_DEVICE_NODE *psDeviceNode;
+	IMG_DEV_PHYADDR     sDevPAddr;
 #ifdef PDUMP
 	IMG_UINT32 ui32PSize;
 #endif
 
+	psDeviceNode = pMapping->pBMHeap->pBMContext->psDeviceNode;
+	sDevPAddr = psDeviceNode->pfnMMUGetPhysPageAddr(pMapping->pBMHeap->pMMUHeap, pMapping->DevVAddr);
+
+	if (sDevPAddr.uiAddr != 0)
+	{
 #ifdef PDUMP
+		
+		if(pMapping->ui32Flags & PVRSRV_MEM_DUMMY)
+		{
+			
+			ui32PSize = pMapping->pBMHeap->sDevArena.ui32DataPageSize;
+		}
+		else
+		{
+			ui32PSize = (IMG_UINT32)pMapping->uSize;
+		}
 	
-	if(pMapping->ui32Flags & PVRSRV_MEM_DUMMY)
+		PDUMPFREEPAGES(pMapping->pBMHeap,
+	                    pMapping->DevVAddr,
+	                    ui32PSize,
+	                    pMapping->pBMHeap->sDevArena.ui32DataPageSize,
+	                    (IMG_HANDLE)pMapping,
+	                    (pMapping->ui32Flags & PVRSRV_MEM_INTERLEAVED) ? IMG_TRUE : IMG_FALSE);
+#endif
+	}
+	psDeviceNode->pfnMMUFree (pMapping->pBMHeap->pMMUHeap, pMapping->DevVAddr, IMG_CAST_TO_DEVVADDR_UINT(pMapping->uSize));
+}
+
+#define XPROC_WORKAROUND_NUM_SHAREABLES 200
+
+#define XPROC_WORKAROUND_BAD_SHAREINDEX 0773407734
+
+static IMG_UINT32 gXProcWorkaroundShareIndex = XPROC_WORKAROUND_BAD_SHAREINDEX;
+
+ 
+static struct {
+	IMG_UINT32 ui32RefCount;
+	IMG_UINT32 ui32AllocFlags;
+	IMG_UINT32 ui32Size;
+	IMG_UINT32 ui32PageSize;
+    RA_ARENA *psArena;
+    IMG_SYS_PHYADDR sSysPAddr;
+	IMG_VOID *pvCpuVAddr;
+	IMG_HANDLE hOSMemHandle;
+} gXProcWorkaroundShareData[XPROC_WORKAROUND_NUM_SHAREABLES] = {{0}};
+
+PVRSRV_ERROR BM_XProcWorkaroundSetShareIndex(IMG_UINT32 ui32Index)
+{
+	
+
+
+	if (gXProcWorkaroundShareIndex != XPROC_WORKAROUND_BAD_SHAREINDEX)
 	{
-		
-		ui32PSize = pMapping->pBMHeap->sDevArena.ui32DataPageSize;
+		PVR_DPF((PVR_DBG_ERROR, "No, it's already set!"));
+		return PVRSRV_ERROR_INVALID_PARAMS;
+	}
+
+	gXProcWorkaroundShareIndex = ui32Index;
+
+	return PVRSRV_OK;
+}
+
+PVRSRV_ERROR BM_XProcWorkaroundUnsetShareIndex(IMG_UINT32 ui32Index)
+{
+	
+
+
+	if (gXProcWorkaroundShareIndex == XPROC_WORKAROUND_BAD_SHAREINDEX)
+	{
+		PVR_DPF((PVR_DBG_ERROR, "huh?   how can it be bad??"));
+		return PVRSRV_ERROR_INVALID_PARAMS;
+	}
+	if (gXProcWorkaroundShareIndex != ui32Index)
+	{
+		PVR_DPF((PVR_DBG_ERROR, "gXProcWorkaroundShareIndex == 0x%08x != 0x%08x == ui32Index", gXProcWorkaroundShareIndex, ui32Index));
+		return PVRSRV_ERROR_INVALID_PARAMS;
+	}
+
+	gXProcWorkaroundShareIndex = XPROC_WORKAROUND_BAD_SHAREINDEX;
+
+	return PVRSRV_OK;
+}
+
+PVRSRV_ERROR BM_XProcWorkaroundFindNewBufferAndSetShareIndex(IMG_UINT32 *pui32Index)
+{
+	
+
+
+	if (gXProcWorkaroundShareIndex != XPROC_WORKAROUND_BAD_SHAREINDEX)
+	{
+		return PVRSRV_ERROR_INVALID_PARAMS;
+	}
+
+	for (*pui32Index = 0; *pui32Index < XPROC_WORKAROUND_NUM_SHAREABLES; (*pui32Index)++)
+	{
+		if (gXProcWorkaroundShareData[*pui32Index].ui32RefCount == 0)
+		{
+			gXProcWorkaroundShareIndex = *pui32Index;
+			return PVRSRV_OK;
+		}
+	}
+
+	PVR_DPF((PVR_DBG_ERROR, "ran out of shared buffers"));
+	return PVRSRV_ERROR_OUT_OF_MEMORY;
+}
+
+static PVRSRV_ERROR
+XProcWorkaroundAllocShareable(RA_ARENA *psArena,
+                              IMG_UINT32 ui32AllocFlags,
+                              IMG_UINT32 ui32Size,
+                              IMG_UINT32 ui32PageSize,
+                              IMG_VOID **ppvCpuVAddr,
+                              IMG_HANDLE *phOSMemHandle)
+{
+	if ((ui32AllocFlags & PVRSRV_MEM_XPROC) == 0)
+	{
+		PVR_DPF((PVR_DBG_VERBOSE, "XProcWorkaroundAllocShareable: bad flags"));
+		return PVRSRV_ERROR_INVALID_PARAMS;
+	}
+
+	if (gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].ui32RefCount > 0)
+	{
+		PVR_DPF((PVR_DBG_VERBOSE,
+				 "XProcWorkaroundAllocShareable: re-using previously allocated pages"));
+
+		ui32AllocFlags &= ~PVRSRV_HAP_MAPTYPE_MASK;
+		ui32AllocFlags |= PVRSRV_HAP_SINGLE_PROCESS;
+
+		if (ui32AllocFlags != gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].ui32AllocFlags)
+		{
+			PVR_DPF((PVR_DBG_ERROR,
+					 "Can't!  Flags don't match! (I had 0x%08x, you gave 0x%08x)",
+					 gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].ui32AllocFlags,
+					 ui32AllocFlags));
+			return PVRSRV_ERROR_INVALID_PARAMS;
+		}
+
+		if (ui32Size != gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].ui32Size)
+		{
+			PVR_DPF((PVR_DBG_ERROR,
+					 "Can't!  Size doesn't match!"));
+			return PVRSRV_ERROR_INVALID_PARAMS;
+		}
+
+		if (ui32PageSize != gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].ui32PageSize)
+		{
+			PVR_DPF((PVR_DBG_ERROR,
+					 "Can't!  Page Size doesn't match!"));
+			return PVRSRV_ERROR_INVALID_PARAMS;
+		}
+
+		*ppvCpuVAddr = gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].pvCpuVAddr;
+		*phOSMemHandle = gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].hOSMemHandle;
+
+		gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].ui32RefCount ++;
+
+		return PVRSRV_OK;
 	}
 	else
 	{
-		ui32PSize = pMapping->uSize;
+		if (psArena != IMG_NULL)
+		{
+			IMG_CPU_PHYADDR sCpuPAddr;
+			IMG_SYS_PHYADDR sSysPAddr;
+
+			PVR_DPF((PVR_DBG_VERBOSE,
+					 "XProcWorkaroundAllocShareable: making a NEW allocation from local mem"));
+
+			if (!RA_Alloc (psArena,
+						   ui32Size,
+						   IMG_NULL,
+						   IMG_NULL,
+						   0,
+                           ui32PageSize,
+						   0,
+						   (IMG_UINTPTR_T *)&sSysPAddr.uiAddr))
+			{
+				PVR_DPF((PVR_DBG_ERROR, "XProcWorkaroundAllocShareable: RA_Alloc(0x%x) FAILED", ui32Size));
+				return PVRSRV_ERROR_OUT_OF_MEMORY;
+			}
+
+			sCpuPAddr = SysSysPAddrToCpuPAddr(sSysPAddr);
+			if(OSReservePhys(sCpuPAddr,
+							 ui32Size,
+							 ui32AllocFlags,
+							 (IMG_VOID **)&gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].pvCpuVAddr,
+                             &gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].hOSMemHandle) != PVRSRV_OK)
+            {
+                PVR_DPF((PVR_DBG_ERROR,	"XProcWorkaroundAllocShareable: OSReservePhys failed"));
+                return PVRSRV_ERROR_OUT_OF_MEMORY;
+            }
+            gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].sSysPAddr = sSysPAddr;
+        }
+        else
+        {
+            PVR_DPF((PVR_DBG_VERBOSE,
+                     "XProcWorkaroundAllocShareable: making a NEW allocation from OS"));
+
+            ui32AllocFlags &= ~PVRSRV_HAP_MAPTYPE_MASK;
+            ui32AllocFlags |= PVRSRV_HAP_SINGLE_PROCESS;
+
+            
+            if (OSAllocPages(ui32AllocFlags,
+                             ui32Size,
+                             ui32PageSize,
+                             (IMG_VOID **)&gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].pvCpuVAddr,
+                             &gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].hOSMemHandle) != PVRSRV_OK)
+            {
+                PVR_DPF((PVR_DBG_ERROR,
+                         "XProcWorkaroundAllocShareable: OSAllocPages(0x%x) failed",
+                         ui32PageSize));
+                return PVRSRV_ERROR_OUT_OF_MEMORY;
+            }
+        }
+
+		gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].psArena = psArena;
+		gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].ui32AllocFlags = ui32AllocFlags;
+		gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].ui32Size = ui32Size;
+		gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].ui32PageSize = ui32PageSize;
+
+		*ppvCpuVAddr = gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].pvCpuVAddr;
+		*phOSMemHandle = gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].hOSMemHandle;
+
+		gXProcWorkaroundShareData[gXProcWorkaroundShareIndex].ui32RefCount ++;
+
+		return PVRSRV_OK;
 	}
+}
 
-	PDUMPFREEPAGES(pMapping->pBMHeap,
-                    pMapping->DevVAddr,
-                    ui32PSize,
-                    pMapping->pBMHeap->sDevArena.ui32DataPageSize,
-                    (IMG_HANDLE)pMapping,
-                    (pMapping->ui32Flags & PVRSRV_MEM_INTERLEAVED) ? IMG_TRUE : IMG_FALSE);
-#endif
+static PVRSRV_ERROR XProcWorkaroundHandleToSI(IMG_HANDLE hOSMemHandle, IMG_UINT32 *pui32SI)
+{
+	
+	IMG_UINT32 ui32SI;
+	IMG_BOOL bFound;
+	IMG_BOOL bErrorDups;
 
-	psDeviceNode = pMapping->pBMHeap->pBMContext->psDeviceNode;
+	bFound = IMG_FALSE;
+	bErrorDups = IMG_FALSE;
 
-	psDeviceNode->pfnMMUFree (pMapping->pBMHeap->pMMUHeap, pMapping->DevVAddr, IMG_CAST_TO_DEVVADDR_UINT(pMapping->uSize));
+	for (ui32SI = 0; ui32SI < XPROC_WORKAROUND_NUM_SHAREABLES; ui32SI++)
+	{
+		if (gXProcWorkaroundShareData[ui32SI].ui32RefCount>0 && gXProcWorkaroundShareData[ui32SI].hOSMemHandle == hOSMemHandle)
+		{
+			if (bFound)
+			{
+				bErrorDups = IMG_TRUE;
+			}
+			else
+			{
+				*pui32SI = ui32SI;
+				bFound = IMG_TRUE;
+			}
+		}
+	}
+
+	if (bErrorDups || !bFound)
+	{
+		return PVRSRV_ERROR_BM_BAD_SHAREMEM_HANDLE;
+	}
+
+	return PVRSRV_OK;
+}
+
+static IMG_VOID XProcWorkaroundFreeShareable(IMG_HANDLE hOSMemHandle)
+{
+	IMG_UINT32 ui32SI = (IMG_UINT32)((IMG_UINTPTR_T)hOSMemHandle & 0xffffU);
+	PVRSRV_ERROR eError;
+
+	eError = XProcWorkaroundHandleToSI(hOSMemHandle, &ui32SI);
+	if (eError != PVRSRV_OK)
+	{
+		PVR_DPF((PVR_DBG_ERROR, "bad handle"));
+		return;
+	}
+
+	gXProcWorkaroundShareData[ui32SI].ui32RefCount --;
+
+	PVR_DPF((PVR_DBG_VERBOSE, "Reduced refcount of SI[%d] from %d to %d",
+			 ui32SI, gXProcWorkaroundShareData[ui32SI].ui32RefCount+1, gXProcWorkaroundShareData[ui32SI].ui32RefCount));
+
+	if (gXProcWorkaroundShareData[ui32SI].ui32RefCount == 0)
+	{
+		if (gXProcWorkaroundShareData[ui32SI].psArena != IMG_NULL)
+		{
+			IMG_SYS_PHYADDR sSysPAddr;
+
+			if (gXProcWorkaroundShareData[ui32SI].pvCpuVAddr != IMG_NULL)
+			{
+				OSUnReservePhys(gXProcWorkaroundShareData[ui32SI].pvCpuVAddr,
+								gXProcWorkaroundShareData[ui32SI].ui32Size,
+								gXProcWorkaroundShareData[ui32SI].ui32AllocFlags,
+								gXProcWorkaroundShareData[ui32SI].hOSMemHandle);
+			}
+			sSysPAddr = gXProcWorkaroundShareData[ui32SI].sSysPAddr;
+			RA_Free (gXProcWorkaroundShareData[ui32SI].psArena,
+					 sSysPAddr.uiAddr,
+					 IMG_FALSE);
+		}
+		else
+		{
+			PVR_DPF((PVR_DBG_VERBOSE, "freeing OS memory"));
+			OSFreePages(gXProcWorkaroundShareData[ui32SI].ui32AllocFlags,
+						gXProcWorkaroundShareData[ui32SI].ui32PageSize,
+						gXProcWorkaroundShareData[ui32SI].pvCpuVAddr,
+						gXProcWorkaroundShareData[ui32SI].hOSMemHandle);
+		}
+	}
 }
 
+
 static IMG_BOOL
 BM_ImportMemory (IMG_VOID *pH,
 			  IMG_SIZE_T uRequestSize,
@@ -1720,7 +2019,7 @@ BM_ImportMemory (IMG_VOID *pH,
 	IMG_BOOL bResult;
 	IMG_SIZE_T uSize;
 	IMG_SIZE_T uPSize;
-	IMG_UINT32 uDevVAddrAlignment = 0;
+	IMG_SIZE_T uDevVAddrAlignment = 0; 
 
 	PVR_DPF ((PVR_DBG_MESSAGE,
 			  "BM_ImportMemory (pBMContext=0x%x, uRequestSize=0x%x, uFlags=0x%x, uAlign=0x%x)",
@@ -1771,6 +2070,103 @@ BM_ImportMemory (IMG_VOID *pH,
 		uPSize = pMapping->uSize;
 	}
 
+	if (uFlags & PVRSRV_MEM_XPROC)
+	{
+		IMG_UINT32 ui32Attribs = pBMHeap->ui32Attribs | PVRSRV_MEM_XPROC;
+        IMG_BOOL bBadBackingStoreType;
+
+        bBadBackingStoreType = IMG_TRUE; 
+
+		if ((ui32Attribs & PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG) != 0)
+        {
+#ifndef MAX
+#define MAX(a,b) ((a) > (b) ? (a) : (b))
+#endif
+		uDevVAddrAlignment = MAX(pBMHeap->sDevArena.ui32DataPageSize, HOST_PAGESIZE());
+
+
+		if (uPSize % uDevVAddrAlignment != 0)
+		{
+			PVR_DPF((PVR_DBG_ERROR, "Cannot use use this memory sharing workaround with allocations that might be suballocated"));
+			goto fail_mapping_alloc;
+		}
+		uDevVAddrAlignment = 0; 
+
+		
+		if (pMapping->ui32Flags & PVRSRV_HAP_CACHETYPE_MASK)
+		{
+			ui32Attribs &= ~PVRSRV_HAP_CACHETYPE_MASK;
+			ui32Attribs |= (pMapping->ui32Flags & PVRSRV_HAP_CACHETYPE_MASK);
+		}
+
+		
+		if (XProcWorkaroundAllocShareable(IMG_NULL,
+                                          ui32Attribs,
+							   (IMG_UINT32)uPSize,
+                                          pBMHeap->sDevArena.ui32DataPageSize,
+                                          (IMG_VOID **)&pMapping->CpuVAddr,
+                                          &pMapping->hOSMemHandle) != PVRSRV_OK)
+		{
+			PVR_DPF((PVR_DBG_ERROR,
+					"BM_ImportMemory: XProcWorkaroundAllocShareable(0x%x) failed",
+					uPSize));
+			goto fail_mapping_alloc;
+		}
+
+		
+		
+
+		pMapping->eCpuMemoryOrigin = hm_env;
+        bBadBackingStoreType = IMG_FALSE;
+        }
+
+		if ((ui32Attribs & PVRSRV_BACKINGSTORE_LOCALMEM_CONTIG) != 0)
+        {
+			uDevVAddrAlignment = pBMHeap->sDevArena.ui32DataPageSize;
+
+            if (uPSize % uDevVAddrAlignment != 0)
+            {
+                PVR_DPF((PVR_DBG_ERROR, "Cannot use use this memory sharing workaround with allocations that might be suballocated"));
+                goto fail_mapping_alloc;
+            }
+            uDevVAddrAlignment = 0; 
+
+            
+            if (pMapping->ui32Flags & PVRSRV_HAP_CACHETYPE_MASK)
+            {
+                ui32Attribs &= ~PVRSRV_HAP_CACHETYPE_MASK;
+                ui32Attribs |= (pMapping->ui32Flags & PVRSRV_HAP_CACHETYPE_MASK);
+            }
+
+            
+            if (XProcWorkaroundAllocShareable(pBMHeap->pLocalDevMemArena,
+                                              ui32Attribs,
+                                              (IMG_UINT32)uPSize,
+                                              pBMHeap->sDevArena.ui32DataPageSize,
+                                              (IMG_VOID **)&pMapping->CpuVAddr,
+                                              &pMapping->hOSMemHandle) != PVRSRV_OK)
+            {
+                PVR_DPF((PVR_DBG_ERROR,
+                         "BM_ImportMemory: XProcWorkaroundAllocShareable(0x%x) failed",
+                         uPSize));
+                goto fail_mapping_alloc;
+            }
+
+            
+            
+
+            pMapping->eCpuMemoryOrigin = hm_env;
+            bBadBackingStoreType = IMG_FALSE;
+        }
+
+        if (bBadBackingStoreType)
+		{
+			PVR_DPF((PVR_DBG_ERROR, "Cannot use this memory sharing workaround with this type of backing store"));
+			goto fail_mapping_alloc;
+		}
+	}
+	else
+
 	
 
 	if(pBMHeap->ui32Attribs & PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG)
@@ -1854,7 +2250,7 @@ BM_ImportMemory (IMG_VOID *pH,
 								pMapping,
 								IMG_NULL,
 								uFlags,
-								uDevVAddrAlignment,
+								(IMG_UINT32)uDevVAddrAlignment,
 								&pMapping->DevVAddr);
 	if (!bResult)
 	{
@@ -1892,7 +2288,12 @@ fail_dev_mem_alloc:
 			uPSize = pMapping->uSize;
 		}
 
-		if(pBMHeap->ui32Attribs & PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG)
+		if (uFlags & PVRSRV_MEM_XPROC)
+		{
+			XProcWorkaroundFreeShareable(pMapping->hOSMemHandle);
+		}
+		else
+        if(pBMHeap->ui32Attribs & PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG)
 		{
 			OSFreePages(pBMHeap->ui32Attribs,
 						  uPSize,
@@ -1959,7 +2360,12 @@ BM_FreeMemory (IMG_VOID *h, IMG_UINTPTR_T _base, BM_MAPPING *psMapping)
 		uPSize = psMapping->uSize;
 	}
 
-	if(pBMHeap->ui32Attribs & PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG)
+	if (psMapping->ui32Flags & PVRSRV_MEM_XPROC)
+	{
+		XProcWorkaroundFreeShareable(psMapping->hOSMemHandle);
+	}
+	else
+    if(pBMHeap->ui32Attribs & PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG)
 	{
 		OSFreePages(pBMHeap->ui32Attribs,
 						uPSize,
@@ -2002,6 +2408,7 @@ IMG_VOID BM_GetPhysPageAddr(PVRSRV_KERNEL_MEM_INFO *psMemInfo,
 	
 	PVR_ASSERT((sDevVPageAddr.uiAddr & 0xFFF) == 0);
 
+	 
 	psDeviceNode = ((BM_BUF*)psMemInfo->sMemBlk.hBuffer)->pMapping->pBMHeap->pBMContext->psDeviceNode;
 
 	*psDevPAddr = psDeviceNode->pfnMMUGetPhysPageAddr(((BM_BUF*)psMemInfo->sMemBlk.hBuffer)->pMapping->pBMHeap->pMMUHeap,
diff --git a/drivers/gpu/pvr/buffer_manager.h b/drivers/gpu/pvr/buffer_manager.h
index 1467cd3939f..b821545e946 100644
--- a/drivers/gpu/pvr/buffer_manager.h
+++ b/drivers/gpu/pvr/buffer_manager.h
@@ -202,6 +202,11 @@ IMG_VOID BM_Export(BM_HANDLE hBuf);
 
 IMG_VOID BM_FreeExport(BM_HANDLE hBuf, IMG_UINT32 ui32Flags);
 
+PVRSRV_ERROR BM_XProcWorkaroundSetShareIndex(IMG_UINT32 ui32Index);
+PVRSRV_ERROR BM_XProcWorkaroundUnsetShareIndex(IMG_UINT32 ui32Index);
+PVRSRV_ERROR BM_XProcWorkaroundFindNewBufferAndSetShareIndex(IMG_UINT32 *pui32Index);
+
+
 #if defined(__cplusplus)
 }
 #endif
diff --git a/drivers/gpu/pvr/dbgdrvif.h b/drivers/gpu/pvr/dbgdrvif.h
index 6029ef965ee..dab4d13eb48 100644
--- a/drivers/gpu/pvr/dbgdrvif.h
+++ b/drivers/gpu/pvr/dbgdrvif.h
@@ -1,26 +1,26 @@
 /**********************************************************************
  *
  * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
- *
+ * 
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
  * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
  * See the GNU General Public License for more details.
- *
+ * 
  * You should have received a copy of the GNU General Public License along with
  * this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
+ * 
  * The full GNU General Public License is included in this distribution in
  * the file called "COPYING".
  *
  * Contact Information:
  * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
  *
  ******************************************************************************/
 
@@ -28,8 +28,21 @@
 #define _DBGDRVIF_
 
 
+#if defined(__linux__)
+
+#define FILE_DEVICE_UNKNOWN             0
+#define METHOD_BUFFERED                 0
+#define FILE_ANY_ACCESS                 0
+
+#define CTL_CODE( DeviceType, Function, Method, Access ) (Function) 
+#define MAKEIOCTLINDEX(i)	((i) & 0xFFF)
+
+#else
+
 #include "ioctldef.h"
 
+#endif
+
 #define DEBUG_CAPMODE_FRAMED			0x00000001UL
 #define DEBUG_CAPMODE_CONTINUOUS		0x00000002UL
 #define DEBUG_CAPMODE_HOTKEY			0x00000004UL
@@ -238,17 +251,17 @@ typedef struct _DBG_IN_WRITE_LF_
 
 typedef struct _DBG_STREAM_CONTROL_
 {
-	IMG_BOOL   bInitPhaseComplete;
-	IMG_UINT32 ui32Flags;
+	IMG_BOOL   bInitPhaseComplete;	
+	IMG_UINT32 ui32Flags;			
 
-	IMG_UINT32 ui32CapMode;
-	IMG_UINT32 ui32OutMode;
+	IMG_UINT32 ui32CapMode;			
+	IMG_UINT32 ui32OutMode;			
 	IMG_UINT32 ui32DebugLevel;
 	IMG_UINT32 ui32DefaultMode;
-	IMG_UINT32 ui32Start;
-	IMG_UINT32 ui32End;
-	IMG_UINT32 ui32Current;
-	IMG_UINT32 ui32SampleRate;
+	IMG_UINT32 ui32Start;			
+	IMG_UINT32 ui32End;				
+	IMG_UINT32 ui32Current;			
+	IMG_UINT32 ui32SampleRate;		
 	IMG_UINT32 ui32Reserved;
 } DBG_STREAM_CONTROL, *PDBG_STREAM_CONTROL;
 typedef struct _DBG_STREAM_
@@ -262,13 +275,13 @@ typedef struct _DBG_STREAM_
 	IMG_UINT32 ui32RPtr;
 	IMG_UINT32 ui32WPtr;
 	IMG_UINT32 ui32DataWritten;
-	IMG_UINT32 ui32Marker;
-	IMG_UINT32 ui32InitPhaseWOff;
-
-
-
-
-	IMG_CHAR szName[30];
+	IMG_UINT32 ui32Marker;			
+	IMG_UINT32 ui32InitPhaseWOff;	
+	
+	
+	
+	
+	IMG_CHAR szName[30];		
 } DBG_STREAM,*PDBG_STREAM;
 
 typedef struct _DBGKM_CONNECT_NOTIFIER_
@@ -279,36 +292,36 @@ typedef struct _DBGKM_CONNECT_NOTIFIER_
 typedef struct _DBGKM_SERVICE_TABLE_
 {
 	IMG_UINT32 ui32Size;
-	IMG_VOID *	(IMG_CALLCONV *pfnCreateStream)			(IMG_CHAR * pszName,IMG_UINT32 ui32CapMode,IMG_UINT32 ui32OutMode,IMG_UINT32 ui32Flags,IMG_UINT32 ui32Pages);
-	IMG_VOID	(IMG_CALLCONV *pfnDestroyStream)		(PDBG_STREAM psStream);
-	IMG_VOID *	(IMG_CALLCONV *pfnFindStream)			(IMG_CHAR * pszName, IMG_BOOL bResetInitBuffer);
-	IMG_UINT32	(IMG_CALLCONV *pfnWriteString)			(PDBG_STREAM psStream,IMG_CHAR * pszString,IMG_UINT32 ui32Level);
-	IMG_UINT32	(IMG_CALLCONV *pfnReadString)			(PDBG_STREAM psStream,IMG_CHAR * pszString,IMG_UINT32 ui32Limit);
-	IMG_UINT32	(IMG_CALLCONV *pfnWriteBIN)				(PDBG_STREAM psStream,IMG_UINT8 *pui8InBuf,IMG_UINT32 ui32InBuffSize,IMG_UINT32 ui32Level);
-	IMG_UINT32	(IMG_CALLCONV *pfnReadBIN)				(PDBG_STREAM psStream,IMG_BOOL bReadInitBuffer, IMG_UINT32 ui32OutBufferSize,IMG_UINT8 *pui8OutBuf);
-	IMG_VOID	(IMG_CALLCONV *pfnSetCaptureMode)		(PDBG_STREAM psStream,IMG_UINT32 ui32CapMode,IMG_UINT32 ui32Start,IMG_UINT32 ui32Stop,IMG_UINT32 ui32SampleRate);
-	IMG_VOID	(IMG_CALLCONV *pfnSetOutputMode)		(PDBG_STREAM psStream,IMG_UINT32 ui32OutMode);
-	IMG_VOID	(IMG_CALLCONV *pfnSetDebugLevel)		(PDBG_STREAM psStream,IMG_UINT32 ui32DebugLevel);
-	IMG_VOID	(IMG_CALLCONV *pfnSetFrame)				(PDBG_STREAM psStream,IMG_UINT32 ui32Frame);
-	IMG_UINT32	(IMG_CALLCONV *pfnGetFrame)				(PDBG_STREAM psStream);
-	IMG_VOID	(IMG_CALLCONV *pfnOverrideMode)			(PDBG_STREAM psStream,IMG_UINT32 ui32Mode);
-	IMG_VOID	(IMG_CALLCONV *pfnDefaultMode)			(PDBG_STREAM psStream);
+	IMG_VOID * 	(IMG_CALLCONV *pfnCreateStream)			(IMG_CHAR * pszName,IMG_UINT32 ui32CapMode,IMG_UINT32 ui32OutMode,IMG_UINT32 ui32Flags,IMG_UINT32 ui32Pages);
+	IMG_VOID 	(IMG_CALLCONV *pfnDestroyStream)		(PDBG_STREAM psStream);
+	IMG_VOID * 	(IMG_CALLCONV *pfnFindStream) 			(IMG_CHAR * pszName, IMG_BOOL bResetInitBuffer);
+	IMG_UINT32 	(IMG_CALLCONV *pfnWriteString) 			(PDBG_STREAM psStream,IMG_CHAR * pszString,IMG_UINT32 ui32Level);
+	IMG_UINT32 	(IMG_CALLCONV *pfnReadString)			(PDBG_STREAM psStream,IMG_CHAR * pszString,IMG_UINT32 ui32Limit);
+	IMG_UINT32 	(IMG_CALLCONV *pfnWriteBIN)				(PDBG_STREAM psStream,IMG_UINT8 *pui8InBuf,IMG_UINT32 ui32InBuffSize,IMG_UINT32 ui32Level);
+	IMG_UINT32 	(IMG_CALLCONV *pfnReadBIN)				(PDBG_STREAM psStream,IMG_BOOL bReadInitBuffer, IMG_UINT32 ui32OutBufferSize,IMG_UINT8 *pui8OutBuf);
+	IMG_VOID 	(IMG_CALLCONV *pfnSetCaptureMode)		(PDBG_STREAM psStream,IMG_UINT32 ui32CapMode,IMG_UINT32 ui32Start,IMG_UINT32 ui32Stop,IMG_UINT32 ui32SampleRate);
+	IMG_VOID 	(IMG_CALLCONV *pfnSetOutputMode)		(PDBG_STREAM psStream,IMG_UINT32 ui32OutMode);
+	IMG_VOID 	(IMG_CALLCONV *pfnSetDebugLevel)		(PDBG_STREAM psStream,IMG_UINT32 ui32DebugLevel);
+	IMG_VOID 	(IMG_CALLCONV *pfnSetFrame)				(PDBG_STREAM psStream,IMG_UINT32 ui32Frame);
+	IMG_UINT32 	(IMG_CALLCONV *pfnGetFrame)				(PDBG_STREAM psStream);
+	IMG_VOID 	(IMG_CALLCONV *pfnOverrideMode)			(PDBG_STREAM psStream,IMG_UINT32 ui32Mode);
+	IMG_VOID 	(IMG_CALLCONV *pfnDefaultMode)			(PDBG_STREAM psStream);
 	IMG_UINT32	(IMG_CALLCONV *pfnDBGDrivWrite2)		(PDBG_STREAM psStream,IMG_UINT8 *pui8InBuf,IMG_UINT32 ui32InBuffSize,IMG_UINT32 ui32Level);
-	IMG_UINT32	(IMG_CALLCONV *pfnWriteStringCM)		(PDBG_STREAM psStream,IMG_CHAR * pszString,IMG_UINT32 ui32Level);
+	IMG_UINT32 	(IMG_CALLCONV *pfnWriteStringCM)		(PDBG_STREAM psStream,IMG_CHAR * pszString,IMG_UINT32 ui32Level);
 	IMG_UINT32	(IMG_CALLCONV *pfnWriteBINCM)			(PDBG_STREAM psStream,IMG_UINT8 *pui8InBuf,IMG_UINT32 ui32InBuffSize,IMG_UINT32 ui32Level);
-	IMG_VOID	(IMG_CALLCONV *pfnSetMarker)			(PDBG_STREAM psStream,IMG_UINT32 ui32Marker);
-	IMG_UINT32	(IMG_CALLCONV *pfnGetMarker)			(PDBG_STREAM psStream);
-	IMG_VOID	(IMG_CALLCONV *pfnStartInitPhase)		(PDBG_STREAM psStream);
-	IMG_VOID	(IMG_CALLCONV *pfnStopInitPhase)		(PDBG_STREAM psStream);
-	IMG_BOOL	(IMG_CALLCONV *pfnIsCaptureFrame)		(PDBG_STREAM psStream, IMG_BOOL bCheckPreviousFrame);
-	IMG_UINT32	(IMG_CALLCONV *pfnWriteLF)				(PDBG_STREAM psStream, IMG_UINT8 *pui8InBuf, IMG_UINT32 ui32InBuffSize, IMG_UINT32 ui32Level, IMG_UINT32 ui32Flags);
-	IMG_UINT32	(IMG_CALLCONV *pfnReadLF)				(PDBG_STREAM psStream, IMG_UINT32 ui32OutBuffSize, IMG_UINT8 *pui8OutBuf);
-	IMG_UINT32	(IMG_CALLCONV *pfnGetStreamOffset)		(PDBG_STREAM psStream);
+	IMG_VOID 	(IMG_CALLCONV *pfnSetMarker)			(PDBG_STREAM psStream,IMG_UINT32 ui32Marker);
+	IMG_UINT32 	(IMG_CALLCONV *pfnGetMarker)			(PDBG_STREAM psStream);
+	IMG_VOID 	(IMG_CALLCONV *pfnStartInitPhase)		(PDBG_STREAM psStream);
+	IMG_VOID 	(IMG_CALLCONV *pfnStopInitPhase)		(PDBG_STREAM psStream);
+	IMG_BOOL 	(IMG_CALLCONV *pfnIsCaptureFrame)		(PDBG_STREAM psStream, IMG_BOOL bCheckPreviousFrame);
+	IMG_UINT32 	(IMG_CALLCONV *pfnWriteLF)				(PDBG_STREAM psStream, IMG_UINT8 *pui8InBuf, IMG_UINT32 ui32InBuffSize, IMG_UINT32 ui32Level, IMG_UINT32 ui32Flags);
+	IMG_UINT32 	(IMG_CALLCONV *pfnReadLF)				(PDBG_STREAM psStream, IMG_UINT32 ui32OutBuffSize, IMG_UINT8 *pui8OutBuf);
+	IMG_UINT32 	(IMG_CALLCONV *pfnGetStreamOffset)		(PDBG_STREAM psStream);
 	IMG_VOID	(IMG_CALLCONV *pfnSetStreamOffset)		(PDBG_STREAM psStream, IMG_UINT32 ui32StreamOffset);
-	IMG_BOOL	(IMG_CALLCONV *pfnIsLastCaptureFrame)	(PDBG_STREAM psStream);
-	IMG_VOID	(IMG_CALLCONV *pfnWaitForEvent)			(DBG_EVENT eEvent);
-	IMG_VOID	(IMG_CALLCONV *pfnSetConnectNotifier)	(DBGKM_CONNECT_NOTIFIER fn_notifier);
-	IMG_UINT32	(IMG_CALLCONV *pfnWritePersist)			(PDBG_STREAM psStream,IMG_UINT8 *pui8InBuf,IMG_UINT32 ui32InBuffSize,IMG_UINT32 ui32Level);
+	IMG_BOOL 	(IMG_CALLCONV *pfnIsLastCaptureFrame)	(PDBG_STREAM psStream);
+	IMG_VOID 	(IMG_CALLCONV *pfnWaitForEvent)			(DBG_EVENT eEvent);
+	IMG_VOID 	(IMG_CALLCONV *pfnSetConnectNotifier)	(DBGKM_CONNECT_NOTIFIER fn_notifier);
+	IMG_UINT32 	(IMG_CALLCONV *pfnWritePersist)			(PDBG_STREAM psStream,IMG_UINT8 *pui8InBuf,IMG_UINT32 ui32InBuffSize,IMG_UINT32 ui32Level);
 } DBGKM_SERVICE_TABLE, *PDBGKM_SERVICE_TABLE;
 
 
diff --git a/drivers/gpu/pvr/device.h b/drivers/gpu/pvr/device.h
index f41bd9e26e6..fbc26a6a66d 100644
--- a/drivers/gpu/pvr/device.h
+++ b/drivers/gpu/pvr/device.h
@@ -222,6 +222,8 @@ typedef struct _PVRSRV_DEVICE_NODE_
 #endif
 	IMG_DEV_PHYADDR			(*pfnMMUGetPhysPageAddr)(MMU_HEAP *pMMUHeap, IMG_DEV_VIRTADDR sDevVPageAddr);
 	IMG_DEV_PHYADDR			(*pfnMMUGetPDDevPAddr)(MMU_CONTEXT *pMMUContext);
+	IMG_VOID				(*pfnMMUGetCacheFlushRange)(MMU_CONTEXT *pMMUContext, IMG_UINT32 *pui32RangeMask);
+	IMG_VOID				(*pfnMMUGetPDPhysAddr)(MMU_CONTEXT *pMMUContext, IMG_DEV_PHYADDR *psDevPAddr);
 
 	
 	PVRSRV_ERROR			(*pfnAllocMemTilingRange)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
diff --git a/drivers/gpu/pvr/deviceclass.c b/drivers/gpu/pvr/deviceclass.c
index 471ce0cf12b..effcdfbf055 100644
--- a/drivers/gpu/pvr/deviceclass.c
+++ b/drivers/gpu/pvr/deviceclass.c
@@ -557,6 +557,17 @@ static PVRSRV_ERROR CloseDCDeviceCallBack(IMG_PVOID		pvParam,
 	psDCPerContextInfo = (PVRSRV_DISPLAYCLASS_PERCONTEXT_INFO *)pvParam;
 	psDCInfo = psDCPerContextInfo->psDCInfo;
 
+	if(psDCInfo->sSystemBuffer.sDeviceClassBuffer.ui32MemMapRefCount != 0)
+	{
+		PVR_DPF((PVR_DBG_ERROR,"CloseDCDeviceCallBack: system buffer (0x%p) still mapped (refcount = %d)",
+				&psDCInfo->sSystemBuffer.sDeviceClassBuffer,
+				psDCInfo->sSystemBuffer.sDeviceClassBuffer.ui32MemMapRefCount));
+#if 0
+		
+		return PVRSRV_ERROR_STILL_MAPPED;
+#endif
+	}
+
 	psDCInfo->ui32RefCount--;
 	if(psDCInfo->ui32RefCount == 0)
 	{
@@ -658,6 +669,7 @@ PVRSRV_ERROR PVRSRVOpenDCDeviceKM (PVRSRV_PER_PROCESS_DATA	*psPerProc,
 		}
 
 		psDCInfo->sSystemBuffer.sDeviceClassBuffer.psKernelSyncInfo->ui32RefCount++;
+		psDCInfo->sSystemBuffer.sDeviceClassBuffer.ui32MemMapRefCount = 0;
 	}
 
 	psDCPerContextInfo->psDCInfo = psDCInfo;
@@ -812,7 +824,6 @@ static PVRSRV_ERROR DestroyDCSwapChain(PVRSRV_DC_SWAPCHAIN *psSwapChain)
 	PVRSRV_DISPLAYCLASS_INFO	*psDCInfo = psSwapChain->psDCInfo;
 	IMG_UINT32 i;
 
-
 	
 	if( psDCInfo->psDCSwapChainShared )
 	{
@@ -873,9 +884,24 @@ static PVRSRV_ERROR DestroyDCSwapChainRefCallBack(IMG_PVOID pvParam, IMG_UINT32
 {
 	PVRSRV_DC_SWAPCHAIN_REF *psSwapChainRef = (PVRSRV_DC_SWAPCHAIN_REF *) pvParam;
 	PVRSRV_ERROR eError = PVRSRV_OK;
+	IMG_UINT32 i;
 
 	PVR_UNREFERENCED_PARAMETER(ui32Param);
 
+	for (i = 0; i < psSwapChainRef->psSwapChain->ui32BufferCount; i++)
+	{
+		if (psSwapChainRef->psSwapChain->asBuffer[i].sDeviceClassBuffer.ui32MemMapRefCount != 0)
+		{
+			PVR_DPF((PVR_DBG_ERROR, "DestroyDCSwapChainRefCallBack: swapchain (0x%p) still mapped (ui32MemMapRefCount = %d)",
+					&psSwapChainRef->psSwapChain->asBuffer[i].sDeviceClassBuffer,
+					psSwapChainRef->psSwapChain->asBuffer[i].sDeviceClassBuffer.ui32MemMapRefCount));
+#if 0
+			
+			return PVRSRV_ERROR_STILL_MAPPED;
+#endif
+		}
+	}
+
 	if(--psSwapChainRef->psSwapChain->ui32RefCount == 0) 
 	{
 		eError = DestroyDCSwapChain(psSwapChainRef->psSwapChain);
@@ -1313,6 +1339,7 @@ PVRSRV_ERROR PVRSRVSwapToDCBufferKM(IMG_HANDLE	hDeviceKM,
 	IMG_UINT32 ui32NumSrcSyncs = 1;
 	PVRSRV_KERNEL_SYNC_INFO *apsSrcSync[2];
 	PVRSRV_COMMAND *psCommand;
+	SYS_DATA *psSysData;
 
 	if(!hDeviceKM || !hBuffer || !psClipRect)
 	{
@@ -1320,14 +1347,6 @@ PVRSRV_ERROR PVRSRVSwapToDCBufferKM(IMG_HANDLE	hDeviceKM,
 		return PVRSRV_ERROR_INVALID_PARAMS;
 	}
 
-#if defined(SUPPORT_LMA)
-	eError = PVRSRVPowerLock(KERNEL_ID, IMG_FALSE);
-	if(eError != PVRSRV_OK)
-	{
-		return eError;
-	}
-#endif 
-
 	psBuffer = (PVRSRV_DC_BUFFER*)hBuffer;
 	psDCInfo = DCDeviceHandleToDCInfo(hDeviceKM);
 
@@ -1427,28 +1446,15 @@ PVRSRV_ERROR PVRSRVSwapToDCBufferKM(IMG_HANDLE	hDeviceKM,
 
 	
 
+	SysAcquireData(&psSysData);
+    eError = OSScheduleMISR(psSysData);
 
-
-
-
-
-
-	 
-	LOOP_UNTIL_TIMEOUT(MAX_HW_TIME_US)
+	if (eError != PVRSRV_OK)
 	{
-		if(PVRSRVProcessQueues(KERNEL_ID, IMG_FALSE) != PVRSRV_ERROR_PROCESSING_BLOCKED)
-		{
-			goto ProcessedQueues;
-		}
-		OSWaitus(MAX_HW_TIME_US/WAIT_TRY_COUNT);
-	} END_LOOP_UNTIL_TIMEOUT();
-
-	PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBufferKM: Failed to process queues"));
-
-	eError = PVRSRV_ERROR_FAILED_TO_PROCESS_QUEUE;
-	goto Exit;
+		PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBufferKM: Failed to schedule MISR"));
+		goto Exit;
+	}
 
-ProcessedQueues:
 	
 	psBuffer->psSwapChain->psLastFlipBuffer = psBuffer;
 
@@ -1459,9 +1465,6 @@ Exit:
 		eError = PVRSRV_ERROR_RETRY;
 	}
 
-#if defined(SUPPORT_LMA)
-	PVRSRVPowerUnlock(KERNEL_ID);
-#endif
 	return eError;
 }
 
@@ -1481,6 +1484,7 @@ PVRSRV_ERROR PVRSRVSwapToDCSystemKM(IMG_HANDLE	hDeviceKM,
 	PVRSRV_COMMAND *psCommand;
 	IMG_BOOL bAddReferenceToLast = IMG_TRUE;
 	IMG_UINT16 ui16SwapCommandID = DC_FLIP_COMMAND;
+    SYS_DATA *psSysData;
 
 	if(!hDeviceKM || !hSwapChainRef)
 	{
@@ -1488,14 +1492,6 @@ PVRSRV_ERROR PVRSRVSwapToDCSystemKM(IMG_HANDLE	hDeviceKM,
 		return PVRSRV_ERROR_INVALID_PARAMS;
 	}
 
-#if defined(SUPPORT_LMA)
-	eError = PVRSRVPowerLock(KERNEL_ID, IMG_FALSE);
-	if(eError != PVRSRV_OK)
-	{
-		return eError;
-	}
-#endif 
-
 	psDCInfo = DCDeviceHandleToDCInfo(hDeviceKM);
 	psSwapChainRef = (PVRSRV_DC_SWAPCHAIN_REF*)hSwapChainRef;
 	psSwapChain = psSwapChainRef->psSwapChain;
@@ -1581,28 +1577,15 @@ PVRSRV_ERROR PVRSRVSwapToDCSystemKM(IMG_HANDLE	hDeviceKM,
 	}
 
 	
+	SysAcquireData(&psSysData);
+    eError = OSScheduleMISR(psSysData);
 
-
-
-
-
-
-	 
-	LOOP_UNTIL_TIMEOUT(MAX_HW_TIME_US)
+	if (eError != PVRSRV_OK)
 	{
-		if(PVRSRVProcessQueues(KERNEL_ID, IMG_FALSE) != PVRSRV_ERROR_PROCESSING_BLOCKED)
-		{
-			goto ProcessedQueues;
-		}
-
-		OSWaitus(MAX_HW_TIME_US/WAIT_TRY_COUNT);
-	} END_LOOP_UNTIL_TIMEOUT();
-
-	PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCSystemKM: Failed to process queues"));
-	eError = PVRSRV_ERROR_FAILED_TO_PROCESS_QUEUE;
-	goto Exit;
+		PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCSystemKM: Failed to schedule MISR"));
+		goto Exit;
+	}
 
-ProcessedQueues:
 	
 	psSwapChain->psLastFlipBuffer = &psDCInfo->sSystemBuffer;
 
@@ -1615,9 +1598,6 @@ Exit:
 		eError = PVRSRV_ERROR_RETRY;
 	}
 
-#if defined(SUPPORT_LMA)
-	PVRSRVPowerUnlock(KERNEL_ID);
-#endif
 	return eError;
 }
 
@@ -1736,17 +1716,29 @@ static PVRSRV_ERROR CloseBCDeviceCallBack(IMG_PVOID		pvParam,
 {
 	PVRSRV_BUFFERCLASS_PERCONTEXT_INFO *psBCPerContextInfo;
 	PVRSRV_BUFFERCLASS_INFO *psBCInfo;
+	IMG_UINT32 i;
 
 	PVR_UNREFERENCED_PARAMETER(ui32Param);
 
 	psBCPerContextInfo = (PVRSRV_BUFFERCLASS_PERCONTEXT_INFO *)pvParam;
+
 	psBCInfo = psBCPerContextInfo->psBCInfo;
 
+	for (i = 0; i < psBCInfo->ui32BufferCount; i++)
+	{
+		if (psBCInfo->psBuffer[i].sDeviceClassBuffer.ui32MemMapRefCount != 0)
+		{
+			PVR_DPF((PVR_DBG_ERROR, "CloseBCDeviceCallBack: buffer %d (0x%p) still mapped (ui32MemMapRefCount = %d)",
+					i,
+					&psBCInfo->psBuffer[i].sDeviceClassBuffer,
+					psBCInfo->psBuffer[i].sDeviceClassBuffer.ui32MemMapRefCount));
+			return PVRSRV_ERROR_STILL_MAPPED;
+		}
+	}
+
 	psBCInfo->ui32RefCount--;
 	if(psBCInfo->ui32RefCount == 0)
 	{
-		IMG_UINT32 i;
-
 		
 		psBCInfo->psFuncTable->pfnCloseBCDevice(psBCInfo->ui32DeviceID, psBCInfo->hExtDevice);
 
@@ -1900,6 +1892,7 @@ PVRSRV_ERROR PVRSRVOpenBCDeviceKM (PVRSRV_PER_PROCESS_DATA	*psPerProc,
 			psBCInfo->psBuffer[i].sDeviceClassBuffer.pfnGetBufferAddr = psBCInfo->psFuncTable->pfnGetBufferAddr;
 			psBCInfo->psBuffer[i].sDeviceClassBuffer.hDevMemContext = psBCInfo->hDevMemContext;
 			psBCInfo->psBuffer[i].sDeviceClassBuffer.hExtDevice = psBCInfo->hExtDevice;
+			psBCInfo->psBuffer[i].sDeviceClassBuffer.ui32MemMapRefCount = 0;
 		}
 	}
 
diff --git a/drivers/gpu/pvr/devicemem.c b/drivers/gpu/pvr/devicemem.c
index aeba0deb0cb..a14308b9351 100644
--- a/drivers/gpu/pvr/devicemem.c
+++ b/drivers/gpu/pvr/devicemem.c
@@ -52,12 +52,18 @@ typedef struct _PVRSRV_DC_MAPINFO_
 	PVRSRV_DEVICE_NODE		*psDeviceNode;
 	IMG_UINT32				ui32RangeIndex;
 	IMG_UINT32				ui32TilingStride;
+	PVRSRV_DEVICECLASS_BUFFER	*psDeviceClassBuffer;
 } PVRSRV_DC_MAPINFO;
 
+static IMG_UINT32 g_ui32SyncUID = 0;
 
 IMG_EXPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapsKM(IMG_HANDLE hDevCookie,
+#if defined (SUPPORT_SID_INTERFACE)
+													PVRSRV_HEAP_INFO_KM *psHeapInfo)
+#else
 													PVRSRV_HEAP_INFO *psHeapInfo)
+#endif
 {
 	PVRSRV_DEVICE_NODE *psDeviceNode;
 	IMG_UINT32 ui32HeapCount;
@@ -105,7 +111,11 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDeviceMemContextKM(IMG_HANDLE					hDevCook
 														 PVRSRV_PER_PROCESS_DATA	*psPerProc,
 														 IMG_HANDLE 				*phDevMemContext,
 														 IMG_UINT32 				*pui32ClientHeapCount,
+#if defined (SUPPORT_SID_INTERFACE)
+														 PVRSRV_HEAP_INFO_KM		*psHeapInfo,
+#else
 														 PVRSRV_HEAP_INFO			*psHeapInfo,
+#endif
 														 IMG_BOOL					*pbCreated,
 														 IMG_BOOL 					*pbShared)
 {
@@ -117,7 +127,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDeviceMemContextKM(IMG_HANDLE					hDevCook
 	IMG_DEV_PHYADDR sPDDevPAddr;
 	IMG_UINT32 i;
 
-#if !defined(PVR_SECURE_HANDLES)
+#if !defined(PVR_SECURE_HANDLES) && !defined (SUPPORT_SID_INTERFACE)
 	PVR_UNREFERENCED_PARAMETER(pbShared);
 #endif
 
@@ -164,7 +174,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDeviceMemContextKM(IMG_HANDLE					hDevCook
 				psHeapInfo[ui32ClientHeapCount].sDevVAddrBase = psDeviceMemoryHeap[i].sDevVAddrBase;
 				psHeapInfo[ui32ClientHeapCount].ui32HeapByteSize = psDeviceMemoryHeap[i].ui32HeapSize;
 				psHeapInfo[ui32ClientHeapCount].ui32Attribs = psDeviceMemoryHeap[i].ui32Attribs;
-#if defined(PVR_SECURE_HANDLES)
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
 				pbShared[ui32ClientHeapCount] = IMG_TRUE;
 #endif
 				ui32ClientHeapCount++;
@@ -172,8 +182,20 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDeviceMemContextKM(IMG_HANDLE					hDevCook
 			}
 			case DEVICE_MEMORY_HEAP_PERCONTEXT:
 			{
-				hDevMemHeap = BM_CreateHeap(hDevMemContext,
-											&psDeviceMemoryHeap[i]);
+				if (psDeviceMemoryHeap[i].ui32HeapSize > 0)
+				{
+					hDevMemHeap = BM_CreateHeap(hDevMemContext,
+												&psDeviceMemoryHeap[i]);
+					if (hDevMemHeap == IMG_NULL)
+					{
+						BM_DestroyContext(hDevMemContext, IMG_NULL);
+						return PVRSRV_ERROR_OUT_OF_MEMORY;
+					}
+				}
+				else
+				{
+					hDevMemHeap = IMG_NULL;
+				}
 
 				
 				psHeapInfo[ui32ClientHeapCount].ui32HeapID = psDeviceMemoryHeap[i].ui32HeapID;
@@ -181,7 +203,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDeviceMemContextKM(IMG_HANDLE					hDevCook
 				psHeapInfo[ui32ClientHeapCount].sDevVAddrBase = psDeviceMemoryHeap[i].sDevVAddrBase;
 				psHeapInfo[ui32ClientHeapCount].ui32HeapByteSize = psDeviceMemoryHeap[i].ui32HeapSize;
 				psHeapInfo[ui32ClientHeapCount].ui32Attribs = psDeviceMemoryHeap[i].ui32Attribs;
-#if defined(PVR_SECURE_HANDLES)
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
 				pbShared[ui32ClientHeapCount] = IMG_FALSE;
 #endif
 
@@ -215,7 +237,11 @@ IMG_EXPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfoKM(IMG_HANDLE					hDevCookie,
 														 IMG_HANDLE 				hDevMemContext,
 														 IMG_UINT32 				*pui32ClientHeapCount,
+#if defined (SUPPORT_SID_INTERFACE)
+														 PVRSRV_HEAP_INFO_KM		*psHeapInfo,
+#else
 														 PVRSRV_HEAP_INFO			*psHeapInfo,
+#endif
 														 IMG_BOOL 					*pbShared)
 {
 	PVRSRV_DEVICE_NODE *psDeviceNode;
@@ -224,7 +250,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfoKM(IMG_HANDLE					hDevCookie
 	IMG_HANDLE hDevMemHeap;
 	IMG_UINT32 i;
 
-#if !defined(PVR_SECURE_HANDLES)
+#if !defined(PVR_SECURE_HANDLES) && !defined (SUPPORT_SID_INTERFACE)
 	PVR_UNREFERENCED_PARAMETER(pbShared);
 #endif
 
@@ -259,7 +285,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfoKM(IMG_HANDLE					hDevCookie
 				psHeapInfo[ui32ClientHeapCount].sDevVAddrBase = psDeviceMemoryHeap[i].sDevVAddrBase;
 				psHeapInfo[ui32ClientHeapCount].ui32HeapByteSize = psDeviceMemoryHeap[i].ui32HeapSize;
 				psHeapInfo[ui32ClientHeapCount].ui32Attribs = psDeviceMemoryHeap[i].ui32Attribs;
-#if defined(PVR_SECURE_HANDLES)
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
 				pbShared[ui32ClientHeapCount] = IMG_TRUE;
 #endif
 				ui32ClientHeapCount++;
@@ -267,8 +293,20 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfoKM(IMG_HANDLE					hDevCookie
 			}
 			case DEVICE_MEMORY_HEAP_PERCONTEXT:
 			{
-				hDevMemHeap = BM_CreateHeap(hDevMemContext,
-											&psDeviceMemoryHeap[i]);
+				if (psDeviceMemoryHeap[i].ui32HeapSize > 0)
+				{
+					hDevMemHeap = BM_CreateHeap(hDevMemContext,
+												&psDeviceMemoryHeap[i]);
+				
+					if (hDevMemHeap == IMG_NULL)
+					{
+						return PVRSRV_ERROR_OUT_OF_MEMORY;
+					}
+				}
+				else
+				{
+					hDevMemHeap = IMG_NULL;
+				}
 
 				
 				psHeapInfo[ui32ClientHeapCount].ui32HeapID = psDeviceMemoryHeap[i].ui32HeapID;
@@ -276,7 +314,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfoKM(IMG_HANDLE					hDevCookie
 				psHeapInfo[ui32ClientHeapCount].sDevVAddrBase = psDeviceMemoryHeap[i].sDevVAddrBase;
 				psHeapInfo[ui32ClientHeapCount].ui32HeapByteSize = psDeviceMemoryHeap[i].ui32HeapSize;
 				psHeapInfo[ui32ClientHeapCount].ui32Attribs = psDeviceMemoryHeap[i].ui32Attribs;
-#if defined(PVR_SECURE_HANDLES)
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
 				pbShared[ui32ClientHeapCount] = IMG_FALSE;
 #endif
 
@@ -354,7 +392,7 @@ static PVRSRV_ERROR AllocDeviceMem(IMG_HANDLE		hDevCookie,
 
 	psMemInfo->sDevVAddr = psMemBlock->sDevVirtAddr;
 
-	psMemInfo->ui32AllocSize = ui32Size;
+	psMemInfo->uAllocSize = ui32Size;
 
 	
 	psMemInfo->pvSysBackupBuffer = IMG_NULL;
@@ -387,7 +425,7 @@ static PVRSRV_ERROR FreeDeviceMem2(PVRSRV_KERNEL_MEM_INFO *psMemInfo, IMG_BOOL b
 	if ((psMemInfo->pvSysBackupBuffer) && bFromAllocator)
 	{
 		
-		OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, psMemInfo->ui32AllocSize, psMemInfo->pvSysBackupBuffer, IMG_NULL);
+		OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, psMemInfo->uAllocSize, psMemInfo->pvSysBackupBuffer, IMG_NULL);
 		psMemInfo->pvSysBackupBuffer = IMG_NULL;
 	}
 
@@ -415,7 +453,7 @@ static PVRSRV_ERROR FreeDeviceMem(PVRSRV_KERNEL_MEM_INFO *psMemInfo)
 	if(psMemInfo->pvSysBackupBuffer)
 	{
 		
-		OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, psMemInfo->ui32AllocSize, psMemInfo->pvSysBackupBuffer, IMG_NULL);
+		OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, psMemInfo->uAllocSize, psMemInfo->pvSysBackupBuffer, IMG_NULL);
 		psMemInfo->pvSysBackupBuffer = IMG_NULL;
 	}
 
@@ -492,13 +530,14 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVAllocSyncInfoKM(IMG_HANDLE					hDevCookie,
 	PDUMPMEM(psKernelSyncInfo->psSyncDataMemInfoKM->pvLinAddrKM,
 			psKernelSyncInfo->psSyncDataMemInfoKM,
 			0,
-			psKernelSyncInfo->psSyncDataMemInfoKM->ui32AllocSize,
+			(IMG_UINT32)psKernelSyncInfo->psSyncDataMemInfoKM->uAllocSize,
 			PDUMP_FLAGS_CONTINUOUS,
 			MAKEUNIQUETAG(psKernelSyncInfo->psSyncDataMemInfoKM));
 #endif
 
 	psKernelSyncInfo->sWriteOpsCompleteDevVAddr.uiAddr = psKernelSyncInfo->psSyncDataMemInfoKM->sDevVAddr.uiAddr + offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete);
 	psKernelSyncInfo->sReadOpsCompleteDevVAddr.uiAddr = psKernelSyncInfo->psSyncDataMemInfoKM->sDevVAddr.uiAddr + offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete);
+	psKernelSyncInfo->ui32UID = g_ui32SyncUID++;
 
 	
 	psKernelSyncInfo->psSyncDataMemInfoKM->psKernelSyncInfo = IMG_NULL;
@@ -514,14 +553,14 @@ IMG_EXPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVFreeSyncInfoKM(PVRSRV_KERNEL_SYNC_INFO	*psKernelSyncInfo)
 {
 	PVRSRV_ERROR eError;
-	
+
 	if (psKernelSyncInfo->ui32RefCount != 0)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "oops: sync info ref count not zero at destruction"));
 		
 		return PVRSRV_ERROR_OUT_OF_MEMORY; 
 	}
-	
+
 	eError = FreeDeviceMem(psKernelSyncInfo->psSyncDataMemInfoKM);
 	(IMG_VOID)OSFreeMem(PVRSRV_PAGEABLE_SELECT, sizeof(PVRSRV_KERNEL_SYNC_INFO), psKernelSyncInfo, IMG_NULL);
 	
@@ -558,9 +597,13 @@ static PVRSRV_ERROR FreeMemCallBackCommon(PVRSRV_KERNEL_MEM_INFO *psMemInfo,
 	psMemInfo->ui32RefCount--;
 
 	
-	if((psMemInfo->ui32Flags & PVRSRV_MEM_EXPORTED) && (bFromAllocator == IMG_TRUE))
+	if(((psMemInfo->ui32Flags & PVRSRV_MEM_EXPORTED) != 0) && (bFromAllocator == IMG_TRUE))
 	{
+#if defined (SUPPORT_SID_INTERFACE)
+		IMG_SID hMemInfo = 0;
+#else
 		IMG_HANDLE hMemInfo = IMG_NULL;
+#endif
 
 		
 		eError = PVRSRVFindHandle(KERNEL_HANDLE_BASE,
@@ -611,8 +654,10 @@ static PVRSRV_ERROR FreeMemCallBackCommon(PVRSRV_KERNEL_MEM_INFO *psMemInfo,
 	}
 
 	
-	
-	eError = FreeDeviceMem2(psMemInfo, bFromAllocator);
+	if (eError == PVRSRV_OK)
+	{
+		eError = FreeDeviceMem2(psMemInfo, bFromAllocator);
+	}
 
 	return eError;
 }
@@ -821,8 +866,8 @@ IMG_EXPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemoryKM(IMG_HANDLE				hDevCookie,
 												PVRSRV_PER_PROCESS_DATA	*psPerProc,
 												IMG_HANDLE				hDevMemContext,
-												IMG_SIZE_T 				ui32ByteSize,
-												IMG_SIZE_T				ui32PageOffset,
+												IMG_SIZE_T 				uByteSize,
+												IMG_SIZE_T				uPageOffset,
 												IMG_BOOL				bPhysContig,
 												IMG_SYS_PHYADDR	 		*psExtSysPAddr,
 												IMG_VOID 				*pvLinAddr,
@@ -842,11 +887,11 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemoryKM(IMG_HANDLE				hDevCookie,
 	IMG_VOID 			*pvPageAlignedCPUVAddr;
 	IMG_SYS_PHYADDR	 	*psIntSysPAddr = IMG_NULL;
 	IMG_HANDLE			hOSWrapMem = IMG_NULL;
-	DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;	
+	DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
 	IMG_UINT32		i;
-        IMG_SIZE_T              ui32PageCount = 0;
-	
-	
+	IMG_SIZE_T          uPageCount = 0;
+
+
 	psDeviceNode = (PVRSRV_DEVICE_NODE*)hDevCookie;
 	PVR_ASSERT(psDeviceNode != IMG_NULL);
 
@@ -859,15 +904,15 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemoryKM(IMG_HANDLE				hDevCookie,
 	if(pvLinAddr)
 	{
 		
-		ui32PageOffset = (IMG_UINTPTR_T)pvLinAddr & (ui32HostPageSize - 1);
+		uPageOffset = (IMG_UINTPTR_T)pvLinAddr & (ui32HostPageSize - 1);
 
 		
-		ui32PageCount = HOST_PAGEALIGN(ui32ByteSize + ui32PageOffset) / ui32HostPageSize;
-		pvPageAlignedCPUVAddr = (IMG_VOID *)((IMG_UINTPTR_T)pvLinAddr - ui32PageOffset);
+		uPageCount = HOST_PAGEALIGN(uByteSize + uPageOffset) / ui32HostPageSize;
+		pvPageAlignedCPUVAddr = (IMG_VOID *)((IMG_UINTPTR_T)pvLinAddr - uPageOffset);
 
 		
 		if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
-						ui32PageCount * sizeof(IMG_SYS_PHYADDR),
+						uPageCount * sizeof(IMG_SYS_PHYADDR),
 						(IMG_VOID **)&psIntSysPAddr, IMG_NULL,
 						"Array of Page Addresses") != PVRSRV_OK)
 		{
@@ -876,7 +921,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemoryKM(IMG_HANDLE				hDevCookie,
 		}
 
 		eError = OSAcquirePhysPageAddr(pvPageAlignedCPUVAddr,
-										ui32PageCount * ui32HostPageSize,
+										uPageCount * ui32HostPageSize,
 										psIntSysPAddr,
 										&hOSWrapMem);
 		if(eError != PVRSRV_OK)
@@ -897,7 +942,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemoryKM(IMG_HANDLE				hDevCookie,
 	{
 		
 	}
-	
+
 	
 	psDevMemoryInfo = &((BM_CONTEXT*)hDevMemContext)->psDeviceNode->sDevMemoryInfo;
 	psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap;
@@ -908,7 +953,14 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemoryKM(IMG_HANDLE				hDevCookie,
 			if(psDeviceMemoryHeap[i].DevMemHeapType == DEVICE_MEMORY_HEAP_PERCONTEXT)
 			{
 				
-				hDevMemHeap = BM_CreateHeap(hDevMemContext, &psDeviceMemoryHeap[i]);
+				if (psDeviceMemoryHeap[i].ui32HeapSize > 0)
+				{
+					hDevMemHeap = BM_CreateHeap(hDevMemContext, &psDeviceMemoryHeap[i]);
+				}
+				else
+				{
+					hDevMemHeap = IMG_NULL;
+				}
 			}
 			else
 			{
@@ -941,8 +993,8 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemoryKM(IMG_HANDLE				hDevCookie,
 	psMemBlock = &(psMemInfo->sMemBlk);
 
 	bBMError = BM_Wrap(hDevMemHeap,
-					   ui32ByteSize,
-					   ui32PageOffset,
+					   uByteSize,
+					   uPageOffset,
 					   bPhysContig,
 					   psExtSysPAddr,
 					   IMG_NULL,
@@ -967,7 +1019,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemoryKM(IMG_HANDLE				hDevCookie,
 	
 	psMemInfo->pvLinAddrKM = BM_HandleToCpuVaddr(hBuffer);
 	psMemInfo->sDevVAddr = psMemBlock->sDevVirtAddr;
-	psMemInfo->ui32AllocSize = ui32ByteSize;
+	psMemInfo->uAllocSize = uByteSize;
 
 	
 
@@ -1033,10 +1085,10 @@ ErrorExitPhase2:
 ErrorExitPhase1:
 	if(psIntSysPAddr)
 	{
-		OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, ui32PageCount * sizeof(IMG_SYS_PHYADDR), psIntSysPAddr, IMG_NULL);
+		OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, uPageCount * sizeof(IMG_SYS_PHYADDR), psIntSysPAddr, IMG_NULL);
 		
 	}
-	
+
 	return eError;
 }
 
@@ -1080,7 +1132,7 @@ static PVRSRV_ERROR UnmapDeviceMemoryCallBack(IMG_PVOID pvParam,
 			}
 		}
 	}
-	
+
 	eError = FreeDeviceMem(psMapData->psMemInfo);
 	if(eError != PVRSRV_OK)
 	{
@@ -1106,7 +1158,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemoryKM(PVRSRV_PER_PROCESS_DATA	*psPer
 {
 	PVRSRV_ERROR				eError;
 	IMG_UINT32					i;
-	IMG_SIZE_T					ui32PageCount, ui32PageOffset;
+	IMG_SIZE_T					uPageCount, uPageOffset;
 	IMG_SIZE_T					ui32HostPageSize = HOST_PAGESIZE();
 	IMG_SYS_PHYADDR				*psSysPAddr = IMG_NULL;
 	IMG_DEV_PHYADDR				sDevPAddr;
@@ -1130,16 +1182,16 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemoryKM(PVRSRV_PER_PROCESS_DATA	*psPer
 	
 	*ppsDstMemInfo = IMG_NULL;
 
-	ui32PageOffset = psSrcMemInfo->sDevVAddr.uiAddr & (ui32HostPageSize - 1);
-	ui32PageCount = HOST_PAGEALIGN(psSrcMemInfo->ui32AllocSize + ui32PageOffset) / ui32HostPageSize;
-	pvPageAlignedCPUVAddr = (IMG_VOID *)((IMG_UINTPTR_T)psSrcMemInfo->pvLinAddrKM - ui32PageOffset);
+	uPageOffset = psSrcMemInfo->sDevVAddr.uiAddr & (ui32HostPageSize - 1);
+	uPageCount = HOST_PAGEALIGN(psSrcMemInfo->uAllocSize + uPageOffset) / ui32HostPageSize;
+	pvPageAlignedCPUVAddr = (IMG_VOID *)((IMG_UINTPTR_T)psSrcMemInfo->pvLinAddrKM - uPageOffset);
 
 	
 
 
 
 	if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
-					ui32PageCount*sizeof(IMG_SYS_PHYADDR),
+					uPageCount*sizeof(IMG_SYS_PHYADDR),
 					(IMG_VOID **)&psSysPAddr, IMG_NULL,
 					"Array of Page Addresses") != PVRSRV_OK)
 	{
@@ -1153,8 +1205,8 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemoryKM(PVRSRV_PER_PROCESS_DATA	*psPer
 	psDeviceNode = psBuf->pMapping->pBMHeap->pBMContext->psDeviceNode;
 
 	
-	sDevVAddr.uiAddr = psSrcMemInfo->sDevVAddr.uiAddr - IMG_CAST_TO_DEVVADDR_UINT(ui32PageOffset);
-	for(i=0; i<ui32PageCount; i++)
+	sDevVAddr.uiAddr = psSrcMemInfo->sDevVAddr.uiAddr - IMG_CAST_TO_DEVVADDR_UINT(uPageOffset);
+	for(i=0; i<uPageCount; i++)
 	{
 		BM_GetPhysPageAddr(psSrcMemInfo, sDevVAddr, &sDevPAddr);
 
@@ -1176,7 +1228,6 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemoryKM(PVRSRV_PER_PROCESS_DATA	*psPer
 		goto ErrorExit;
 	}
 
-
 	if(OSAllocMem(PVRSRV_PAGEABLE_SELECT,
 					sizeof(PVRSRV_KERNEL_MEM_INFO),
 					(IMG_VOID **)&psMemInfo, IMG_NULL,
@@ -1193,8 +1244,8 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemoryKM(PVRSRV_PER_PROCESS_DATA	*psPer
 	psMemBlock = &(psMemInfo->sMemBlk);
 
 	bBMError = BM_Wrap(hDstDevMemHeap,
-					   psSrcMemInfo->ui32AllocSize,
-					   ui32PageOffset,
+					   psSrcMemInfo->uAllocSize,
+					   uPageOffset,
 					   IMG_FALSE,
 					   psSysPAddr,
 					   pvPageAlignedCPUVAddr,
@@ -1223,12 +1274,14 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemoryKM(PVRSRV_PER_PROCESS_DATA	*psPer
 
 	
 	psMemInfo->sDevVAddr = psMemBlock->sDevVirtAddr;
-	psMemInfo->ui32AllocSize = psSrcMemInfo->ui32AllocSize;
+	psMemInfo->uAllocSize = psSrcMemInfo->uAllocSize;
 	psMemInfo->psKernelSyncInfo = psSrcMemInfo->psKernelSyncInfo;
 
 	
-	if( psMemInfo->psKernelSyncInfo )
+	if(psMemInfo->psKernelSyncInfo)
+	{
 		psMemInfo->psKernelSyncInfo->ui32RefCount++;
+	}
 
 	
 
@@ -1324,6 +1377,11 @@ static PVRSRV_ERROR UnmapDeviceClassMemoryCallBack(IMG_PVOID	pvParam,
 	}
 #endif
 
+	(psDCMapInfo->psDeviceClassBuffer->ui32MemMapRefCount)--;
+	PVR_TRACE(("decrementing (0x%p) psDCMapInfo->psDeviceClassBuffer->ui32MemMapRefCount... == %d",
+			psDCMapInfo->psDeviceClassBuffer,
+			psDCMapInfo->psDeviceClassBuffer->ui32MemMapRefCount));
+
 	OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(PVRSRV_DC_MAPINFO), psDCMapInfo, IMG_NULL);
 
 	return FreeMemCallBackCommon(psMemInfo, ui32Param, IMG_TRUE);
@@ -1348,7 +1406,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemoryKM(PVRSRV_PER_PROCESS_DATA	*
 	DEVICE_MEMORY_INFO *psDevMemoryInfo;
 	DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
 	IMG_HANDLE hDevMemHeap = IMG_NULL;
-	IMG_SIZE_T ui32ByteSize;
+	IMG_SIZE_T uByteSize;
 	IMG_SIZE_T ui32Offset;
 	IMG_SIZE_T ui32PageSize = HOST_PAGESIZE();
 	BM_HANDLE		hBuffer;
@@ -1398,7 +1456,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemoryKM(PVRSRV_PER_PROCESS_DATA	*
 	eError = psDeviceClassBuffer->pfnGetBufferAddr(psDeviceClassBuffer->hExtDevice,
 												   psDeviceClassBuffer->hExtBuffer,
 												   &psSysPAddr,
-												   &ui32ByteSize,
+												   &uByteSize,
 												   &pvCPUVAddr,
 												   phOSMapInfo,
 												   &bPhysContig,
@@ -1421,7 +1479,14 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemoryKM(PVRSRV_PER_PROCESS_DATA	*
 			if(psDeviceMemoryHeap[i].DevMemHeapType == DEVICE_MEMORY_HEAP_PERCONTEXT)
 			{
 				
-				hDevMemHeap = BM_CreateHeap(hDevMemContext, &psDeviceMemoryHeap[i]);
+				if (psDeviceMemoryHeap[i].ui32HeapSize > 0)
+				{
+					hDevMemHeap = BM_CreateHeap(hDevMemContext, &psDeviceMemoryHeap[i]);
+				}
+				else
+				{
+					hDevMemHeap = IMG_NULL;
+				}
 			}
 			else
 			{
@@ -1457,7 +1522,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemoryKM(PVRSRV_PER_PROCESS_DATA	*
 	psMemBlock = &(psMemInfo->sMemBlk);
 
 	bBMError = BM_Wrap(hDevMemHeap,
-					   ui32ByteSize,
+					   uByteSize,
 					   ui32Offset,
 					   bPhysContig,
 					   psSysPAddr,
@@ -1486,7 +1551,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemoryKM(PVRSRV_PER_PROCESS_DATA	*
 
 	
 	psMemInfo->sDevVAddr = psMemBlock->sDevVirtAddr;
-	psMemInfo->ui32AllocSize = ui32ByteSize;
+	psMemInfo->uAllocSize = uByteSize;
 	psMemInfo->psKernelSyncInfo = psDeviceClassBuffer->psKernelSyncInfo;
 
 	
@@ -1495,6 +1560,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemoryKM(PVRSRV_PER_PROCESS_DATA	*
 
 	
 	psDCMapInfo->psMemInfo = psMemInfo;
+	psDCMapInfo->psDeviceClassBuffer = psDeviceClassBuffer;
 
 #if defined(SUPPORT_MEMORY_TILING)
 	psDCMapInfo->psDeviceNode = psDeviceNode;
@@ -1521,6 +1587,11 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemoryKM(PVRSRV_PER_PROCESS_DATA	*
 													0,
 													&UnmapDeviceClassMemoryCallBack);
 
+	(psDeviceClassBuffer->ui32MemMapRefCount)++;
+	PVR_TRACE(("incrementing (0x%p) psDeviceClassBuffer->ui32MemMapRefCount... == %d",
+			psDeviceClassBuffer,
+			psDeviceClassBuffer->ui32MemMapRefCount));
+
 	psMemInfo->ui32RefCount++;
 
 	psMemInfo->memType = PVRSRV_MEMTYPE_DEVICECLASS;
@@ -1529,9 +1600,9 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemoryKM(PVRSRV_PER_PROCESS_DATA	*
 	*ppsMemInfo = psMemInfo;
 
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
-
+	
 	PDUMPCOMMENT("Dump display surface");
-	PDUMPMEM(IMG_NULL, psMemInfo, ui32Offset, psMemInfo->ui32AllocSize, PDUMP_FLAGS_CONTINUOUS, ((BM_BUF*)psMemInfo->sMemBlk.hBuffer)->pMapping);
+	PDUMPMEM(IMG_NULL, psMemInfo, ui32Offset, psMemInfo->uAllocSize, PDUMP_FLAGS_CONTINUOUS, ((BM_BUF*)psMemInfo->sMemBlk.hBuffer)->pMapping);
 #endif
 	return PVRSRV_OK;
 
@@ -1562,3 +1633,29 @@ ErrorExitPhase1:
 	return eError;
 }
 
+
+IMG_EXPORT
+PVRSRV_ERROR IMG_CALLCONV PVRSRVChangeDeviceMemoryAttributesKM(IMG_HANDLE hKernelMemInfo, IMG_UINT32 ui32Attribs)
+{
+	PVRSRV_KERNEL_MEM_INFO		*psKMMemInfo;
+
+	if (hKernelMemInfo == IMG_NULL)
+	{
+		return PVRSRV_ERROR_INVALID_PARAMS;
+	}
+
+	psKMMemInfo = (PVRSRV_KERNEL_MEM_INFO *)hKernelMemInfo;
+
+	if (ui32Attribs & PVRSRV_CHANGEDEVMEM_ATTRIBS_CACHECOHERENT)
+	{
+		psKMMemInfo->ui32Flags |= PVRSRV_MEM_CACHE_CONSISTENT;
+	}
+	else
+	{
+		psKMMemInfo->ui32Flags &= ~PVRSRV_MEM_CACHE_CONSISTENT;
+	}
+
+	return PVRSRV_OK;
+}
+
+
diff --git a/drivers/gpu/pvr/handle.c b/drivers/gpu/pvr/handle.c
index 5e34af5b280..de80394384c 100644
--- a/drivers/gpu/pvr/handle.c
+++ b/drivers/gpu/pvr/handle.c
@@ -24,7 +24,7 @@
  *
  ******************************************************************************/
 
-#ifdef	PVR_SECURE_HANDLES
+#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
 #include <stddef.h>
 
 #include "services_headers.h"
@@ -47,8 +47,14 @@
 
 #define	INDEX_IS_VALID(psBase, i) ((i) < (psBase)->ui32TotalHandCount)
 
-#define	INDEX_TO_HANDLE(i) ((IMG_HANDLE)((i) + 1))
+#if defined (SUPPORT_SID_INTERFACE)
+#define	INDEX_TO_HANDLE(i) ((IMG_SID)((i) + 1))
 #define	HANDLE_TO_INDEX(h) ((IMG_UINT32)(h) - 1)
+#else
+#define	INDEX_TO_HANDLE(i) ((IMG_HANDLE)((IMG_UINTPTR_T)(i) + 1))
+#define	HANDLE_TO_INDEX(h) ((IMG_UINT32)(IMG_UINTPTR_T)(h) - 1)
+
+#endif
 
 #define	INDEX_TO_BLOCK_INDEX(i)		DIVIDE_BY_BLOCK_SIZE(i)
 #define BLOCK_INDEX_TO_INDEX(i)		MULTIPLY_BY_BLOCK_SIZE(i)
@@ -108,7 +114,11 @@ struct sHandleList
 {
 	IMG_UINT32 ui32Prev;
 	IMG_UINT32 ui32Next;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID hParent;
+#else
 	IMG_HANDLE hParent;
+#endif
 };
 
 enum ePVRSRVInternalHandleFlag
@@ -217,7 +227,11 @@ typedef IMG_UINTPTR_T HAND_KEY[HAND_KEY_LEN];
 #pragma inline(HandleListInit)
 #endif
 static INLINE
+#if defined (SUPPORT_SID_INTERFACE)
+IMG_VOID HandleListInit(IMG_UINT32 ui32Index, struct sHandleList *psList, IMG_SID hParent)
+#else
 IMG_VOID HandleListInit(IMG_UINT32 ui32Index, struct sHandleList *psList, IMG_HANDLE hParent)
+#endif
 {
 	psList->ui32Next = ui32Index;
 	psList->ui32Prev = ui32Index;
@@ -259,7 +273,7 @@ IMG_BOOL HandleListIsEmpty(IMG_UINT32 ui32Index, struct sHandleList *psList)
 		IMG_BOOL bIsEmpty2;
 
 		bIsEmpty2 = (IMG_BOOL)(psList->ui32Prev == ui32Index);
-		PVR_ASSERT(bIsEmpty == bIsEmpty2);
+		PVR_ASSERT(bIsEmpty == bIsEmpty2)
 	}
 #endif
 
@@ -273,7 +287,7 @@ IMG_BOOL HandleListIsEmpty(IMG_UINT32 ui32Index, struct sHandleList *psList)
 static INLINE
 IMG_BOOL NoChildren(struct sHandle *psHandle)
 {
-	PVR_ASSERT(psHandle->sChildren.hParent == HANDLE_PTR_TO_HANDLE(psHandle));
+	PVR_ASSERT(psHandle->sChildren.hParent == HANDLE_PTR_TO_HANDLE(psHandle))
 
 	return HandleListIsEmpty(HANDLE_PTR_TO_INDEX(psHandle), &psHandle->sChildren);
 }
@@ -286,13 +300,13 @@ IMG_BOOL NoParent(struct sHandle *psHandle)
 {
 	if (HandleListIsEmpty(HANDLE_PTR_TO_INDEX(psHandle), &psHandle->sSiblings))
 	{
-		PVR_ASSERT(psHandle->sSiblings.hParent == IMG_NULL);
+		PVR_ASSERT(psHandle->sSiblings.hParent == IMG_NULL)
 
 		return IMG_TRUE;
 	}
 	else
 	{
-		PVR_ASSERT(psHandle->sSiblings.hParent != IMG_NULL);
+		PVR_ASSERT(psHandle->sSiblings.hParent != IMG_NULL)
 	}
 	return IMG_FALSE;
 }
@@ -301,7 +315,11 @@ IMG_BOOL NoParent(struct sHandle *psHandle)
 #pragma inline(ParentHandle)
 #endif
 static INLINE
+#if defined (SUPPORT_SID_INTERFACE)
+IMG_SID ParentHandle(struct sHandle *psHandle)
+#else
 IMG_HANDLE ParentHandle(struct sHandle *psHandle)
+#endif
 {
 	return psHandle->sSiblings.hParent;
 }
@@ -318,9 +336,9 @@ IMG_VOID HandleListInsertBefore(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui32InsIn
 	 
 	struct sHandleList *psPrevIns = LIST_PTR_FROM_INDEX_AND_OFFSET(psBase, psIns->ui32Prev, ui32ParentIndex, uiParentOffset, uiEntryOffset);
 
-	PVR_ASSERT(psEntry->hParent == IMG_NULL);
-	PVR_ASSERT(ui32InsIndex == psPrevIns->ui32Next);
-	PVR_ASSERT(LIST_PTR_FROM_INDEX_AND_OFFSET(psBase, ui32ParentIndex, ui32ParentIndex, uiParentOffset, uiParentOffset)->hParent == INDEX_TO_HANDLE(ui32ParentIndex));
+	PVR_ASSERT(psEntry->hParent == IMG_NULL)
+	PVR_ASSERT(ui32InsIndex == psPrevIns->ui32Next)
+	PVR_ASSERT(LIST_PTR_FROM_INDEX_AND_OFFSET(psBase, ui32ParentIndex, ui32ParentIndex, uiParentOffset, uiParentOffset)->hParent == INDEX_TO_HANDLE(ui32ParentIndex))
 
 	psEntry->ui32Prev = psIns->ui32Prev;
 	psIns->ui32Prev = ui32EntryIndex;
@@ -338,7 +356,7 @@ IMG_VOID AdoptChild(PVRSRV_HANDLE_BASE *psBase, struct sHandle *psParent, struct
 {
 	IMG_UINT32 ui32Parent = HANDLE_TO_INDEX(psParent->sChildren.hParent);
 
-	PVR_ASSERT(ui32Parent == HANDLE_PTR_TO_INDEX(psParent));
+	PVR_ASSERT(ui32Parent == HANDLE_PTR_TO_INDEX(psParent))
 
 	HandleListInsertBefore(psBase, ui32Parent, &psParent->sChildren, offsetof(struct sHandle, sChildren), HANDLE_PTR_TO_INDEX(psChild), &psChild->sSiblings, offsetof(struct sHandle, sSiblings), ui32Parent);
 
@@ -357,7 +375,7 @@ IMG_VOID HandleListRemove(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui32EntryIndex,
 		struct sHandleList *psNext = LIST_PTR_FROM_INDEX_AND_OFFSET(psBase, psEntry->ui32Next, HANDLE_TO_INDEX(psEntry->hParent), uiParentOffset, uiEntryOffset);
 
 		
-		PVR_ASSERT(psEntry->hParent != IMG_NULL);
+		PVR_ASSERT(psEntry->hParent != IMG_NULL)
 
 		psPrev->ui32Next = psEntry->ui32Next;
 		psNext->ui32Prev = psEntry->ui32Prev;
@@ -384,7 +402,7 @@ PVRSRV_ERROR HandleListIterate(PVRSRV_HANDLE_BASE *psBase, struct sHandleList *p
 	IMG_UINT32 ui32Index;
 	IMG_UINT32 ui32Parent = HANDLE_TO_INDEX(psHead->hParent);
 
-	PVR_ASSERT(psHead->hParent != IMG_NULL);
+	PVR_ASSERT(psHead->hParent != IMG_NULL)
 
 	
 	for(ui32Index = psHead->ui32Next; ui32Index != ui32Parent; )
@@ -394,7 +412,7 @@ PVRSRV_ERROR HandleListIterate(PVRSRV_HANDLE_BASE *psBase, struct sHandleList *p
 		struct sHandleList *psEntry = LIST_PTR_FROM_INDEX_AND_OFFSET(psBase, ui32Index, ui32Parent, uiParentOffset, uiEntryOffset);
 		PVRSRV_ERROR eError;
 
-		PVR_ASSERT(psEntry->hParent == psHead->hParent);
+		PVR_ASSERT(psEntry->hParent == psHead->hParent)
 		
 		ui32Index = psEntry->ui32Next;
 
@@ -421,7 +439,11 @@ PVRSRV_ERROR IterateOverChildren(PVRSRV_HANDLE_BASE *psBase, struct sHandle *psP
 #pragma inline(GetHandleStructure)
 #endif
 static INLINE
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR GetHandleStructure(PVRSRV_HANDLE_BASE *psBase, struct sHandle **ppsHandle, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType)
+#else
 PVRSRV_ERROR GetHandleStructure(PVRSRV_HANDLE_BASE *psBase, struct sHandle **ppsHandle, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType)
+#endif
 {
 	IMG_UINT32 ui32Index = HANDLE_TO_INDEX(hHandle);
 	struct sHandle *psHandle;
@@ -430,6 +452,9 @@ PVRSRV_ERROR GetHandleStructure(PVRSRV_HANDLE_BASE *psBase, struct sHandle **pps
 	if (!INDEX_IS_VALID(psBase, ui32Index))
 	{
 		PVR_DPF((PVR_DBG_ERROR, "GetHandleStructure: Handle index out of range (%u >= %u)", ui32Index, psBase->ui32TotalHandCount));
+#if defined (SUPPORT_SID_INTERFACE)
+		PVR_DBG_BREAK
+#endif
 		return PVRSRV_ERROR_HANDLE_INDEX_OUT_OF_RANGE;
 	}
 
@@ -437,6 +462,9 @@ PVRSRV_ERROR GetHandleStructure(PVRSRV_HANDLE_BASE *psBase, struct sHandle **pps
 	if (psHandle->eType == PVRSRV_HANDLE_TYPE_NONE)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "GetHandleStructure: Handle not allocated (index: %u)", ui32Index));
+#if defined (SUPPORT_SID_INTERFACE)
+		PVR_DBG_BREAK
+#endif
 		return PVRSRV_ERROR_HANDLE_NOT_ALLOCATED;
 	}
 
@@ -444,6 +472,9 @@ PVRSRV_ERROR GetHandleStructure(PVRSRV_HANDLE_BASE *psBase, struct sHandle **pps
 	if (eType != PVRSRV_HANDLE_TYPE_NONE && eType != psHandle->eType)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "GetHandleStructure: Handle type mismatch (%d != %d)", eType, psHandle->eType));
+#if defined (SUPPORT_SID_INTERFACE)
+		PVR_DBG_BREAK
+#endif
 		return PVRSRV_ERROR_HANDLE_TYPE_MISMATCH;
 	}
 
@@ -457,7 +488,11 @@ PVRSRV_ERROR GetHandleStructure(PVRSRV_HANDLE_BASE *psBase, struct sHandle **pps
 #pragma inline(ParentIfPrivate)
 #endif
 static INLINE
+#if defined (SUPPORT_SID_INTERFACE)
+IMG_SID ParentIfPrivate(struct sHandle *psHandle)
+#else
 IMG_HANDLE ParentIfPrivate(struct sHandle *psHandle)
+#endif
 {
 	return TEST_ALLOC_FLAG(psHandle, PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE) ?
 			ParentHandle(psHandle) : IMG_NULL;
@@ -467,7 +502,11 @@ IMG_HANDLE ParentIfPrivate(struct sHandle *psHandle)
 #pragma inline(InitKey)
 #endif
 static INLINE
+#if defined (SUPPORT_SID_INTERFACE)
+IMG_VOID InitKey(HAND_KEY aKey, PVRSRV_HANDLE_BASE *psBase, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, IMG_SID hParent)
+#else
 IMG_VOID InitKey(HAND_KEY aKey, PVRSRV_HANDLE_BASE *psBase, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, IMG_HANDLE hParent)
+#endif
 {
 	PVR_UNREFERENCED_PARAMETER(psBase);
 
@@ -502,8 +541,8 @@ PVRSRV_ERROR ReallocHandleArray(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui32NewCo
 	if (((ui32OldCount % HANDLE_BLOCK_SIZE) != 0) ||
 		((ui32NewCount % HANDLE_BLOCK_SIZE) != 0))
 	{
-		PVR_ASSERT((ui32OldCount % HANDLE_BLOCK_SIZE) == 0);
-		PVR_ASSERT((ui32NewCount % HANDLE_BLOCK_SIZE) == 0);
+		PVR_ASSERT((ui32OldCount % HANDLE_BLOCK_SIZE) == 0)
+		PVR_ASSERT((ui32NewCount % HANDLE_BLOCK_SIZE) == 0)
 
 		return PVRSRV_ERROR_INVALID_PARAMS;
 	}
@@ -511,7 +550,7 @@ PVRSRV_ERROR ReallocHandleArray(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui32NewCo
 	if (ui32NewCount != 0)
 	{
 		
-		eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+		eError = OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
 			HANDLE_ARRAY_SIZE(ui32NewCount) * sizeof(struct sHandleIndex),
 			(IMG_VOID **)&psNewArray,
 			&hNewArrayBlockAlloc,
@@ -550,7 +589,7 @@ PVRSRV_ERROR ReallocHandleArray(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui32NewCo
 		 
 		struct sHandleIndex *psIndex = INDEX_TO_INDEX_STRUCT_PTR(psNewArray, ui32Index);
 
-		eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+		eError = OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
 				sizeof(struct sHandle) * HANDLE_BLOCK_SIZE,
 				(IMG_VOID **)&psIndex->psHandle,
 				&psIndex->hBlockAlloc,
@@ -658,12 +697,12 @@ PVRSRV_ERROR ReallocHandleArray(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui32NewCo
 		}
 	}
 
-	PVR_ASSERT(psBase->ui32FirstFreeIndex <= psBase->ui32TotalHandCount);
+	PVR_ASSERT(psBase->ui32FirstFreeIndex <= psBase->ui32TotalHandCount)
 
 	return PVRSRV_OK;
 
 error:
-	PVR_ASSERT(eReturn != PVRSRV_OK);
+	PVR_ASSERT(eReturn != PVRSRV_OK)
 
 	if (psNewArray != IMG_NULL)
 	{
@@ -714,11 +753,17 @@ static PVRSRV_ERROR FreeHandle(PVRSRV_HANDLE_BASE *psBase, struct sHandle *psHan
 
 	if (!TEST_ALLOC_FLAG(psHandle, PVRSRV_HANDLE_ALLOC_FLAG_MULTI) && !BATCHED_HANDLE_PARTIALLY_FREE(psHandle))
 	{
+#if defined (SUPPORT_SID_INTERFACE)
+		IMG_SID hHandle;
+		hHandle = (IMG_SID) HASH_Remove_Extended(psBase->psHashTab, aKey);
+#else
 		IMG_HANDLE hHandle;
 		hHandle = (IMG_HANDLE) HASH_Remove_Extended(psBase->psHashTab, aKey);
 
-		PVR_ASSERT(hHandle != IMG_NULL);
-		PVR_ASSERT(hHandle == INDEX_TO_HANDLE(ui32Index));
+#endif
+
+		PVR_ASSERT(hHandle != IMG_NULL)
+		PVR_ASSERT(hHandle == INDEX_TO_HANDLE(ui32Index))
 		PVR_UNREFERENCED_PARAMETER(hHandle);
 	}
 
@@ -749,20 +794,20 @@ static PVRSRV_ERROR FreeHandle(PVRSRV_HANDLE_BASE *psBase, struct sHandle *psHan
 	{
 		if (psBase->ui32FreeHandCount == 0)
 		{
-			PVR_ASSERT(psBase->ui32FirstFreeIndex == 0);
-			PVR_ASSERT(psBase->ui32LastFreeIndexPlusOne == 0);
+			PVR_ASSERT(psBase->ui32FirstFreeIndex == 0)
+			PVR_ASSERT(psBase->ui32LastFreeIndexPlusOne == 0)
 
 			psBase->ui32FirstFreeIndex =  ui32Index;
 		}
 		else
 		{
 			
-			PVR_ASSERT(psBase->ui32LastFreeIndexPlusOne != 0);
-			PVR_ASSERT(INDEX_TO_HANDLE_STRUCT_PTR(psBase, psBase->ui32LastFreeIndexPlusOne - 1)->ui32NextIndexPlusOne == 0);
+			PVR_ASSERT(psBase->ui32LastFreeIndexPlusOne != 0)
+			PVR_ASSERT(INDEX_TO_HANDLE_STRUCT_PTR(psBase, psBase->ui32LastFreeIndexPlusOne - 1)->ui32NextIndexPlusOne == 0)
 			INDEX_TO_HANDLE_STRUCT_PTR(psBase, psBase->ui32LastFreeIndexPlusOne - 1)->ui32NextIndexPlusOne =  ui32Index + 1;
 		}
 
-		PVR_ASSERT(psHandle->ui32NextIndexPlusOne == 0);
+		PVR_ASSERT(psHandle->ui32NextIndexPlusOne == 0)
 
 		
 		psBase->ui32LastFreeIndexPlusOne = ui32Index + 1;
@@ -771,7 +816,7 @@ static PVRSRV_ERROR FreeHandle(PVRSRV_HANDLE_BASE *psBase, struct sHandle *psHan
 	psBase->ui32FreeHandCount++;
 	INDEX_TO_FREE_HAND_BLOCK_COUNT(psBase, ui32Index)++;
 
-	PVR_ASSERT(INDEX_TO_FREE_HAND_BLOCK_COUNT(psBase, ui32Index)<= HANDLE_BLOCK_SIZE);
+	PVR_ASSERT(INDEX_TO_FREE_HAND_BLOCK_COUNT(psBase, ui32Index)<= HANDLE_BLOCK_SIZE)
 
 #ifdef DEBUG
 	{
@@ -783,7 +828,7 @@ static PVRSRV_ERROR FreeHandle(PVRSRV_HANDLE_BASE *psBase, struct sHandle *psHan
 			ui32FreeHandCount += INDEX_TO_FREE_HAND_BLOCK_COUNT(psBase, ui32BlockedIndex);
 		}
 
-		PVR_ASSERT(ui32FreeHandCount == psBase->ui32FreeHandCount);
+		PVR_ASSERT(ui32FreeHandCount == psBase->ui32FreeHandCount)
 	}
 #endif
 
@@ -875,15 +920,23 @@ static PVRSRV_ERROR FreeHandleBase(PVRSRV_HANDLE_BASE *psBase)
 #pragma inline(FindHandle)
 #endif
 static INLINE
+#if defined (SUPPORT_SID_INTERFACE)
+IMG_SID FindHandle(PVRSRV_HANDLE_BASE *psBase, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, IMG_SID hParent)
+#else
 IMG_HANDLE FindHandle(PVRSRV_HANDLE_BASE *psBase, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, IMG_HANDLE hParent)
+#endif
 {
 	HAND_KEY aKey;
 
-	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
+	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE)
 
 	InitKey(aKey, psBase, pvData, eType, hParent);
 
+#if defined (SUPPORT_SID_INTERFACE)
+	return (IMG_SID) HASH_Retrieve_Extended(psBase->psHashTab, aKey);
+#else
 	return (IMG_HANDLE) HASH_Retrieve_Extended(psBase->psHashTab, aKey);
+#endif
 }
 
 static PVRSRV_ERROR IncreaseHandleArraySize(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui32Delta)
@@ -893,7 +946,7 @@ static PVRSRV_ERROR IncreaseHandleArraySize(PVRSRV_HANDLE_BASE *psBase, IMG_UINT
 	IMG_UINT32 ui32NewTotalHandCount = psBase->ui32TotalHandCount + ui32DeltaAdjusted;
 ;
 
-	PVR_ASSERT(ui32Delta != 0);
+	PVR_ASSERT(ui32Delta != 0)
 
 	
 	if (ui32NewTotalHandCount > psBase->ui32MaxIndexPlusOne || ui32NewTotalHandCount <= psBase->ui32TotalHandCount)
@@ -909,7 +962,7 @@ static PVRSRV_ERROR IncreaseHandleArraySize(PVRSRV_HANDLE_BASE *psBase, IMG_UINT
 		}
 	}
 
-	PVR_ASSERT(ui32DeltaAdjusted >= ui32Delta);
+	PVR_ASSERT(ui32DeltaAdjusted >= ui32Delta)
 
 	
 	eError = ReallocHandleArray(psBase, ui32NewTotalHandCount);
@@ -941,28 +994,36 @@ static PVRSRV_ERROR EnsureFreeHandles(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui3
 	return PVRSRV_OK;
 }
 
+#if defined (SUPPORT_SID_INTERFACE)
+static PVRSRV_ERROR AllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_SID hParent)
+#else
 static PVRSRV_ERROR AllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_HANDLE hParent)
+#endif
 {
 	IMG_UINT32 ui32NewIndex = DEFAULT_MAX_INDEX_PLUS_ONE;
 	struct sHandle *psNewHandle = IMG_NULL;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID hHandle;
+#else
 	IMG_HANDLE hHandle;
+#endif
 	HAND_KEY aKey;
 	PVRSRV_ERROR eError;
 
 	
-	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
-	PVR_ASSERT(psBase != IMG_NULL);
-	PVR_ASSERT(psBase->psHashTab != IMG_NULL);
+	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE)
+	PVR_ASSERT(psBase != IMG_NULL)
+	PVR_ASSERT(psBase->psHashTab != IMG_NULL)
 
 	if (!TEST_FLAG(eFlag, PVRSRV_HANDLE_ALLOC_FLAG_MULTI))
 	{
 		
-		PVR_ASSERT(FindHandle(psBase, pvData, eType, hParent) == IMG_NULL);
+		PVR_ASSERT(FindHandle(psBase, pvData, eType, hParent) == IMG_NULL)
 	}
 
 	if (psBase->ui32FreeHandCount == 0 && HANDLES_BATCHED(psBase))
 	{
-		 PVR_DPF((PVR_DBG_WARNING, "AllocHandle: Handle batch size (%u) was too small, allocating additional space", psBase->ui32HandBatchSize));
+		 PVR_DPF((PVR_DBG_WARNING, "AllocHandle: Handle batch size (%u) was too small, allocating additional space", psBase->ui32HandBatchSize)); 
 	}
 
 	
@@ -988,7 +1049,7 @@ static PVRSRV_ERROR AllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle
 
 		
 		
-		PVR_ASSERT((psBase->ui32FirstFreeIndex % HANDLE_BLOCK_SIZE) == 0);
+		PVR_ASSERT((psBase->ui32FirstFreeIndex % HANDLE_BLOCK_SIZE) == 0)
 
 		for (ui32BlockedIndex = ROUND_DOWN_TO_MULTIPLE_OF_BLOCK_SIZE(psBase->ui32FirstFreeIndex); ui32BlockedIndex < psBase->ui32TotalHandCount; ui32BlockedIndex += HANDLE_BLOCK_SIZE)
 		{
@@ -1009,9 +1070,9 @@ static PVRSRV_ERROR AllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle
 			}
 		}
 		psBase->ui32FirstFreeIndex = 0;
-		PVR_ASSERT(ui32NewIndex < psBase->ui32TotalHandCount);
+		PVR_ASSERT(ui32NewIndex < psBase->ui32TotalHandCount)
 	}
-	PVR_ASSERT(psNewHandle != IMG_NULL);
+	PVR_ASSERT(psNewHandle != IMG_NULL)
 
 	
 	hHandle = INDEX_TO_HANDLE(ui32NewIndex);
@@ -1033,8 +1094,8 @@ static PVRSRV_ERROR AllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle
 
 	psBase->ui32FreeHandCount--;
 
-	PVR_ASSERT(INDEX_TO_FREE_HAND_BLOCK_COUNT(psBase, ui32NewIndex) <= HANDLE_BLOCK_SIZE);
-	PVR_ASSERT(INDEX_TO_FREE_HAND_BLOCK_COUNT(psBase, ui32NewIndex) > 0);
+	PVR_ASSERT(INDEX_TO_FREE_HAND_BLOCK_COUNT(psBase, ui32NewIndex) <= HANDLE_BLOCK_SIZE)
+	PVR_ASSERT(INDEX_TO_FREE_HAND_BLOCK_COUNT(psBase, ui32NewIndex) > 0)
 
 	INDEX_TO_FREE_HAND_BLOCK_COUNT(psBase, ui32NewIndex)--;
 
@@ -1044,8 +1105,8 @@ static PVRSRV_ERROR AllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle
 		
 		if (psBase->ui32FreeHandCount == 0)
 		{
-			PVR_ASSERT(psBase->ui32FirstFreeIndex == ui32NewIndex);
-			PVR_ASSERT(psBase->ui32LastFreeIndexPlusOne == (ui32NewIndex + 1));
+			PVR_ASSERT(psBase->ui32FirstFreeIndex == ui32NewIndex)
+			PVR_ASSERT(psBase->ui32LastFreeIndexPlusOne == (ui32NewIndex + 1))
 
 			psBase->ui32LastFreeIndexPlusOne = 0;
 			psBase->ui32FirstFreeIndex = 0;
@@ -1060,7 +1121,7 @@ static PVRSRV_ERROR AllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle
 	}
 
 	
-	PVR_ASSERT(psNewHandle->ui32Index == ui32NewIndex);
+	PVR_ASSERT(psNewHandle->ui32Index == ui32NewIndex)
 
 	 
 	psNewHandle->eType = eType;
@@ -1070,12 +1131,12 @@ static PVRSRV_ERROR AllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle
 
 	InitParentList(psNewHandle);
 #if defined(DEBUG)
-	PVR_ASSERT(NoChildren(psNewHandle));
+	PVR_ASSERT(NoChildren(psNewHandle))
 #endif
 
 	InitChildEntry(psNewHandle);
 #if defined(DEBUG)
-	PVR_ASSERT(NoParent(psNewHandle));
+	PVR_ASSERT(NoParent(psNewHandle))
 #endif
 
 	if (HANDLES_BATCHED(psBase))
@@ -1099,12 +1160,24 @@ static PVRSRV_ERROR AllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle
 	return PVRSRV_OK;
 }
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRSRVAllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag)
+#else
 PVRSRV_ERROR PVRSRVAllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag)
+#endif
 {
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID hHandle;
+#else
 	IMG_HANDLE hHandle;
+#endif
 	PVRSRV_ERROR eError;
 
+#if defined (SUPPORT_SID_INTERFACE)
+	*phHandle = 0;
+#else
 	*phHandle = IMG_NULL;
+#endif
 
 	if (HANDLES_BATCHED(psBase))
 	{
@@ -1113,13 +1186,17 @@ PVRSRV_ERROR PVRSRVAllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle,
 	}
 
 	
-	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
+	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE)
 
 	if (!TEST_FLAG(eFlag, PVRSRV_HANDLE_ALLOC_FLAG_MULTI))
 	{
 		
 		hHandle = FindHandle(psBase, pvData, eType, IMG_NULL);
+#if defined (SUPPORT_SID_INTERFACE)
+		if (hHandle != 0)
+#else
 		if (hHandle != IMG_NULL)
+#endif
 		{
 			struct sHandle *psHandle;
 
@@ -1137,12 +1214,16 @@ PVRSRV_ERROR PVRSRVAllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle,
 				eError = PVRSRV_OK;
 				goto exit_ok;
 			}
+			
+#if defined (SUPPORT_SID_INTERFACE)
+			PVR_DBG_BREAK
+#endif
 			return PVRSRV_ERROR_HANDLE_NOT_SHAREABLE;
 		}
 	}
 
 	eError = AllocHandle(psBase, phHandle, pvData, eType, eFlag, IMG_NULL);
-
+	
 exit_ok:
 	if (HANDLES_BATCHED(psBase) && (eError == PVRSRV_OK))
 	{
@@ -1152,15 +1233,26 @@ exit_ok:
 	return eError;
 }
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_SID hParent)
+#else
 PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_HANDLE hParent)
+#endif
 {
 	struct sHandle *psPHand;
 	struct sHandle *psCHand;
 	PVRSRV_ERROR eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID hParentKey;
+	IMG_SID hHandle;
+
+	*phHandle = 0;
+#else
 	IMG_HANDLE hParentKey;
 	IMG_HANDLE hHandle;
 
 	*phHandle = IMG_NULL;
+#endif
 
 	if (HANDLES_BATCHED(psBase))
 	{
@@ -1169,7 +1261,7 @@ PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHand
 	}
 
 	
-	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
+	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE)
 
 	hParentKey = TEST_FLAG(eFlag, PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE) ?
 			hParent : IMG_NULL;
@@ -1185,7 +1277,11 @@ PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHand
 	{
 		
 		hHandle = FindHandle(psBase, pvData, eType, hParentKey);
+#if defined (SUPPORT_SID_INTERFACE)
+		if (hHandle != 0)
+#else
 		if (hHandle != IMG_NULL)
+#endif
 		{
 			struct sHandle *psCHandle;
 			PVRSRV_ERROR eErr;
@@ -1197,7 +1293,7 @@ PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHand
 				return eErr;
 			}
 
-			PVR_ASSERT(hParentKey != IMG_NULL && ParentHandle(HANDLE_TO_HANDLE_STRUCT_PTR(psBase, hHandle)) == hParent);
+			PVR_ASSERT(hParentKey != IMG_NULL && ParentHandle(HANDLE_TO_HANDLE_STRUCT_PTR(psBase, hHandle)) == hParent)
 
 			
 			if (TEST_FLAG(psCHandle->eFlag & eFlag, PVRSRV_HANDLE_ALLOC_FLAG_SHARED) && ParentHandle(HANDLE_TO_HANDLE_STRUCT_PTR(psBase, hHandle)) == hParent)
@@ -1205,6 +1301,9 @@ PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHand
 				*phHandle = hHandle;
 				goto exit_ok;
 			}
+#if defined (SUPPORT_SID_INTERFACE)
+			PVR_DBG_BREAK
+#endif
 			return PVRSRV_ERROR_HANDLE_NOT_SHAREABLE;
 		}
 	}
@@ -1233,14 +1332,26 @@ exit_ok:
 	return PVRSRV_OK;
 }
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRSRVFindHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType)
+#else
 PVRSRV_ERROR PVRSRVFindHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType)
+#endif
 {
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID hHandle;
+#else
 	IMG_HANDLE hHandle;
+#endif
 
-	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
+	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE)
 
 	
+#if defined (SUPPORT_SID_INTERFACE)
+	hHandle = (IMG_SID) FindHandle(psBase, pvData, eType, IMG_NULL);
+#else
 	hHandle = (IMG_HANDLE) FindHandle(psBase, pvData, eType, IMG_NULL);
+#endif
 	if (hHandle == IMG_NULL)
 	{
 		return PVRSRV_ERROR_HANDLE_NOT_FOUND;
@@ -1251,7 +1362,11 @@ PVRSRV_ERROR PVRSRVFindHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle,
 	return PVRSRV_OK;
 }
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRSRVLookupHandleAnyType(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, PVRSRV_HANDLE_TYPE *peType, IMG_SID hHandle)
+#else
 PVRSRV_ERROR PVRSRVLookupHandleAnyType(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, PVRSRV_HANDLE_TYPE *peType, IMG_HANDLE hHandle)
+#endif
 {
 	struct sHandle *psHandle;
 	PVRSRV_ERROR eError;
@@ -1260,6 +1375,9 @@ PVRSRV_ERROR PVRSRVLookupHandleAnyType(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *pp
 	if (eError != PVRSRV_OK)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "PVRSRVLookupHandleAnyType: Error looking up handle (%d)", eError));
+#if defined (SUPPORT_SID_INTERFACE)
+		PVR_DBG_BREAK
+#endif
 		return eError;
 	}
 
@@ -1269,17 +1387,27 @@ PVRSRV_ERROR PVRSRVLookupHandleAnyType(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *pp
 	return PVRSRV_OK;
 }
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRSRVLookupHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType)
+#else
 PVRSRV_ERROR PVRSRVLookupHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType)
+#endif
 {
 	struct sHandle *psHandle;
 	PVRSRV_ERROR eError;
 
-	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
+	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE)
+#if defined (SUPPORT_SID_INTERFACE)
+	PVR_ASSERT(hHandle != 0)
+#endif
 
 	eError = GetHandleStructure(psBase, &psHandle, hHandle, eType);
 	if (eError != PVRSRV_OK)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "PVRSRVLookupHandle: Error looking up handle (%d)", eError));
+#if defined (SUPPORT_SID_INTERFACE)
+		PVR_DBG_BREAK
+#endif
 		return eError;
 	}
 
@@ -1288,13 +1416,20 @@ PVRSRV_ERROR PVRSRVLookupHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData,
 	return PVRSRV_OK;
 }
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRSRVLookupSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType, IMG_SID hAncestor)
+#else
 PVRSRV_ERROR PVRSRVLookupSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType, IMG_HANDLE hAncestor)
+#endif
 {
 	struct sHandle *psPHand;
 	struct sHandle *psCHand;
 	PVRSRV_ERROR eError;
 
-	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
+	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE)
+#if defined (SUPPORT_SID_INTERFACE)
+	PVR_ASSERT(hHandle != 0)
+#endif
 
 	eError = GetHandleStructure(psBase, &psCHand, hHandle, eType);
 	if (eError != PVRSRV_OK)
@@ -1319,12 +1454,16 @@ PVRSRV_ERROR PVRSRVLookupSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvDat
 	return PVRSRV_OK;
 }
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRSRVGetParentHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phParent, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType)
+#else
 PVRSRV_ERROR PVRSRVGetParentHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *phParent, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType)
+#endif
 {
 	struct sHandle *psHandle;
 	PVRSRV_ERROR eError;
 
-	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
+	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE)
 
 	eError = GetHandleStructure(psBase, &psHandle, hHandle, eType);
 	if (eError != PVRSRV_OK)
@@ -1338,17 +1477,24 @@ PVRSRV_ERROR PVRSRVGetParentHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *phPare
 	return PVRSRV_OK;
 }
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRSRVLookupAndReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType)
+#else
 PVRSRV_ERROR PVRSRVLookupAndReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType)
+#endif
 {
 	struct sHandle *psHandle;
 	PVRSRV_ERROR eError;
 
-	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
+	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE)
 
 	eError = GetHandleStructure(psBase, &psHandle, hHandle, eType);
 	if (eError != PVRSRV_OK)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "PVRSRVLookupAndReleaseHandle: Error looking up handle (%d)", eError));
+#if defined (SUPPORT_SID_INTERFACE)
+		PVR_DBG_BREAK
+#endif
 		return eError;
 	}
 
@@ -1359,12 +1505,16 @@ PVRSRV_ERROR PVRSRVLookupAndReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID
 	return eError;
 }
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRSRVReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType)
+#else
 PVRSRV_ERROR PVRSRVReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType)
+#endif
 {
 	struct sHandle *psHandle;
 	PVRSRV_ERROR eError;
 
-	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
+	PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE)
 
 	eError = GetHandleStructure(psBase, &psHandle, hHandle, eType);
 	if (eError != PVRSRV_OK)
@@ -1406,11 +1556,11 @@ PVRSRV_ERROR PVRSRVNewHandleBatch(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui32Bat
 	
 	psBase->ui32TotalHandCountPreBatch = psBase->ui32TotalHandCount;
 
-	PVR_ASSERT(psBase->ui32BatchHandAllocFailures == 0);
+	PVR_ASSERT(psBase->ui32BatchHandAllocFailures == 0)
 
-	PVR_ASSERT(psBase->ui32FirstBatchIndexPlusOne == 0);
+	PVR_ASSERT(psBase->ui32FirstBatchIndexPlusOne == 0)
 
-	PVR_ASSERT(HANDLES_BATCHED(psBase));
+	PVR_ASSERT(HANDLES_BATCHED(psBase))
 
 	return PVRSRV_OK;
 }
@@ -1437,14 +1587,14 @@ static PVRSRV_ERROR PVRSRVHandleBatchCommitOrRelease(PVRSRV_HANDLE_BASE *psBase,
 		bCommitBatch = IMG_FALSE;
 	}
 	
-	PVR_ASSERT(psBase->ui32BatchHandAllocFailures == 0 || !bCommit);
+	PVR_ASSERT(psBase->ui32BatchHandAllocFailures == 0 || !bCommit)
 
 	ui32IndexPlusOne = psBase->ui32FirstBatchIndexPlusOne;
 	while(ui32IndexPlusOne != 0)
 	{
 		struct sHandle *psHandle = INDEX_TO_HANDLE_STRUCT_PTR(psBase, ui32IndexPlusOne - 1);
 		IMG_UINT32 ui32NextIndexPlusOne = psHandle->ui32NextIndexPlusOne;
-		PVR_ASSERT(BATCHED_HANDLE(psHandle));
+		PVR_ASSERT(BATCHED_HANDLE(psHandle))
 
 		psHandle->ui32NextIndexPlusOne = 0;
 
@@ -1464,7 +1614,7 @@ static PVRSRV_ERROR PVRSRVHandleBatchCommitOrRelease(PVRSRV_HANDLE_BASE *psBase,
 			{
 				 PVR_DPF((PVR_DBG_ERROR, "PVRSRVHandleBatchCommitOrRelease: Error freeing handle (%d)", eError));
 			}
-			PVR_ASSERT(eError == PVRSRV_OK);
+			PVR_ASSERT(eError == PVRSRV_OK)
 		}
 		else
 		{
@@ -1480,7 +1630,7 @@ static PVRSRV_ERROR PVRSRVHandleBatchCommitOrRelease(PVRSRV_HANDLE_BASE *psBase,
 	{
 		IMG_UINT32 ui32Delta = psBase->ui32TotalHandCount - psBase->ui32TotalHandCountPreBatch;
 
-		PVR_ASSERT(psBase->ui32TotalHandCount > psBase->ui32TotalHandCountPreBatch);
+		PVR_ASSERT(psBase->ui32TotalHandCount > psBase->ui32TotalHandCountPreBatch)
 
 		PVR_DPF((PVR_DBG_WARNING, "PVRSRVHandleBatchCommitOrRelease: The batch size was too small.  Batch size was %u, but needs to be %u", psBase->ui32HandBatchSize,  psBase->ui32HandBatchSize + ui32Delta));
 
@@ -1494,7 +1644,7 @@ static PVRSRV_ERROR PVRSRVHandleBatchCommitOrRelease(PVRSRV_HANDLE_BASE *psBase,
 
 	if (psBase->ui32BatchHandAllocFailures != 0 && bCommit)
 	{
-		PVR_ASSERT(!bCommitBatch);
+		PVR_ASSERT(!bCommitBatch)
 
 		return PVRSRV_ERROR_HANDLE_BATCH_COMMIT_FAILURE;
 	}
@@ -1546,9 +1696,9 @@ PVRSRV_ERROR PVRSRVSetMaxHandle(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui32MaxHa
 		psBase->ui32MaxIndexPlusOne = ui32MaxHandleRounded;
 	}
 
-	PVR_ASSERT(psBase->ui32MaxIndexPlusOne != 0);
-	PVR_ASSERT(psBase->ui32MaxIndexPlusOne <= DEFAULT_MAX_INDEX_PLUS_ONE);
-	PVR_ASSERT((psBase->ui32MaxIndexPlusOne % HANDLE_BLOCK_SIZE) == 0);
+	PVR_ASSERT(psBase->ui32MaxIndexPlusOne != 0)
+	PVR_ASSERT(psBase->ui32MaxIndexPlusOne <= DEFAULT_MAX_INDEX_PLUS_ONE)
+	PVR_ASSERT((psBase->ui32MaxIndexPlusOne % HANDLE_BLOCK_SIZE) == 0)
 
 	return PVRSRV_OK;
 }
@@ -1595,7 +1745,7 @@ PVRSRV_ERROR PVRSRVPurgeHandles(PVRSRV_HANDLE_BASE *psBase)
 		return PVRSRV_ERROR_INVALID_PARAMS;
 	}
 
-	PVR_ASSERT((psBase->ui32TotalHandCount % HANDLE_BLOCK_SIZE) == 0);
+	PVR_ASSERT((psBase->ui32TotalHandCount % HANDLE_BLOCK_SIZE) == 0)
 
 	for (ui32BlockIndex = INDEX_TO_BLOCK_INDEX(psBase->ui32TotalHandCount); ui32BlockIndex != 0; ui32BlockIndex--)
 	{
@@ -1629,7 +1779,7 @@ PVRSRV_ERROR PVRSRVAllocHandleBase(PVRSRV_HANDLE_BASE **ppsBase)
 	IMG_HANDLE hBlockAlloc;
 	PVRSRV_ERROR eError;
 
-	eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+	eError = OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
 		sizeof(*psBase),
 		(IMG_PVOID *)&psBase,
 		&hBlockAlloc,
@@ -1663,7 +1813,7 @@ PVRSRV_ERROR PVRSRVFreeHandleBase(PVRSRV_HANDLE_BASE *psBase)
 {
 	PVRSRV_ERROR eError;
 
-	PVR_ASSERT(psBase != gpsKernelHandleBase);
+	PVR_ASSERT(psBase != gpsKernelHandleBase)
 
 	eError = FreeHandleBase(psBase);
 	if (eError != PVRSRV_OK)
@@ -1678,7 +1828,7 @@ PVRSRV_ERROR PVRSRVHandleInit(IMG_VOID)
 {
 	PVRSRV_ERROR eError;
 
-	PVR_ASSERT(gpsKernelHandleBase == IMG_NULL);
+	PVR_ASSERT(gpsKernelHandleBase == IMG_NULL)
 
 	eError = PVRSRVAllocHandleBase(&gpsKernelHandleBase);
 	if (eError != PVRSRV_OK)
diff --git a/drivers/gpu/pvr/handle.h b/drivers/gpu/pvr/handle.h
index 56de04aede0..43f34a0cafd 100644
--- a/drivers/gpu/pvr/handle.h
+++ b/drivers/gpu/pvr/handle.h
@@ -59,7 +59,8 @@ typedef enum
 	PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT,
 	PVRSRV_HANDLE_TYPE_MMAP_INFO,
 	PVRSRV_HANDLE_TYPE_SOC_TIMER,
-	PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ
+	PVRSRV_HANDLE_TYPE_SYNC_INFO_MOD_OBJ,
+	PVRSRV_HANDLE_TYPE_RESITEM_INFO
 } PVRSRV_HANDLE_TYPE;
 
 typedef enum
@@ -77,11 +78,30 @@ typedef enum
 struct _PVRSRV_HANDLE_BASE_;
 typedef struct _PVRSRV_HANDLE_BASE_ PVRSRV_HANDLE_BASE;
 
-#ifdef	PVR_SECURE_HANDLES
+#if defined (PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
 extern PVRSRV_HANDLE_BASE *gpsKernelHandleBase;
 
 #define	KERNEL_HANDLE_BASE (gpsKernelHandleBase)
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRSRVAllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag);
+
+PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_SID hParent);
+
+PVRSRV_ERROR PVRSRVFindHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType);
+
+PVRSRV_ERROR PVRSRVLookupHandleAnyType(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, PVRSRV_HANDLE_TYPE *peType, IMG_SID hHandle);
+
+PVRSRV_ERROR PVRSRVLookupHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType);
+
+PVRSRV_ERROR PVRSRVLookupSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType, IMG_SID hAncestor);
+
+PVRSRV_ERROR PVRSRVGetParentHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phParent, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType);
+
+PVRSRV_ERROR PVRSRVLookupAndReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType);
+
+PVRSRV_ERROR PVRSRVReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType);
+#else
 PVRSRV_ERROR PVRSRVAllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag);
 
 PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_HANDLE hParent);
@@ -99,6 +119,7 @@ PVRSRV_ERROR PVRSRVGetParentHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *phPare
 PVRSRV_ERROR PVRSRVLookupAndReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType);
 
 PVRSRV_ERROR PVRSRVReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType);
+#endif 
 
 PVRSRV_ERROR PVRSRVNewHandleBatch(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui32BatchSize);
 
diff --git a/drivers/gpu/pvr/hash.c b/drivers/gpu/pvr/hash.c
index 32b0779d456..488bf1b20e6 100644
--- a/drivers/gpu/pvr/hash.c
+++ b/drivers/gpu/pvr/hash.c
@@ -80,7 +80,7 @@ IMG_UINT32
 HASH_Func_Default (IMG_SIZE_T uKeySize, IMG_VOID *pKey, IMG_UINT32 uHashTabLen)
 {
 	IMG_UINTPTR_T *p = (IMG_UINTPTR_T *)pKey;
-	IMG_UINT32 uKeyLen = uKeySize / sizeof(IMG_UINTPTR_T);
+	IMG_UINT32 uKeyLen = (IMG_UINT32)(uKeySize / sizeof(IMG_UINTPTR_T));
 	IMG_UINT32 ui;
 	IMG_UINT32 uHashKey = 0;
 
@@ -112,7 +112,7 @@ HASH_Key_Comp_Default (IMG_SIZE_T uKeySize, IMG_VOID *pKey1, IMG_VOID *pKey2)
 {
 	IMG_UINTPTR_T *p1 = (IMG_UINTPTR_T *)pKey1;
 	IMG_UINTPTR_T *p2 = (IMG_UINTPTR_T *)pKey2;
-	IMG_UINT32 uKeyLen = uKeySize / sizeof(IMG_UINTPTR_T);
+	IMG_UINT32 uKeyLen = (IMG_UINT32)(uKeySize / sizeof(IMG_UINTPTR_T));
 	IMG_UINT32 ui;
 
 	PVR_ASSERT((uKeySize % sizeof(IMG_UINTPTR_T)) == 0);
@@ -228,7 +228,7 @@ HASH_TABLE * HASH_Create_Extended (IMG_UINT32 uInitialLen, IMG_SIZE_T uKeySize,
 	pHash->uCount = 0;
 	pHash->uSize = uInitialLen;
 	pHash->uMinimumSize = uInitialLen;
-	pHash->uKeySize = uKeySize;
+	pHash->uKeySize = (IMG_UINT32)uKeySize;
 	pHash->pfnHashFunc = pfnHashFunc;
 	pHash->pfnKeyComp = pfnKeyComp;
 
@@ -305,6 +305,9 @@ HASH_Insert_Extended (HASH_TABLE *pHash, IMG_VOID *pKey, IMG_UINTPTR_T v)
 	OSMemCopy(pBucket->k, pKey, pHash->uKeySize);
 	if (_ChainInsert (pHash, pBucket, pHash->ppBucketTable, pHash->uSize) != PVRSRV_OK)
 	{
+		OSFreeMem(PVRSRV_PAGEABLE_SELECT,
+				  sizeof(BUCKET) + pHash->uKeySize,
+				  pBucket, IMG_NULL);
 		return IMG_FALSE;
 	}
 
@@ -444,6 +447,31 @@ HASH_Retrieve (HASH_TABLE *pHash, IMG_UINTPTR_T k)
 	return HASH_Retrieve_Extended(pHash, &k);
 }
 
+PVRSRV_ERROR
+HASH_Iterate(HASH_TABLE *pHash, HASH_pfnCallback pfnCallback)
+{
+	IMG_UINT32 uIndex;
+	for (uIndex=0; uIndex < pHash->uSize; uIndex++)
+	{
+		BUCKET *pBucket;
+		pBucket = pHash->ppBucketTable[uIndex];
+		while (pBucket != IMG_NULL)
+		{
+			PVRSRV_ERROR eError;
+			BUCKET *pNextBucket = pBucket->pNext;
+			
+			eError = pfnCallback((IMG_UINTPTR_T) ((IMG_VOID *) *(pBucket->k)), (IMG_UINTPTR_T) pBucket->v);
+
+			
+			if (eError != PVRSRV_OK)
+				return eError;
+
+			pBucket = pNextBucket;
+		}
+	}
+	return PVRSRV_OK;
+}
+
 #ifdef HASH_TRACE
 IMG_VOID
 HASH_Dump (HASH_TABLE *pHash)
diff --git a/drivers/gpu/pvr/hash.h b/drivers/gpu/pvr/hash.h
index d45f4a98dda..24b7da07b91 100644
--- a/drivers/gpu/pvr/hash.h
+++ b/drivers/gpu/pvr/hash.h
@@ -39,6 +39,11 @@ typedef IMG_BOOL HASH_KEY_COMP(IMG_SIZE_T uKeySize, IMG_VOID *pKey1, IMG_VOID *p
 
 typedef struct _HASH_TABLE_ HASH_TABLE;
 
+typedef PVRSRV_ERROR (*HASH_pfnCallback) (
+	IMG_UINTPTR_T k,
+	IMG_UINTPTR_T v
+);
+
 IMG_UINT32 HASH_Func_Default (IMG_SIZE_T uKeySize, IMG_VOID *pKey, IMG_UINT32 uHashTabLen);
 
 IMG_BOOL HASH_Key_Comp_Default (IMG_SIZE_T uKeySize, IMG_VOID *pKey1, IMG_VOID *pKey2);
@@ -61,6 +66,8 @@ IMG_UINTPTR_T HASH_Retrieve_Extended (HASH_TABLE *pHash, IMG_VOID *pKey);
 
 IMG_UINTPTR_T HASH_Retrieve (HASH_TABLE *pHash, IMG_UINTPTR_T k);
 
+PVRSRV_ERROR HASH_Iterate(HASH_TABLE *pHash, HASH_pfnCallback pfnCallback);
+
 #ifdef HASH_TRACE
 IMG_VOID HASH_Dump (HASH_TABLE *pHash);
 #endif
diff --git a/drivers/gpu/pvr/img_types.h b/drivers/gpu/pvr/img_types.h
index 31962aaedbb..4401f4dd92c 100644
--- a/drivers/gpu/pvr/img_types.h
+++ b/drivers/gpu/pvr/img_types.h
@@ -56,16 +56,19 @@ typedef signed long		IMG_INT32,	*IMG_PINT32;
 	#define IMG_UINT32_MAX 0xFFFFFFFFUL
 #endif
 
+#if defined(USE_CODE)
+
+typedef unsigned __int64	IMG_UINT64, *IMG_PUINT64;
+typedef __int64				IMG_INT64,  *IMG_PINT64;
+
+#else
 	#if (defined(LINUX) || defined(__METAG))
-#if !defined(USE_CODE)
 		typedef unsigned long long		IMG_UINT64,	*IMG_PUINT64;
 		typedef long long 				IMG_INT64,	*IMG_PINT64;
-#endif
 	#else
-
 		#error("define an OS")
-
 	#endif
+#endif
 
 #if !(defined(LINUX) && defined (__KERNEL__))
 typedef float			IMG_FLOAT,	*IMG_PFLOAT;
@@ -84,22 +87,23 @@ typedef void            IMG_VOID, *IMG_PVOID;
 typedef IMG_INT32       IMG_RESULT;
 
 #if defined(_WIN64)
-typedef unsigned __int64 IMG_UINTPTR_T;
+	typedef unsigned __int64	IMG_UINTPTR_T;
+	typedef signed __int64		IMG_PTRDIFF_T;
+	typedef IMG_UINT64			IMG_SIZE_T;
 #else
-typedef unsigned int     IMG_UINTPTR_T;
+	typedef unsigned int	IMG_UINTPTR_T;
+	typedef IMG_UINT32		IMG_SIZE_T;
 #endif
 
 typedef IMG_PVOID       IMG_HANDLE;
 
 typedef void**          IMG_HVOID,	* IMG_PHVOID;
 
-typedef IMG_UINT32		IMG_SIZE_T;
-
 #define IMG_NULL        0 
 
 typedef IMG_UINT32      IMG_SID;
 
-
+typedef IMG_UINT32      IMG_EVENTSID;
 typedef IMG_PVOID IMG_CPU_VIRTADDR;
 
 typedef struct _IMG_DEV_VIRTADDR
@@ -110,6 +114,8 @@ typedef struct _IMG_DEV_VIRTADDR
 	
 } IMG_DEV_VIRTADDR;
 
+typedef IMG_UINT32 IMG_DEVMEM_SIZE_T;
+
 typedef struct _IMG_CPU_PHYADDR
 {
 	
diff --git a/drivers/gpu/pvr/ioctldef.h b/drivers/gpu/pvr/ioctldef.h
deleted file mode 100644
index 4b23ad437a7..00000000000
--- a/drivers/gpu/pvr/ioctldef.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/**********************************************************************
- *
- * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
- * 
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope it will be useful but, except 
- * as otherwise stated in writing, without any warranty; without even the 
- * implied warranty of merchantability or fitness for a particular purpose. 
- * See the GNU General Public License for more details.
- * 
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- * 
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
- *
- ******************************************************************************/
-
-#ifndef __IOCTLDEF_H__
-#define __IOCTLDEF_H__
-
-#define MAKEIOCTLINDEX(i)	(((i) >> 2) & 0xFFF)
-
-#ifndef CTL_CODE
-
-#define DEVICE_TYPE ULONG
-
-#define FILE_DEVICE_BEEP                0x00000001
-#define FILE_DEVICE_CD_ROM              0x00000002
-#define FILE_DEVICE_CD_ROM_FILE_SYSTEM  0x00000003
-#define FILE_DEVICE_CONTROLLER          0x00000004
-#define FILE_DEVICE_DATALINK            0x00000005
-#define FILE_DEVICE_DFS                 0x00000006
-#define FILE_DEVICE_DISK                0x00000007
-#define FILE_DEVICE_DISK_FILE_SYSTEM    0x00000008
-#define FILE_DEVICE_FILE_SYSTEM         0x00000009
-#define FILE_DEVICE_INPORT_PORT         0x0000000a
-#define FILE_DEVICE_KEYBOARD            0x0000000b
-#define FILE_DEVICE_MAILSLOT            0x0000000c
-#define FILE_DEVICE_MIDI_IN             0x0000000d
-#define FILE_DEVICE_MIDI_OUT            0x0000000e
-#define FILE_DEVICE_MOUSE               0x0000000f
-#define FILE_DEVICE_MULTI_UNC_PROVIDER  0x00000010
-#define FILE_DEVICE_NAMED_PIPE          0x00000011
-#define FILE_DEVICE_NETWORK             0x00000012
-#define FILE_DEVICE_NETWORK_BROWSER     0x00000013
-#define FILE_DEVICE_NETWORK_FILE_SYSTEM 0x00000014
-#define FILE_DEVICE_NULL                0x00000015
-#define FILE_DEVICE_PARALLEL_PORT       0x00000016
-#define FILE_DEVICE_PHYSICAL_NETCARD    0x00000017
-#define FILE_DEVICE_PRINTER             0x00000018
-#define FILE_DEVICE_SCANNER             0x00000019
-#define FILE_DEVICE_SERIAL_MOUSE_PORT   0x0000001a
-#define FILE_DEVICE_SERIAL_PORT         0x0000001b
-#define FILE_DEVICE_SCREEN              0x0000001c
-#define FILE_DEVICE_SOUND               0x0000001d
-#define FILE_DEVICE_STREAMS             0x0000001e
-#define FILE_DEVICE_TAPE                0x0000001f
-#define FILE_DEVICE_TAPE_FILE_SYSTEM    0x00000020
-#define FILE_DEVICE_TRANSPORT           0x00000021
-#define FILE_DEVICE_UNKNOWN             0x00000022
-#define FILE_DEVICE_VIDEO               0x00000023
-#define FILE_DEVICE_VIRTUAL_DISK        0x00000024
-#define FILE_DEVICE_WAVE_IN             0x00000025
-#define FILE_DEVICE_WAVE_OUT            0x00000026
-#define FILE_DEVICE_8042_PORT           0x00000027
-#define FILE_DEVICE_NETWORK_REDIRECTOR  0x00000028
-#define FILE_DEVICE_BATTERY             0x00000029
-#define FILE_DEVICE_BUS_EXTENDER        0x0000002a
-#define FILE_DEVICE_MODEM               0x0000002b
-#define FILE_DEVICE_VDM                 0x0000002c
-#define FILE_DEVICE_MASS_STORAGE        0x0000002d
-
-#define CTL_CODE( DeviceType, Function, Method, Access ) (                 \
-    ((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method) \
-)
-
-#define METHOD_BUFFERED                 0
-#define METHOD_IN_DIRECT                1
-#define METHOD_OUT_DIRECT               2
-#define METHOD_NEITHER                  3
-
-#define FILE_ANY_ACCESS                 0
-#define FILE_READ_ACCESS          ( 0x0001 )    
-#define FILE_WRITE_ACCESS         ( 0x0002 )    
-
-#endif 
-
-#endif 
-
diff --git a/drivers/gpu/pvr/mem.c b/drivers/gpu/pvr/mem.c
index a2673d53c23..8bf28bfe122 100644
--- a/drivers/gpu/pvr/mem.c
+++ b/drivers/gpu/pvr/mem.c
@@ -37,7 +37,7 @@ FreeSharedSysMemCallBack(IMG_PVOID	pvParam,
 	PVR_UNREFERENCED_PARAMETER(ui32Param);
 
 	OSFreePages(psKernelMemInfo->ui32Flags,
-				psKernelMemInfo->ui32AllocSize,
+				psKernelMemInfo->uAllocSize,
 				psKernelMemInfo->pvLinAddrKM,
 				psKernelMemInfo->sMemBlk.hOSMemHandle);
 
@@ -54,7 +54,7 @@ FreeSharedSysMemCallBack(IMG_PVOID	pvParam,
 IMG_EXPORT PVRSRV_ERROR
 PVRSRVAllocSharedSysMemoryKM(PVRSRV_PER_PROCESS_DATA	*psPerProc,
 							 IMG_UINT32					ui32Flags,
-							 IMG_SIZE_T 				ui32Size,
+							 IMG_SIZE_T 				uSize,
 							 PVRSRV_KERNEL_MEM_INFO 	**ppsKernelMemInfo)
 {
 	PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
@@ -73,11 +73,11 @@ PVRSRVAllocSharedSysMemoryKM(PVRSRV_PER_PROCESS_DATA	*psPerProc,
 	ui32Flags &= ~PVRSRV_HAP_MAPTYPE_MASK;
 	ui32Flags |= PVRSRV_HAP_MULTI_PROCESS;
 	psKernelMemInfo->ui32Flags = ui32Flags;
-	psKernelMemInfo->ui32AllocSize = ui32Size;
+	psKernelMemInfo->uAllocSize = uSize;
 
 	if(OSAllocPages(psKernelMemInfo->ui32Flags,
-					psKernelMemInfo->ui32AllocSize,
-					HOST_PAGESIZE(),
+					psKernelMemInfo->uAllocSize,
+					(IMG_UINT32)HOST_PAGESIZE(),
 					&psKernelMemInfo->pvLinAddrKM,
 					&psKernelMemInfo->sMemBlk.hOSMemHandle)
 		!= PVRSRV_OK)
diff --git a/drivers/gpu/pvr/mm.c b/drivers/gpu/pvr/mm.c
index ecaba8e1015..39efdb0c846 100644
--- a/drivers/gpu/pvr/mm.c
+++ b/drivers/gpu/pvr/mm.c
@@ -335,10 +335,10 @@ LinuxMMCleanup(IMG_VOID)
 
 
 IMG_VOID *
-_KMallocWrapper(IMG_UINT32 ui32ByteSize, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line)
+_KMallocWrapper(IMG_UINT32 ui32ByteSize, gfp_t uFlags, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line)
 {
     IMG_VOID *pvRet;
-    pvRet = kmalloc(ui32ByteSize, GFP_KERNEL);
+    pvRet = kmalloc(ui32ByteSize, uFlags);
 #if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
     if(pvRet)
     {
@@ -395,7 +395,7 @@ DebugMemAllocRecordAdd(DEBUG_MEM_ALLOC_TYPE eAllocType,
     psRecord->pvCpuVAddr = pvCpuVAddr;
     psRecord->ulCpuPAddr = ulCpuPAddr;
     psRecord->pvPrivateData = pvPrivateData;
-    psRecord->pid = current->pid;
+    psRecord->pid = OSGetCurrentProcessIDKM();
     psRecord->ui32Bytes = ui32Bytes;
     psRecord->pszFileName = pszFileName;
     psRecord->ui32Line = ui32Line;
@@ -1318,7 +1318,7 @@ DebugLinuxMemAreaRecordAdd(LinuxMemArea *psLinuxMemArea, IMG_UINT32 ui32Flags)
         
         psNewRecord->psLinuxMemArea = psLinuxMemArea;
         psNewRecord->ui32Flags = ui32Flags;
-        psNewRecord->pid = current->pid;
+        psNewRecord->pid = OSGetCurrentProcessIDKM();
 		
 		List_DEBUG_LINUX_MEM_AREA_REC_Insert(&g_LinuxMemAreaRecords, psNewRecord);
     }
diff --git a/drivers/gpu/pvr/mm.h b/drivers/gpu/pvr/mm.h
index 047b3ad540c..62aa079dcc6 100644
--- a/drivers/gpu/pvr/mm.h
+++ b/drivers/gpu/pvr/mm.h
@@ -160,11 +160,11 @@ IMG_VOID LinuxMMCleanup(IMG_VOID);
 
 
 #if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-#define KMallocWrapper(ui32ByteSize) _KMallocWrapper(ui32ByteSize, __FILE__, __LINE__)
+#define KMallocWrapper(ui32ByteSize, uFlags) _KMallocWrapper(ui32ByteSize, uFlags, __FILE__, __LINE__)
 #else
-#define KMallocWrapper(ui32ByteSize) _KMallocWrapper(ui32ByteSize, NULL, 0)
+#define KMallocWrapper(ui32ByteSize, uFlags) _KMallocWrapper(ui32ByteSize, uFlags, NULL, 0)
 #endif
-IMG_VOID *_KMallocWrapper(IMG_UINT32 ui32ByteSize, IMG_CHAR *szFileName, IMG_UINT32 ui32Line);
+IMG_VOID *_KMallocWrapper(IMG_UINT32 ui32ByteSize, gfp_t uFlags, IMG_CHAR *szFileName, IMG_UINT32 ui32Line);
 
 
 #if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
diff --git a/drivers/gpu/pvr/mmap.c b/drivers/gpu/pvr/mmap.c
index 66cef26e522..c9a30f1c8d4 100644
--- a/drivers/gpu/pvr/mmap.c
+++ b/drivers/gpu/pvr/mmap.c
@@ -67,7 +67,7 @@
 #include "pvr_drm.h"
 #endif
 
-#if !defined(PVR_SECURE_HANDLES)
+#if !defined(PVR_SECURE_HANDLES) && !defined (SUPPORT_SID_INTERFACE)
 #error "The mmap code requires PVR_SECURE_HANDLES"
 #endif
 
@@ -146,7 +146,11 @@ MMapOffsetToHandle(IMG_UINT32 pfn)
 #endif
 
 static inline IMG_UINT32
+#if defined (SUPPORT_SID_INTERFACE)
+HandleToMMapOffset(IMG_SID hHandle)
+#else
 HandleToMMapOffset(IMG_HANDLE hHandle)
+#endif
 {
 	IMG_UINT32 ulHandle = (IMG_UINT32)hHandle;
 
@@ -270,11 +274,15 @@ DetermineUsersSizeAndByteOffset(LinuxMemArea *psLinuxMemArea,
 
 PVRSRV_ERROR
 PVRMMapOSMemHandleToMMapData(PVRSRV_PER_PROCESS_DATA *psPerProc,
-				IMG_HANDLE hMHandle,
-                                IMG_UINT32 *pui32MMapOffset,
-                                IMG_UINT32 *pui32ByteOffset,
-                                IMG_UINT32 *pui32RealByteSize,
-				IMG_UINT32 *pui32UserVAddr)
+#if defined (SUPPORT_SID_INTERFACE)
+                             IMG_SID     hMHandle,
+#else
+                             IMG_HANDLE hMHandle,
+#endif
+                             IMG_UINT32 *pui32MMapOffset,
+                             IMG_UINT32 *pui32ByteOffset,
+                             IMG_UINT32 *pui32RealByteSize,
+                             IMG_UINT32 *pui32UserVAddr)
 {
     LinuxMemArea *psLinuxMemArea;
     PKV_OFFSET_STRUCT psOffsetStruct;
@@ -288,9 +296,13 @@ PVRMMapOSMemHandleToMMapData(PVRSRV_PER_PROCESS_DATA *psPerProc,
     eError = PVRSRVLookupOSMemHandle(psPerProc->psHandleBase, &hOSMemHandle, hMHandle);
     if (eError != PVRSRV_OK)
     {
-	PVR_DPF((PVR_DBG_ERROR, "%s: Lookup of handle %p failed", __FUNCTION__, hMHandle));
+#if defined (SUPPORT_SID_INTERFACE)
+        PVR_DPF((PVR_DBG_ERROR, "%s: Lookup of handle %x failed", __FUNCTION__, hMHandle));
+#else
+        PVR_DPF((PVR_DBG_ERROR, "%s: Lookup of handle %p failed", __FUNCTION__, hMHandle));
+#endif
 
-	goto exit_unlock;
+        goto exit_unlock;
     }
 
     psLinuxMemArea = (LinuxMemArea *)hOSMemHandle;
@@ -364,7 +376,11 @@ exit_unlock:
 
 PVRSRV_ERROR
 PVRMMapReleaseMMapData(PVRSRV_PER_PROCESS_DATA *psPerProc,
+#if defined (SUPPORT_SID_INTERFACE)
+				IMG_SID   hMHandle,
+#else
 				IMG_HANDLE hMHandle,
+#endif
 				IMG_BOOL *pbMUnmap,
 				IMG_UINT32 *pui32RealByteSize,
                                 IMG_UINT32 *pui32UserVAddr)
@@ -382,7 +398,11 @@ PVRMMapReleaseMMapData(PVRSRV_PER_PROCESS_DATA *psPerProc,
     eError = PVRSRVLookupOSMemHandle(psPerProc->psHandleBase, &hOSMemHandle, hMHandle);
     if (eError != PVRSRV_OK)
     {
+#if defined (SUPPORT_SID_INTERFACE)
+	PVR_DPF((PVR_DBG_ERROR, "%s: Lookup of handle %x failed", __FUNCTION__, hMHandle));
+#else
 	PVR_DPF((PVR_DBG_ERROR, "%s: Lookup of handle %p failed", __FUNCTION__, hMHandle));
+#endif
 
 	goto exit_unlock;
     }
@@ -414,7 +434,11 @@ PVRMMapReleaseMMapData(PVRSRV_PER_PROCESS_DATA *psPerProc,
     }
 
     
+#if defined (SUPPORT_SID_INTERFACE)
+    PVR_DPF((PVR_DBG_ERROR, "%s: Mapping data not found for handle %x (memory area %p)", __FUNCTION__, hMHandle, psLinuxMemArea));
+#else
     PVR_DPF((PVR_DBG_ERROR, "%s: Mapping data not found for handle %p (memory area %p)", __FUNCTION__, hMHandle, psLinuxMemArea));
+#endif
 
     eError =  PVRSRV_ERROR_MAPPING_NOT_FOUND;
 
@@ -590,10 +614,6 @@ MMapVOpenNoLock(struct vm_area_struct* ps_vma)
              psOffsetStruct->ui32MMapOffset,
              psOffsetStruct->ui32Mapped));
 #endif
-
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
-    MOD_INC_USE_COUNT;
-#endif
 }
 
 
@@ -637,10 +657,6 @@ MMapVCloseNoLock(struct vm_area_struct* ps_vma)
     }
 
     ps_vma->vm_private_data = NULL;
-
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
-    MOD_DEC_USE_COUNT;
-#endif
 }
 
 static void
diff --git a/drivers/gpu/pvr/mmap.h b/drivers/gpu/pvr/mmap.h
index 486154a241f..9330da15170 100644
--- a/drivers/gpu/pvr/mmap.h
+++ b/drivers/gpu/pvr/mmap.h
@@ -94,14 +94,23 @@ PVRSRV_ERROR PVRMMapRemoveRegisteredArea(LinuxMemArea *psLinuxMemArea);
 
 
 PVRSRV_ERROR PVRMMapOSMemHandleToMMapData(PVRSRV_PER_PROCESS_DATA *psPerProc,
-					     IMG_HANDLE hMHandle,
-                                             IMG_UINT32 *pui32MMapOffset,
-                                             IMG_UINT32 *pui32ByteOffset,
-                                             IMG_UINT32 *pui32RealByteSize,						     IMG_UINT32 *pui32UserVAddr);
+#if defined (SUPPORT_SID_INTERFACE)
+                                          IMG_SID     hMHandle,
+#else
+                                          IMG_HANDLE hMHandle,
+#endif
+                                          IMG_UINT32 *pui32MMapOffset,
+                                          IMG_UINT32 *pui32ByteOffset,
+                                          IMG_UINT32 *pui32RealByteSize,
+                                          IMG_UINT32 *pui32UserVAddr);
 
 PVRSRV_ERROR
 PVRMMapReleaseMMapData(PVRSRV_PER_PROCESS_DATA *psPerProc,
+#if defined (SUPPORT_SID_INTERFACE)
+				IMG_SID   hMHandle,
+#else
 				IMG_HANDLE hMHandle,
+#endif
 				IMG_BOOL *pbMUnmap,
 				IMG_UINT32 *pui32RealByteSize,
                                 IMG_UINT32 *pui32UserVAddr);
diff --git a/drivers/gpu/pvr/module.c b/drivers/gpu/pvr/module.c
index d0c6eb14e3d..c9fc0cf44e5 100644
--- a/drivers/gpu/pvr/module.c
+++ b/drivers/gpu/pvr/module.c
@@ -47,8 +47,6 @@
 #include <linux/version.h>
 #include <linux/fs.h>
 #include <linux/proc_fs.h>
-#include <linux/pm_runtime.h>
-#include <plat/gpu.h>
 
 #if defined(SUPPORT_DRI_DRM)
 #include <drm/drmP.h>
@@ -127,11 +125,11 @@ static int PVRSRVRelease(struct inode* pInode, struct file* pFile);
 
 static struct file_operations pvrsrv_fops =
 {
-	.owner = THIS_MODULE,
+	.owner=THIS_MODULE,
 	.unlocked_ioctl = PVRSRV_BridgeDispatchKM,
-	.open = PVRSRVOpen,
-	.release = PVRSRVRelease,
-	.mmap = PVRMMap,
+	.open=PVRSRVOpen,
+	.release=PVRSRVRelease,
+	.mmap=PVRMMap,
 };
 #endif
 
@@ -201,9 +199,24 @@ static LDM_DRV powervr_driver = {
 	.shutdown	= PVRSRVDriverShutdown,
 };
 
-struct gpu_platform_data *gpsSgxPlatformData;
 LDM_DEV *gpsPVRLDMDev;
 
+#if defined(MODULE) && defined(PVR_LDM_PLATFORM_MODULE)
+
+static IMG_VOID PVRSRVDeviceRelease(struct device unref__ *pDevice)
+{
+}
+
+static struct platform_device powervr_device = {
+	.name			= DEVNAME,
+	.id				= -1,
+	.dev 			= {
+		.release	= PVRSRVDeviceRelease
+	}
+};
+
+#endif 
+
 #if defined(PVR_LDM_PLATFORM_MODULE)
 static int PVRSRVDriverProbe(LDM_DEV *pDevice)
 #endif
@@ -221,16 +234,8 @@ static int __devinit PVRSRVDriverProbe(LDM_DEV *pDevice, const struct pci_device
 	{
 		return -EINVAL;
 	}
-#endif	
-
-	gpsSgxPlatformData = pDevice->dev.platform_data;
-	if(!gpsSgxPlatformData)
-	{
-		PVR_TRACE(("No SGX platform device data."));
-	}
+#endif
 	
-	pm_runtime_enable(&pDevice->dev);
-
 	psSysData = SysAcquireDataNoCheck();
 	if ( psSysData == IMG_NULL)
 	{
@@ -269,8 +274,6 @@ static void __devexit PVRSRVDriverRemove(LDM_DEV *pDevice)
 	}
 #endif
 	(IMG_VOID)SysDeinitialise(psSysData);
-	
-	pm_runtime_disable(&pDevice->dev);
 
 	gpsPVRLDMDev = IMG_NULL;
 
@@ -425,7 +428,9 @@ static int PVRSRVOpen(struct inode unref__ * pInode, struct file *pFile)
 	if(eError != PVRSRV_OK)
 		goto err_unlock;
 
-#if defined(PVR_SECURE_FD_EXPORT)
+#if defined (SUPPORT_SID_INTERFACE)
+	psPrivateData->hKernelMemInfo = 0;
+#else
 	psPrivateData->hKernelMemInfo = NULL;
 #endif
 #if defined(SUPPORT_DRI_DRM) && defined(PVR_SECURE_DRM_AUTH_EXPORT)
@@ -464,7 +469,7 @@ static int PVRSRVRelease(struct inode unref__ * pInode, struct file *pFile)
 		list_del(&psPrivateData->sDRMAuthListItem);
 #endif
 
-
+		
 		gui32ReleasePID = psPrivateData->ui32OpenPID;
 		PVRSRVProcessDisconnect(psPrivateData->ui32OpenPID);
 		gui32ReleasePID = 0;
@@ -474,7 +479,7 @@ static int PVRSRVRelease(struct inode unref__ * pInode, struct file *pFile)
 				  psPrivateData, psPrivateData->hBlockAlloc);
 
 #if !defined(SUPPORT_DRI_DRM)
-		PRIVATE_DATA(pFile) = IMG_NULL;
+		PRIVATE_DATA(pFile) = IMG_NULL; 
 #endif
 	}
 
@@ -541,6 +546,16 @@ static int __init PVRCore_Init(IMG_VOID)
 		goto init_failed;
 	}
 
+#if defined(MODULE)
+	if ((error = platform_device_register(&powervr_device)) != 0)
+	{
+		platform_driver_unregister(&powervr_driver);
+
+		PVR_DPF((PVR_DBG_ERROR, "PVRCore_Init: unable to register platform device (%d)", error));
+
+		goto init_failed;
+	}
+#endif
 #endif 
 
 #if defined(PVR_LDM_PCI_MODULE)
@@ -623,6 +638,9 @@ sys_deinit:
 #endif
 
 #if defined (PVR_LDM_PLATFORM_MODULE)
+#if defined (MODULE)
+	platform_device_unregister(&powervr_device);
+#endif
 	platform_driver_unregister(&powervr_driver);
 #endif
 
@@ -689,6 +707,9 @@ static void __exit PVRCore_Cleanup(void)
 #endif
 
 #if defined (PVR_LDM_PLATFORM_MODULE)
+#if defined (MODULE)
+	platform_device_unregister(&powervr_device);
+#endif
 	platform_driver_unregister(&powervr_driver);
 #endif
 
diff --git a/drivers/gpu/pvr/omap4/sysconfig.c b/drivers/gpu/pvr/omap4/sysconfig.c
index 56ecb5ab9db..4904f2acb01 100644
--- a/drivers/gpu/pvr/omap4/sysconfig.c
+++ b/drivers/gpu/pvr/omap4/sysconfig.c
@@ -63,97 +63,6 @@ IMG_UINT32 PVRSRV_BridgeDispatchKM(IMG_UINT32	Ioctl,
 								   IMG_UINT32	OutBufLen,
 								   IMG_UINT32	*pdwBytesTransferred);
 
-#if defined(DEBUG) && defined(DUMP_OMAP34xx_CLOCKS) && defined(__linux__)
-
-#pragma GCC diagnostic ignored "-Wstrict-prototypes"
-#include <mach/clock.h>
-
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29))
-#include <../mach-omap2/clock_34xx.h>
-#define ONCHIP_CLKS onchip_clks
-#else
-#include <../mach-omap2/clock34xx.h>
-#define ONCHIP_CLKS onchip_34xx_clks
-#endif
-
-static void omap3_clk_recalc(struct clk *clk) {}
-static void omap3_followparent_recalc(struct clk *clk) {}
-static void omap3_propagate_rate(struct clk *clk) {}
-static void omap3_table_recalc(struct clk *clk) {}
-static long omap3_round_to_table_rate(struct clk *clk, unsigned long rate) { return 0; }
-static int omap3_select_table_rate(struct clk *clk, unsigned long rate) { return 0; }
-
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
-static void omap3_dpll_recalc(struct clk *clk, unsigned long parent_rate,
-							  u8 rate_storage) {}
-static void omap3_clkoutx2_recalc(struct clk *clk, unsigned long parent_rate,
-								  u8 rate_storage) {}
-static void omap3_dpll_allow_idle(struct clk *clk) {}
-static void omap3_dpll_deny_idle(struct clk *clk) {}
-static u32 omap3_dpll_autoidle_read(struct clk *clk) { return 0; }
-static int omap3_noncore_dpll_enable(struct clk *clk) { return 0; }
-static void omap3_noncore_dpll_disable(struct clk *clk) {}
-static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) { return 0; }
-static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) { return 0; }
-void followparent_recalc(struct clk *clk, unsigned long new_parent_rate,
-								u8 rate_storage) {}
-long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate) { return 0; }
-void omap2_clksel_recalc(struct clk *clk, unsigned long new_parent_rate,
-								u8 rate_storage) {}
-long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate) { return 0; }
-int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) { return 0; }
-void omap2_fixed_divisor_recalc(struct clk *clk, unsigned long new_parent_rate,
-									   u8 rate_storage) {}
-void omap2_init_clksel_parent(struct clk *clk) {}
-#endif
-
-static void dump_omap34xx_clocks(void)
-{
-	struct clk **c;
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29))
-	struct vdd_prcm_config *t1 = vdd1_rate_table;
-	struct vdd_prcm_config *t2 = vdd2_rate_table;
-
-	t1 = t1;
-	t2 = t2;
-#else
-
-	omap3_dpll_allow_idle(0);
-	omap3_dpll_deny_idle(0);
-	omap3_dpll_autoidle_read(0);
-	omap3_clk_recalc(0);
-	omap3_followparent_recalc(0);
-	omap3_propagate_rate(0);
-	omap3_table_recalc(0);
-	omap3_round_to_table_rate(0, 0);
-	omap3_select_table_rate(0, 0);
-#endif
-
-	for(c = ONCHIP_CLKS; c < ONCHIP_CLKS + ARRAY_SIZE(ONCHIP_CLKS); c++)
-	{
-		struct clk *cp = *c, *copy;
-		unsigned long rate;
-		copy = clk_get(NULL, cp->name);
-		if(!copy)
-			continue;
-		rate = clk_get_rate(copy);
-		if (rate < 1000000)
-		{
-			PVR_DPF((PVR_DBG_ERROR, "%s: clock %s is %lu KHz (%lu Hz)", __func__, cp->name, rate/1000, rate));
-		}
-		else
-		{
-			PVR_DPF((PVR_DBG_ERROR, "%s: clock %s is %lu MHz (%lu Hz)", __func__, cp->name, rate/1000000, rate));
-		}
-	}
-}
-
-#else
-
-static INLINE void dump_omap34xx_clocks(void) {}
-
-#endif
-
 #if defined(SGX_OCP_REGS_ENABLED)
 
 #define SYS_OMAP4430_OCP_REGS_SYS_PHYS_BASE		(SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE + EUR_CR_OCP_REVISION)
@@ -168,6 +77,9 @@ static PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData)
 	if(eError == PVRSRV_OK)
 	{
 		OSWriteHWReg(gpvOCPRegsLinAddr,
+					 EUR_CR_OCP_SYSCONFIG - EUR_CR_OCP_REVISION,
+					 0x14); 
+		OSWriteHWReg(gpvOCPRegsLinAddr,
 					 EUR_CR_OCP_DEBUG_CONFIG - EUR_CR_OCP_REVISION,
 					 EUR_CR_OCP_DEBUG_CONFIG_THALIA_INT_BYPASS_MASK);
 	}
@@ -175,14 +87,14 @@ static PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData)
 	return eError;
 }
 
-#else
+#else 
 
 static INLINE PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData)
 {
 	return EnableSGXClocks(psSysData);
 }
 
-#endif
+#endif 
 
 static INLINE PVRSRV_ERROR EnableSystemClocksWrap(SYS_DATA *psSysData)
 {
@@ -191,7 +103,7 @@ static INLINE PVRSRV_ERROR EnableSystemClocksWrap(SYS_DATA *psSysData)
 #if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
 	if(eError == PVRSRV_OK)
 	{
-
+		
 		EnableSGXClocksWrap(psSysData);
 	}
 #endif
@@ -208,13 +120,13 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
 
 	PVR_UNREFERENCED_PARAMETER(psSysData);
 
-
+	
 	gsSGXDeviceMap.ui32Flags = 0x0;
-
+	
 #if defined(NO_HARDWARE)
-
-
-	eError = OSBaseAllocContigMemory(SYS_OMAP4430_SGX_REGS_SIZE,
+	
+	
+	eError = OSBaseAllocContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, 
 									 &gsSGXRegsCPUVAddr,
 									 &sCpuPAddr);
 	if(eError != PVRSRV_OK)
@@ -225,21 +137,21 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
 	gsSGXDeviceMap.sRegsSysPBase = SysCpuPAddrToSysPAddr(gsSGXDeviceMap.sRegsCpuPBase);
 	gsSGXDeviceMap.ui32RegsSize = SYS_OMAP4430_SGX_REGS_SIZE;
 #if defined(__linux__)
-
+	
 	gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
 #else
-
+	
 	gsSGXDeviceMap.pvRegsCpuVBase = IMG_NULL;
 #endif
 
 	OSMemSet(gsSGXRegsCPUVAddr, 0, SYS_OMAP4430_SGX_REGS_SIZE);
 
-
+	
 
 
 	gsSGXDeviceMap.ui32IRQ = 0;
 
-#else
+#else 
 
 	gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE;
 	gsSGXDeviceMap.sRegsCpuPBase = SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
@@ -251,11 +163,14 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
 
 #if defined(PDUMP)
 	{
+		
 		static IMG_CHAR pszPDumpDevName[] = "SGXMEM";
 		gsSGXDeviceMap.pszPDumpDevName = pszPDumpDevName;
 	}
 #endif
 
+	
+
 
 	return PVRSRV_OK;
 }
@@ -318,7 +233,7 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
 	IMG_UINT32			i;
 	PVRSRV_ERROR 		eError;
 	PVRSRV_DEVICE_NODE	*psDeviceNode;
-#if !defined(NO_OMAP_TIMER)
+#if !defined(PVR_NO_OMAP_TIMER)
 	IMG_CPU_PHYADDR		TimerRegPhysBase;
 #endif
 #if !defined(SGX_DYNAMIC_TIMING_INFO)
@@ -344,7 +259,7 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
 
 	gpsSysData->ui32NumDevices = SYS_DEVICE_COUNT;
 
-
+	
 	for(i=0; i<SYS_DEVICE_COUNT; i++)
 	{
 		gpsSysData->sDeviceID[i].uiID = i;
@@ -363,8 +278,8 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
 		return eError;
 	}
 
-#if !defined(NO_OMAP_TIMER)
-	TimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE;
+#if !defined(PVR_NO_OMAP_TIMER)
+	TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE;
 	gpsSysData->pvSOCTimerRegisterKM = IMG_NULL;
 	gpsSysData->hSOCTimerRegisterOSMemHandle = 0;
 	OSReservePhys(TimerRegPhysBase,
@@ -372,27 +287,27 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
 				  PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED,
 				  (IMG_VOID **)&gpsSysData->pvSOCTimerRegisterKM,
 				  &gpsSysData->hSOCTimerRegisterOSMemHandle);
-#endif
+#endif 
 
 #if !defined(SGX_DYNAMIC_TIMING_INFO)
-
+	
 	psTimingInfo = &gsSGXDeviceMap.sTimingInfo;
 	psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
-	psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ;
+	psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ; 
 #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
 	psTimingInfo->bEnableActivePM = IMG_TRUE;
-#else
+#else	
 	psTimingInfo->bEnableActivePM = IMG_FALSE;
-#endif
-	psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS;
-	psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ;
+#endif 
+	psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS; 
+	psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ; 
 #endif
 
-
+	
 
 	gpsSysSpecificData->ui32SrcClockDiv = 3;
 
-
+	
 
 
 
@@ -428,6 +343,18 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
 	}
 #endif
 
+	eError = SysPMRuntimeRegister();
+	if (eError != PVRSRV_OK)
+	{
+		PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to register with OSPM!"));
+		(IMG_VOID)SysDeinitialise(gpsSysData);
+		gpsSysData = IMG_NULL;
+		return eError;
+	}
+	SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME);
+
+	
+
 
 	eError = PVRSRVRegisterDevice(gpsSysData, SGXRegisterDevice,
 								  DEVICE_SGX_INTERRUPT, &gui32SGXDeviceID);
@@ -440,13 +367,14 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
 	}
 	SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_REGDEV);
 
+	
 
 
-
+	
 	psDeviceNode = gpsSysData->psDeviceNodeList;
 	while(psDeviceNode)
 	{
-
+		
 		switch(psDeviceNode->sDevId.eDeviceType)
 		{
 			case PVRSRV_DEVICE_TYPE_SGX:
@@ -454,16 +382,16 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
 				DEVICE_MEMORY_INFO *psDevMemoryInfo;
 				DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
 
-
+				
 
 
 				psDeviceNode->psLocalDevMemArena = IMG_NULL;
 
-
+				
 				psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo;
 				psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap;
 
-
+				
 				for(i=0; i<psDevMemoryInfo->ui32HeapCount; i++)
 				{
 					psDeviceMemoryHeap[i].ui32Attribs |= PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG;
@@ -479,7 +407,7 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
 				return PVRSRV_ERROR_INIT_FAILURE;
 		}
 
-
+		
 		psDeviceNode = psDeviceNode->psNext;
 	}
 
@@ -501,9 +429,7 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
 		gpsSysData = IMG_NULL;
 		return eError;
 	}
-#endif
-
-	dump_omap34xx_clocks();
+#endif	
 
 	eError = PVRSRVInitialiseDevice(gui32SGXDeviceID);
 	if (eError != PVRSRV_OK)
@@ -516,9 +442,9 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
 	SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_INITDEV);
 
 #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
-
+	
 	DisableSGXClocks(gpsSysData);
-#endif
+#endif	
 
 	return PVRSRV_OK;
 }
@@ -535,7 +461,7 @@ PVRSRV_ERROR SysFinalise(IMG_VOID)
 		PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to Enable SGX clocks (%d)", eError));
 		return eError;
 	}
-#endif
+#endif	
 
 	eError = OSInstallMISR(gpsSysData);
 	if (eError != PVRSRV_OK)
@@ -546,7 +472,7 @@ PVRSRV_ERROR SysFinalise(IMG_VOID)
 	SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR);
 
 #if defined(SYS_USING_INTERRUPTS)
-
+	
 	eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode);
 	if (eError != PVRSRV_OK)
 	{
@@ -554,9 +480,10 @@ PVRSRV_ERROR SysFinalise(IMG_VOID)
 		return eError;
 	}
 	SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR);
-#endif
-
+#endif 
 
+#if defined(__linux__)
+	
 	gpsSysData->pszVersionString = SysCreateVersionString(gsSGXDeviceMap.sRegsCpuPBase);
 	if (!gpsSysData->pszVersionString)
 	{
@@ -566,11 +493,12 @@ PVRSRV_ERROR SysFinalise(IMG_VOID)
 	{
 		PVR_DPF((PVR_DBG_WARNING, "SysFinalise: Version string: %s", gpsSysData->pszVersionString));
 	}
+#endif
 
 #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
-
+	
 	DisableSGXClocks(gpsSysData);
-#endif
+#endif	
 
 	gpsSysSpecificData->bSGXInitComplete = IMG_TRUE;
 
@@ -592,7 +520,7 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
 			return eError;
 		}
 	}
-#endif 
+#endif
 
 	if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR))
 	{
@@ -625,14 +553,26 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
 			return eError;
 		}
 	}
-	
+
+	if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME))
+	{
+		eError = SysPMRuntimeUnregister();
+		if (eError != PVRSRV_OK)
+		{
+			PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to unregister with OSPM!"));
+			(IMG_VOID)SysDeinitialise(gpsSysData);
+			gpsSysData = IMG_NULL;
+			return eError;
+		}
+	}
+
 #if defined(SGX_OCP_REGS_ENABLED)
 	if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_OCPREGS))
 	{
-	OSUnMapPhysToLin(gpvOCPRegsLinAddr,
-					 SYS_OMAP4430_OCP_REGS_SIZE,
-					 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
-					 IMG_NULL);
+		OSUnMapPhysToLin(gpvOCPRegsLinAddr,
+						 SYS_OMAP4430_OCP_REGS_SIZE,
+						 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
+						 IMG_NULL);
 	}
 #endif
 
@@ -644,7 +584,7 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
 	}
 
 	if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA))
-	{
+	{	
 		eError = OSDeInitEnvData(gpsSysData->pvEnvSpecificData);
 		if (eError != PVRSRV_OK)
 		{
@@ -653,7 +593,6 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
 		}
 	}
 
-#if !defined(NO_OMAP_TIMER)
 	if(gpsSysData->pvSOCTimerRegisterKM)
 	{
 		OSUnReservePhys(gpsSysData->pvSOCTimerRegisterKM,
@@ -661,18 +600,18 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
 						PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED,
 						gpsSysData->hSOCTimerRegisterOSMemHandle);
 	}
-#endif
 
 	SysDeinitialiseCommon(gpsSysData);
 
 #if defined(NO_HARDWARE)
 	if(SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV))
 	{
-
+		
 		OSBaseFreeContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase);
 	}
 #endif
 
+	
 	gpsSysSpecificData->ui32SysSpecificData = 0;
 	gpsSysSpecificData->bSGXInitComplete = IMG_FALSE;
 
@@ -690,7 +629,7 @@ PVRSRV_ERROR SysGetDeviceMemoryMap(PVRSRV_DEVICE_TYPE	eDeviceType,
 	{
 		case PVRSRV_DEVICE_TYPE_SGX:
 		{
-
+			
 			*ppvDeviceMap = (IMG_VOID*)&gsSGXDeviceMap;
 
 			break;
@@ -711,9 +650,9 @@ IMG_DEV_PHYADDR SysCpuPAddrToDevPAddr(PVRSRV_DEVICE_TYPE	eDeviceType,
 
 	PVR_UNREFERENCED_PARAMETER(eDeviceType);
 
-
+	
 	DevPAddr.uiAddr = CpuPAddr.uiAddr;
-
+	
 	return DevPAddr;
 }
 
@@ -721,7 +660,7 @@ IMG_CPU_PHYADDR SysSysPAddrToCpuPAddr (IMG_SYS_PHYADDR sys_paddr)
 {
 	IMG_CPU_PHYADDR cpu_paddr;
 
-
+	
 	cpu_paddr.uiAddr = sys_paddr.uiAddr;
 	return cpu_paddr;
 }
@@ -730,7 +669,7 @@ IMG_SYS_PHYADDR SysCpuPAddrToSysPAddr (IMG_CPU_PHYADDR cpu_paddr)
 {
 	IMG_SYS_PHYADDR sys_paddr;
 
-
+	
 	sys_paddr.uiAddr = cpu_paddr.uiAddr;
 	return sys_paddr;
 }
@@ -742,7 +681,7 @@ IMG_DEV_PHYADDR SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_SYS_PH
 
 	PVR_UNREFERENCED_PARAMETER(eDeviceType);
 
-
+	
 	DevPAddr.uiAddr = SysPAddr.uiAddr;
 
 	return DevPAddr;
@@ -755,7 +694,7 @@ IMG_SYS_PHYADDR SysDevPAddrToSysPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_DEV_PH
 
 	PVR_UNREFERENCED_PARAMETER(eDeviceType);
 
-
+	
 	SysPAddr.uiAddr = DevPAddr.uiAddr;
 
 	return SysPAddr;
@@ -779,10 +718,10 @@ IMG_UINT32 SysGetInterruptSource(SYS_DATA			*psSysData,
 {
 	PVR_UNREFERENCED_PARAMETER(psSysData);
 #if defined(NO_HARDWARE)
-
+	
 	return 0xFFFFFFFF;
 #else
-
+	
 	return psDeviceNode->ui32SOCInterruptBit;
 #endif
 }
@@ -793,7 +732,7 @@ IMG_VOID SysClearInterrupts(SYS_DATA* psSysData, IMG_UINT32 ui32ClearBits)
 	PVR_UNREFERENCED_PARAMETER(psSysData);
 	PVR_UNREFERENCED_PARAMETER(ui32ClearBits);
 
-
+	
 	OSReadHWReg(((PVRSRV_SGXDEV_INFO *)gpsSGXDevNode->pvDevice)->pvRegsBaseKM,
 										EUR_CR_EVENT_HOST_CLEAR);
 }
@@ -908,9 +847,9 @@ PVRSRV_ERROR SysDevicePrePowerState(IMG_UINT32				ui32DeviceIndex,
 		PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePrePowerState: SGX Entering state D3"));
 		DisableSGXClocks(gpsSysData);
 	}
-#else
+#else	
 	PVR_UNREFERENCED_PARAMETER(eNewPowerState );
-#endif
+#endif 
 	return PVRSRV_OK;
 }
 
@@ -934,9 +873,9 @@ PVRSRV_ERROR SysDevicePostPowerState(IMG_UINT32				ui32DeviceIndex,
 		PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePostPowerState: SGX Leaving state D3"));
 		eError = EnableSGXClocksWrap(gpsSysData);
 	}
-#else
+#else	
 	PVR_UNREFERENCED_PARAMETER(eCurrentPowerState);
-#endif
+#endif	
 
 	return eError;
 }
@@ -957,7 +896,7 @@ PVRSRV_ERROR SysOEMFunction (	IMG_UINT32	ui32ID,
 	if ((ui32ID == OEM_GET_EXT_FUNCS) &&
 		(ulOutSize == sizeof(PVRSRV_DC_OEM_JTABLE)))
 	{
-
+		
 		PVRSRV_DC_OEM_JTABLE *psOEMJTable = (PVRSRV_DC_OEM_JTABLE*) pvOut;
 		psOEMJTable->pfnOEMBridgeDispatch = &PVRSRV_BridgeDispatchKM;
 		return PVRSRV_OK;
diff --git a/drivers/gpu/pvr/omap4/sysconfig.h b/drivers/gpu/pvr/omap4/sysconfig.h
index bf789072847..b3714fd7074 100644
--- a/drivers/gpu/pvr/omap4/sysconfig.h
+++ b/drivers/gpu/pvr/omap4/sysconfig.h
@@ -1,26 +1,26 @@
 /**********************************************************************
  *
  * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
- *
+ * 
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
  * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
  * See the GNU General Public License for more details.
- *
+ * 
  * You should have received a copy of the GNU General Public License along with
  * this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
+ * 
  * The full GNU General Public License is included in this distribution in
  * the file called "COPYING".
  *
  * Contact Information:
  * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
  *
  ******************************************************************************/
 
@@ -31,37 +31,29 @@
 
 #define VS_PRODUCT_NAME	"OMAP4"
 
-#if defined(SGX_CLK_PER_192)
-#define SYS_SGX_CLOCK_SPEED 192000000
+#if defined(SGX540) && (SGX_CORE_REV == 120)
+#define SYS_SGX_CLOCK_SPEED		320000000
 #else
-#if defined(SGX_CLK_CORE_DIV8)
-#define SYS_SGX_CLOCK_SPEED 190464000
-#else
-#if defined(SGX_CLK_CORE_DIV5)
-#if defined(CONFIG_SGX_REV110)
-#define SYS_SGX_CLOCK_SPEED 304742400
-#endif
-#if defined(CONFIG_SGX_REV120)
-#define SYS_SGX_CLOCK_SPEED       307200000
-#endif
-#endif
-#endif
+#define SYS_SGX_CLOCK_SPEED		304742400
 #endif
 
-#define SYS_SGX_HWRECOVERY_TIMEOUT_FREQ		(100)
-#define SYS_SGX_PDS_TIMER_FREQ				(1000)
+#define SYS_SGX_HWRECOVERY_TIMEOUT_FREQ		(100)	
+#define SYS_SGX_PDS_TIMER_FREQ				(1000)	
 
 #if !defined(SYS_SGX_ACTIVE_POWER_LATENCY_MS)
-#define SYS_SGX_ACTIVE_POWER_LATENCY_MS		(100)
+#define SYS_SGX_ACTIVE_POWER_LATENCY_MS		(1)
 #endif
 
 
-
 #define SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE  0x56000000
-#define SYS_OMAP4430_SGX_REGS_SIZE           0xFFFF
 
-#define SYS_OMAP4430_SGX_IRQ				 53 /* OMAP 4 IRQs are offset by 32 */
+#define SYS_OMAP4430_SGX_REGS_SIZE           0xFFFF
 
+#define SYS_OMAP4430_SGX_IRQ				 53 
 
+#define SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE  0x48088038
+#define SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE	 0x4808803C
+#define SYS_OMAP4430_GP11TIMER_TSICR_SYS_PHYS_BASE	 0x48088054
 
-#endif
+ 
+#endif	
diff --git a/drivers/gpu/pvr/omap4/sysinfo.h b/drivers/gpu/pvr/omap4/sysinfo.h
index 80b86febda6..42489f0c632 100644
--- a/drivers/gpu/pvr/omap4/sysinfo.h
+++ b/drivers/gpu/pvr/omap4/sysinfo.h
@@ -1,26 +1,26 @@
 /**********************************************************************
  *
  * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
- *
+ * 
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
  * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
  * See the GNU General Public License for more details.
- *
+ * 
  * You should have received a copy of the GNU General Public License along with
  * this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
+ * 
  * The full GNU General Public License is included in this distribution in
  * the file called "COPYING".
  *
  * Contact Information:
  * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
  *
  ******************************************************************************/
 
@@ -29,12 +29,13 @@
 
 #if defined(PVR_LINUX_USING_WORKQUEUES)
 #define MAX_HW_TIME_US				(1000000)
+#define WAIT_TRY_COUNT				(20000)
 #else
 #define MAX_HW_TIME_US				(500000)
+#define WAIT_TRY_COUNT				(10000)
 #endif
 
-#define WAIT_TRY_COUNT				(10000)
 
-#define SYS_DEVICE_COUNT 4
+#define SYS_DEVICE_COUNT 15 
 
-#endif
+#endif	
diff --git a/drivers/gpu/pvr/omap4/syslocal.h b/drivers/gpu/pvr/omap4/syslocal.h
index 766870f366c..bc7748c4705 100644
--- a/drivers/gpu/pvr/omap4/syslocal.h
+++ b/drivers/gpu/pvr/omap4/syslocal.h
@@ -1,26 +1,26 @@
 /**********************************************************************
  *
  * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
- *
+ * 
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
  * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
  * See the GNU General Public License for more details.
- *
+ * 
  * You should have received a copy of the GNU General Public License along with
  * this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
+ * 
  * The full GNU General Public License is included in this distribution in
  * the file called "COPYING".
  *
  * Contact Information:
  * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
  *
  ******************************************************************************/
 
@@ -41,21 +41,21 @@
 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26))
 #include <linux/semaphore.h>
 #include <linux/resource.h>
-#else
+#else 
 #include <asm/semaphore.h>
 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22))
 #include <asm/arch/resource.h>
-#endif
-#endif
+#endif 
+#endif 
 
-#endif
+#endif 
 
 #if defined (__cplusplus)
 extern "C" {
 #endif
 
-
-
+ 
+ 
 IMG_CHAR *SysCreateVersionString(IMG_CPU_PHYADDR sRegRegion);
 
 IMG_VOID DisableSystemClocks(SYS_DATA *psSysData);
@@ -77,13 +77,14 @@ PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData);
 #define	SYS_SPECIFIC_DATA_PM_UNINSTALL_LISR	0x00000200
 #define	SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS	0x00000400
 #define SYS_SPECIFIC_DATA_ENABLE_OCPREGS	0x00000800
+#define SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME	0x00001000
 
 #define	SYS_SPECIFIC_DATA_SET(psSysSpecData, flag) ((IMG_VOID)((psSysSpecData)->ui32SysSpecificData |= (flag)))
 
 #define	SYS_SPECIFIC_DATA_CLEAR(psSysSpecData, flag) ((IMG_VOID)((psSysSpecData)->ui32SysSpecificData &= ~(flag)))
 
 #define	SYS_SPECIFIC_DATA_TEST(psSysSpecData, flag) (((psSysSpecData)->ui32SysSpecificData & (flag)) != 0)
-
+ 
 typedef struct _SYS_SPECIFIC_DATA_TAG_
 {
 	IMG_UINT32	ui32SysSpecificData;
@@ -110,16 +111,11 @@ typedef struct _SYS_SPECIFIC_DATA_TAG_
 	struct clk	*psSGX_FCK;
 	struct clk	*psSGX_ICK;
 	struct clk	*psMPU_CK;
-#if !defined(NO_OMAP_TIMER)
 #if defined(DEBUG) || defined(TIMING)
 	struct clk	*psGPT11_FCK;
 	struct clk	*psGPT11_ICK;
 #endif
-#endif
-#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22))
-	struct constraint_handle *pVdd2Handle;
-#endif
-#endif
+#endif	
 } SYS_SPECIFIC_DATA;
 
 extern SYS_SPECIFIC_DATA *gpsSysSpecificData;
@@ -129,10 +125,35 @@ IMG_BOOL WrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData);
 IMG_VOID UnwrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData);
 #endif
 
-#if defined(__cplusplus)
+#if defined(__linux__)
+
+PVRSRV_ERROR SysPMRuntimeRegister(void);
+PVRSRV_ERROR SysPMRuntimeUnregister(void);
+
+#else 
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(SysPMRuntimeRegister)
+#endif
+static INLINE PVRSRV_ERROR SysPMRuntimeRegister(void)
+{
+	return PVRSRV_OK;
 }
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(SysPMRuntimeUnregister)
 #endif
+static INLINE PVRSRV_ERROR SysPMRuntimeUnregister(void)
+{
+	return PVRSRV_OK;
+}
+
+#endif 
 
+#if defined(__cplusplus)
+}
 #endif
 
+#endif	
+
 
diff --git a/drivers/gpu/pvr/omap4/sysutils.c b/drivers/gpu/pvr/omap4/sysutils.c
index d2c4231315c..3d3def0c720 100644
--- a/drivers/gpu/pvr/omap4/sysutils.c
+++ b/drivers/gpu/pvr/omap4/sysutils.c
@@ -1,33 +1,30 @@
 /**********************************************************************
  *
  * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
- *
+ * 
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
  * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
  * See the GNU General Public License for more details.
- *
+ * 
  * You should have received a copy of the GNU General Public License along with
  * this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
+ * 
  * The full GNU General Public License is included in this distribution in
  * the file called "COPYING".
  *
  * Contact Information:
  * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
  *
  ******************************************************************************/
 
 #if defined(__linux__)
-#if defined(PVR_LINUX_USING_WORKQUEUES)
-#include "sysutils_linux_wqueue_compat.c"
-#else
 #include "sysutils_linux.c"
 #endif
-#endif
+
diff --git a/drivers/gpu/pvr/omap4/sysutils_linux.c b/drivers/gpu/pvr/omap4/sysutils_linux.c
new file mode 100644
index 00000000000..40b2cc35ccc
--- /dev/null
+++ b/drivers/gpu/pvr/omap4/sysutils_linux.c
@@ -0,0 +1,537 @@
+/**********************************************************************
+ *
+ * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
+ * See the GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ * 
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Contact Information:
+ * Imagination Technologies Ltd. <gpl-support@imgtec.com>
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
+ *
+ ******************************************************************************/
+
+#include <linux/version.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/hardirq.h>
+#include <linux/mutex.h>
+
+#include "sgxdefs.h"
+#include "services_headers.h"
+#include "sysinfo.h"
+#include "sgxapi_km.h"
+#include "sysconfig.h"
+#include "sgxinfokm.h"
+#include "syslocal.h"
+
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+
+#if !defined(PVR_LINUX_USING_WORKQUEUES)
+#error "PVR_LINUX_USING_WORKQUEUES must be defined"
+#endif
+
+#if ((defined(DEBUG) || defined(TIMING)) && \
+    (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34))) && \
+    !defined(PVR_NO_OMAP_TIMER)
+#define	PVR_OMAP4_TIMING_PRCM
+#endif
+
+#define	ONE_MHZ	1000000
+#define	HZ_TO_MHZ(m) ((m) / ONE_MHZ)
+
+#if defined(SUPPORT_OMAP3430_SGXFCLK_96M)
+#define SGX_PARENT_CLOCK "cm_96m_fck"
+#else
+#define SGX_PARENT_CLOCK "core_ck"
+#endif
+
+#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM)
+extern struct platform_device *gpsPVRLDMDev;
+#endif
+
+static IMG_VOID PowerLockWrap(SYS_SPECIFIC_DATA *psSysSpecData)
+{
+	if (!in_interrupt())
+	{
+		mutex_lock(&psSysSpecData->sPowerLock);
+
+	}
+}
+
+static IMG_VOID PowerLockUnwrap(SYS_SPECIFIC_DATA *psSysSpecData)
+{
+	if (!in_interrupt())
+	{
+		mutex_unlock(&psSysSpecData->sPowerLock);
+	}
+}
+
+PVRSRV_ERROR SysPowerLockWrap(IMG_VOID)
+{
+	SYS_DATA	*psSysData;
+
+	SysAcquireData(&psSysData);
+
+	PowerLockWrap(psSysData->pvSysSpecificData);
+
+	return PVRSRV_OK;
+}
+
+IMG_VOID SysPowerLockUnwrap(IMG_VOID)
+{
+	SYS_DATA	*psSysData;
+
+	SysAcquireData(&psSysData);
+
+	PowerLockUnwrap(psSysData->pvSysSpecificData);
+}
+
+IMG_BOOL WrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData)
+{
+	return IMG_TRUE;
+}
+
+IMG_VOID UnwrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData)
+{
+}
+
+static inline IMG_UINT32 scale_by_rate(IMG_UINT32 val, IMG_UINT32 rate1, IMG_UINT32 rate2)
+{
+	if (rate1 >= rate2)
+	{
+		return val * (rate1 / rate2);
+	}
+
+	return val / (rate2 / rate1);
+}
+
+static inline IMG_UINT32 scale_prop_to_SGX_clock(IMG_UINT32 val, IMG_UINT32 rate)
+{
+	return scale_by_rate(val, rate, SYS_SGX_CLOCK_SPEED);
+}
+
+static inline IMG_UINT32 scale_inv_prop_to_SGX_clock(IMG_UINT32 val, IMG_UINT32 rate)
+{
+	return scale_by_rate(val, SYS_SGX_CLOCK_SPEED, rate);
+}
+
+IMG_VOID SysGetSGXTimingInformation(SGX_TIMING_INFORMATION *psTimingInfo)
+{
+	IMG_UINT32 rate;
+
+#if defined(NO_HARDWARE)
+	rate = SYS_SGX_CLOCK_SPEED;
+#else
+	PVR_ASSERT(atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0);
+
+#if defined(OMAP4_PRCM_ENABLE)
+	rate = clk_get_rate(gpsSysSpecificData->psSGX_FCK);
+#else
+	rate = SYS_SGX_CLOCK_SPEED;
+#endif
+	PVR_ASSERT(rate != 0);
+#endif
+	psTimingInfo->ui32CoreClockSpeed = rate;
+	psTimingInfo->ui32HWRecoveryFreq = scale_prop_to_SGX_clock(SYS_SGX_HWRECOVERY_TIMEOUT_FREQ, rate);
+	psTimingInfo->ui32uKernelFreq = scale_prop_to_SGX_clock(SYS_SGX_PDS_TIMER_FREQ, rate);
+#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
+	psTimingInfo->bEnableActivePM = IMG_TRUE;
+#else
+	psTimingInfo->bEnableActivePM = IMG_FALSE;
+#endif 
+	psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS;
+}
+
+PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
+{
+#if !defined(NO_HARDWARE)
+	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+#if defined(OMAP4_PRCM_ENABLE)
+	long lNewRate;
+	long lRate;
+	IMG_INT res;
+#endif
+
+	
+	if (atomic_read(&psSysSpecData->sSGXClocksEnabled) != 0)
+	{
+		return PVRSRV_OK;
+	}
+
+	PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
+
+#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM)
+	pm_runtime_get_sync(&gpsPVRLDMDev->dev);
+#endif
+
+#if defined(OMAP4_PRCM_ENABLE)
+
+#if defined(DEBUG)
+	{
+		IMG_UINT32 rate = clk_get_rate(psSysSpecData->psMPU_CK);
+		PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: CPU Clock is %dMhz", HZ_TO_MHZ(rate)));
+	}
+#endif
+
+	res = clk_enable(psSysSpecData->psSGX_FCK);
+	if (res < 0)
+	{
+		PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX functional clock (%d)", res));
+		return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
+	}
+
+	res = clk_enable(psSysSpecData->psSGX_ICK);
+	if (res < 0)
+	{
+		PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX interface clock (%d)", res));
+
+		clk_disable(psSysSpecData->psSGX_FCK);
+		return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
+	}
+
+	lNewRate = clk_round_rate(psSysSpecData->psSGX_FCK, SYS_SGX_CLOCK_SPEED + ONE_MHZ);
+	if (lNewRate <= 0)
+	{
+		PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't round SGX functional clock rate"));
+		return PVRSRV_ERROR_UNABLE_TO_ROUND_CLOCK_RATE;
+	}
+
+	
+	lRate = clk_get_rate(psSysSpecData->psSGX_FCK);
+	if (lRate != lNewRate)
+	{
+		res = clk_set_rate(psSysSpecData->psSGX_FCK, lNewRate);
+		if (res < 0)
+		{
+			PVR_DPF((PVR_DBG_WARNING, "EnableSGXClocks: Couldn't set SGX functional clock rate (%d)", res));
+		}
+	}
+
+#if defined(DEBUG)
+	{
+		IMG_UINT32 rate = clk_get_rate(psSysSpecData->psSGX_FCK);
+		PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: SGX Functional Clock is %dMhz", HZ_TO_MHZ(rate)));
+	}
+#endif
+
+#endif 
+
+	
+	atomic_set(&psSysSpecData->sSGXClocksEnabled, 1);
+
+#else	
+	PVR_UNREFERENCED_PARAMETER(psSysData);
+#endif	
+	return PVRSRV_OK;
+}
+
+
+IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
+{
+#if !defined(NO_HARDWARE)
+	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+
+	
+	if (atomic_read(&psSysSpecData->sSGXClocksEnabled) == 0)
+	{
+		return;
+	}
+
+	PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
+
+#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM)
+	pm_runtime_put_sync(&gpsPVRLDMDev->dev);
+#endif
+
+#if defined(OMAP4_PRCM_ENABLE)
+	if (psSysSpecData->psSGX_ICK)
+	{
+		clk_disable(psSysSpecData->psSGX_ICK);
+	}
+
+	if (psSysSpecData->psSGX_FCK)
+	{
+		clk_disable(psSysSpecData->psSGX_FCK);
+	}
+#endif 
+
+	
+	atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
+
+#else	
+	PVR_UNREFERENCED_PARAMETER(psSysData);
+#endif	
+}
+
+PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
+{
+	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+#if (defined(OMAP4_PRCM_ENABLE) || defined(PVR_OMAP4_TIMING_PRCM))
+	struct clk *psCLK;
+	IMG_INT res;
+#endif
+#if defined(PVR_OMAP4_TIMING_PRCM)
+	struct clk *sys_ck;
+	IMG_INT rate;
+#endif
+	PVRSRV_ERROR eError;
+
+#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
+	IMG_CPU_PHYADDR TimerRegPhysBase;
+	IMG_HANDLE hTimerEnable;
+	IMG_UINT32 *pui32TimerEnable;
+#endif	
+
+	PVR_TRACE(("EnableSystemClocks: Enabling System Clocks"));
+
+	if (!psSysSpecData->bSysClocksOneTimeInit)
+	{
+		mutex_init(&psSysSpecData->sPowerLock);
+
+		atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
+
+#if defined(OMAP4_PRCM_ENABLE)
+		psCLK = clk_get(NULL, SGX_PARENT_CLOCK);
+		if (IS_ERR(psCLK))
+		{
+			PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get Core Clock"));
+			goto ExitError;
+		}
+		psSysSpecData->psCORE_CK = psCLK;
+
+		psCLK = clk_get(NULL, "sgx_fck");
+		if (IS_ERR(psCLK))
+		{
+			PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get SGX Functional Clock"));
+			goto ExitError;
+		}
+		psSysSpecData->psSGX_FCK = psCLK;
+
+		psCLK = clk_get(NULL, "sgx_ick");
+		if (IS_ERR(psCLK))
+		{
+			PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get SGX Interface Clock"));
+			goto ExitError;
+		}
+		psSysSpecData->psSGX_ICK = psCLK;
+
+#if defined(DEBUG)
+		psCLK = clk_get(NULL, "mpu_ck");
+		if (IS_ERR(psCLK))
+		{
+			PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get MPU Clock"));
+			goto ExitError;
+		}
+		psSysSpecData->psMPU_CK = psCLK;
+#endif
+		res = clk_set_parent(psSysSpecData->psSGX_FCK, psSysSpecData->psCORE_CK);
+		if (res < 0)
+		{
+			PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't set SGX parent clock (%d)", res));
+			goto ExitError;
+		}
+#endif 
+
+		psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
+	}
+
+#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
+#if defined(PVR_OMAP4_TIMING_PRCM)
+	
+	psCLK = clk_get(NULL, "gpt11_fck");
+	if (IS_ERR(psCLK))
+	{
+		PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get GPTIMER11 functional clock"));
+		goto ExitUnRegisterConstraintNotifications;
+	}
+	psSysSpecData->psGPT11_FCK = psCLK;
+
+	psCLK = clk_get(NULL, "gpt11_ick");
+	if (IS_ERR(psCLK))
+	{
+		PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get GPTIMER11 interface clock"));
+		goto ExitUnRegisterConstraintNotifications;
+	}
+	psSysSpecData->psGPT11_ICK = psCLK;
+
+	sys_ck = clk_get(NULL, "sys_clkin_ck");
+	if (IS_ERR(sys_ck))
+	{
+		PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get System clock"));
+		goto ExitUnRegisterConstraintNotifications;
+	}
+
+	if(clk_get_parent(psSysSpecData->psGPT11_FCK) != sys_ck)
+	{
+		PVR_TRACE(("Setting GPTIMER11 parent to System Clock"));
+		res = clk_set_parent(psSysSpecData->psGPT11_FCK, sys_ck);
+		if (res < 0)
+		{
+			PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't set GPTIMER11 parent clock (%d)", res));
+		goto ExitUnRegisterConstraintNotifications;
+		}
+	}
+
+	rate = clk_get_rate(psSysSpecData->psGPT11_FCK);
+	PVR_TRACE(("GPTIMER11 clock is %dMHz", HZ_TO_MHZ(rate)));
+
+	res = clk_enable(psSysSpecData->psGPT11_FCK);
+	if (res < 0)
+	{
+		PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't enable GPTIMER11 functional clock (%d)", res));
+		goto ExitUnRegisterConstraintNotifications;
+	}
+
+	res = clk_enable(psSysSpecData->psGPT11_ICK);
+	if (res < 0)
+	{
+		PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't enable GPTIMER11 interface clock (%d)", res));
+		goto ExitDisableGPT11FCK;
+	}
+#endif	
+
+	
+	TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_TSICR_SYS_PHYS_BASE;
+	pui32TimerEnable = OSMapPhysToLin(TimerRegPhysBase,
+                  4,
+                  PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
+                  &hTimerEnable);
+
+	if (pui32TimerEnable == IMG_NULL)
+	{
+		PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: OSMapPhysToLin failed"));
+		goto ExitDisableGPT11ICK;
+	}
+
+	if(!(*pui32TimerEnable & 4))
+	{
+		PVR_TRACE(("Setting GPTIMER11 mode to posted (currently is non-posted)"));
+
+		
+		*pui32TimerEnable |= 4;
+	}
+
+	OSUnMapPhysToLin(pui32TimerEnable,
+		    4,
+		    PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
+		    hTimerEnable);
+
+	
+	TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE;
+	pui32TimerEnable = OSMapPhysToLin(TimerRegPhysBase,
+                  4,
+                  PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
+                  &hTimerEnable);
+
+	if (pui32TimerEnable == IMG_NULL)
+	{
+		PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: OSMapPhysToLin failed"));
+		goto ExitDisableGPT11ICK;
+	}
+
+	
+	*pui32TimerEnable = 3;
+
+	OSUnMapPhysToLin(pui32TimerEnable,
+		    4,
+		    PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
+		    hTimerEnable);
+
+#endif 
+
+	eError = PVRSRV_OK;
+	goto Exit;
+
+#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
+ExitDisableGPT11ICK:
+#if defined(PVR_OMAP4_TIMING_PRCM)
+	clk_disable(psSysSpecData->psGPT11_ICK);
+ExitDisableGPT11FCK:
+	clk_disable(psSysSpecData->psGPT11_FCK);
+ExitUnRegisterConstraintNotifications:
+#endif	
+#endif	
+#if defined(OMAP4_PRCM_ENABLE)
+ExitError:
+#endif
+	eError = PVRSRV_ERROR_DISABLE_CLOCK_FAILURE;
+Exit:
+	return eError;
+}
+
+IMG_VOID DisableSystemClocks(SYS_DATA *psSysData)
+{
+#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
+#if defined(PVR_OMAP4_TIMING_PRCM)
+	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+#endif
+	IMG_CPU_PHYADDR TimerRegPhysBase;
+	IMG_HANDLE hTimerDisable;
+	IMG_UINT32 *pui32TimerDisable;
+#endif	
+
+	PVR_TRACE(("DisableSystemClocks: Disabling System Clocks"));
+
+	
+	DisableSGXClocks(psSysData);
+
+#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
+	
+	TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE;
+	pui32TimerDisable = OSMapPhysToLin(TimerRegPhysBase,
+				4,
+				PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
+				&hTimerDisable);
+
+	if (pui32TimerDisable == IMG_NULL)
+	{
+		PVR_DPF((PVR_DBG_ERROR, "DisableSystemClocks: OSMapPhysToLin failed"));
+	}
+	else
+	{
+		*pui32TimerDisable = 0;
+
+		OSUnMapPhysToLin(pui32TimerDisable,
+				4,
+				PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
+				hTimerDisable);
+	}
+
+#if defined(PVR_OMAP4_TIMING_PRCM)
+	clk_disable(psSysSpecData->psGPT11_ICK);
+
+	clk_disable(psSysSpecData->psGPT11_FCK);
+#endif	
+#endif 
+}
+
+PVRSRV_ERROR SysPMRuntimeRegister(void)
+{
+#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM)
+	pm_runtime_enable(&gpsPVRLDMDev->dev);
+#endif
+	return PVRSRV_OK;
+}
+
+PVRSRV_ERROR SysPMRuntimeUnregister(void)
+{
+#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM)
+	pm_runtime_disable(&gpsPVRLDMDev->dev);
+#endif
+	return PVRSRV_OK;
+}
diff --git a/drivers/gpu/pvr/omap4/sysutils_linux_wqueue_compat.c b/drivers/gpu/pvr/omap4/sysutils_linux_wqueue_compat.c
deleted file mode 100644
index 5aa875d6895..00000000000
--- a/drivers/gpu/pvr/omap4/sysutils_linux_wqueue_compat.c
+++ /dev/null
@@ -1,198 +0,0 @@
-/**********************************************************************
- *
- * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
-
-#include <linux/version.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/hardirq.h>
-#include <linux/mutex.h>
-
-#include <plat/gpu.h>
-#include <plat/omap-pm.h>
-#include <linux/pm_runtime.h>
-#include  <plat/omap_device.h>
-#include "sgxdefs.h"
-#include "services_headers.h"
-#include "sysinfo.h"
-#include "sgxapi_km.h"
-#include "sysconfig.h"
-#include "sgxinfokm.h"
-#include "syslocal.h"
-
-#if !defined(PVR_LINUX_USING_WORKQUEUES)
-#error "PVR_LINUX_USING_WORKQUEUES must be defined"
-#endif
-
-#define	ONE_MHZ	1000000
-#define	HZ_TO_MHZ(m) ((m) / ONE_MHZ)
-
-#define LDM_DEV struct platform_device
-extern LDM_DEV  *gpsPVRLDMDev;
-extern struct gpu_platform_data *gpsSgxPlatformData;
-
-
-#if !defined(NO_HARDWARE)
-
-static struct pm_qos_request_list *qos_request;
-
-#endif
-
-PVRSRV_ERROR SysPowerLockWrap(SYS_DATA unref__ *psSysData)
-{
-	return PVRSRV_OK;
-}
-
-IMG_VOID SysPowerLockUnwrap(SYS_DATA unref__ *psSysData)
-{
-}
-
-IMG_BOOL WrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData)
-{
-	return IMG_TRUE;
-}
-
-IMG_VOID UnwrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData)
-{
-}
-
-static inline IMG_UINT32 scale_by_rate(IMG_UINT32 val, IMG_UINT32 rate1, IMG_UINT32 rate2)
-{
-	if (rate1 >= rate2)
-	{
-		return val * (rate1 / rate2);
-	}
-
-	return val / (rate2 / rate1);
-}
-
-static inline IMG_UINT32 scale_prop_to_SGX_clock(IMG_UINT32 val, IMG_UINT32 rate)
-{
-	return scale_by_rate(val, rate, SYS_SGX_CLOCK_SPEED);
-}
-
-static inline IMG_UINT32 scale_inv_prop_to_SGX_clock(IMG_UINT32 val, IMG_UINT32 rate)
-{
-	return scale_by_rate(val, SYS_SGX_CLOCK_SPEED, rate);
-}
-
-IMG_VOID SysGetSGXTimingInformation(SGX_TIMING_INFORMATION *psTimingInfo)
-{
-	IMG_UINT32 rate;
-
-#if defined(NO_HARDWARE)
-	rate = SYS_SGX_CLOCK_SPEED;
-#else
-	PVR_ASSERT(atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0);
-
-       rate = SYS_SGX_CLOCK_SPEED;
-	PVR_ASSERT(rate != 0);
-#endif
-	psTimingInfo->ui32CoreClockSpeed = rate;
-	psTimingInfo->ui32HWRecoveryFreq = scale_prop_to_SGX_clock(SYS_SGX_HWRECOVERY_TIMEOUT_FREQ, rate);
-	psTimingInfo->ui32uKernelFreq = scale_prop_to_SGX_clock(SYS_SGX_PDS_TIMER_FREQ, rate);
-#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
-	psTimingInfo->bEnableActivePM = IMG_TRUE;
-#else
-	psTimingInfo->bEnableActivePM = IMG_FALSE;
-#endif
-	psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS;
-}
-
-PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
-{
-#if !defined(NO_HARDWARE)
-	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
-
-	if (atomic_read(&psSysSpecData->sSGXClocksEnabled) != 0)
-	{
-		return PVRSRV_OK;
-	}
-	PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
-
-	pm_runtime_get_sync(&gpsPVRLDMDev->dev);
-	gpsSgxPlatformData->set_max_mpu_wakeup_lat(&qos_request, 0);
-	omap_device_set_rate(&gpsPVRLDMDev->dev,
-			&gpsPVRLDMDev->dev, SYS_SGX_CLOCK_SPEED);
-	atomic_set(&psSysSpecData->sSGXClocksEnabled, 1);
-
-#else	
-	PVR_UNREFERENCED_PARAMETER(psSysData);
-#endif	
-	return PVRSRV_OK;
-}
-
-
-IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
-{
-#if !defined(NO_HARDWARE)
-	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
-
-	
-	if (atomic_read(&psSysSpecData->sSGXClocksEnabled) == 0)
-	{
-		return;
-	}
-
-	PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
-
-	pm_runtime_put_sync(&gpsPVRLDMDev->dev);
-	gpsSgxPlatformData->set_max_mpu_wakeup_lat(&qos_request, -1);
-	omap_device_set_rate(&gpsPVRLDMDev->dev, &gpsPVRLDMDev->dev, 0);
-	atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
-
-#else
-	PVR_UNREFERENCED_PARAMETER(psSysData);
-#endif
-}
-
-PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
-{
-	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
-	PVRSRV_ERROR eError;
-
-	PVR_TRACE(("EnableSystemClocks: Enabling System Clocks"));
-
-	if (!psSysSpecData->bSysClocksOneTimeInit)
-	{
-		mutex_init(&psSysSpecData->sPowerLock);
-
-		atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
-		psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
-	}
-
-	eError = PVRSRV_OK;
-
-	return eError;
-}
-
-IMG_VOID DisableSystemClocks(SYS_DATA *psSysData)
-{
-
-	PVR_TRACE(("DisableSystemClocks: Disabling System Clocks"));
-
-	DisableSGXClocks(psSysData);
-
-}
diff --git a/drivers/gpu/pvr/osfunc.c b/drivers/gpu/pvr/osfunc.c
index ba3bf01bcf9..c72dd561410 100644
--- a/drivers/gpu/pvr/osfunc.c
+++ b/drivers/gpu/pvr/osfunc.c
@@ -83,9 +83,6 @@
 
 #define EVENT_OBJECT_TIMEOUT_MS		(100)
 
-#define HOST_ALLOC_MEM_USING_KMALLOC ((IMG_HANDLE)0)
-#define HOST_ALLOC_MEM_USING_VMALLOC ((IMG_HANDLE)1)
-
 #if !defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
 PVRSRV_ERROR OSAllocMem_Impl(IMG_UINT32 ui32Flags, IMG_UINT32 ui32Size, IMG_PVOID *ppvCpuVAddr, IMG_HANDLE *phBlockAlloc)
 #else
@@ -93,40 +90,26 @@ PVRSRV_ERROR OSAllocMem_Impl(IMG_UINT32 ui32Flags, IMG_UINT32 ui32Size, IMG_PVOI
 #endif
 {
     PVR_UNREFERENCED_PARAMETER(ui32Flags);
+    PVR_UNREFERENCED_PARAMETER(phBlockAlloc);
 
 #if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-    *ppvCpuVAddr = _KMallocWrapper(ui32Size, pszFilename, ui32Line);
+    *ppvCpuVAddr = _KMallocWrapper(ui32Size, GFP_KERNEL | __GFP_NOWARN, pszFilename, ui32Line);
 #else
-    *ppvCpuVAddr = KMallocWrapper(ui32Size);
+    *ppvCpuVAddr = KMallocWrapper(ui32Size, GFP_KERNEL | __GFP_NOWARN);
 #endif
-    if(*ppvCpuVAddr)
-    {
-    if (phBlockAlloc)
+
+    if(!*ppvCpuVAddr)
     {
         
-        *phBlockAlloc = HOST_ALLOC_MEM_USING_KMALLOC;
-    }
-    }
-    else
-    {
-    if (!phBlockAlloc)
-    {
-        return PVRSRV_ERROR_OUT_OF_MEMORY;
-    }
-
-    
 #if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-    *ppvCpuVAddr = _VMallocWrapper(ui32Size, PVRSRV_HAP_CACHED, pszFilename, ui32Line);
+        *ppvCpuVAddr = _VMallocWrapper(ui32Size, PVRSRV_HAP_CACHED, pszFilename, ui32Line);
 #else
-    *ppvCpuVAddr = VMallocWrapper(ui32Size, PVRSRV_HAP_CACHED);
+        *ppvCpuVAddr = VMallocWrapper(ui32Size, PVRSRV_HAP_CACHED);
 #endif
-    if (!*ppvCpuVAddr)
-    {
-         return PVRSRV_ERROR_OUT_OF_MEMORY;
-    }
-
-
-    *phBlockAlloc = HOST_ALLOC_MEM_USING_VMALLOC;
+        if (!*ppvCpuVAddr)
+        {
+             return PVRSRV_ERROR_OUT_OF_MEMORY;
+        }
     }
 
     return PVRSRV_OK;
@@ -138,22 +121,23 @@ PVRSRV_ERROR OSFreeMem_Impl(IMG_UINT32 ui32Flags, IMG_UINT32 ui32Size, IMG_PVOID
 #else
 PVRSRV_ERROR OSFreeMem_Impl(IMG_UINT32 ui32Flags, IMG_UINT32 ui32Size, IMG_PVOID pvCpuVAddr, IMG_HANDLE hBlockAlloc, IMG_CHAR *pszFilename, IMG_UINT32 ui32Line)
 #endif
-{
+{	
     PVR_UNREFERENCED_PARAMETER(ui32Flags);
     PVR_UNREFERENCED_PARAMETER(ui32Size);
+    PVR_UNREFERENCED_PARAMETER(hBlockAlloc);
 
-    if (hBlockAlloc == HOST_ALLOC_MEM_USING_VMALLOC)
+    if (is_vmalloc_addr(pvCpuVAddr))
     {
 #if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-    _VFreeWrapper(pvCpuVAddr, pszFilename, ui32Line);
+        _VFreeWrapper(pvCpuVAddr, pszFilename, ui32Line);
 #else
-    VFreeWrapper(pvCpuVAddr);
+        VFreeWrapper(pvCpuVAddr);
 #endif
     }
     else
     {
 #if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-    _KFreeWrapper(pvCpuVAddr, pszFilename, ui32Line);
+        _KFreeWrapper(pvCpuVAddr, pszFilename, ui32Line);
 #else
         KFreeWrapper(pvCpuVAddr);
 #endif
@@ -305,7 +289,7 @@ OSGetSubMemHandle(IMG_HANDLE hOSMemHandle,
 
     eError = PVRMMapRegisterArea(psLinuxMemArea);
     if(eError != PVRSRV_OK)
-     {
+    {
         goto failed_register_area;
     }
 
@@ -524,6 +508,25 @@ IMG_VOID OSSleepms(IMG_UINT32 ui32Timems)
 }
 
 
+ 
+IMG_HANDLE OSFuncHighResTimerCreate(IMG_VOID)
+{
+	
+	return (IMG_HANDLE) 1;
+}
+
+ 
+IMG_UINT32 OSFuncHighResTimerGetus(IMG_HANDLE hTimer)
+{
+	return (IMG_UINT32) jiffies_to_usecs(jiffies);
+}
+
+ 
+IMG_VOID OSFuncHighResTimerDestroy(IMG_HANDLE hTimer)
+{
+	PVR_UNREFERENCED_PARAMETER(hTimer);
+}
+
 IMG_UINT32 OSGetCurrentProcessIDKM(IMG_VOID)
 {
     if (in_interrupt())
@@ -1002,7 +1005,7 @@ PVRSRV_ERROR OSUnlockResource (PVRSRV_RESOURCE *psResource, IMG_UINT32 ui32ID)
         if(psResource->ui32ID == ui32ID)
         {
             psResource->ui32ID = 0;
-	    smp_mb();
+            smp_mb();
             *pui32Access = 0;
         }
         else
@@ -1032,6 +1035,18 @@ IMG_BOOL OSIsResourceLocked (PVRSRV_RESOURCE *psResource, IMG_UINT32 ui32ID)
 }
 
 
+#if !defined(SYS_CUSTOM_POWERLOCK_WRAP)
+PVRSRV_ERROR OSPowerLockWrap (IMG_VOID)
+{
+	return PVRSRV_OK;
+}
+
+IMG_VOID OSPowerLockUnwrap (IMG_VOID)
+{
+}
+#endif 
+
+
 IMG_CPU_PHYADDR OSMapLinToCPUPhys(IMG_HANDLE hOSMemHandle,
 								  IMG_VOID *pvLinAddr)
 {
@@ -1382,9 +1397,9 @@ PVRSRV_ERROR OSBaseAllocContigMemory(IMG_UINT32 ui32Size, IMG_CPU_VIRTADDR *pvLi
     IMG_VOID *pvKernLinAddr;
 
 #if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-    pvKernLinAddr = _KMallocWrapper(ui32Size, __FILE__, __LINE__);
+    pvKernLinAddr = _KMallocWrapper(ui32Size, GFP_KERNEL, __FILE__, __LINE__);
 #else
-    pvKernLinAddr = KMallocWrapper(ui32Size);
+    pvKernLinAddr = KMallocWrapper(ui32Size, GFP_KERNEL);
 #endif
     if (!pvKernLinAddr)
     {
@@ -1952,7 +1967,11 @@ PVRSRV_ERROR OSDisableTimer (IMG_HANDLE hTimer)
 }
 
 
-PVRSRV_ERROR OSEventObjectCreate(const IMG_CHAR *pszName, PVRSRV_EVENTOBJECT *psEventObject)
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR OSEventObjectCreateKM(const IMG_CHAR *pszName, PVRSRV_EVENTOBJECT_KM *psEventObject)
+#else
+PVRSRV_ERROR OSEventObjectCreateKM(const IMG_CHAR *pszName, PVRSRV_EVENTOBJECT *psEventObject)
+#endif
 {
 
     PVRSRV_ERROR eError = PVRSRV_OK;
@@ -1968,7 +1987,11 @@ PVRSRV_ERROR OSEventObjectCreate(const IMG_CHAR *pszName, PVRSRV_EVENTOBJECT *ps
         {
             	
             static IMG_UINT16 ui16NameIndex = 0;			
+#if defined (SUPPORT_SID_INTERFACE)
+            snprintf(psEventObject->szName, EVENTOBJNAME_MAXLENGTH, "PVRSRV_EVENTOBJECT_KM_%d", ui16NameIndex++);
+#else
             snprintf(psEventObject->szName, EVENTOBJNAME_MAXLENGTH, "PVRSRV_EVENTOBJECT_%d", ui16NameIndex++);
+#endif
         }
         
         if(LinuxEventObjectListCreate(&psEventObject->hOSEventKM) != PVRSRV_OK)
@@ -1979,7 +2002,7 @@ PVRSRV_ERROR OSEventObjectCreate(const IMG_CHAR *pszName, PVRSRV_EVENTOBJECT *ps
     }
     else
     {
-        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectCreate: psEventObject is not a valid pointer"));
+        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectCreateKM: psEventObject is not a valid pointer"));
         eError = PVRSRV_ERROR_UNABLE_TO_CREATE_EVENT;	
     }
     
@@ -1988,7 +2011,11 @@ PVRSRV_ERROR OSEventObjectCreate(const IMG_CHAR *pszName, PVRSRV_EVENTOBJECT *ps
 }
 
 
-PVRSRV_ERROR OSEventObjectDestroy(PVRSRV_EVENTOBJECT *psEventObject)
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR OSEventObjectDestroyKM(PVRSRV_EVENTOBJECT_KM *psEventObject)
+#else
+PVRSRV_ERROR OSEventObjectDestroyKM(PVRSRV_EVENTOBJECT *psEventObject)
+#endif
 {
     PVRSRV_ERROR eError = PVRSRV_OK;
 
@@ -2000,20 +2027,20 @@ PVRSRV_ERROR OSEventObjectDestroy(PVRSRV_EVENTOBJECT *psEventObject)
         }
         else
         {
-            PVR_DPF((PVR_DBG_ERROR, "OSEventObjectDestroy: hOSEventKM is not a valid pointer"));
+            PVR_DPF((PVR_DBG_ERROR, "OSEventObjectDestroyKM: hOSEventKM is not a valid pointer"));
             eError = PVRSRV_ERROR_INVALID_PARAMS;
         }
     }
     else
     {
-        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectDestroy: psEventObject is not a valid pointer"));
+        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectDestroyKM: psEventObject is not a valid pointer"));
         eError = PVRSRV_ERROR_INVALID_PARAMS;
     }
     
     return eError;
 }
 
-PVRSRV_ERROR OSEventObjectWait(IMG_HANDLE hOSEventKM)
+PVRSRV_ERROR OSEventObjectWaitKM(IMG_HANDLE hOSEventKM)
 {
     PVRSRV_ERROR eError;
     
@@ -2023,14 +2050,18 @@ PVRSRV_ERROR OSEventObjectWait(IMG_HANDLE hOSEventKM)
     }
     else
     {
-        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectWait: hOSEventKM is not a valid handle"));
+        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectWaitKM: hOSEventKM is not a valid handle"));
         eError = PVRSRV_ERROR_INVALID_PARAMS;
     }
     
     return eError;
 }
 
-PVRSRV_ERROR OSEventObjectOpen(PVRSRV_EVENTOBJECT *psEventObject,
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR OSEventObjectOpenKM(PVRSRV_EVENTOBJECT_KM *psEventObject,
+#else
+PVRSRV_ERROR OSEventObjectOpenKM(PVRSRV_EVENTOBJECT *psEventObject,
+#endif
                                             IMG_HANDLE *phOSEvent)
 {
     PVRSRV_ERROR eError = PVRSRV_OK;
@@ -2046,14 +2077,18 @@ PVRSRV_ERROR OSEventObjectOpen(PVRSRV_EVENTOBJECT *psEventObject,
     }
     else
     {
-        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectCreate: psEventObject is not a valid pointer"));
+        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectCreateKM: psEventObject is not a valid pointer"));
         eError = PVRSRV_ERROR_INVALID_PARAMS;
     }
     
     return eError;
 }
 
-PVRSRV_ERROR OSEventObjectClose(PVRSRV_EVENTOBJECT *psEventObject,
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR OSEventObjectCloseKM(PVRSRV_EVENTOBJECT_KM *psEventObject,
+#else
+PVRSRV_ERROR OSEventObjectCloseKM(PVRSRV_EVENTOBJECT *psEventObject,
+#endif
                                             IMG_HANDLE hOSEventKM)
 {
     PVRSRV_ERROR eError = PVRSRV_OK;
@@ -2069,7 +2104,7 @@ PVRSRV_ERROR OSEventObjectClose(PVRSRV_EVENTOBJECT *psEventObject,
     }
     else
     {
-        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectDestroy: psEventObject is not a valid pointer"));
+        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectDestroyKM: psEventObject is not a valid pointer"));
         eError = PVRSRV_ERROR_INVALID_PARAMS;
     }
     
@@ -2077,7 +2112,7 @@ PVRSRV_ERROR OSEventObjectClose(PVRSRV_EVENTOBJECT *psEventObject,
     
 }
 
-PVRSRV_ERROR OSEventObjectSignal(IMG_HANDLE hOSEventKM)
+PVRSRV_ERROR OSEventObjectSignalKM(IMG_HANDLE hOSEventKM)
 {
     PVRSRV_ERROR eError;
     
@@ -2087,7 +2122,7 @@ PVRSRV_ERROR OSEventObjectSignal(IMG_HANDLE hOSEventKM)
     }
     else
     {
-        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectSignal: hOSEventKM is not a valid handle"));
+        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectSignalKM: hOSEventKM is not a valid handle"));
         eError = PVRSRV_ERROR_INVALID_PARAMS;
     }
     
@@ -2684,7 +2719,7 @@ IMG_BOOL CheckExecuteCacheOp(IMG_HANDLE hOSMemHandle,
 		psLinuxMemArea = psLinuxMemArea->uData.sSubAlloc.psParentLinuxMemArea;
 	}
 
-
+	
 	PVR_ASSERT(psLinuxMemArea->eAreaType != LINUX_MEM_AREA_SUB_ALLOC);
 
 	switch(psLinuxMemArea->eAreaType)
@@ -2695,7 +2730,7 @@ IMG_BOOL CheckExecuteCacheOp(IMG_HANDLE hOSMemHandle,
 			{
 				pvMinVAddr = psLinuxMemArea->uData.sVmalloc.pvVmallocAddress + ui32AreaOffset;
 
-
+				
 				if(pvRangeAddrStart < pvMinVAddr)
 					goto err_blocked;
 
@@ -2703,8 +2738,8 @@ IMG_BOOL CheckExecuteCacheOp(IMG_HANDLE hOSMemHandle,
 			}
 			else
 			{
-
-
+				
+				
 
 				pvMinVAddr = FindMMapBaseVAddr(psMMapOffsetStructList,
 											   pvRangeAddrStart, ui32Length);
@@ -2714,21 +2749,21 @@ IMG_BOOL CheckExecuteCacheOp(IMG_HANDLE hOSMemHandle,
 				pfnInnerCacheOp(pvRangeAddrStart, pvRangeAddrStart + ui32Length);
 
 #if defined(CONFIG_OUTER_CACHE)
-
+				
 				pvRangeAddrStart = psLinuxMemArea->uData.sVmalloc.pvVmallocAddress +
 								   (ui32AreaOffset & PAGE_MASK) + (pvRangeAddrStart - pvMinVAddr);
 			}
 
 			pfnMemAreaToPhys = VMallocAreaToPhys;
-#else
+#else 
 			}
-#endif
+#endif 
 			break;
 		}
 
 		case LINUX_MEM_AREA_EXTERNAL_KV:
 		{
-
+			
 			if (psLinuxMemArea->uData.sExternalKV.bPhysContig == IMG_TRUE)
 			{
 				PVR_DPF((PVR_DBG_WARNING, "%s: Attempt to flush contiguous external memory", __func__));
@@ -2736,7 +2771,7 @@ IMG_BOOL CheckExecuteCacheOp(IMG_HANDLE hOSMemHandle,
 				goto err_blocked;
 			}
 
-
+			
 			if (psLinuxMemArea->uData.sExternalKV.pvExternalKV != IMG_NULL)
 			{
 				PVR_DPF((PVR_DBG_WARNING, "%s: Attempt to flush external memory with a kernel virtual address", __func__));
@@ -2865,7 +2900,7 @@ IMG_BOOL OSFlushCPUCacheRangeKM(IMG_HANDLE hOSMemHandle,
 								IMG_VOID *pvRangeAddrStart,
 								IMG_UINT32 ui32Length)
 {
-
+	
 	return CheckExecuteCacheOp(hOSMemHandle, pvRangeAddrStart, ui32Length,
 							   x86_flush_cache_range, IMG_NULL);
 }
@@ -2874,7 +2909,7 @@ IMG_BOOL OSCleanCPUCacheRangeKM(IMG_HANDLE hOSMemHandle,
 								IMG_VOID *pvRangeAddrStart,
 								IMG_UINT32 ui32Length)
 {
-
+	
 	return CheckExecuteCacheOp(hOSMemHandle, pvRangeAddrStart, ui32Length,
 							   x86_flush_cache_range, IMG_NULL);
 }
@@ -2883,12 +2918,12 @@ IMG_BOOL OSInvalidateCPUCacheRangeKM(IMG_HANDLE hOSMemHandle,
 									 IMG_VOID *pvRangeAddrStart,
 									 IMG_UINT32 ui32Length)
 {
-
+	
 	return CheckExecuteCacheOp(hOSMemHandle, pvRangeAddrStart, ui32Length,
 							   x86_flush_cache_range, IMG_NULL);
 }
 
-#else
+#else 
 
 #if defined(__arm__)
 
@@ -2900,7 +2935,7 @@ static void per_cpu_cache_flush(void *arg)
 
 IMG_VOID OSCleanCPUCacheKM(IMG_VOID)
 {
-
+	
 	ON_EACH_CPU(per_cpu_cache_flush, NULL, 1);
 #if defined(CONFIG_OUTER_CACHE) && !defined(PVR_NO_FULL_CACHE_OPS)
 	outer_clean_all();
@@ -2939,18 +2974,18 @@ IMG_BOOL OSInvalidateCPUCacheRangeKM(IMG_HANDLE hOSMemHandle,
 							   dmac_inv_range, outer_inv_range);
 }
 
-#else
+#else 
 
 #if defined(__mips__)
 IMG_VOID OSCleanCPUCacheKM(IMG_VOID)
 {
-
+	
 	dma_cache_wback(0, 0x100000);
 }
 
 IMG_VOID OSFlushCPUCacheKM(IMG_VOID)
 {
-
+	
 	dma_cache_wback_inv(0, 0x100000);
 }
 
@@ -2978,15 +3013,15 @@ IMG_BOOL OSInvalidateCPUCacheRangeKM(IMG_HANDLE hOSMemHandle,
 	return IMG_TRUE;
 }
 
-#else
+#else 
 
 #error "Implement CPU cache flush/clean/invalidate primitives for this CPU!"
 
-#endif
+#endif 
 
-#endif
+#endif 
 
-#endif
+#endif 
 
 PVRSRV_ERROR PVROSFuncInit(IMG_VOID)
 {
@@ -2995,7 +3030,7 @@ PVRSRV_ERROR PVROSFuncInit(IMG_VOID)
         psTimerWorkQueue = create_workqueue("pvr_timer");
         if (psTimerWorkQueue == NULL)
         {
-	    PVR_DPF((PVR_DBG_ERROR, "%s: couldn't create timer workqueue", __FUNCTION__));
+	    PVR_DPF((PVR_DBG_ERROR, "%s: couldn't create timer workqueue", __FUNCTION__));		
 	    return PVRSRV_ERROR_UNABLE_TO_CREATE_THREAD;
 
         }
diff --git a/drivers/gpu/pvr/osfunc.h b/drivers/gpu/pvr/osfunc.h
index dc209a04fac..6fdb795facd 100644
--- a/drivers/gpu/pvr/osfunc.h
+++ b/drivers/gpu/pvr/osfunc.h
@@ -406,15 +406,27 @@ IMG_CHAR* OSStringCopy(IMG_CHAR *pszDest, const IMG_CHAR *pszSrc);
 IMG_INT32 OSSNPrintf(IMG_CHAR *pStr, IMG_SIZE_T ui32Size, const IMG_CHAR *pszFormat, ...) IMG_FORMAT_PRINTF(3, 4);
 #define OSStringLength(pszString) strlen(pszString)
 
-PVRSRV_ERROR OSEventObjectCreate(const IMG_CHAR *pszName,
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR OSEventObjectCreateKM(const IMG_CHAR *pszName,
+								 PVRSRV_EVENTOBJECT_KM *psEventObject);
+PVRSRV_ERROR OSEventObjectDestroyKM(PVRSRV_EVENTOBJECT_KM *psEventObject);
+PVRSRV_ERROR OSEventObjectSignalKM(IMG_HANDLE hOSEventKM);
+PVRSRV_ERROR OSEventObjectWaitKM(IMG_HANDLE hOSEventKM);
+PVRSRV_ERROR OSEventObjectOpenKM(PVRSRV_EVENTOBJECT_KM *psEventObject,
+											IMG_HANDLE *phOSEvent);
+PVRSRV_ERROR OSEventObjectCloseKM(PVRSRV_EVENTOBJECT_KM *psEventObject,
+											IMG_HANDLE hOSEventKM);
+#else
+PVRSRV_ERROR OSEventObjectCreateKM(const IMG_CHAR *pszName,
 								 PVRSRV_EVENTOBJECT *psEventObject);
-PVRSRV_ERROR OSEventObjectDestroy(PVRSRV_EVENTOBJECT *psEventObject);
-PVRSRV_ERROR OSEventObjectSignal(IMG_HANDLE hOSEventKM);
-PVRSRV_ERROR OSEventObjectWait(IMG_HANDLE hOSEventKM);
-PVRSRV_ERROR OSEventObjectOpen(PVRSRV_EVENTOBJECT *psEventObject,
+PVRSRV_ERROR OSEventObjectDestroyKM(PVRSRV_EVENTOBJECT *psEventObject);
+PVRSRV_ERROR OSEventObjectSignalKM(IMG_HANDLE hOSEventKM);
+PVRSRV_ERROR OSEventObjectWaitKM(IMG_HANDLE hOSEventKM);
+PVRSRV_ERROR OSEventObjectOpenKM(PVRSRV_EVENTOBJECT *psEventObject,
 											IMG_HANDLE *phOSEvent);
-PVRSRV_ERROR OSEventObjectClose(PVRSRV_EVENTOBJECT *psEventObject,
+PVRSRV_ERROR OSEventObjectCloseKM(PVRSRV_EVENTOBJECT *psEventObject,
 											IMG_HANDLE hOSEventKM);
+#endif 
 
 
 PVRSRV_ERROR OSBaseAllocContigMemory(IMG_SIZE_T ui32Size, IMG_CPU_VIRTADDR *pLinAddr, IMG_CPU_PHYADDR *pPhysAddr);
@@ -445,14 +457,24 @@ PVRSRV_ERROR OSCreateResource(PVRSRV_RESOURCE *psResource);
 PVRSRV_ERROR OSDestroyResource(PVRSRV_RESOURCE *psResource);
 IMG_VOID OSBreakResourceLock(PVRSRV_RESOURCE *psResource, IMG_UINT32 ui32ID);
 
+#if defined(SYS_CUSTOM_POWERLOCK_WRAP)
+#define OSPowerLockWrap SysPowerLockWrap
+#define OSPowerLockUnwrap SysPowerLockUnwrap
+#else
+PVRSRV_ERROR OSPowerLockWrap(IMG_VOID);
 
+IMG_VOID OSPowerLockUnwrap(IMG_VOID);
+#endif 
 
+ 
 IMG_VOID OSWaitus(IMG_UINT32 ui32Timeus);
 
-
+ 
 IMG_VOID OSSleepms(IMG_UINT32 ui32Timems);
 
-
+IMG_HANDLE OSFuncHighResTimerCreate(IMG_VOID);
+IMG_UINT32 OSFuncHighResTimerGetus(IMG_HANDLE hTimer);
+IMG_VOID OSFuncHighResTimerDestroy(IMG_HANDLE hTimer);
 IMG_VOID OSReleaseThreadQuanta(IMG_VOID);
 IMG_UINT32 OSPCIReadDword(IMG_UINT32 ui32Bus, IMG_UINT32 ui32Dev, IMG_UINT32 ui32Func, IMG_UINT32 ui32Reg);
 IMG_VOID OSPCIWriteDword(IMG_UINT32 ui32Bus, IMG_UINT32 ui32Dev, IMG_UINT32 ui32Func, IMG_UINT32 ui32Reg, IMG_UINT32 ui32Value);
@@ -476,7 +498,7 @@ typedef enum _HOST_PCI_INIT_FLAGS_
 {
 	HOST_PCI_INIT_FLAG_BUS_MASTER	= 0x00000001,
 	HOST_PCI_INIT_FLAG_MSI		= 0x00000002,
-	HOST_PCI_INIT_FLAG_FORCE_I32	= 0x7fffffff
+	HOST_PCI_INIT_FLAG_FORCE_I32 	= 0x7fffffff
 } HOST_PCI_INIT_FLAGS;
 
 struct _PVRSRV_PCI_DEV_OPAQUE_STRUCT_;
diff --git a/drivers/gpu/pvr/pdump_common.c b/drivers/gpu/pvr/pdump_common.c
index c2c0dada01f..10f68171361 100644
--- a/drivers/gpu/pvr/pdump_common.c
+++ b/drivers/gpu/pvr/pdump_common.c
@@ -28,9 +28,6 @@
 #include <stdarg.h>
 
 #include "services_headers.h"
-#if defined(SUPPORT_SGX)
-#include "sgxdefs.h"
-#endif 
 #include "perproc.h"
 
 #include "pdump_km.h"
@@ -46,8 +43,6 @@
 #define PDUMP_DBG(a)
 #endif
 
-#define PDUMP_DATAMASTER_PIXEL		(1)
-#define PDUMP_DATAMASTER_EDM		(3)
 
 #define	PTR_PLUS(t, p, x) ((t)(((IMG_CHAR *)(p)) + (x)))
 #define	VPTR_PLUS(p, x) PTR_PLUS(IMG_VOID *, p, x)
@@ -68,6 +63,7 @@ static INLINE
 IMG_BOOL _PDumpIsPersistent(IMG_VOID)
 {
 	PVRSRV_PER_PROCESS_DATA* psPerProc = PVRSRVFindPerProcessData();
+
 	if(psPerProc == IMG_NULL)
 	{
 		
@@ -83,12 +79,12 @@ IMG_BOOL _PDumpIsProcessActive(IMG_VOID)
 	PVRSRV_PER_PROCESS_DATA* psPerProc = PVRSRVFindPerProcessData();
 	if(psPerProc == IMG_NULL)
 	{
-
+		
 		return IMG_TRUE;
 	}
 	return psPerProc->bPDumpActive;
 }
-#endif
+#endif 
 
 #if defined(PDUMP_DEBUG_OUTFILES)
 static INLINE
@@ -102,7 +98,7 @@ IMG_UINT32 _PDumpGetPID(IMG_VOID)
 	}
 	return psPerProc->ui32PID;
 }
-#endif
+#endif 
 
 static IMG_VOID *GetTempBuffer(IMG_VOID)
 {
@@ -192,7 +188,6 @@ PVRSRV_ERROR PDumpSetFrameKM(IMG_UINT32 ui32Frame)
 #endif
 }
 
-
 PVRSRV_ERROR PDumpRegWithFlagsKM(IMG_CHAR *pszPDumpRegName,
 								IMG_UINT32 ui32Reg,
 								IMG_UINT32 ui32Data,
@@ -224,7 +219,8 @@ PVRSRV_ERROR PDumpRegPolWithFlagsKM(IMG_CHAR *pszPDumpRegName,
 									IMG_UINT32 ui32RegAddr, 
 									IMG_UINT32 ui32RegValue, 
 									IMG_UINT32 ui32Mask,
-									IMG_UINT32 ui32Flags)
+									IMG_UINT32 ui32Flags,
+									PDUMP_POLL_OPERATOR	eOperator)
 {
 	
 	#define POLL_DELAY			1000U
@@ -260,7 +256,7 @@ PVRSRV_ERROR PDumpRegPolWithFlagsKM(IMG_CHAR *pszPDumpRegName,
 
 	eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "POL :%s:0x%08X 0x%08X 0x%08X %d %u %d\r\n",
 							pszPDumpRegName, ui32RegAddr, ui32RegValue,
-							ui32Mask, 0, ui32PollCount, POLL_DELAY);
+							ui32Mask, eOperator, ui32PollCount, POLL_DELAY);
 	if(eErr != PVRSRV_OK)
 	{
 		return eErr;
@@ -271,9 +267,9 @@ PVRSRV_ERROR PDumpRegPolWithFlagsKM(IMG_CHAR *pszPDumpRegName,
 }
 
 
-PVRSRV_ERROR PDumpRegPolKM(IMG_CHAR *pszPDumpRegName, IMG_UINT32 ui32RegAddr, IMG_UINT32 ui32RegValue, IMG_UINT32 ui32Mask)
+PVRSRV_ERROR PDumpRegPolKM(IMG_CHAR *pszPDumpRegName, IMG_UINT32 ui32RegAddr, IMG_UINT32 ui32RegValue, IMG_UINT32 ui32Mask, PDUMP_POLL_OPERATOR	eOperator)
 {
-	return PDumpRegPolWithFlagsKM(pszPDumpRegName, ui32RegAddr, ui32RegValue, ui32Mask, PDUMP_FLAGS_CONTINUOUS);
+	return PDumpRegPolWithFlagsKM(pszPDumpRegName, ui32RegAddr, ui32RegValue, ui32Mask, PDUMP_FLAGS_CONTINUOUS, eOperator);
 }
 
 PVRSRV_ERROR PDumpMallocPages (PVRSRV_DEVICE_IDENTIFIER	*psDevID,
@@ -295,7 +291,7 @@ PVRSRV_ERROR PDumpMallocPages (PVRSRV_DEVICE_IDENTIFIER	*psDevID,
 
 	PDUMP_GET_SCRIPT_STRING();
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
-
+	
 	ui32Flags |= ( _PDumpIsPersistent() || bShared ) ? PDUMP_FLAGS_PERSISTENT : 0;
 #else
 	PVR_UNREFERENCED_PARAMETER(bShared);
@@ -366,13 +362,14 @@ PVRSRV_ERROR PDumpMallocPages (PVRSRV_DEVICE_IDENTIFIER	*psDevID,
 	return PVRSRV_OK;
 }
 
+
 PVRSRV_ERROR PDumpMallocPageTable (PVRSRV_DEVICE_IDENTIFIER	*psDevId,
 								   IMG_HANDLE hOSMemHandle,
 								   IMG_UINT32 ui32Offset,
-                          		   IMG_CPU_VIRTADDR pvLinAddr,
+                              	   IMG_CPU_VIRTADDR pvLinAddr,
 								   IMG_UINT32 ui32PTSize,
 								   IMG_UINT32 ui32Flags,
-                                   IMG_HANDLE hUniqueTag)
+								   IMG_HANDLE hUniqueTag)
 {
 	PVRSRV_ERROR eErr;
 	IMG_DEV_PHYADDR	sDevPAddr;
@@ -382,7 +379,7 @@ PVRSRV_ERROR PDumpMallocPageTable (PVRSRV_DEVICE_IDENTIFIER	*psDevId,
 	PVR_ASSERT(((IMG_UINTPTR_T)pvLinAddr & (ui32PTSize - 1)) == 0);
 	ui32Flags |= PDUMP_FLAGS_CONTINUOUS;
 	ui32Flags |= ( _PDumpIsPersistent() ) ? PDUMP_FLAGS_PERSISTENT : 0;
-
+	
 	
 
 	eErr = PDumpOSBufprintf(hScript,
@@ -458,10 +455,10 @@ PVRSRV_ERROR PDumpFreePages	(BM_HEAP 			*psBMHeap,
 	}
 
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
-
+	
 	{
 		PVRSRV_DEVICE_NODE *psDeviceNode = psBMHeap->pBMContext->psDeviceNode;
-
+		
 		if( psDeviceNode->pfnMMUIsHeapShared(psBMHeap->pMMUHeap) )
 		{
 			ui32Flags |= PDUMP_FLAGS_PERSISTENT;
@@ -478,15 +475,16 @@ PVRSRV_ERROR PDumpFreePages	(BM_HEAP 			*psBMHeap,
 		if (!bInterleaved || (ui32PageCounter % 2) == 0)
 		{
 			sDevPAddr = psDeviceNode->pfnMMUGetPhysPageAddr(psBMHeap->pMMUHeap, sDevVAddr);
+
+			PVR_ASSERT(sDevPAddr.uiAddr != 0)
+
+			eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "FREE :%s:PA_%08X%08X\r\n",
+									psDeviceNode->sDevId.pszPDumpDevName, (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag, sDevPAddr.uiAddr);
+			if(eErr != PVRSRV_OK)
 			{
-				eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "FREE :%s:PA_%08X%08X\r\n",
-										psDeviceNode->sDevId.pszPDumpDevName, (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag, sDevPAddr.uiAddr);
-				if(eErr != PVRSRV_OK)
-				{
-					return eErr;
-				}
-				PDumpOSWriteString2(hScript, ui32Flags);
+				return eErr;
 			}
+			PDumpOSWriteString2(hScript, ui32Flags);
 		}
 		else
 		{
@@ -652,6 +650,12 @@ PVRSRV_ERROR PDumpMemPolKM(PVRSRV_KERNEL_MEM_INFO		*psMemInfo,
 	PDUMP_MMU_ATTRIB	*psMMUAttrib;
 
 	PDUMP_GET_SCRIPT_STRING();
+
+	if (PDumpOSIsSuspended())
+	{
+		return PVRSRV_OK;
+	}
+
 	if ( _PDumpIsPersistent() )
 	{
 		
@@ -659,7 +663,7 @@ PVRSRV_ERROR PDumpMemPolKM(PVRSRV_KERNEL_MEM_INFO		*psMemInfo,
 	}
 
 	
-	PVR_ASSERT((ui32Offset + sizeof(IMG_UINT32)) <= psMemInfo->ui32AllocSize);
+	PVR_ASSERT((ui32Offset + sizeof(IMG_UINT32)) <= psMemInfo->uAllocSize);
 
 	psMMUAttrib = ((BM_BUF*)psMemInfo->sMemBlk.hBuffer)->pMapping->pBMHeap->psMMUAttrib;
 
@@ -750,29 +754,29 @@ PVRSRV_ERROR PDumpMemKM(IMG_PVOID pvAltLinAddr,
 
 	PDUMP_GET_SCRIPT_AND_FILE_STRING();
 	
+	 
+	if (ui32Bytes == 0 || PDumpOSIsSuspended())
+	{
+		return PVRSRV_OK;
+	}
+
 	psMMUAttrib = ((BM_BUF*)psMemInfo->sMemBlk.hBuffer)->pMapping->pBMHeap->psMMUAttrib;
 	
 	
 
-	PVR_ASSERT((ui32Offset + ui32Bytes) <= psMemInfo->ui32AllocSize);
+	PVR_ASSERT((ui32Offset + ui32Bytes) <= psMemInfo->uAllocSize);
 
 	if (!PDumpOSJTInitialised())
 	{
 		return PVRSRV_ERROR_PDUMP_NOT_AVAILABLE;
 	}
 
-	 
-	if (ui32Bytes == 0 || PDumpOSIsSuspended())
-	{
-		return PVRSRV_OK;
-	}
-
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
-
+	
 	{
 		BM_HEAP *pHeap = ((BM_BUF*)psMemInfo->sMemBlk.hBuffer)->pMapping->pBMHeap;
 		PVRSRV_DEVICE_NODE *psDeviceNode = pHeap->pBMContext->psDeviceNode;
-
+		
 		if( psDeviceNode->pfnMMUIsHeapShared(pHeap->pMMUHeap) )
 		{
 			ui32Flags |= PDUMP_FLAGS_PERSISTENT;
@@ -936,7 +940,7 @@ PVRSRV_ERROR PDumpMemPDEntriesKM(PDUMP_MMU_ATTRIB *psMMUAttrib,
 	
 	
 	sMMUAttrib = *psMMUAttrib;
-	sMMUAttrib.ui32PTSize = HOST_PAGESIZE();
+	sMMUAttrib.ui32PTSize = (IMG_UINT32)HOST_PAGESIZE();
 	return PDumpMemPTEntriesKM(	&sMMUAttrib,
 								hOSMemHandle,
 								pvLinAddr,
@@ -970,6 +974,11 @@ PVRSRV_ERROR PDumpMemPTEntriesKM(PDUMP_MMU_ATTRIB *psMMUAttrib,
 	PDUMP_GET_SCRIPT_AND_FILE_STRING();
 	ui32Flags |= ( _PDumpIsPersistent() ) ? PDUMP_FLAGS_PERSISTENT : 0;
 
+	if (PDumpOSIsSuspended())
+	{
+		return PVRSRV_OK;
+	}
+
 	if (!PDumpOSJTInitialised())
 	{
 		return PVRSRV_ERROR_PDUMP_NOT_AVAILABLE;
@@ -980,11 +989,6 @@ PVRSRV_ERROR PDumpMemPTEntriesKM(PDUMP_MMU_ATTRIB *psMMUAttrib,
 		return PVRSRV_ERROR_INVALID_PARAMS;
 	}
 
-	if (PDumpOSIsSuspended())
-	{
-		return PVRSRV_OK;
-	}
-
 	PDumpOSCheckForSplitting(PDumpOSGetStream(PDUMP_STREAM_PARAM2), ui32Bytes, ui32Flags);
 
 	ui32ParamOutPos = PDumpOSGetStreamOffset(PDUMP_STREAM_PARAM2);
@@ -1079,7 +1083,7 @@ PVRSRV_ERROR PDumpMemPTEntriesKM(PDUMP_MMU_ATTRIB *psMMUAttrib,
 		{
 			for (ui32Offset = 0; ui32Offset < ui32BlockBytes; ui32Offset += sizeof(IMG_UINT32))
 			{
-				IMG_UINT32 ui32PTE = *((IMG_UINT32 *) (pui8LinAddr + ui32Offset));  
+				IMG_UINT32 ui32PTE = *((IMG_UINT32 *)(IMG_UINTPTR_T)(pui8LinAddr + ui32Offset));  
 
 				if ((ui32PTE & psMMUAttrib->ui32PDEMask) != 0)
 				{
@@ -1148,7 +1152,9 @@ PVRSRV_ERROR PDumpMemPTEntriesKM(PDUMP_MMU_ATTRIB *psMMUAttrib,
 				}
 				else
 				{
+#if !defined(FIX_HW_BRN_31620)
 					PVR_ASSERT((ui32PTE & psMMUAttrib->ui32PTEValid) == 0UL);
+#endif
 					eErr = PDumpOSBufprintf(hScript,
 							ui32MaxLenScript,
 							 "WRW :%s:PA_%08X%08X:0x%08X 0x%08X%08X\r\n",
@@ -1380,20 +1386,38 @@ PVRSRV_ERROR PDumpCommentKM(IMG_CHAR *pszComment, IMG_UINT32 ui32Flags)
 	ui32LenCommentPrefix = PDumpOSBuflen(pszCommentPrefix, sizeof(pszCommentPrefix));
 
 	
+	
 	if (!PDumpOSWriteString(PDumpOSGetStream(PDUMP_STREAM_SCRIPT2),
 			  (IMG_UINT8*)pszCommentPrefix,
 			  ui32LenCommentPrefix,
 			  ui32Flags))
 	{
+#if defined(PDUMP_DEBUG_OUTFILES)
 		if(ui32Flags & PDUMP_FLAGS_CONTINUOUS)
 		{
+			PVR_DPF((PVR_DBG_WARNING, "Incomplete comment, %d: %s (continuous set)",
+					 g_ui32EveryLineCounter, pszComment));
 			return PVRSRV_ERROR_PDUMP_BUFFER_FULL;
 		}
+		else if(ui32Flags & PDUMP_FLAGS_PERSISTENT)
+		{
+			PVR_DPF((PVR_DBG_WARNING, "Incomplete comment, %d: %s (persistent set)",
+					 g_ui32EveryLineCounter, pszComment));
+			return PVRSRV_ERROR_CMD_NOT_PROCESSED;
+		}
 		else
 		{
+			PVR_DPF((PVR_DBG_WARNING, "Incomplete comment, %d: %s",
+					 g_ui32EveryLineCounter, pszComment));
 			return PVRSRV_ERROR_CMD_NOT_PROCESSED;
 		}
+#else
+		PVR_DPF((PVR_DBG_WARNING, "Incomplete comment, %s",
+					 pszComment));
+		return PVRSRV_ERROR_CMD_NOT_PROCESSED;
+#endif
 	}
+
 #if defined(PDUMP_DEBUG_OUTFILES)
 	
 	eErr = PDumpOSSprintf(pszTemp, 256, "%d-%d %s",
@@ -1501,7 +1525,7 @@ PVRSRV_ERROR PDumpBitmapKM(	PVRSRV_DEVICE_NODE *psDeviceNode,
 							IMG_UINT32 ui32PDumpFlags)
 {
 	PVRSRV_DEVICE_IDENTIFIER *psDevId = &psDeviceNode->sDevId;
-	
+	IMG_UINT32 ui32MMUContextID;
 	PVRSRV_ERROR eErr;
 	PDUMP_GET_SCRIPT_STRING();
 
@@ -1513,34 +1537,15 @@ PVRSRV_ERROR PDumpBitmapKM(	PVRSRV_DEVICE_NODE *psDeviceNode,
 	PDumpCommentWithFlags(ui32PDumpFlags, "\r\n-- Dump bitmap of render\r\n");
 
 	
-	
-	
-	PVR_UNREFERENCED_PARAMETER(hDevMemContext);
-	
-#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
-	
+	ui32MMUContextID = psDeviceNode->pfnMMUGetContextID( hDevMemContext );
+
 	eErr = PDumpOSBufprintf(hScript,
 				ui32MaxLen,
 				"SII %s %s.bin :%s:v%x:0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\r\n",
 				pszFileName,
 				pszFileName,
 				psDevId->pszPDumpDevName,
-				PDUMP_DATAMASTER_PIXEL,
-				sDevBaseAddr.uiAddr,
-				ui32Size,
-				ui32FileOffset,
-				ePixelFormat,
-				ui32Width,
-				ui32Height,
-				ui32StrideInBytes,
-				eMemFormat);
-#else
-	eErr = PDumpOSBufprintf(hScript,
-				ui32MaxLen,
-				"SII %s %s.bin :%s:v:0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\r\n",
-				pszFileName,
-				pszFileName,
-				psDevId->pszPDumpDevName,
+				ui32MMUContextID,
 				sDevBaseAddr.uiAddr,
 				ui32Size,
 				ui32FileOffset,
@@ -1549,7 +1554,6 @@ PVRSRV_ERROR PDumpBitmapKM(	PVRSRV_DEVICE_NODE *psDeviceNode,
 				ui32Height,
 				ui32StrideInBytes,
 				eMemFormat);
-#endif
 	if(eErr != PVRSRV_OK)
 	{
 		return eErr;
@@ -1762,26 +1766,17 @@ PVRSRV_ERROR PDumpSaveMemKM (PVRSRV_DEVICE_IDENTIFIER *psDevId,
 							 IMG_UINT32			ui32FileOffset,
 							 IMG_DEV_VIRTADDR	sDevBaseAddr,
 							 IMG_UINT32 		ui32Size,
-							 IMG_UINT32 		ui32DataMaster,
+							 IMG_UINT32			ui32MMUContextID,
 							 IMG_UINT32 		ui32PDumpFlags)
 {
 	PVRSRV_ERROR eErr;
 	PDUMP_GET_SCRIPT_STRING();
 	
-#if !defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
-	PVR_UNREFERENCED_PARAMETER(ui32DataMaster);
-#endif 
-
 	eErr = PDumpOSBufprintf(hScript,
 							ui32MaxLen,
-#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
 							"SAB :%s:v%x:0x%08X 0x%08X 0x%08X %s.bin\r\n",
 							psDevId->pszPDumpDevName,
-							ui32DataMaster,
-#else
-							"SAB :%s:v:0x%08X 0x%08X 0x%08X %s.bin\r\n",
-							psDevId->pszPDumpDevName,
-#endif 
+							ui32MMUContextID,
 							sDevBaseAddr.uiAddr,
 							ui32Size,
 							ui32FileOffset,
@@ -1820,6 +1815,7 @@ PVRSRV_ERROR PDumpSignatureBuffer (PVRSRV_DEVICE_IDENTIFIER *psDevId,
 								   IMG_UINT32		ui32FileOffset,
 								   IMG_DEV_VIRTADDR	sDevBaseAddr,
 								   IMG_UINT32 		ui32Size,
+								   IMG_UINT32		ui32MMUContextID,
 								   IMG_UINT32 		ui32PDumpFlags)
 {
 	PDumpCommentWithFlags(ui32PDumpFlags, "\r\n-- Dump microkernel %s signature Buffer\r\n",
@@ -1831,7 +1827,7 @@ PVRSRV_ERROR PDumpSignatureBuffer (PVRSRV_DEVICE_IDENTIFIER *psDevId,
 	PDumpCommentWithFlags(ui32PDumpFlags, "\tSignature sample values (number of samples * number of signatures)\r\n");
 	PDumpCommentWithFlags(ui32PDumpFlags, "Note: If buffer is full, last sample is final state after test completed\r\n");
 	return PDumpSaveMemKM(psDevId, pszFileName, ui32FileOffset, sDevBaseAddr, ui32Size,
-						  PDUMP_DATAMASTER_EDM, ui32PDumpFlags);
+						  ui32MMUContextID, ui32PDumpFlags);
 }
 
 
@@ -1840,11 +1836,12 @@ PVRSRV_ERROR PDumpHWPerfCBKM (PVRSRV_DEVICE_IDENTIFIER *psDevId,
 							  IMG_UINT32		ui32FileOffset,
 							  IMG_DEV_VIRTADDR	sDevBaseAddr,
 							  IMG_UINT32 		ui32Size,
+							  IMG_UINT32		ui32MMUContextID,
 							  IMG_UINT32 		ui32PDumpFlags)
 {
 	PDumpCommentWithFlags(ui32PDumpFlags, "\r\n-- Dump Hardware Performance Circular Buffer\r\n");
 	return PDumpSaveMemKM(psDevId, pszFileName, ui32FileOffset, sDevBaseAddr, ui32Size,
-						  PDUMP_DATAMASTER_EDM, ui32PDumpFlags);
+						  ui32MMUContextID, ui32PDumpFlags);
 }
 
 
@@ -1870,7 +1867,7 @@ PVRSRV_ERROR PDumpCBP(PPVRSRV_KERNEL_MEM_INFO		psROffMemInfo,
 	psMMUAttrib = ((BM_BUF*)psROffMemInfo->sMemBlk.hBuffer)->pMapping->pBMHeap->psMMUAttrib;
 
 	
-	PVR_ASSERT((ui32ROffOffset + sizeof(IMG_UINT32)) <= psROffMemInfo->ui32AllocSize);
+	PVR_ASSERT((ui32ROffOffset + sizeof(IMG_UINT32)) <= psROffMemInfo->uAllocSize);
 
 	pui8LinAddr = psROffMemInfo->pvLinAddrKM;
 	sDevVAddr = psROffMemInfo->sDevVAddr;
@@ -2073,13 +2070,14 @@ PVRSRV_ERROR PDumpSetMMUContext(PVRSRV_DEVICE_TYPE eDeviceType,
 	IMG_CPU_PHYADDR sCpuPAddr;
 	IMG_DEV_PHYADDR sDevPAddr;
 	IMG_UINT32 ui32MMUContextID;
-	PVRSRV_ERROR eError;
+	PVRSRV_ERROR eErr;
+	PDUMP_GET_SCRIPT_STRING();
 
-	eError = _PdumpAllocMMUContext(&ui32MMUContextID);
-	if(eError != PVRSRV_OK)
+	eErr = _PdumpAllocMMUContext(&ui32MMUContextID);
+	if(eErr != PVRSRV_OK)
 	{
-		PVR_DPF((PVR_DBG_ERROR, "PDumpSetMMUContext: _PdumpAllocMMUContext failed: %d", eError));
-		return eError;
+		PVR_DPF((PVR_DBG_ERROR, "PDumpSetMMUContext: _PdumpAllocMMUContext failed: %d", eErr));
+		return eErr;
 	}
 
 	
@@ -2089,15 +2087,20 @@ PVRSRV_ERROR PDumpSetMMUContext(PVRSRV_DEVICE_TYPE eDeviceType,
 	
 	sDevPAddr.uiAddr &= ~((PVRSRV_4K_PAGE_SIZE) -1);
 
-	PDumpComment("Set MMU Context\r\n");
-	
-	PDumpComment("MMU :%s:v%d %d :%s:PA_%08X%08X\r\n",
+	eErr = PDumpOSBufprintf(hScript,
+						ui32MaxLen, 
+						"MMU :%s:v%d %d :%s:PA_%08X%08X\r\n",
 						pszMemSpace,
 						ui32MMUContextID,
 						ui32MMUType,
 						pszMemSpace,
 						(IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag1,
 						sDevPAddr.uiAddr);
+	if(eErr != PVRSRV_OK)
+	{
+		return eErr;
+	}
+	PDumpOSWriteString2(hScript, PDUMP_FLAGS_CONTINUOUS);
 
 	
 	*pui32MMUContextID = ui32MMUContextID;
@@ -2111,23 +2114,29 @@ PVRSRV_ERROR PDumpClearMMUContext(PVRSRV_DEVICE_TYPE eDeviceType,
 								IMG_UINT32 ui32MMUContextID,
 								IMG_UINT32 ui32MMUType)
 {
-	PVRSRV_ERROR eError;
-
+	PVRSRV_ERROR eErr;
+	PDUMP_GET_SCRIPT_STRING();
 	PVR_UNREFERENCED_PARAMETER(eDeviceType);
+	PVR_UNREFERENCED_PARAMETER(ui32MMUType);
 
 	
 	PDumpComment("Clear MMU Context for memory space %s\r\n", pszMemSpace);
-	
-	PDumpComment("MMU :%s:v%d %d\r\n",
+	eErr = PDumpOSBufprintf(hScript,
+						ui32MaxLen, 
+						"MMU :%s:v%d\r\n",
 						pszMemSpace,
-						ui32MMUContextID,
-						ui32MMUType);
+						ui32MMUContextID);
+	if(eErr != PVRSRV_OK)
+	{
+		return eErr;
+	}
+	PDumpOSWriteString2(hScript, PDUMP_FLAGS_CONTINUOUS);
 
-	eError = _PdumpFreeMMUContext(ui32MMUContextID);
-	if(eError != PVRSRV_OK)
+	eErr = _PdumpFreeMMUContext(ui32MMUContextID);
+	if(eErr != PVRSRV_OK)
 	{
-		PVR_DPF((PVR_DBG_ERROR, "PDumpClearMMUContext: _PdumpFreeMMUContext failed: %d", eError));
-		return eError;
+		PVR_DPF((PVR_DBG_ERROR, "PDumpClearMMUContext: _PdumpFreeMMUContext failed: %d", eErr));
+		return eErr;
 	}
 
 	return PVRSRV_OK;
@@ -2151,7 +2160,7 @@ PVRSRV_ERROR PDumpStoreMemToFile(PDUMP_MMU_ATTRIB *psMMUAttrib,
 	
 
 
-	ui32PageOffset = (IMG_UINT32)psMemInfo->pvLinAddrKM & psMMUAttrib->ui32DataPageMask;
+	ui32PageOffset = (IMG_UINT32)((IMG_UINTPTR_T)psMemInfo->pvLinAddrKM & psMMUAttrib->ui32DataPageMask);
 	
 	
 	sDevVPageAddr.uiAddr = uiAddr - ui32PageOffset;
@@ -2201,6 +2210,7 @@ PVRSRV_ERROR PDumpRegBasedCBP(IMG_CHAR		*pszPDumpRegName,
 }
 
 
+ 
 #include "syscommon.h"
 
 IMG_EXPORT IMG_VOID PDumpConnectionNotify(IMG_VOID)
@@ -2235,9 +2245,9 @@ IMG_UINT32 DbgWrite(PDBG_STREAM psStream, IMG_UINT8 *pui8Data, IMG_UINT32 ui32BC
 	{
 		return ui32BCount;
 	}
-
+	
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
-
+	
 	if ( (_PDumpIsProcessActive() == IMG_FALSE ) &&
 		 ((ui32Flags & PDUMP_FLAGS_PERSISTENT) == 0) )
 	{
@@ -2245,10 +2255,10 @@ IMG_UINT32 DbgWrite(PDBG_STREAM psStream, IMG_UINT8 *pui8Data, IMG_UINT32 ui32BC
 	}
 #endif
 
-
+	
 	if ( ((ui32Flags & PDUMP_FLAGS_PERSISTENT) != 0) && (psCtrl->bInitPhaseComplete) )
 	{
-		while (((IMG_UINT32) ui32BCount > 0) && (ui32BytesWritten != 0xFFFFFFFFU))
+		while (ui32BCount > 0)
 		{
 			
 
@@ -2272,14 +2282,14 @@ IMG_UINT32 DbgWrite(PDBG_STREAM psStream, IMG_UINT8 *pui8Data, IMG_UINT32 ui32BC
 				PVR_DPF((PVR_DBG_ERROR, "DbgWrite: Failed to send persistent data"));
 				if( (psCtrl->ui32Flags & DEBUG_FLAGS_READONLY) != 0)
 				{
-
+					
 					PDumpSuspendKM();
 				}
 				return 0xFFFFFFFFU;
 			}
 		}
-
-
+		
+		
 		ui32BCount = ui32Off; ui32Off = 0; ui32BytesWritten = 0;
 	}
 
diff --git a/drivers/gpu/pvr/pdump_km.h b/drivers/gpu/pvr/pdump_km.h
index 1be14d64de7..f51910daf1e 100644
--- a/drivers/gpu/pvr/pdump_km.h
+++ b/drivers/gpu/pvr/pdump_km.h
@@ -54,7 +54,7 @@ extern IMG_UINT32 g_ui32EveryLineCounter;
 
 #ifdef PDUMP
 
-#define MAKEUNIQUETAG(hMemInfo)	(((BM_BUF *)(((PVRSRV_KERNEL_MEM_INFO *)(hMemInfo))->sMemBlk.hBuffer))->pMapping)
+#define MAKEUNIQUETAG(hMemInfo)	((PDumpOSIsSuspended()) ? 0 : ((BM_BUF *)(((PVRSRV_KERNEL_MEM_INFO *)(hMemInfo))->sMemBlk.hBuffer))->pMapping)
 
 	IMG_IMPORT PVRSRV_ERROR PDumpMemPolKM(PVRSRV_KERNEL_MEM_INFO *psMemInfo,
 										  IMG_UINT32			ui32Offset,
@@ -79,7 +79,7 @@ extern IMG_UINT32 g_ui32EveryLineCounter;
 									   IMG_UINT32			ui32Bytes,
 									   IMG_UINT32			ui32Flags,
 									   IMG_HANDLE			hUniqueTag);
-	PVRSRV_ERROR PDumpMemPagesKM(PVRSRV_DEVICE_TYPE	eDeviceType,
+	PVRSRV_ERROR PDumpMemPagesKM(PVRSRV_DEVICE_IDENTIFIER *psDevID,
 								 IMG_DEV_PHYADDR		*pPages,
 								 IMG_UINT32			ui32NumPages,
 								 IMG_DEV_VIRTADDR	sDevAddr,
@@ -124,11 +124,13 @@ extern IMG_UINT32 g_ui32EveryLineCounter;
 										IMG_UINT32 ui32RegAddr,
 										IMG_UINT32 ui32RegValue,
 										IMG_UINT32 ui32Mask,
-										IMG_UINT32 ui32Flags);
+										IMG_UINT32 ui32Flags,
+										PDUMP_POLL_OPERATOR	eOperator);
 	PVRSRV_ERROR PDumpRegPolKM(IMG_CHAR *pszPDumpRegName,
 								IMG_UINT32 ui32RegAddr,
 								IMG_UINT32 ui32RegValue,
-								IMG_UINT32 ui32Mask);
+								IMG_UINT32 ui32Mask,
+								PDUMP_POLL_OPERATOR	eOperator);
 
 	IMG_IMPORT PVRSRV_ERROR PDumpBitmapKM(PVRSRV_DEVICE_NODE *psDeviceNode,
 										  IMG_CHAR *pszFileName,
@@ -171,7 +173,7 @@ extern IMG_UINT32 g_ui32EveryLineCounter;
 	IMG_BOOL PDumpIsLastCaptureFrameKM(IMG_VOID);
 	IMG_IMPORT IMG_BOOL PDumpIsCaptureFrameKM(IMG_VOID);
 
-	IMG_VOID PDumpMallocPagesPhys(PVRSRV_DEVICE_TYPE	eDeviceType,
+	IMG_VOID PDumpMallocPagesPhys(PVRSRV_DEVICE_IDENTIFIER	*psDevID,
 								  IMG_UINT32			ui32DevVAddr,
 								  IMG_PUINT32			pui32PhysPages,
 								  IMG_UINT32			ui32NumPages,
@@ -267,6 +269,7 @@ extern IMG_UINT32 g_ui32EveryLineCounter;
 										IMG_UINT32			ui32FileOffset,
 										IMG_DEV_VIRTADDR	sDevBaseAddr,
 										IMG_UINT32 			ui32Size,
+										IMG_UINT32			ui32MMUContextID,
 										IMG_UINT32 			ui32PDumpFlags);
 
 	PVRSRV_ERROR PDumpSignatureBuffer(PVRSRV_DEVICE_IDENTIFIER *psDevId,
@@ -275,6 +278,7 @@ extern IMG_UINT32 g_ui32EveryLineCounter;
 									  IMG_UINT32		ui32FileOffset,
 									  IMG_DEV_VIRTADDR	sDevBaseAddr,
 									  IMG_UINT32 		ui32Size,
+									  IMG_UINT32		ui32MMUContextID,
 									  IMG_UINT32 		ui32PDumpFlags);
 
 	PVRSRV_ERROR PDumpCBP(PPVRSRV_KERNEL_MEM_INFO	psROffMemInfo,
diff --git a/drivers/gpu/pvr/pdumpdefs.h b/drivers/gpu/pvr/pdumpdefs.h
index 83ccbb2c80c..0efe3031d75 100644
--- a/drivers/gpu/pvr/pdumpdefs.h
+++ b/drivers/gpu/pvr/pdumpdefs.h
@@ -68,6 +68,15 @@ typedef enum _PDUMP_PIXEL_FORMAT_
 	PVRSRV_PDUMP_PIXEL_FORMAT_F32 = 36,
 	PVRSRV_PDUMP_PIXEL_FORMAT_L16 = 37,
 	PVRSRV_PDUMP_PIXEL_FORMAT_L32 = 38,
+	PVRSRV_PDUMP_PIXEL_FORMAT_RGBA8888 = 39,
+	PVRSRV_PDUMP_PIXEL_FORMAT_ABGR4444 = 40,
+	PVRSRV_PDUMP_PIXEL_FORMAT_RGBA4444 = 41,
+	PVRSRV_PDUMP_PIXEL_FORMAT_BGRA4444 = 42,
+	PVRSRV_PDUMP_PIXEL_FORMAT_ABGR1555 = 43,
+	PVRSRV_PDUMP_PIXEL_FORMAT_RGBA5551 = 44,
+	PVRSRV_PDUMP_PIXEL_FORMAT_BGRA5551 = 45,
+	PVRSRV_PDUMP_PIXEL_FORMAT_BGR565 = 46,
+	PVRSRV_PDUMP_PIXEL_FORMAT_A8 = 47,
 	
 	PVRSRV_PDUMP_PIXEL_FORMAT_FORCE_I32 = 0x7fffffff
 
diff --git a/drivers/gpu/pvr/perproc.c b/drivers/gpu/pvr/perproc.c
index 52d9980b489..7eb46a14484 100644
--- a/drivers/gpu/pvr/perproc.c
+++ b/drivers/gpu/pvr/perproc.c
@@ -29,6 +29,9 @@
 #include "handle.h"
 #include "perproc.h"
 #include "osperproc.h"
+#if defined(TTRACE)
+#include "ttrace.h"
+#endif
 
 #define	HASH_TAB_INIT_SIZE 32
 
@@ -207,6 +210,9 @@ PVRSRV_ERROR PVRSRVPerProcessDataConnect(IMG_UINT32	ui32PID, IMG_UINT32 ui32Flag
 			PVR_DPF((PVR_DBG_ERROR, "PVRSRVPerProcessDataConnect: Couldn't register with the resource manager"));
 			goto failure;
 		}
+#if defined (TTRACE)
+		PVRSRVTimeTraceBufferCreate(ui32PID);
+#endif
 	}
 	
 	psPerProc->ui32RefCount++;
@@ -242,6 +248,10 @@ IMG_VOID PVRSRVPerProcessDataDisconnect(IMG_UINT32	ui32PID)
 			PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVPerProcessDataDisconnect: "
 					"Last close from process 0x%x received", ui32PID));
 
+#if defined (TTRACE)
+			PVRSRVTimeTraceBufferDestroy(ui32PID);
+#endif
+
 			
 			PVRSRVResManDisconnect(psPerProc->hResManContext, IMG_FALSE);
 			
diff --git a/drivers/gpu/pvr/perproc.h b/drivers/gpu/pvr/perproc.h
index 37359d50e05..e416b5a629e 100644
--- a/drivers/gpu/pvr/perproc.h
+++ b/drivers/gpu/pvr/perproc.h
@@ -41,12 +41,21 @@ typedef struct _PVRSRV_PER_PROCESS_DATA_
 	IMG_UINT32		ui32PID;
 	IMG_HANDLE		hBlockAlloc;
 	PRESMAN_CONTEXT 	hResManContext;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hPerProcData;
+#else
 	IMG_HANDLE		hPerProcData;
+#endif
 	PVRSRV_HANDLE_BASE 	*psHandleBase;
+#if defined (SUPPORT_SID_INTERFACE)
+	
+	IMG_BOOL		bHandlesBatched;
+#else
 #if defined (PVR_SECURE_HANDLES)
 	
 	IMG_BOOL		bHandlesBatched;
 #endif  
+#endif 
 	IMG_UINT32		ui32RefCount;
 
 	
@@ -55,9 +64,9 @@ typedef struct _PVRSRV_PER_PROCESS_DATA_
 	
 	IMG_BOOL		bPDumpPersistent;
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
-
+	
 	IMG_BOOL		bPDumpActive;
-#endif
+#endif 
 #endif
 	
 	IMG_HANDLE		hOsPrivateData;
diff --git a/drivers/gpu/pvr/power.c b/drivers/gpu/pvr/power.c
index ba0eced9ba1..ba203aba3c4 100644
--- a/drivers/gpu/pvr/power.c
+++ b/drivers/gpu/pvr/power.c
@@ -96,20 +96,14 @@ PVRSRV_ERROR PVRSRVPowerLock(IMG_UINT32	ui32CallerID,
 	SYS_DATA		*psSysData;
 	IMG_UINT32		ui32Timeout = 1000000;
 
-#if defined(SUPPORT_LMA)
-	
-	ui32Timeout *= 60;
-#endif 
-
 	SysAcquireData(&psSysData);
 
-#if defined(SYS_CUSTOM_POWERLOCK_WRAP)
-	eError = SysPowerLockWrap(psSysData);
+	eError = OSPowerLockWrap();
 	if (eError != PVRSRV_OK)
 	{
 		return eError;
 	}
-#endif
+
 	do
 	{
 		eError = OSLockResource(&psSysData->sPowerStateChangeResource,
@@ -130,12 +124,11 @@ PVRSRV_ERROR PVRSRVPowerLock(IMG_UINT32	ui32CallerID,
 		ui32Timeout--;
 	} while (ui32Timeout > 0);
 
-#if defined(SYS_CUSTOM_POWERLOCK_WRAP)
 	if (eError != PVRSRV_OK)
 	{
-		SysPowerLockUnwrap(psSysData);
+		OSPowerLockUnwrap();
 	}
-#endif
+
 	 
 	if ((eError == PVRSRV_OK) &&
 		!bSystemPowerEvent &&
@@ -154,9 +147,7 @@ IMG_EXPORT
 IMG_VOID PVRSRVPowerUnlock(IMG_UINT32	ui32CallerID)
 {
 	OSUnlockResource(&gpsSysData->sPowerStateChangeResource, ui32CallerID);
-#if defined(SYS_CUSTOM_POWERLOCK_WRAP)
-	SysPowerLockUnwrap(gpsSysData);
-#endif
+	OSPowerLockUnwrap();
 }
 
 
@@ -560,7 +551,7 @@ PVRSRV_ERROR PVRSRVRegisterPowerDevice(IMG_UINT32					ui32DeviceIndex,
 
 	SysAcquireData(&psSysData);
 
-	eError = OSAllocMem( PVRSRV_OS_PAGEABLE_HEAP,
+	eError = OSAllocMem( PVRSRV_OS_NON_PAGEABLE_HEAP,
 						 sizeof(PVRSRV_POWER_DEV),
 						 (IMG_VOID **)&psPowerDevice, IMG_NULL,
 						 "Power Device");
diff --git a/drivers/gpu/pvr/private_data.h b/drivers/gpu/pvr/private_data.h
index df9f6ade53a..0c55499220a 100644
--- a/drivers/gpu/pvr/private_data.h
+++ b/drivers/gpu/pvr/private_data.h
@@ -32,35 +32,23 @@
 #include <drm/drmP.h>
 #endif
 
-#if defined(SUPPORT_DRI_DRM) && defined(PVR_LINUX_USING_WORKQUEUES)
-#include <linux/workqueue.h>
-#endif
-
 typedef struct
 {
 	
 	IMG_UINT32 ui32OpenPID;
 
-#if defined(PVR_SECURE_FD_EXPORT)
 	
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID hKernelMemInfo;
+#else
 	IMG_HANDLE hKernelMemInfo;
-#endif 
-
-#if defined(SUPPORT_DRI_DRM)
-#if defined(PVR_SECURE_DRM_AUTH_EXPORT)
-	struct drm_file *psDRMFile;
+#endif
 
+#if defined(SUPPORT_DRI_DRM) && defined(PVR_SECURE_DRM_AUTH_EXPORT)
 	
 	struct list_head sDRMAuthListItem;
-#endif
 
-#if defined(PVR_LINUX_USING_WORKQUEUES)
-	struct work_struct sReleaseWork;
-#endif
-
-#if defined(SUPPORT_DRI_DRM_EXT)
-	IMG_PVOID pPriv;
-#endif
+	struct drm_file *psDRMFile;
 #endif
 
 #if defined(SUPPORT_MEMINFO_IDS)
@@ -70,6 +58,10 @@ typedef struct
 
 	
 	IMG_HANDLE hBlockAlloc;
+
+#if defined(SUPPORT_DRI_DRM_EXT)
+	IMG_PVOID pPriv;	
+#endif
 }
 PVRSRV_FILE_PRIVATE_DATA;
 
diff --git a/drivers/gpu/pvr/pvr_bridge.h b/drivers/gpu/pvr/pvr_bridge.h
index 82c3aa66ef2..93f1bb10a8b 100644
--- a/drivers/gpu/pvr/pvr_bridge.h
+++ b/drivers/gpu/pvr/pvr_bridge.h
@@ -68,7 +68,7 @@ extern "C" {
 #define PVRSRV_BRIDGE_GETFREE_DEVICEMEM			PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+8)	
 #define PVRSRV_BRIDGE_CREATE_COMMANDQUEUE		PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+9)	
 #define PVRSRV_BRIDGE_DESTROY_COMMANDQUEUE		PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+10)	
-#define	PVRSRV_BRIDGE_MHANDLE_TO_MMAP_DATA           PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+11)   
+#define	PVRSRV_BRIDGE_MHANDLE_TO_MMAP_DATA		PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+11)   
 #define PVRSRV_BRIDGE_CONNECT_SERVICES			PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+12)	
 #define PVRSRV_BRIDGE_DISCONNECT_SERVICES		PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+13)	
 #define PVRSRV_BRIDGE_WRAP_DEVICE_MEM			PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+14)	
@@ -85,7 +85,10 @@ extern "C" {
 #define PVRSRV_BRIDGE_UNMAP_MEM_INFO_FROM_USER	PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+25)
 #define PVRSRV_BRIDGE_EXPORT_DEVICEMEM			PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+26)
 #define PVRSRV_BRIDGE_RELEASE_MMAP_DATA			PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+27)
-#define PVRSRV_BRIDGE_CORE_CMD_LAST				(PVRSRV_BRIDGE_CORE_CMD_FIRST+27)
+#define PVRSRV_BRIDGE_CHG_DEV_MEM_ATTRIBS		PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+28)
+#define PVRSRV_BRIDGE_MAP_DEV_MEMORY_2			PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+29)
+#define PVRSRV_BRIDGE_EXPORT_DEVICEMEM_2		PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+30)
+#define PVRSRV_BRIDGE_CORE_CMD_LAST				(PVRSRV_BRIDGE_CORE_CMD_FIRST+30)
 
 #define PVRSRV_BRIDGE_SIM_CMD_FIRST				(PVRSRV_BRIDGE_CORE_CMD_LAST+1)
 #define PVRSRV_BRIDGE_PROCESS_SIMISR_EVENT		PVRSRV_IOWR(PVRSRV_BRIDGE_SIM_CMD_FIRST+0)	
@@ -168,7 +171,6 @@ extern "C" {
 #define PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_SYSTEM	PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+14)
 #define PVRSRV_BRIDGE_DISPCLASS_CMD_LAST		(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+14)
 
- 
 #define PVRSRV_BRIDGE_BUFCLASS_CMD_FIRST		(PVRSRV_BRIDGE_DISPCLASS_CMD_LAST+1)
 #define PVRSRV_BRIDGE_OPEN_BUFFERCLASS_DEVICE	PVRSRV_IOWR(PVRSRV_BRIDGE_BUFCLASS_CMD_FIRST+0)
 #define PVRSRV_BRIDGE_CLOSE_BUFFERCLASS_DEVICE	PVRSRV_IOWR(PVRSRV_BRIDGE_BUFCLASS_CMD_FIRST+1)
@@ -197,7 +199,7 @@ extern "C" {
 #define PVRSRV_BRIDGE_INITSRV_DISCONNECT		PVRSRV_IOWR(PVRSRV_BRIDGE_INITSRV_CMD_FIRST+1)
 #define PVRSRV_BRIDGE_INITSRV_CMD_LAST			(PVRSRV_BRIDGE_INITSRV_CMD_FIRST+1)
 
-#define PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST	(PVRSRV_BRIDGE_INITSRV_CMD_LAST+1)	
+#define PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST	(PVRSRV_BRIDGE_INITSRV_CMD_LAST+1)
 #define PVRSRV_BRIDGE_EVENT_OBJECT_WAIT			PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+0)
 #define PVRSRV_BRIDGE_EVENT_OBJECT_OPEN			PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+1)
 #define PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE		PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+2)
@@ -208,12 +210,14 @@ extern "C" {
 #define PVRSRV_BRIDGE_DESTROY_SYNC_INFO_MOD_OBJ	PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+1)
 #define PVRSRV_BRIDGE_MODIFY_PENDING_SYNC_OPS	PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+2)
 #define PVRSRV_BRIDGE_MODIFY_COMPLETE_SYNC_OPS	PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+3)
-#define PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_MOD_OBJ	PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+4)
-#define PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_DELTA	PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+5)
-#define PVRSRV_BRIDGE_ALLOC_SYNC_INFO           PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+6)
-#define PVRSRV_BRIDGE_FREE_SYNC_INFO            PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+7)
-#define PVRSRV_BRIDGE_SYNC_OPS_CMD_LAST			(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+7)
-	
+#define PVRSRV_BRIDGE_SYNC_OPS_TAKE_TOKEN       PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+4)
+#define PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_TOKEN   PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+5)
+#define PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_MOD_OBJ	PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+6)
+#define PVRSRV_BRIDGE_SYNC_OPS_FLUSH_TO_DELTA	PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+7)
+#define PVRSRV_BRIDGE_ALLOC_SYNC_INFO           PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+8)
+#define PVRSRV_BRIDGE_FREE_SYNC_INFO            PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+9)
+#define PVRSRV_BRIDGE_SYNC_OPS_CMD_LAST			(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+9)
+
 #define PVRSRV_BRIDGE_LAST_NON_DEVICE_CMD		(PVRSRV_BRIDGE_SYNC_OPS_CMD_LAST+1)
 
 
@@ -231,22 +235,22 @@ typedef struct PVRSRV_BRIDGE_PACKAGE_TAG
 {
 	IMG_UINT32				ui32BridgeID;			
 	IMG_UINT32				ui32Size;				
-	IMG_VOID				*pvParamIn;				 
+	IMG_VOID				*pvParamIn;				
 	IMG_UINT32				ui32InBufferSize;		
 	IMG_VOID				*pvParamOut;			
 	IMG_UINT32				ui32OutBufferSize;		
 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hKernelServices;		
+#else
 	IMG_HANDLE				hKernelServices;		
+#endif
 }PVRSRV_BRIDGE_PACKAGE;
 
 
- 
-
-
- 
 typedef struct PVRSRV_BRIDGE_IN_CONNECT_SERVICES_TAG
 {
-	IMG_UINT32		ui32BridgeFlags;
+	IMG_UINT32		ui32BridgeFlags; 
 	IMG_UINT32		ui32Flags;
 } PVRSRV_BRIDGE_IN_CONNECT_SERVICES;
 
@@ -268,56 +272,82 @@ typedef struct PVRSRV_BRIDGE_IN_ENUMCLASS_TAG
 
 typedef struct PVRSRV_BRIDGE_IN_CLOSE_DISPCLASS_DEVICE_TAG
 {
-	IMG_UINT32			ui32BridgeFlags; 
+	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDeviceKM;
+#else
 	IMG_HANDLE			hDeviceKM;
+#endif
 } PVRSRV_BRIDGE_IN_CLOSE_DISPCLASS_DEVICE;
 
 
 typedef struct PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_FORMATS_TAG
 {
-	IMG_UINT32			ui32BridgeFlags; 
+	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDeviceKM;
+#else
 	IMG_HANDLE			hDeviceKM;
+#endif
 } PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_FORMATS;
 
 
 typedef struct PVRSRV_BRIDGE_IN_GET_DISPCLASS_SYSBUFFER_TAG
 {
-	IMG_UINT32			ui32BridgeFlags; 
+	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDeviceKM;
+#else
 	IMG_HANDLE			hDeviceKM;
+#endif
 } PVRSRV_BRIDGE_IN_GET_DISPCLASS_SYSBUFFER;
 
 
 typedef struct PVRSRV_BRIDGE_IN_GET_DISPCLASS_INFO_TAG
 {
-	IMG_UINT32			ui32BridgeFlags; 
+	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDeviceKM;
+#else
 	IMG_HANDLE			hDeviceKM;
+#endif
 } PVRSRV_BRIDGE_IN_GET_DISPCLASS_INFO;
 
 
 typedef struct PVRSRV_BRIDGE_IN_CLOSE_BUFFERCLASS_DEVICE_TAG
 {
-	IMG_UINT32			ui32BridgeFlags; 
+	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDeviceKM;
+#else
 	IMG_HANDLE			hDeviceKM;
+#endif
 } PVRSRV_BRIDGE_IN_CLOSE_BUFFERCLASS_DEVICE;
 
 
 typedef struct PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_INFO_TAG
 {
-	IMG_UINT32			ui32BridgeFlags; 
+	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDeviceKM;
+#else
 	IMG_HANDLE			hDeviceKM;
+#endif
 } PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_INFO;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_RELEASE_DEVICEINFO_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+#else
 	IMG_HANDLE			hDevCookie;
+#endif
 
 } PVRSRV_BRIDGE_IN_RELEASE_DEVICEINFO;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_FREE_CLASSDEVICEINFO_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
@@ -327,85 +357,117 @@ typedef struct PVRSRV_BRIDGE_IN_FREE_CLASSDEVICEINFO_TAG
 }PVRSRV_BRIDGE_IN_FREE_CLASSDEVICEINFO;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_GET_DEVMEM_HEAPINFO_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+	IMG_SID	 			hDevMemContext;
+#else
 	IMG_HANDLE			hDevCookie;
 	IMG_HANDLE 			hDevMemContext;
+#endif
 
 }PVRSRV_BRIDGE_IN_GET_DEVMEM_HEAPINFO;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_CREATE_DEVMEMCONTEXT_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+#else
 	IMG_HANDLE			hDevCookie;
+#endif
 
 }PVRSRV_BRIDGE_IN_CREATE_DEVMEMCONTEXT;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_DESTROY_DEVMEMCONTEXT_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID 			hDevCookie;
+	IMG_SID 			hDevMemContext;
+#else
 	IMG_HANDLE 			hDevCookie;
 	IMG_HANDLE 			hDevMemContext;
+#endif
 
 }PVRSRV_BRIDGE_IN_DESTROY_DEVMEMCONTEXT;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+	IMG_SID				hDevMemHeap;
+#else
 	IMG_HANDLE			hDevCookie;
 	IMG_HANDLE			hDevMemHeap;
+#endif
 	IMG_UINT32			ui32Attribs;
 	IMG_SIZE_T			ui32Size;
 	IMG_SIZE_T			ui32Alignment;
 
 }PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_MAPMEMINFOTOUSER_TAG
 {
-	IMG_UINT32				ui32BridgeFlags; 
+	IMG_UINT32  ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID     hKernelMemInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
+#endif
 
 }PVRSRV_BRIDGE_IN_MAPMEMINFOTOUSER;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_UNMAPMEMINFOFROMUSER_TAG
 {
-	IMG_UINT32				ui32BridgeFlags; 
+	IMG_UINT32      ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID         hKernelMemInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
+#endif
 	IMG_PVOID				 pvLinAddr;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID         hMappingInfo;
+#else
 	IMG_HANDLE				 hMappingInfo;
+#endif
 
 }PVRSRV_BRIDGE_IN_UNMAPMEMINFOFROMUSER;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_FREEDEVICEMEM_TAG
 {
-	IMG_UINT32				ui32BridgeFlags; 
+	IMG_UINT32              ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID                 hDevCookie;
+	IMG_SID                 hKernelMemInfo;
+#else
 	IMG_HANDLE				hDevCookie;
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
-	PVRSRV_CLIENT_MEM_INFO	sClientMemInfo;
+#endif
+	PVRSRV_CLIENT_MEM_INFO  sClientMemInfo;
 
 }PVRSRV_BRIDGE_IN_FREEDEVICEMEM;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_EXPORTDEVICEMEM_TAG
 {
-	IMG_UINT32				ui32BridgeFlags; 
+	IMG_UINT32      ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID         hDevCookie;
+	IMG_SID         hKernelMemInfo;
+#else
 	IMG_HANDLE				hDevCookie;
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
+#endif
 
 }PVRSRV_BRIDGE_IN_EXPORTDEVICEMEM;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_GETFREEDEVICEMEM_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
@@ -413,126 +475,163 @@ typedef struct PVRSRV_BRIDGE_IN_GETFREEDEVICEMEM_TAG
 
 } PVRSRV_BRIDGE_IN_GETFREEDEVICEMEM;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_CREATECOMMANDQUEUE_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+#else
 	IMG_HANDLE			hDevCookie;
+#endif
 	IMG_SIZE_T			ui32QueueSize;
 
 }PVRSRV_BRIDGE_IN_CREATECOMMANDQUEUE;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_DESTROYCOMMANDQUEUE_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+#else
 	IMG_HANDLE			hDevCookie;
+#endif
 	PVRSRV_QUEUE_INFO	*psQueueInfo;
 
 }PVRSRV_BRIDGE_IN_DESTROYCOMMANDQUEUE;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_MHANDLE_TO_MMAP_DATA_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hMHandle;	 
+#else
 	IMG_HANDLE			hMHandle;	 
+#endif
 } PVRSRV_BRIDGE_IN_MHANDLE_TO_MMAP_DATA;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_RELEASE_MMAP_DATA_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hMHandle;	 
+#else
 	IMG_HANDLE			hMHandle;	 
+#endif
 } PVRSRV_BRIDGE_IN_RELEASE_MMAP_DATA;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_RESERVE_DEV_VIRTMEM_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevMemHeap;
+#else
 	IMG_HANDLE			hDevMemHeap;
+#endif
 	IMG_DEV_VIRTADDR	*psDevVAddr;
 	IMG_SIZE_T			ui32Size;
 	IMG_SIZE_T			ui32Alignment;
 
 }PVRSRV_BRIDGE_IN_RESERVE_DEV_VIRTMEM;
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_CONNECT_SERVICES_TAG
 {
-	PVRSRV_ERROR 			eError;
+	PVRSRV_ERROR    eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID         hKernelServices;
+#else
 	IMG_HANDLE		hKernelServices;
+#endif
 }PVRSRV_BRIDGE_OUT_CONNECT_SERVICES;
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_RESERVE_DEV_VIRTMEM_TAG
 {
-	PVRSRV_ERROR 			eError;
+	PVRSRV_ERROR            eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID                 hKernelMemInfo;
+	IMG_SID                 hKernelSyncInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
 	PVRSRV_KERNEL_SYNC_INFO	*psKernelSyncInfo;
-	PVRSRV_CLIENT_MEM_INFO	sClientMemInfo;
-	PVRSRV_CLIENT_SYNC_INFO	sClientSyncInfo;
+#endif
+	PVRSRV_CLIENT_MEM_INFO  sClientMemInfo;
+	PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
 
 }PVRSRV_BRIDGE_OUT_RESERVE_DEV_VIRTMEM;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_FREE_DEV_VIRTMEM_TAG
 {
-	IMG_UINT32				ui32BridgeFlags; 
+	IMG_UINT32              ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID                 hKernelMemInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
-	PVRSRV_CLIENT_MEM_INFO	sClientMemInfo;
-	PVRSRV_CLIENT_SYNC_INFO	sClientSyncInfo;
+#endif
+	PVRSRV_CLIENT_MEM_INFO  sClientMemInfo;
+	PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
 
 }PVRSRV_BRIDGE_IN_FREE_DEV_VIRTMEM;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_MAP_DEV_MEMORY_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hKernelMemInfo;
+	IMG_SID					hDstDevMemHeap;
+#else
 	IMG_HANDLE				hKernelMemInfo;
 	IMG_HANDLE				hDstDevMemHeap;
+#endif
 
 }PVRSRV_BRIDGE_IN_MAP_DEV_MEMORY;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_MAP_DEV_MEMORY_TAG
 {
-	PVRSRV_ERROR			eError;
+	PVRSRV_ERROR            eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID                 hDstKernelMemInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psDstKernelMemInfo;
-	PVRSRV_CLIENT_MEM_INFO	sDstClientMemInfo;
-	PVRSRV_CLIENT_SYNC_INFO	sDstClientSyncInfo;
+#endif
+	PVRSRV_CLIENT_MEM_INFO  sDstClientMemInfo;
+	PVRSRV_CLIENT_SYNC_INFO sDstClientSyncInfo;
 
 }PVRSRV_BRIDGE_OUT_MAP_DEV_MEMORY;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_UNMAP_DEV_MEMORY_TAG
 {
-	IMG_UINT32					ui32BridgeFlags; 
+	IMG_UINT32              ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID                 hKernelMemInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO		*psKernelMemInfo;
-	PVRSRV_CLIENT_MEM_INFO		sClientMemInfo;
-	PVRSRV_CLIENT_SYNC_INFO		sClientSyncInfo;	
+#endif
+	PVRSRV_CLIENT_MEM_INFO  sClientMemInfo;
+	PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
 
 }PVRSRV_BRIDGE_IN_UNMAP_DEV_MEMORY;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_MAP_EXT_MEMORY_TAG
 {
-	IMG_UINT32				ui32BridgeFlags; 
+	IMG_UINT32       ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID          hKernelMemInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
-	IMG_SYS_PHYADDR			*psSysPAddr;
-	IMG_UINT32				ui32Flags;
+#endif
+	IMG_SYS_PHYADDR *psSysPAddr;
+	IMG_UINT32       ui32Flags;
 
 }PVRSRV_BRIDGE_IN_MAP_EXT_MEMORY;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_UNMAP_EXT_MEMORY_TAG
 {
 	IMG_UINT32					ui32BridgeFlags; 
@@ -542,44 +641,58 @@ typedef struct PVRSRV_BRIDGE_IN_UNMAP_EXT_MEMORY_TAG
 
 }PVRSRV_BRIDGE_IN_UNMAP_EXT_MEMORY;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_MAP_DEVICECLASS_MEMORY_TAG
 {
-	IMG_UINT32					ui32BridgeFlags; 
+	IMG_UINT32		ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hDeviceClassBuffer;
+	IMG_SID			hDevMemContext;
+#else
 	IMG_HANDLE		hDeviceClassBuffer;
 	IMG_HANDLE		hDevMemContext;
+#endif
 
 }PVRSRV_BRIDGE_IN_MAP_DEVICECLASS_MEMORY;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_MAP_DEVICECLASS_MEMORY_TAG
 {
-	PVRSRV_ERROR			eError;
-	PVRSRV_CLIENT_MEM_INFO	sClientMemInfo;
+	PVRSRV_ERROR            eError;
+	PVRSRV_CLIENT_MEM_INFO  sClientMemInfo;
 	PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID                 hKernelMemInfo;
+	IMG_SID                 hMappingInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
 	IMG_HANDLE				hMappingInfo;
+#endif
 
 }PVRSRV_BRIDGE_OUT_MAP_DEVICECLASS_MEMORY;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_UNMAP_DEVICECLASS_MEMORY_TAG
 {
-	IMG_UINT32				ui32BridgeFlags; 
+	IMG_UINT32              ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID                 hKernelMemInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
-	PVRSRV_CLIENT_MEM_INFO	sClientMemInfo;
-	PVRSRV_CLIENT_SYNC_INFO	sClientSyncInfo;
+#endif
+	PVRSRV_CLIENT_MEM_INFO  sClientMemInfo;
+	PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
 
 }PVRSRV_BRIDGE_IN_UNMAP_DEVICECLASS_MEMORY;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_MEMPOL_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelMemInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
+#endif
 	IMG_UINT32 ui32Offset;
 	IMG_UINT32 ui32Value;
 	IMG_UINT32 ui32Mask;
@@ -588,25 +701,32 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_MEMPOL_TAG
 
 }PVRSRV_BRIDGE_IN_PDUMP_MEMPOL;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_SYNCPOL_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfo;
+#else
 	PVRSRV_KERNEL_SYNC_INFO	*psKernelSyncInfo;
-	IMG_BOOL bIsRead;
+#endif
+	IMG_BOOL   bIsRead;
+	IMG_BOOL   bUseLastOpDumpVal;
 	IMG_UINT32 ui32Value;
 	IMG_UINT32 ui32Mask;
 
 }PVRSRV_BRIDGE_IN_PDUMP_SYNCPOL;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_DUMPMEM_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
-	IMG_PVOID pvLinAddr;
-	IMG_PVOID pvAltLinAddr;
+	IMG_PVOID  pvLinAddr;
+	IMG_PVOID  pvAltLinAddr;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelMemInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
+#endif
 	IMG_UINT32 ui32Offset;
 	IMG_UINT32 ui32Bytes;
 	IMG_UINT32 ui32Flags;
@@ -614,41 +734,49 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_DUMPMEM_TAG
 }PVRSRV_BRIDGE_IN_PDUMP_DUMPMEM;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_DUMPSYNC_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
-	IMG_PVOID pvAltLinAddr;
+	IMG_PVOID  pvAltLinAddr;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfo;
+#else
 	PVRSRV_KERNEL_SYNC_INFO	*psKernelSyncInfo;
+#endif
 	IMG_UINT32 ui32Offset;
 	IMG_UINT32 ui32Bytes;
 
 }PVRSRV_BRIDGE_IN_PDUMP_DUMPSYNC;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_DUMPREG_TAG
 {
 	IMG_UINT32		ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hDevCookie;
+#else
 	IMG_HANDLE		hDevCookie;
+#endif
 	PVRSRV_HWREG	sHWReg;
 	IMG_UINT32		ui32Flags;
 	IMG_CHAR		szRegRegion[32];
 
 }PVRSRV_BRIDGE_IN_PDUMP_DUMPREG;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_REGPOL_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
+#endif
 	PVRSRV_HWREG sHWReg;
 	IMG_UINT32 ui32Mask;
 	IMG_UINT32 ui32Flags;
-	IMG_CHAR		szRegRegion[32];
+	IMG_CHAR   szRegRegion[32];
 }PVRSRV_BRIDGE_IN_PDUMP_REGPOL;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_DUMPPDREG_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
@@ -657,21 +785,25 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_DUMPPDREG_TAG
 
 }PVRSRV_BRIDGE_IN_PDUMP_DUMPPDREG;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_MEMPAGES_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+	IMG_SID				hKernelMemInfo;
+#else
+	IMG_HANDLE			hDevCookie;
 	IMG_HANDLE			hKernelMemInfo;
+#endif
 	IMG_DEV_PHYADDR		*pPages;
 	IMG_UINT32			ui32NumPages;
-	IMG_DEV_VIRTADDR	sDevAddr;
+	IMG_DEV_VIRTADDR	sDevVAddr;
 	IMG_UINT32			ui32Start;
 	IMG_UINT32			ui32Length;
-	IMG_BOOL			bContinuous;
+	IMG_UINT32			ui32Flags;
 
 }PVRSRV_BRIDGE_IN_PDUMP_MEMPAGES;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_COMMENT_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
@@ -681,7 +813,6 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_COMMENT_TAG
 }PVRSRV_BRIDGE_IN_PDUMP_COMMENT;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_SETFRAME_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
@@ -690,19 +821,25 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_SETFRAME_TAG
 }PVRSRV_BRIDGE_IN_PDUMP_SETFRAME;
 
 
- 
-
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_BITMAP_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
-	IMG_CHAR szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
+#endif
+	IMG_CHAR   szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
 	IMG_UINT32 ui32FileOffset;
 	IMG_UINT32 ui32Width;
 	IMG_UINT32 ui32Height;
 	IMG_UINT32 ui32StrideInBytes;
 	IMG_DEV_VIRTADDR sDevBaseAddr;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevMemContext;
+#else
 	IMG_HANDLE hDevMemContext;
+#endif
 	IMG_UINT32 ui32Size;
 	PDUMP_PIXEL_FORMAT ePixelFormat;
 	PDUMP_MEM_FORMAT eMemFormat;
@@ -711,21 +848,23 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_BITMAP_TAG
 }PVRSRV_BRIDGE_IN_PDUMP_BITMAP;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_READREG_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
-	IMG_CHAR szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
+#endif
+	IMG_CHAR   szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
 	IMG_UINT32 ui32FileOffset;
 	IMG_UINT32 ui32Address;
 	IMG_UINT32 ui32Size;
 	IMG_UINT32 ui32Flags;
-	IMG_CHAR szRegRegion[32];
+	IMG_CHAR   szRegRegion[32];
 
 }PVRSRV_BRIDGE_IN_PDUMP_READREG;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_DRIVERINFO_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
@@ -737,21 +876,27 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_DRIVERINFO_TAG
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_DUMPPDDEVPADDR_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelMemInfo;
+#else
 	IMG_HANDLE hKernelMemInfo;
+#endif
 	IMG_UINT32 ui32Offset;
 	IMG_DEV_PHYADDR sPDDevPAddr;
 }PVRSRV_BRIDGE_IN_PDUMP_DUMPPDDEVPADDR;
 
- 
 typedef struct PVRSRV_BRIDGE_PDUM_IN_CYCLE_COUNT_REG_READ_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
+#endif
 	IMG_UINT32 ui32RegOffset;
 	IMG_BOOL bLastFrame;
 }PVRSRV_BRIDGE_IN_PDUMP_CYCLE_COUNT_REG_READ;
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_ENUMDEVICE_TAG
 {
 	PVRSRV_ERROR eError;
@@ -761,17 +906,19 @@ typedef struct PVRSRV_BRIDGE_OUT_ENUMDEVICE_TAG
 }PVRSRV_BRIDGE_OUT_ENUMDEVICE;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_ACQUIRE_DEVICEINFO_TAG
 {
 
 	PVRSRV_ERROR		eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+#else
 	IMG_HANDLE			hDevCookie;
+#endif
 
 } PVRSRV_BRIDGE_OUT_ACQUIRE_DEVICEINFO;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_ENUMCLASS_TAG
 {
 	PVRSRV_ERROR eError;
@@ -781,30 +928,40 @@ typedef struct PVRSRV_BRIDGE_OUT_ENUMCLASS_TAG
 }PVRSRV_BRIDGE_OUT_ENUMCLASS;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_OPEN_DISPCLASS_DEVICE_TAG
 {
 	IMG_UINT32		ui32BridgeFlags; 
 	IMG_UINT32		ui32DeviceID;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hDevCookie;
+#else
 	IMG_HANDLE		hDevCookie;
-	
+#endif
+
 }PVRSRV_BRIDGE_IN_OPEN_DISPCLASS_DEVICE;
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_OPEN_DISPCLASS_DEVICE_TAG
 {
 	PVRSRV_ERROR	eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hDeviceKM;
+#else
 	IMG_HANDLE		hDeviceKM;
+#endif
 
 }PVRSRV_BRIDGE_OUT_OPEN_DISPCLASS_DEVICE;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_WRAP_EXT_MEMORY_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID                 hDevCookie;
+	IMG_SID					hDevMemContext;
+#else
 	IMG_HANDLE              hDevCookie;
 	IMG_HANDLE				hDevMemContext;
+#endif
 	IMG_VOID				*pvLinAddr;
 	IMG_SIZE_T              ui32ByteSize;
 	IMG_SIZE_T              ui32PageOffset;
@@ -815,7 +972,6 @@ typedef struct PVRSRV_BRIDGE_IN_WRAP_EXT_MEMORY_TAG
 
 }PVRSRV_BRIDGE_IN_WRAP_EXT_MEMORY;
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_WRAP_EXT_MEMORY_TAG
 {
 	PVRSRV_ERROR	eError;
@@ -824,11 +980,14 @@ typedef struct PVRSRV_BRIDGE_OUT_WRAP_EXT_MEMORY_TAG
 
 }PVRSRV_BRIDGE_OUT_WRAP_EXT_MEMORY;
 
- 
 typedef struct PVRSRV_BRIDGE_IN_UNWRAP_EXT_MEMORY_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelMemInfo;
+#else
 	IMG_HANDLE hKernelMemInfo;
+#endif
 	PVRSRV_CLIENT_MEM_INFO	sClientMemInfo;
 	PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
 
@@ -840,7 +999,6 @@ typedef struct PVRSRV_BRIDGE_IN_UNWRAP_EXT_MEMORY_TAG
 #define PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS			4
 #define PVRSRV_MAX_DC_CLIP_RECTS				32
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_FORMATS_TAG
 {
 	PVRSRV_ERROR	eError;
@@ -850,17 +1008,19 @@ typedef struct PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_FORMATS_TAG
 }PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_FORMATS;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_DIMS_TAG
 {
 	IMG_UINT32		ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hDeviceKM;
+#else
 	IMG_HANDLE		hDeviceKM;
+#endif
 	DISPLAY_FORMAT	sFormat;
 
 }PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_DIMS;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_DIMS_TAG
 {
 	PVRSRV_ERROR	eError;
@@ -870,7 +1030,6 @@ typedef struct PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_DIMS_TAG
 }PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_DIMS;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_GET_DISPCLASS_INFO_TAG
 {
 	PVRSRV_ERROR	eError;
@@ -879,20 +1038,26 @@ typedef struct PVRSRV_BRIDGE_OUT_GET_DISPCLASS_INFO_TAG
 }PVRSRV_BRIDGE_OUT_GET_DISPCLASS_INFO;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_GET_DISPCLASS_SYSBUFFER_TAG
 {
 	PVRSRV_ERROR	eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hBuffer;
+#else
 	IMG_HANDLE		hBuffer;
+#endif
 
 }PVRSRV_BRIDGE_OUT_GET_DISPCLASS_SYSBUFFER;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_CREATE_DISPCLASS_SWAPCHAIN_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hDeviceKM;
+#else
 	IMG_HANDLE				hDeviceKM;
+#endif
 	IMG_UINT32				ui32Flags;
 	DISPLAY_SURF_ATTRIBUTES	sDstSurfAttrib;
 	DISPLAY_SURF_ATTRIBUTES	sSrcSurfAttrib;
@@ -903,112 +1068,151 @@ typedef struct PVRSRV_BRIDGE_IN_CREATE_DISPCLASS_SWAPCHAIN_TAG
 } PVRSRV_BRIDGE_IN_CREATE_DISPCLASS_SWAPCHAIN;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_CREATE_DISPCLASS_SWAPCHAIN_TAG
 {
 	PVRSRV_ERROR		eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hSwapChain;
+#else
 	IMG_HANDLE			hSwapChain;
+#endif
 	IMG_UINT32			ui32SwapChainID;
 
 } PVRSRV_BRIDGE_OUT_CREATE_DISPCLASS_SWAPCHAIN;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_DESTROY_DISPCLASS_SWAPCHAIN_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDeviceKM;
+	IMG_SID				hSwapChain;
+#else
 	IMG_HANDLE			hDeviceKM;
 	IMG_HANDLE			hSwapChain;
+#endif
 
 } PVRSRV_BRIDGE_IN_DESTROY_DISPCLASS_SWAPCHAIN;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_SET_DISPCLASS_RECT_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDeviceKM;
+	IMG_SID				hSwapChain;
+#else
 	IMG_HANDLE			hDeviceKM;
 	IMG_HANDLE			hSwapChain;
+#endif
 	IMG_RECT			sRect;
 
 } PVRSRV_BRIDGE_IN_SET_DISPCLASS_RECT;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_SET_DISPCLASS_COLOURKEY_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDeviceKM;
+	IMG_SID				hSwapChain;
+#else
 	IMG_HANDLE			hDeviceKM;
 	IMG_HANDLE			hSwapChain;
+#endif
 	IMG_UINT32			ui32CKColour;
 
 } PVRSRV_BRIDGE_IN_SET_DISPCLASS_COLOURKEY;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_GET_DISPCLASS_BUFFERS_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDeviceKM;
+	IMG_SID				hSwapChain;
+#else
 	IMG_HANDLE			hDeviceKM;
 	IMG_HANDLE			hSwapChain;
+#endif
 
 } PVRSRV_BRIDGE_IN_GET_DISPCLASS_BUFFERS;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_GET_DISPCLASS_BUFFERS_TAG
 {
 	PVRSRV_ERROR		eError;
 	IMG_UINT32			ui32BufferCount;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				ahBuffer[PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS];
+#else
 	IMG_HANDLE			ahBuffer[PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS];
+#endif
 
 } PVRSRV_BRIDGE_OUT_GET_DISPCLASS_BUFFERS;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDeviceKM;
+	IMG_SID				hBuffer;
+#else
 	IMG_HANDLE			hDeviceKM;
 	IMG_HANDLE			hBuffer;
+#endif
 	IMG_UINT32			ui32SwapInterval;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hPrivateTag;
+#else
 	IMG_HANDLE			hPrivateTag;
+#endif
 	IMG_UINT32			ui32ClipRectCount;
 	IMG_RECT			sClipRect[PVRSRV_MAX_DC_CLIP_RECTS];
 
 } PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_SYSTEM_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDeviceKM;
+	IMG_SID				hSwapChain;
+#else
 	IMG_HANDLE			hDeviceKM;
 	IMG_HANDLE			hSwapChain;
+#endif
 
 } PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_SYSTEM;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_OPEN_BUFFERCLASS_DEVICE_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
 	IMG_UINT32			ui32DeviceID;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+#else
 	IMG_HANDLE			hDevCookie;
-	
+#endif
+
 } PVRSRV_BRIDGE_IN_OPEN_BUFFERCLASS_DEVICE;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_OPEN_BUFFERCLASS_DEVICE_TAG
 {
-	PVRSRV_ERROR		eError;
+	PVRSRV_ERROR eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID      hDeviceKM;
+#else
 	IMG_HANDLE			hDeviceKM;
+#endif
 
 } PVRSRV_BRIDGE_OUT_OPEN_BUFFERCLASS_DEVICE;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_INFO_TAG
 {
 	PVRSRV_ERROR		eError;
@@ -1017,26 +1221,31 @@ typedef struct PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_INFO_TAG
 } PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_INFO;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_BUFFER_TAG
 {
-	IMG_UINT32			ui32BridgeFlags; 
+	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDeviceKM;
+#else
 	IMG_HANDLE			hDeviceKM;
-	IMG_UINT32			ui32BufferIndex;
+#endif
+	IMG_UINT32 ui32BufferIndex;
 
 } PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_BUFFER;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_BUFFER_TAG
 {
-	PVRSRV_ERROR		eError;
+	PVRSRV_ERROR eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID      hBuffer;
+#else
 	IMG_HANDLE			hBuffer;
+#endif
 
 } PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_BUFFER;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_GET_DEVMEM_HEAPINFO_TAG
 {
 	PVRSRV_ERROR		eError;
@@ -1046,42 +1255,54 @@ typedef struct PVRSRV_BRIDGE_OUT_GET_DEVMEM_HEAPINFO_TAG
 } PVRSRV_BRIDGE_OUT_GET_DEVMEM_HEAPINFO;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_CREATE_DEVMEMCONTEXT_TAG
 {
 	PVRSRV_ERROR		eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevMemContext;
+#else
 	IMG_HANDLE			hDevMemContext;
+#endif
 	IMG_UINT32			ui32ClientHeapCount;
 	PVRSRV_HEAP_INFO	sHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
 
 } PVRSRV_BRIDGE_OUT_CREATE_DEVMEMCONTEXT;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_CREATE_DEVMEMHEAP_TAG
 {
 	PVRSRV_ERROR		eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevMemHeap;
+#else
 	IMG_HANDLE			hDevMemHeap;
+#endif
 
 } PVRSRV_BRIDGE_OUT_CREATE_DEVMEMHEAP;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_ALLOCDEVICEMEM_TAG
 {
-	PVRSRV_ERROR			eError;
+	PVRSRV_ERROR            eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID                 hKernelMemInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
-	PVRSRV_CLIENT_MEM_INFO	sClientMemInfo;
-	PVRSRV_CLIENT_SYNC_INFO	sClientSyncInfo;
+#endif
+	PVRSRV_CLIENT_MEM_INFO  sClientMemInfo;
+	PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
 
 } PVRSRV_BRIDGE_OUT_ALLOCDEVICEMEM;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_EXPORTDEVICEMEM_TAG
 {
 	PVRSRV_ERROR			eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hMemInfo;
+#else
 	IMG_HANDLE				hMemInfo;
+#endif
 #if defined(SUPPORT_MEMINFO_IDS)
 	IMG_UINT64				ui64Stamp;
 #endif
@@ -1093,12 +1314,15 @@ typedef struct PVRSRV_BRIDGE_OUT_MAPMEMINFOTOUSER_TAG
 {
 	PVRSRV_ERROR			eError;
 	IMG_PVOID				pvLinAddr;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hMappingInfo;
+#else
 	IMG_HANDLE				hMappingInfo;
+#endif
 
 }PVRSRV_BRIDGE_OUT_MAPMEMINFOTOUSER;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_GETFREEDEVICEMEM_TAG
 {
 	PVRSRV_ERROR eError;
@@ -1113,7 +1337,7 @@ typedef struct PVRSRV_BRIDGE_OUT_GETFREEDEVICEMEM_TAG
 typedef struct PVRSRV_BRIDGE_OUT_MHANDLE_TO_MMAP_DATA_TAG
 {
     PVRSRV_ERROR		eError;
-    
+
     
      IMG_UINT32			ui32MMapOffset;
 
@@ -1131,7 +1355,7 @@ typedef struct PVRSRV_BRIDGE_OUT_MHANDLE_TO_MMAP_DATA_TAG
 typedef struct PVRSRV_BRIDGE_OUT_RELEASE_MMAP_DATA_TAG
 {
     PVRSRV_ERROR		eError;
-    
+
     
     IMG_BOOL			bMUnmap;
 
@@ -1141,7 +1365,6 @@ typedef struct PVRSRV_BRIDGE_OUT_RELEASE_MMAP_DATA_TAG
     
     IMG_UINT32			ui32RealByteSize;
 } PVRSRV_BRIDGE_OUT_RELEASE_MMAP_DATA;
- 
 typedef struct PVRSRV_BRIDGE_IN_GET_MISC_INFO_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
@@ -1150,7 +1373,6 @@ typedef struct PVRSRV_BRIDGE_IN_GET_MISC_INFO_TAG
 }PVRSRV_BRIDGE_IN_GET_MISC_INFO;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_GET_MISC_INFO_TAG
 {
 	PVRSRV_ERROR		eError;
@@ -1159,7 +1381,6 @@ typedef struct PVRSRV_BRIDGE_OUT_GET_MISC_INFO_TAG
 }PVRSRV_BRIDGE_OUT_GET_MISC_INFO;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_RELEASE_MISC_INFO_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
@@ -1168,7 +1389,6 @@ typedef struct PVRSRV_BRIDGE_IN_RELEASE_MISC_INFO_TAG
 }PVRSRV_BRIDGE_IN_RELEASE_MISC_INFO;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_RELEASE_MISC_INFO_TAG
 {
 	PVRSRV_ERROR		eError;
@@ -1177,8 +1397,6 @@ typedef struct PVRSRV_BRIDGE_OUT_RELEASE_MISC_INFO_TAG
 }PVRSRV_BRIDGE_OUT_RELEASE_MISC_INFO;
 
 
- 
-
 typedef struct PVRSRV_BRIDGE_OUT_PDUMP_ISCAPTURING_TAG
 {
 	PVRSRV_ERROR eError;
@@ -1186,8 +1404,7 @@ typedef struct PVRSRV_BRIDGE_OUT_PDUMP_ISCAPTURING_TAG
 
 } PVRSRV_BRIDGE_OUT_PDUMP_ISCAPTURING;
 
- 
-typedef struct PVRSRV_BRIDGE_IN_GET_FB_STATS_TAG 
+typedef struct PVRSRV_BRIDGE_IN_GET_FB_STATS_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
 	IMG_SIZE_T ui32Total;
@@ -1196,18 +1413,20 @@ typedef struct PVRSRV_BRIDGE_IN_GET_FB_STATS_TAG
 } PVRSRV_BRIDGE_IN_GET_FB_STATS;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_MAPPHYSTOUSERSPACE_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+#else
 	IMG_HANDLE			hDevCookie;
+#endif
 	IMG_SYS_PHYADDR		sSysPhysAddr;
 	IMG_UINT32			uiSizeInBytes;
 
 } PVRSRV_BRIDGE_IN_MAPPHYSTOUSERSPACE;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_MAPPHYSTOUSERSPACE_TAG
 {
 	IMG_PVOID			pvUserAddr;
@@ -1217,18 +1436,20 @@ typedef struct PVRSRV_BRIDGE_OUT_MAPPHYSTOUSERSPACE_TAG
 } PVRSRV_BRIDGE_OUT_MAPPHYSTOUSERSPACE;
 
 
- 
 typedef struct PVRSRV_BRIDGE_IN_UNMAPPHYSTOUSERSPACE_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+#else
 	IMG_HANDLE			hDevCookie;
+#endif
 	IMG_PVOID			pvUserAddr;
 	IMG_PVOID			pvProcess;
 
 } PVRSRV_BRIDGE_IN_UNMAPPHYSTOUSERSPACE;
 
 
- 
 typedef struct PVRSRV_BRIDGE_OUT_GETPHYSTOUSERSPACEMAP_TAG
 {
 	IMG_PVOID			*ppvTbl;
@@ -1237,7 +1458,7 @@ typedef struct PVRSRV_BRIDGE_OUT_GETPHYSTOUSERSPACEMAP_TAG
 } PVRSRV_BRIDGE_OUT_GETPHYSTOUSERSPACEMAP;
 
 
- 
+#if !defined (SUPPORT_SID_INTERFACE)
 typedef struct PVRSRV_BRIDGE_IN_REGISTER_SIM_PROCESS_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
@@ -1275,6 +1496,7 @@ typedef struct PVRSRV_BRIDGE_IN_PROCESS_SIMISR_EVENT_TAG
 	PVRSRV_ERROR 		eError;
 
 } PVRSRV_BRIDGE_IN_PROCESS_SIMISR_EVENT;
+#endif 
 
 typedef struct PVRSRV_BRIDGE_IN_INITSRV_DISCONNECT_TAG
 {
@@ -1292,16 +1514,24 @@ typedef struct PVRSRV_BRIDGE_IN_ALLOC_SHARED_SYS_MEM_TAG
 
 typedef struct PVRSRV_BRIDGE_OUT_ALLOC_SHARED_SYS_MEM_TAG
 {
-	PVRSRV_ERROR			eError;
+	PVRSRV_ERROR            eError;
+#if defined (SUPPORT_SID_INTERFACE)
+#else
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
-	PVRSRV_CLIENT_MEM_INFO	sClientMemInfo;
+#endif
+	PVRSRV_CLIENT_MEM_INFO  sClientMemInfo;
 }PVRSRV_BRIDGE_OUT_ALLOC_SHARED_SYS_MEM;
 
 typedef struct PVRSRV_BRIDGE_IN_FREE_SHARED_SYS_MEM_TAG
 {
-	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID                 hKernelMemInfo;
+	IMG_SID                 hMappingInfo;
+#else
+	IMG_UINT32              ui32BridgeFlags; 
 	PVRSRV_KERNEL_MEM_INFO	*psKernelMemInfo;
-	PVRSRV_CLIENT_MEM_INFO	sClientMemInfo;
+#endif
+	PVRSRV_CLIENT_MEM_INFO  sClientMemInfo;
 }PVRSRV_BRIDGE_IN_FREE_SHARED_SYS_MEM;
 
 typedef struct PVRSRV_BRIDGE_OUT_FREE_SHARED_SYS_MEM_TAG
@@ -1312,14 +1542,22 @@ typedef struct PVRSRV_BRIDGE_OUT_FREE_SHARED_SYS_MEM_TAG
 typedef struct PVRSRV_BRIDGE_IN_MAP_MEMINFO_MEM_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelMemInfo;
+#else
 	IMG_HANDLE hKernelMemInfo;
+#endif
 }PVRSRV_BRIDGE_IN_MAP_MEMINFO_MEM;
 
 typedef struct PVRSRV_BRIDGE_OUT_MAP_MEMINFO_MEM_TAG
 {
 	PVRSRV_CLIENT_MEM_INFO  sClientMemInfo;
-	PVRSRV_CLIENT_SYNC_INFO	sClientSyncInfo;
+	PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID                 hKernelMemInfo;
+#else
 	PVRSRV_KERNEL_MEM_INFO  *psKernelMemInfo;
+#endif
 	PVRSRV_ERROR eError;
 }PVRSRV_BRIDGE_OUT_MAP_MEMINFO_MEM;
 
@@ -1337,7 +1575,11 @@ typedef struct PVRSRV_BRIDGE_OUT_UNMAP_MEMINFO_MEM_TAG
 typedef struct PVRSRV_BRIDGE_IN_GETMMU_PD_DEVPADDR_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+    IMG_SID    hDevMemContext;
+#else
     IMG_HANDLE hDevMemContext;
+#endif
 }PVRSRV_BRIDGE_IN_GETMMU_PD_DEVPADDR;
 
 typedef struct PVRSRV_BRIDGE_OUT_GETMMU_PD_DEVPADDR_TAG
@@ -1349,7 +1591,11 @@ typedef struct PVRSRV_BRIDGE_OUT_GETMMU_PD_DEVPADDR_TAG
 typedef struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_WAI_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hOSEventKM;
+#else
 	IMG_HANDLE	hOSEventKM;
+#endif
 } PVRSRV_BRIDGE_IN_EVENT_OBJECT_WAIT;
 
 typedef struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN_TAG
@@ -1359,35 +1605,56 @@ typedef struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN_TAG
 
 typedef struct	PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN_TAG
 {
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_UINT32   hOSEvent;
+#else
 	IMG_HANDLE hOSEvent;
+#endif
 	PVRSRV_ERROR eError;
 } PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN;
 
 typedef struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE_TAG
 {
 	PVRSRV_EVENTOBJECT sEventObject;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hOSEventKM;
+#else
 	IMG_HANDLE hOSEventKM;
+#endif
 } PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE;
 
 typedef struct PVRSRV_BRIDGE_OUT_CREATE_SYNC_INFO_MOD_OBJ_TAG
 {
 	PVRSRV_ERROR eError;
 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfoModObj;
+#else
 	IMG_HANDLE hKernelSyncInfoModObj;
+#endif
 
 } PVRSRV_BRIDGE_OUT_CREATE_SYNC_INFO_MOD_OBJ;
 
 typedef struct PVRSRV_BRIDGE_IN_DESTROY_SYNC_INFO_MOD_OBJ
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfoModObj;
+#else
 	IMG_HANDLE hKernelSyncInfoModObj;
+#endif
 } PVRSRV_BRIDGE_IN_DESTROY_SYNC_INFO_MOD_OBJ;
 
 typedef struct PVRSRV_BRIDGE_IN_MODIFY_PENDING_SYNC_OPS_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfoModObj;
+	IMG_SID    hKernelSyncInfo;
+#else
 	IMG_HANDLE hKernelSyncInfoModObj;
 	IMG_HANDLE hKernelSyncInfo;
+#endif
 	IMG_UINT32 ui32ModifyFlags;
 
 } PVRSRV_BRIDGE_IN_MODIFY_PENDING_SYNC_OPS;
@@ -1395,7 +1662,11 @@ typedef struct PVRSRV_BRIDGE_IN_MODIFY_PENDING_SYNC_OPS_TAG
 typedef struct PVRSRV_BRIDGE_IN_MODIFY_COMPLETE_SYNC_OPS_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfoModObj;
+#else
 	IMG_HANDLE hKernelSyncInfoModObj;
+#endif
 } PVRSRV_BRIDGE_IN_MODIFY_COMPLETE_SYNC_OPS;
 
 typedef struct PVRSRV_BRIDGE_OUT_MODIFY_PENDING_SYNC_OPS_TAG
@@ -1408,16 +1679,56 @@ typedef struct PVRSRV_BRIDGE_OUT_MODIFY_PENDING_SYNC_OPS_TAG
 
 } PVRSRV_BRIDGE_OUT_MODIFY_PENDING_SYNC_OPS;
 
+typedef struct PVRSRV_BRIDGE_IN_SYNC_OPS_TAKE_TOKEN_TAG
+{
+	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfo;
+#else
+	IMG_HANDLE hKernelSyncInfo;
+#endif
+
+} PVRSRV_BRIDGE_IN_SYNC_OPS_TAKE_TOKEN;
+
+typedef struct PVRSRV_BRIDGE_OUT_SYNC_OPS_TAKE_TOKEN_TAG
+{
+	PVRSRV_ERROR eError;
+
+	IMG_UINT32 ui32ReadOpsPending;
+	IMG_UINT32 ui32WriteOpsPending;
+
+} PVRSRV_BRIDGE_OUT_SYNC_OPS_TAKE_TOKEN;
+
+typedef struct PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_TOKEN_TAG
+{
+	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfo;
+#else
+	IMG_HANDLE hKernelSyncInfo;
+#endif
+	IMG_UINT32 ui32ReadOpsPendingSnapshot;
+	IMG_UINT32 ui32WriteOpsPendingSnapshot;
+} PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_TOKEN;
+
 typedef struct PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_MOD_OBJ_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfoModObj;
+#else
 	IMG_HANDLE hKernelSyncInfoModObj;
+#endif
 } PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_MOD_OBJ;
 
 typedef struct PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_DELTA_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfo;
+#else
 	IMG_HANDLE hKernelSyncInfo;
+#endif
 	IMG_UINT32 ui32Delta;
 } PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_DELTA;
 
@@ -1425,23 +1736,41 @@ typedef struct PVRSRV_BRIDGE_IN_ALLOC_SYNC_INFO_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
+#endif
 } PVRSRV_BRIDGE_IN_ALLOC_SYNC_INFO;
 
 typedef struct PVRSRV_BRIDGE_OUT_ALLOC_SYNC_INFO_TAG
 {
 	PVRSRV_ERROR eError;
 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfo;
+#else
 	IMG_HANDLE hKernelSyncInfo;
+#endif
 } PVRSRV_BRIDGE_OUT_ALLOC_SYNC_INFO;
 
 typedef struct PVRSRV_BRIDGE_IN_FREE_SYNC_INFO_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hKernelSyncInfo;
+#else
 	IMG_HANDLE hKernelSyncInfo;
+#endif
 } PVRSRV_BRIDGE_IN_FREE_SYNC_INFO;
 
+typedef struct PVRSRV_BRIDGE_IN_CHG_DEV_MEM_ATTRIBS_TAG
+{
+	IMG_SID				hKernelMemInfo;
+	IMG_UINT32			ui32Attribs;
+} PVRSRV_BRIDGE_IN_CHG_DEV_MEM_ATTRIBS;
+
 
 #if defined (__cplusplus)
 }
diff --git a/drivers/gpu/pvr/pvr_bridge_k.c b/drivers/gpu/pvr/pvr_bridge_k.c
index 3abf6048fde..4b639039566 100644
--- a/drivers/gpu/pvr/pvr_bridge_k.c
+++ b/drivers/gpu/pvr/pvr_bridge_k.c
@@ -54,12 +54,6 @@
 
 #include "bridged_pvr_bridge.h"
 
-#ifdef MODULE_TEST
-#include "pvr_test_bridge.h"
-#include "kern_test.h"
-#endif
-
-
 #if defined(SUPPORT_DRI_DRM)
 #define	PRIVATE_DATA(pFile) ((pFile)->driver_priv)
 #else
@@ -234,150 +228,6 @@ PVRSRV_BridgeDispatchKM(struct file *pFile, unsigned int unref__ ioctlCmd, unsig
 #endif
 
 	cmd = psBridgePackageKM->ui32BridgeID;
-
-#if defined(MODULE_TEST)
-	switch (cmd)
-	{
-		case PVRSRV_BRIDGE_SERVICES_TEST_MEM1:
-			{
-				PVRSRV_ERROR eError = MemTest1();
-				if (psBridgePackageKM->ui32OutBufferSize == sizeof(PVRSRV_BRIDGE_RETURN))
-				{
-					PVRSRV_BRIDGE_RETURN* pReturn = (PVRSRV_BRIDGE_RETURN*)psBridgePackageKM->pvParamOut ;
-					pReturn->eError = eError;
-				}
-			}
-			err = 0;
-			goto unlock_and_return;
-		case PVRSRV_BRIDGE_SERVICES_TEST_MEM2:
-			{
-				PVRSRV_ERROR eError = MemTest2();
-				if (psBridgePackageKM->ui32OutBufferSize == sizeof(PVRSRV_BRIDGE_RETURN))
-				{
-					PVRSRV_BRIDGE_RETURN* pReturn = (PVRSRV_BRIDGE_RETURN*)psBridgePackageKM->pvParamOut ;
-					pReturn->eError = eError;
-				}
-			}
-			err = 0;
-			goto unlock_and_return;
-
-		case PVRSRV_BRIDGE_SERVICES_TEST_RESOURCE:
-			{
-				PVRSRV_ERROR eError = ResourceTest();
-				if (psBridgePackageKM->ui32OutBufferSize == sizeof(PVRSRV_BRIDGE_RETURN))
-				{
-					PVRSRV_BRIDGE_RETURN* pReturn = (PVRSRV_BRIDGE_RETURN*)psBridgePackageKM->pvParamOut ;
-					pReturn->eError = eError;
-				}
-			}
-			err = 0;
-			goto unlock_and_return;
-
-		case PVRSRV_BRIDGE_SERVICES_TEST_EVENTOBJECT:
-			{
-				PVRSRV_ERROR eError = EventObjectTest();
-				if (psBridgePackageKM->ui32OutBufferSize == sizeof(PVRSRV_BRIDGE_RETURN))
-				{
-					PVRSRV_BRIDGE_RETURN* pReturn = (PVRSRV_BRIDGE_RETURN*)psBridgePackageKM->pvParamOut ;
-					pReturn->eError = eError;
-				}
-			}
-			err = 0;
-			goto unlock_and_return;
-
-		case PVRSRV_BRIDGE_SERVICES_TEST_MEMMAPPING:
-			{
-				PVRSRV_ERROR eError = MemMappingTest();
-				if (psBridgePackageKM->ui32OutBufferSize == sizeof(PVRSRV_BRIDGE_RETURN))
-				{
-					PVRSRV_BRIDGE_RETURN* pReturn = (PVRSRV_BRIDGE_RETURN*)psBridgePackageKM->pvParamOut ;
-					pReturn->eError = eError;
-				}
-			}
-			err = 0;
-			goto unlock_and_return;
-
-		case PVRSRV_BRIDGE_SERVICES_TEST_PROCESSID:
-			{
-				PVRSRV_ERROR eError = ProcessIDTest();
-				if (psBridgePackageKM->ui32OutBufferSize == sizeof(PVRSRV_BRIDGE_RETURN))
-				{
-					PVRSRV_BRIDGE_RETURN* pReturn = (PVRSRV_BRIDGE_RETURN*)psBridgePackageKM->pvParamOut ;
-					pReturn->eError = eError;
-				}
-			}
-			err = 0;
-			goto unlock_and_return;
-
-		case PVRSRV_BRIDGE_SERVICES_TEST_CLOCKUSWAITUS:
-			{
-				PVRSRV_ERROR eError = ClockusWaitusTest();
-				if (psBridgePackageKM->ui32OutBufferSize == sizeof(PVRSRV_BRIDGE_RETURN))
-				{
-					PVRSRV_BRIDGE_RETURN* pReturn = (PVRSRV_BRIDGE_RETURN*)psBridgePackageKM->pvParamOut ;
-					pReturn->eError = eError;
-				}
-			}
-			err = 0;
-			goto unlock_and_return;
-
-		case PVRSRV_BRIDGE_SERVICES_TEST_TIMER:
-			{
-				PVRSRV_ERROR eError = TimerTest();
-				if (psBridgePackageKM->ui32OutBufferSize == sizeof(PVRSRV_BRIDGE_RETURN))
-				{
-					PVRSRV_BRIDGE_RETURN* pReturn = (PVRSRV_BRIDGE_RETURN*)psBridgePackageKM->pvParamOut ;
-					pReturn->eError = eError;
-				}
-			}
-			err = 0;
-			goto unlock_and_return;
-
-		case PVRSRV_BRIDGE_SERVICES_TEST_PRIVSRV:
-			{
-				PVRSRV_ERROR eError = PrivSrvTest();
-				if (psBridgePackageKM->ui32OutBufferSize == sizeof(PVRSRV_BRIDGE_RETURN))
-				{
-					PVRSRV_BRIDGE_RETURN* pReturn = (PVRSRV_BRIDGE_RETURN*)psBridgePackageKM->pvParamOut ;
-					pReturn->eError = eError;
-				}
-			}
-			err = 0;
-			goto unlock_and_return;
-		case PVRSRV_BRIDGE_SERVICES_TEST_COPYDATA:
-		{
-			IMG_UINT32               ui32PID;
-			PVRSRV_PER_PROCESS_DATA *psPerProc;
-			PVRSRV_ERROR eError;
-			
-			ui32PID = OSGetCurrentProcessIDKM();
-		
-			PVRSRVTrace("PVRSRV_BRIDGE_SERVICES_TEST_COPYDATA %d", ui32PID);
-			
-			psPerProc = PVRSRVPerProcessData(ui32PID);
-						
-			eError = CopyDataTest(psBridgePackageKM->pvParamIn, psBridgePackageKM->pvParamOut, psPerProc);
-			
-			*(PVRSRV_ERROR*)psBridgePackageKM->pvParamOut = eError;
-			err = 0;
-			goto unlock_and_return;
-		}
-
-
-		case PVRSRV_BRIDGE_SERVICES_TEST_POWERMGMT:
-    			{
-				PVRSRV_ERROR eError = PowerMgmtTest();
-				if (psBridgePackageKM->ui32OutBufferSize == sizeof(PVRSRV_BRIDGE_RETURN))
-				{
-					PVRSRV_BRIDGE_RETURN* pReturn = (PVRSRV_BRIDGE_RETURN*)psBridgePackageKM->pvParamOut ;
-					pReturn->eError = eError;
-				}
-			}
-			err = 0;
-			goto unlock_and_return;
-
-	}
-#endif
 	
 	if(cmd != PVRSRV_BRIDGE_CONNECT_SERVICES)
 	{
@@ -416,10 +266,9 @@ PVRSRV_BridgeDispatchKM(struct file *pFile, unsigned int unref__ ioctlCmd, unsig
 
 	psBridgePackageKM->ui32BridgeID = PVRSRV_GET_BRIDGE_ID(psBridgePackageKM->ui32BridgeID);
 
-#if defined(PVR_SECURE_FD_EXPORT)
 	switch(cmd)
 	{
-		case PVRSRV_BRIDGE_EXPORT_DEVICEMEM:
+		case PVRSRV_BRIDGE_EXPORT_DEVICEMEM_2:
 		{
 			PVRSRV_FILE_PRIVATE_DATA *psPrivateData = PRIVATE_DATA(pFile);
 
@@ -433,7 +282,7 @@ PVRSRV_BridgeDispatchKM(struct file *pFile, unsigned int unref__ ioctlCmd, unsig
 			break;
 		}
 
-		case PVRSRV_BRIDGE_MAP_DEV_MEMORY:
+		case PVRSRV_BRIDGE_MAP_DEV_MEMORY_2:
 		{
 			PVRSRV_BRIDGE_IN_MAP_DEV_MEMORY *psMapDevMemIN =
 				(PVRSRV_BRIDGE_IN_MAP_DEV_MEMORY *)psBridgePackageKM->pvParamIn;
@@ -464,7 +313,7 @@ PVRSRV_BridgeDispatchKM(struct file *pFile, unsigned int unref__ ioctlCmd, unsig
 			break;
 		}
 	}
-#endif 
+
 #if defined(SUPPORT_DRI_DRM) && defined(PVR_SECURE_DRM_AUTH_EXPORT)
 	switch(cmd)
 	{
@@ -522,8 +371,7 @@ PVRSRV_BridgeDispatchKM(struct file *pFile, unsigned int unref__ ioctlCmd, unsig
 
 	switch(cmd)
 	{
-#if defined(PVR_SECURE_FD_EXPORT)
-		case PVRSRV_BRIDGE_EXPORT_DEVICEMEM:
+		case PVRSRV_BRIDGE_EXPORT_DEVICEMEM_2:
 		{
 			PVRSRV_BRIDGE_OUT_EXPORTDEVICEMEM *psExportDeviceMemOUT =
 				(PVRSRV_BRIDGE_OUT_EXPORTDEVICEMEM *)psBridgePackageKM->pvParamOut;
@@ -535,7 +383,6 @@ PVRSRV_BridgeDispatchKM(struct file *pFile, unsigned int unref__ ioctlCmd, unsig
 #endif
 			break;
 		}
-#endif 
 
 #if defined(SUPPORT_MEMINFO_IDS)
 		case PVRSRV_BRIDGE_MAP_DEV_MEMORY:
diff --git a/drivers/gpu/pvr/pvr_bridge_km.h b/drivers/gpu/pvr/pvr_bridge_km.h
index d5592c2ecf5..fe6b22687ce 100644
--- a/drivers/gpu/pvr/pvr_bridge_km.h
+++ b/drivers/gpu/pvr/pvr_bridge_km.h
@@ -57,14 +57,22 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroyCommandQueueKM(PVRSRV_QUEUE_INFO *psQueue
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapsKM(IMG_HANDLE hDevCookie,
+#if defined (SUPPORT_SID_INTERFACE)
+													PVRSRV_HEAP_INFO_KM *psHeapInfo);
+#else
 													PVRSRV_HEAP_INFO *psHeapInfo);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDeviceMemContextKM(IMG_HANDLE					hDevCookie,
 														 PVRSRV_PER_PROCESS_DATA	*psPerProc,
 														 IMG_HANDLE					*phDevMemContext,
 														 IMG_UINT32					*pui32ClientHeapCount,
+#if defined (SUPPORT_SID_INTERFACE)
+														 PVRSRV_HEAP_INFO_KM		*psHeapInfo,
+#else
 														 PVRSRV_HEAP_INFO			*psHeapInfo,
+#endif
 														 IMG_BOOL					*pbCreated,
 														 IMG_BOOL					*pbShared);
 
@@ -79,7 +87,11 @@ IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfoKM(IMG_HANDLE				hDevCookie,
 															IMG_HANDLE			hDevMemContext,
 															IMG_UINT32			*pui32ClientHeapCount,
+#if defined (SUPPORT_SID_INTERFACE)
+															PVRSRV_HEAP_INFO_KM	*psHeapInfo,
+#else
 															PVRSRV_HEAP_INFO	*psHeapInfo,
+#endif
 															IMG_BOOL 			*pbShared
 					);
 
@@ -247,6 +259,10 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemoryKM(PVRSRV_PER_PROCESS_DATA	*
 													   PVRSRV_KERNEL_MEM_INFO	**ppsMemInfo,
 													   IMG_HANDLE				*phOSMapInfo);
 
+IMG_EXPORT
+PVRSRV_ERROR IMG_CALLCONV PVRSRVChangeDeviceMemoryAttributesKM(IMG_HANDLE hKernelMemInfo,
+															   IMG_UINT32 ui32Attribs);
+
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVUnmapDeviceClassMemoryKM(PVRSRV_KERNEL_MEM_INFO *psMemInfo);
 
@@ -263,7 +279,11 @@ IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVFreeSyncInfoKM(PVRSRV_KERNEL_SYNC_INFO	*psKernelSyncInfo);
 
 IMG_IMPORT
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO_KM *psMiscInfo);
+#else
 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo);
+#endif
 
 IMG_IMPORT PVRSRV_ERROR
 PVRSRVAllocSharedSysMemoryKM(PVRSRV_PER_PROCESS_DATA	*psPerProc,
diff --git a/drivers/gpu/pvr/pvr_debug.h b/drivers/gpu/pvr/pvr_debug.h
index 21fa2cdfbe3..5e7c77c8a39 100644
--- a/drivers/gpu/pvr/pvr_debug.h
+++ b/drivers/gpu/pvr/pvr_debug.h
@@ -30,6 +30,7 @@
 
 #include "img_types.h"
 
+
 #if defined (__cplusplus)
 extern "C" {
 #endif
diff --git a/drivers/gpu/pvr/pvrmmap.h b/drivers/gpu/pvr/pvrmmap.h
index 4404d8852af..af3369aae23 100644
--- a/drivers/gpu/pvr/pvrmmap.h
+++ b/drivers/gpu/pvr/pvrmmap.h
@@ -27,10 +27,18 @@
 #ifndef __PVRMMAP_H__
 #define __PVRMMAP_H__
 
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR PVRPMapKMem(IMG_HANDLE hModule, IMG_VOID **ppvLinAddr, IMG_VOID *pvLinAddrKM, IMG_SID *phMappingInfo, IMG_SID hMHandle);
+#else
 PVRSRV_ERROR PVRPMapKMem(IMG_HANDLE hModule, IMG_VOID **ppvLinAddr, IMG_VOID *pvLinAddrKM, IMG_HANDLE *phMappingInfo, IMG_HANDLE hMHandle);
+#endif
 
 
+#if defined (SUPPORT_SID_INTERFACE)
+IMG_BOOL PVRUnMapKMem(IMG_HANDLE hModule, IMG_SID hMappingInfo, IMG_SID hMHandle);
+#else
 IMG_BOOL PVRUnMapKMem(IMG_HANDLE hModule, IMG_HANDLE hMappingInfo, IMG_HANDLE hMHandle);
+#endif
 
 #endif 
 
diff --git a/drivers/gpu/pvr/pvrsrv.c b/drivers/gpu/pvr/pvrsrv.c
index 5862fb925f8..cb05a59e8aa 100644
--- a/drivers/gpu/pvr/pvrsrv.c
+++ b/drivers/gpu/pvr/pvrsrv.c
@@ -32,6 +32,9 @@
 #include "pdump_km.h"
 #include "deviceid.h"
 #include "ra.h"
+#if defined(TTRACE)
+#include "ttrace.h"
+#endif
 
 #include "pvrversion.h"
 
@@ -40,6 +43,7 @@
 IMG_UINT32	g_ui32InitFlags;
 
 #define		INIT_DATA_ENABLE_PDUMPINIT	0x1U
+#define		INIT_DATA_ENABLE_TTARCE		0x2U
 
 PVRSRV_ERROR AllocateDeviceID(SYS_DATA *psSysData, IMG_UINT32 *pui32DevID)
 {
@@ -238,12 +242,24 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVInit(PSYS_DATA psSysData)
 		goto Error;
 	}
 
-	if(OSEventObjectCreate("PVRSRV_GLOBAL_EVENTOBJECT", psSysData->psGlobalEventObject) != PVRSRV_OK)
+	if(OSEventObjectCreateKM("PVRSRV_GLOBAL_EVENTOBJECT", psSysData->psGlobalEventObject) != PVRSRV_OK)
 	{
 		goto Error;
 	}
 
 	
+	psSysData->pfnHighResTimerCreate = OSFuncHighResTimerCreate;
+	psSysData->pfnHighResTimerGetus = OSFuncHighResTimerGetus;
+	psSysData->pfnHighResTimerDestroy = OSFuncHighResTimerDestroy;
+
+#if defined(TTRACE)
+	eError = PVRSRVTimeTraceInit();
+	if (eError != PVRSRV_OK)
+		goto Error;
+	g_ui32InitFlags |= INIT_DATA_ENABLE_TTARCE;
+#endif
+
+	
 	PDUMPINIT();
 	g_ui32InitFlags |= INIT_DATA_ENABLE_PDUMPINIT;
 
@@ -267,7 +283,13 @@ IMG_VOID IMG_CALLCONV PVRSRVDeInit(PSYS_DATA psSysData)
 		PVR_DPF((PVR_DBG_ERROR,"PVRSRVDeInit: PVRSRVHandleDeInit failed - invalid param"));
 		return;
 	}
-
+#if defined(TTRACE)
+	
+	if ((g_ui32InitFlags & INIT_DATA_ENABLE_TTARCE) > 0)
+	{
+		PVRSRVTimeTraceDeinit();
+	}
+#endif
 	
 	if( (g_ui32InitFlags & INIT_DATA_ENABLE_PDUMPINIT) > 0)
 	{
@@ -277,7 +299,7 @@ IMG_VOID IMG_CALLCONV PVRSRVDeInit(PSYS_DATA psSysData)
 	
 	if(psSysData->psGlobalEventObject)
 	{
-		OSEventObjectDestroy(psSysData->psGlobalEventObject);
+		OSEventObjectDestroyKM(psSysData->psGlobalEventObject);
 		OSFreeMem( PVRSRV_PAGEABLE_SELECT,
 						 sizeof(PVRSRV_EVENTOBJECT),
 						 psSysData->psGlobalEventObject,
@@ -621,14 +643,14 @@ PVRSRV_ERROR IMG_CALLCONV PollForValueKM (volatile IMG_UINT32*	pui32LinMemAddr,
 										  IMG_BOOL				bAllowPreemption)
 {
 	{
-		IMG_UINT32	ui32ActualValue = 0xFFFFFFFFU;
+		IMG_UINT32	ui32ActualValue = 0xFFFFFFFFU; 
 
 		if (bAllowPreemption)
 		{
 			PVR_ASSERT(ui32PollPeriodus >= 1000);
 		}
 
-
+		 
 		LOOP_UNTIL_TIMEOUT(ui32Timeoutus)
 		{
 			ui32ActualValue = (*pui32LinMemAddr & ui32Mask);
@@ -636,7 +658,7 @@ PVRSRV_ERROR IMG_CALLCONV PollForValueKM (volatile IMG_UINT32*	pui32LinMemAddr,
 			{
 				return PVRSRV_OK;
 			}
-
+			
 			if (bAllowPreemption)
 			{
 				OSSleepms(ui32PollPeriodus / 1000);
@@ -646,7 +668,7 @@ PVRSRV_ERROR IMG_CALLCONV PollForValueKM (volatile IMG_UINT32*	pui32LinMemAddr,
 				OSWaitus(ui32PollPeriodus);
 			}
 		} END_LOOP_UNTIL_TIMEOUT();
-
+	
 		PVR_DPF((PVR_DBG_ERROR,"PollForValueKM: Timeout. Expected 0x%x but found 0x%x (mask 0x%x).",
 				ui32Value, ui32ActualValue, ui32Mask));
 	}
@@ -666,7 +688,7 @@ static IMG_VOID PVRSRVGetMiscInfoKM_RA_GetStats_ForEachVaCb(BM_HEAP *psBMHeap, v
 	pui32StrLen = va_arg(va, IMG_UINT32*);
 	ui32Mode = va_arg(va, IMG_UINT32);
 
-
+	
 	switch(ui32Mode)
 	{
 		case PVRSRV_MISC_INFO_MEMSTATS_PRESENT:
@@ -762,7 +784,11 @@ static PVRSRV_ERROR PVRSRVGetMiscInfoKM_Device_AnyVaCb(PVRSRV_DEVICE_NODE *psDev
 
 
 IMG_EXPORT
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO_KM *psMiscInfo)
+#else
 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo)
+#endif
 {
 	SYS_DATA *psSysData;
 
@@ -857,7 +883,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo)
 	}
 
 	
-	if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_FREEMEM_PRESENT)
+	if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_FREEMEM_PRESENT) != 0)
 		&& psMiscInfo->pszMemoryStr)
 	{
 		IMG_CHAR			*pszStr;
@@ -929,6 +955,8 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo)
 
 	if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_CPUCACHEOP_PRESENT) != 0UL)
 	{
+		psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_CPUCACHEOP_PRESENT;
+
 		if(psMiscInfo->sCacheOpCtl.bDeferOp)
 		{
 			
@@ -936,10 +964,16 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo)
 		}
 		else
 		{
+#if defined (SUPPORT_SID_INTERFACE)
+			PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo = psMiscInfo->sCacheOpCtl.psKernelMemInfo;
+
+			if(!psMiscInfo->sCacheOpCtl.psKernelMemInfo)
+#else
 			PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
 			PVRSRV_PER_PROCESS_DATA *psPerProc;
 
 			if(!psMiscInfo->sCacheOpCtl.u.psKernelMemInfo)
+#endif
 			{
 				PVR_DPF((PVR_DBG_WARNING, "PVRSRVGetMiscInfoKM: "
 						 "Ignoring non-deferred cache op with no meminfo"));
@@ -953,6 +987,9 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo)
 						 "to combine deferred cache ops with immediate ones"));
 			}
 
+#if defined (SUPPORT_SID_INTERFACE)
+			PVR_DBG_BREAK
+#else
 			
 			psPerProc = PVRSRVFindPerProcessData();
 
@@ -965,6 +1002,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo)
 						 "Can't find kernel meminfo"));
 				return PVRSRV_ERROR_INVALID_PARAMS;
 			}
+#endif
 
 			if(psMiscInfo->sCacheOpCtl.eCacheOpType == PVRSRV_MISC_INFO_CPUCACHEOP_FLUSH)
 			{
@@ -1109,9 +1147,9 @@ IMG_VOID IMG_CALLCONV PVRSRVMISR(IMG_VOID *pvSysData)
 									&PVRSRVMISR_ForEachCb);
 
 	
-	if (PVRSRVProcessQueues(ISR_ID, IMG_FALSE) == PVRSRV_ERROR_PROCESSING_BLOCKED)
+	if (PVRSRVProcessQueues(IMG_FALSE) == PVRSRV_ERROR_PROCESSING_BLOCKED)
 	{
-		PVRSRVProcessQueues(ISR_ID, IMG_FALSE);
+		PVRSRVProcessQueues(IMG_FALSE);
 	}
 
 	
@@ -1120,7 +1158,7 @@ IMG_VOID IMG_CALLCONV PVRSRVMISR(IMG_VOID *pvSysData)
 		IMG_HANDLE hOSEventKM = psSysData->psGlobalEventObject->hOSEventKM;
 		if(hOSEventKM)
 		{
-			OSEventObjectSignal(hOSEventKM);
+			OSEventObjectSignalKM(hOSEventKM);
 		}
 	}
 }
diff --git a/drivers/gpu/pvr/pvrsrv_errors.h b/drivers/gpu/pvr/pvrsrv_errors.h
index 56c7184fe2c..7c946bc2cfb 100644
--- a/drivers/gpu/pvr/pvrsrv_errors.h
+++ b/drivers/gpu/pvr/pvrsrv_errors.h
@@ -88,6 +88,8 @@ extern "C" {
 
 		case PVRSRV_ERROR_REGISTER_BASE_NOT_SET:		return "PVRSRV_ERROR_REGISTER_BASE_NOT_SET";
 
+        case PVRSRV_ERROR_BM_BAD_SHAREMEM_HANDLE:       return "PVRSRV_ERROR_BM_BAD_SHAREMEM_HANDLE";
+
 		case PVRSRV_ERROR_FAILED_TO_ALLOC_USER_MEM:		return "PVRSRV_ERROR_FAILED_TO_ALLOC_USER_MEM";
 		case PVRSRV_ERROR_FAILED_TO_ALLOC_VP_MEMORY:	return "PVRSRV_ERROR_FAILED_TO_ALLOC_VP_MEMORY";
 		case PVRSRV_ERROR_FAILED_TO_MAP_SHARED_PBDESC:	return "PVRSRV_ERROR_FAILED_TO_MAP_SHARED_PBDESC";
diff --git a/drivers/gpu/pvr/pvrversion.h b/drivers/gpu/pvr/pvrversion.h
index 5a431d5ee15..6b736c5dd4c 100644
--- a/drivers/gpu/pvr/pvrversion.h
+++ b/drivers/gpu/pvr/pvrversion.h
@@ -28,10 +28,10 @@
 #define _PVRVERSION_H_
 
 #define PVRVERSION_MAJ 1
-#define PVRVERSION_MIN 6
-#define PVRVERSION_BRANCH 16
-#define PVRVERSION_BUILD 4061
-#define PVRVERSION_STRING "1.6.16.4061"
+#define PVRVERSION_MIN 7
+#define PVRVERSION_BRANCH 17
+#define PVRVERSION_BUILD 3556
+#define PVRVERSION_STRING "1.7.17.3556"
 #define PVRVERSION_FILE "eurasiacon.pj"
 
 #endif 
diff --git a/drivers/gpu/pvr/queue.c b/drivers/gpu/pvr/queue.c
index 83185f31814..9bc6186d6e4 100644
--- a/drivers/gpu/pvr/queue.c
+++ b/drivers/gpu/pvr/queue.c
@@ -27,7 +27,7 @@
 #include "services_headers.h"
 
 #include "lists.h"
-
+#include "ttrace.h"
 
 #define DC_NUM_COMMANDS_PER_TYPE		1
 
@@ -71,13 +71,29 @@ void ProcSeqShowQueue(struct seq_file *sfile,void* el)
 							(IMG_UINTPTR_T)psCmd,
 					 		psCmd->ui32ProcessID,
 							psCmd->CommandType,
-							psCmd->ui32CmdSize,
+							psCmd->uCmdSize,
 							psCmd->ui32DevIndex,
 							psCmd->ui32DstSyncCount,
 							psCmd->ui32SrcSyncCount,
-							psCmd->ui32DataSize);
+							psCmd->uDataSize);
+		{
+			IMG_UINT32 i;
+			for (i = 0; i < psCmd->ui32SrcSyncCount; i++)
+			{
+				PVRSRV_SYNC_DATA *psSyncData = psCmd->psSrcSync[i].psKernelSyncInfoKM->psSyncData;
+				seq_printf(sfile, "  Sync %u: ROP/ROC: 0x%x/0x%x WOP/WOC: 0x%x/0x%x ROC-VA: 0x%x WOC-VA: 0x%x\n",
+									i,
+									psCmd->psSrcSync[i].ui32ReadOpsPending,
+									psSyncData->ui32ReadOpsComplete,
+									psCmd->psSrcSync[i].ui32WriteOpsPending,
+									psSyncData->ui32WriteOpsComplete,
+									psCmd->psSrcSync[i].psKernelSyncInfoKM->sReadOpsCompleteDevVAddr.uiAddr,
+									psCmd->psSrcSync[i].psKernelSyncInfoKM->sWriteOpsCompleteDevVAddr.uiAddr);
+			}
+		}
+
 		
-		ui32ReadOffset += psCmd->ui32CmdSize;
+		ui32ReadOffset += psCmd->uCmdSize;
 		ui32ReadOffset &= psQueue->ui32QueueSize - 1;
 		cmds++;
 	}
@@ -512,7 +528,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVInsertCommandKM(PVRSRV_QUEUE_INFO	*psQueue,
 	psCommand->ui32ProcessID	= OSGetCurrentProcessIDKM();
 
 	
-	psCommand->ui32CmdSize		= ui32CommandSize; 
+	psCommand->uCmdSize		= ui32CommandSize; 
 	psCommand->ui32DevIndex 	= ui32DevIndex;
 	psCommand->CommandType 		= CommandType;
 	psCommand->ui32DstSyncCount	= ui32DstSyncCount;
@@ -527,11 +543,18 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVInsertCommandKM(PVRSRV_QUEUE_INFO	*psQueue,
 
 	psCommand->pvData			= (PVRSRV_SYNC_OBJECT*)(((IMG_UINTPTR_T)psCommand->psSrcSync)
 								+ (ui32SrcSyncCount * sizeof(PVRSRV_SYNC_OBJECT)));
-	psCommand->ui32DataSize		= ui32DataByteSize;
+	psCommand->uDataSize		= ui32DataByteSize;
+
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_QUEUE, PVRSRV_TRACE_CLASS_CMD_START, QUEUE_TOKEN_INSERTKM);
+	PVR_TTRACE_UI32(PVRSRV_TRACE_GROUP_QUEUE, PVRSRV_TRACE_CLASS_NONE,
+			QUEUE_TOKEN_COMMAND_TYPE, CommandType);
 
 	
 	for (i=0; i<ui32DstSyncCount; i++)
 	{
+		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_QUEUE, QUEUE_TOKEN_DST_SYNC,
+						apsDstSync[i], PVRSRV_SYNCOP_SAMPLE);
+
 		psCommand->psDstSync[i].psKernelSyncInfoKM = apsDstSync[i];
 		psCommand->psDstSync[i].ui32WriteOpsPending = PVRSRVGetWriteOpsPending(apsDstSync[i], IMG_FALSE);
 		psCommand->psDstSync[i].ui32ReadOpsPending = PVRSRVGetReadOpsPending(apsDstSync[i], IMG_FALSE);
@@ -546,6 +569,9 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVInsertCommandKM(PVRSRV_QUEUE_INFO	*psQueue,
 	
 	for (i=0; i<ui32SrcSyncCount; i++)
 	{
+		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_QUEUE, QUEUE_TOKEN_DST_SYNC,
+						apsSrcSync[i], PVRSRV_SYNCOP_SAMPLE);
+
 		psCommand->psSrcSync[i].psKernelSyncInfoKM = apsSrcSync[i];
 		psCommand->psSrcSync[i].ui32WriteOpsPending = PVRSRVGetWriteOpsPending(apsSrcSync[i], IMG_TRUE);
 		psCommand->psSrcSync[i].ui32ReadOpsPending = PVRSRVGetReadOpsPending(apsSrcSync[i], IMG_TRUE);
@@ -556,6 +582,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVInsertCommandKM(PVRSRV_QUEUE_INFO	*psQueue,
 				psCommand->psSrcSync[i].ui32ReadOpsPending,
 				psCommand->psSrcSync[i].ui32WriteOpsPending));
 	}
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_QUEUE, PVRSRV_TRACE_CLASS_CMD_END, QUEUE_TOKEN_INSERTKM);
 
 	
 	*ppsCommand = psCommand;
@@ -590,7 +617,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVSubmitCommandKM(PVRSRV_QUEUE_INFO *psQueue,
 									+ (psCommand->ui32SrcSyncCount * sizeof(PVRSRV_SYNC_OBJECT)));
 
 	
-	UPDATE_QUEUE_WOFF(psQueue, psCommand->ui32CmdSize);
+	UPDATE_QUEUE_WOFF(psQueue, psCommand->uCmdSize);
 
 	return PVRSRV_OK;
 }
@@ -730,14 +757,17 @@ PVRSRV_ERROR PVRSRVProcessCommand(SYS_DATA			*psSysData,
 
 
 	if (psDeviceCommandData[psCommand->CommandType].pfnCmdProc((IMG_HANDLE)psCmdCompleteData,
-															   psCommand->ui32DataSize,
+															   (IMG_UINT32)psCommand->uDataSize,
 															   psCommand->pvData) == IMG_FALSE)
 	{
+		
+
 
 		psCmdCompleteData->bInUse = IMG_FALSE;
 		eError = PVRSRV_ERROR_CMD_NOT_PROCESSED;
 	}
-
+	
+	
 	psDeviceCommandData[psCommand->CommandType].ui32CCBOffset = (ui32CCBOffset + 1) % DC_NUM_COMMANDS_PER_TYPE;
 
 	return eError;
@@ -754,48 +784,20 @@ static IMG_VOID PVRSRVProcessQueues_ForEachCb(PVRSRV_DEVICE_NODE *psDeviceNode)
 }
 
 IMG_EXPORT
-PVRSRV_ERROR PVRSRVProcessQueues(IMG_UINT32	ui32CallerID,
-								 IMG_BOOL	bFlush)
+PVRSRV_ERROR PVRSRVProcessQueues(IMG_BOOL	bFlush)
 {
 	PVRSRV_QUEUE_INFO 	*psQueue;
 	SYS_DATA			*psSysData;
 	PVRSRV_COMMAND 		*psCommand;
-	PVRSRV_ERROR		eError;
-
 	SysAcquireData(&psSysData);
 
 	
-	psSysData->bReProcessQueues = IMG_FALSE;
 
-	
-	eError = OSLockResource(&psSysData->sQProcessResource,
-							ui32CallerID);
-	if(eError != PVRSRV_OK)
+	while (OSLockResource(&psSysData->sQProcessResource, ISR_ID) != PVRSRV_OK)
 	{
-		
-		psSysData->bReProcessQueues = IMG_TRUE;
-
-		
-		if(ui32CallerID == ISR_ID)
-		{
-			if (bFlush)
-			{
-				PVR_DPF((PVR_DBG_ERROR,"PVRSRVProcessQueues: Couldn't acquire queue processing lock for FLUSH"));
-			}
-			else
-			{
-				PVR_DPF((PVR_DBG_MESSAGE,"PVRSRVProcessQueues: Couldn't acquire queue processing lock"));
-			}
-		}
-		else
-		{
-			PVR_DPF((PVR_DBG_MESSAGE,"PVRSRVProcessQueues: Queue processing lock-acquire failed when called from the Services driver."));
-			PVR_DPF((PVR_DBG_MESSAGE,"                     This is due to MISR queue processing being interrupted by the Services driver."));
-		}
-
-		return PVRSRV_OK;
-	}
-
+		OSWaitus(1);
+	};
+	
 	psQueue = psSysData->psQueueList;
 
 	if(!psQueue)
@@ -817,8 +819,7 @@ PVRSRV_ERROR PVRSRVProcessQueues(IMG_UINT32	ui32CallerID,
 			if (PVRSRVProcessCommand(psSysData, psCommand, bFlush) == PVRSRV_OK)
 			{
 				
-				UPDATE_QUEUE_ROFF(psQueue, psCommand->ui32CmdSize)
-
+				UPDATE_QUEUE_ROFF(psQueue, psCommand->uCmdSize)
 				continue;
 			}
 
@@ -836,15 +837,7 @@ PVRSRV_ERROR PVRSRVProcessQueues(IMG_UINT32	ui32CallerID,
 	List_PVRSRV_DEVICE_NODE_ForEach(psSysData->psDeviceNodeList,
 									&PVRSRVProcessQueues_ForEachCb);
 
-
-	
-	OSUnlockResource(&psSysData->sQProcessResource, ui32CallerID);
-
-	
-	if(psSysData->bReProcessQueues)
-	{
-		return PVRSRV_ERROR_PROCESSING_BLOCKED;
-	}
+	OSUnlockResource(&psSysData->sQProcessResource, ISR_ID);
 
 	return PVRSRV_OK;
 }
@@ -884,11 +877,18 @@ IMG_VOID PVRSRVCommandCompleteKM(IMG_HANDLE	hCmdCookie,
 
 	SysAcquireData(&psSysData);
 
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_QUEUE, PVRSRV_TRACE_CLASS_CMD_COMP_START,
+			QUEUE_TOKEN_COMMAND_COMPLETE);
+
 	
 	for (i=0; i<psCmdCompleteData->ui32DstSyncCount; i++)
 	{
 		psCmdCompleteData->psDstSync[i].psKernelSyncInfoKM->psSyncData->ui32WriteOpsComplete++;
 
+		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_QUEUE, QUEUE_TOKEN_UPDATE_DST,
+					  psCmdCompleteData->psDstSync[i].psKernelSyncInfoKM,
+					  PVRSRV_SYNCOP_COMPLETE);
+
 		PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVCommandCompleteKM: Dst %u RO-VA:0x%x WO-VA:0x%x ROP:0x%x WOP:0x%x",
 				i, psCmdCompleteData->psDstSync[i].psKernelSyncInfoKM->sReadOpsCompleteDevVAddr.uiAddr,
 				psCmdCompleteData->psDstSync[i].psKernelSyncInfoKM->sWriteOpsCompleteDevVAddr.uiAddr,
@@ -901,6 +901,10 @@ IMG_VOID PVRSRVCommandCompleteKM(IMG_HANDLE	hCmdCookie,
 	{
 		psCmdCompleteData->psSrcSync[i].psKernelSyncInfoKM->psSyncData->ui32ReadOpsComplete++;
 
+		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_QUEUE, QUEUE_TOKEN_UPDATE_SRC,
+					  psCmdCompleteData->psSrcSync[i].psKernelSyncInfoKM,
+					  PVRSRV_SYNCOP_COMPLETE);
+
 		PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVCommandCompleteKM: Src %u RO-VA:0x%x WO-VA:0x%x ROP:0x%x WOP:0x%x",
 				i, psCmdCompleteData->psSrcSync[i].psKernelSyncInfoKM->sReadOpsCompleteDevVAddr.uiAddr,
 				psCmdCompleteData->psSrcSync[i].psKernelSyncInfoKM->sWriteOpsCompleteDevVAddr.uiAddr,
@@ -908,6 +912,9 @@ IMG_VOID PVRSRVCommandCompleteKM(IMG_HANDLE	hCmdCookie,
 				psCmdCompleteData->psSrcSync[i].ui32WriteOpsPending));
 	}
 
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_QUEUE, PVRSRV_TRACE_CLASS_CMD_COMP_END,
+			QUEUE_TOKEN_COMMAND_COMPLETE);
+
 	
 	psCmdCompleteData->bInUse = IMG_FALSE;
 
@@ -966,15 +973,15 @@ PVRSRV_ERROR PVRSRVRegisterCmdProcListKM(IMG_UINT32		ui32DevIndex,
 	{
 		psDeviceCommandData[ui32CmdTypeCounter].pfnCmdProc = ppfnCmdProcList[ui32CmdTypeCounter];
 		psDeviceCommandData[ui32CmdTypeCounter].ui32CCBOffset = 0;
-
+		
 		for (ui32CmdCounter = 0; ui32CmdCounter < DC_NUM_COMMANDS_PER_TYPE; ui32CmdCounter++)
 		{
+			
 
-
-			ui32AllocSize = sizeof(COMMAND_COMPLETE_DATA)
+			ui32AllocSize = sizeof(COMMAND_COMPLETE_DATA) 
 						  + ((ui32MaxSyncsPerCmd[ui32CmdTypeCounter][0]
 						  +	ui32MaxSyncsPerCmd[ui32CmdTypeCounter][1])
-						  * sizeof(PVRSRV_SYNC_OBJECT));
+						  * sizeof(PVRSRV_SYNC_OBJECT));	 
 
 			eError = OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
 								ui32AllocSize,
@@ -986,13 +993,13 @@ PVRSRV_ERROR PVRSRVRegisterCmdProcListKM(IMG_UINT32		ui32DevIndex,
 				PVR_DPF((PVR_DBG_ERROR,"PVRSRVRegisterCmdProcListKM: Failed to alloc cmd %d", ui32CmdTypeCounter));
 				goto ErrorExit;
 			}
-
+			
 			psDeviceCommandData[ui32CmdTypeCounter].apsCmdCompleteData[ui32CmdCounter] = psCmdCompleteData;
-
-
+			
+			
 			OSMemSet(psCmdCompleteData, 0x00, ui32AllocSize);
 
-
+			
 			psCmdCompleteData->psDstSync = (PVRSRV_SYNC_OBJECT*)
 											(((IMG_UINTPTR_T)psCmdCompleteData)
 											+ sizeof(COMMAND_COMPLETE_DATA));
@@ -1000,7 +1007,7 @@ PVRSRV_ERROR PVRSRVRegisterCmdProcListKM(IMG_UINT32		ui32DevIndex,
 											(((IMG_UINTPTR_T)psCmdCompleteData->psDstSync)
 											+ (sizeof(PVRSRV_SYNC_OBJECT) * ui32MaxSyncsPerCmd[ui32CmdTypeCounter][0]));
 
-			psCmdCompleteData->ui32AllocSize = ui32AllocSize;
+			psCmdCompleteData->ui32AllocSize = (IMG_UINT32)ui32AllocSize;
 		}
 	}
 
@@ -1008,15 +1015,14 @@ PVRSRV_ERROR PVRSRVRegisterCmdProcListKM(IMG_UINT32		ui32DevIndex,
 
 ErrorExit:
 
-
-
+	
 	if (PVRSRVRemoveCmdProcListKM(ui32DevIndex, ui32CmdCount) != PVRSRV_OK)
 	{
 		PVR_DPF((PVR_DBG_ERROR,
 				"PVRSRVRegisterCmdProcListKM: Failed to clean up after error, device 0x%x",
 				ui32DevIndex));
 	}
-
+	
 	return eError;
 }
 
@@ -1031,7 +1037,7 @@ PVRSRV_ERROR PVRSRVRemoveCmdProcListKM(IMG_UINT32 ui32DevIndex,
 	COMMAND_COMPLETE_DATA	*psCmdCompleteData;
 	IMG_SIZE_T				ui32AllocSize;
 
-
+	
 	if(ui32DevIndex >= SYS_DEVICE_COUNT)
 	{
 		PVR_DPF((PVR_DBG_ERROR,
@@ -1040,7 +1046,7 @@ PVRSRV_ERROR PVRSRVRemoveCmdProcListKM(IMG_UINT32 ui32DevIndex,
 		return PVRSRV_ERROR_INVALID_PARAMS;
 	}
 
-
+	
 	SysAcquireData(&psSysData);
 
 	psDeviceCommandData = psSysData->apsDeviceCommandData[ui32DevIndex];
@@ -1051,8 +1057,8 @@ PVRSRV_ERROR PVRSRVRemoveCmdProcListKM(IMG_UINT32 ui32DevIndex,
 			for (ui32CmdCounter = 0; ui32CmdCounter < DC_NUM_COMMANDS_PER_TYPE; ui32CmdCounter++)
 			{
 				psCmdCompleteData = psDeviceCommandData[ui32CmdTypeCounter].apsCmdCompleteData[ui32CmdCounter];
-
-
+				
+				
 				if (psCmdCompleteData != IMG_NULL)
 				{
 					OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, psCmdCompleteData->ui32AllocSize,
@@ -1062,7 +1068,7 @@ PVRSRV_ERROR PVRSRVRemoveCmdProcListKM(IMG_UINT32 ui32DevIndex,
 			}
 		}
 
-
+		
 		ui32AllocSize = ui32CmdCount * sizeof(*psDeviceCommandData);
 		OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, ui32AllocSize, psDeviceCommandData, IMG_NULL);
 		psSysData->apsDeviceCommandData[ui32DevIndex] = IMG_NULL;
diff --git a/drivers/gpu/pvr/queue.h b/drivers/gpu/pvr/queue.h
index 9437f0987c8..edafaff02fd 100644
--- a/drivers/gpu/pvr/queue.h
+++ b/drivers/gpu/pvr/queue.h
@@ -51,8 +51,7 @@ extern "C" {
 IMG_VOID QueueDumpDebugInfo(IMG_VOID);
 
 IMG_IMPORT
-PVRSRV_ERROR PVRSRVProcessQueues (IMG_UINT32	ui32CallerID,
-								  IMG_BOOL		bFlush);
+PVRSRV_ERROR PVRSRVProcessQueues (IMG_BOOL		bFlush);
 
 #if defined(__linux__) && defined(__KERNEL__) 
 #include <linux/types.h>
diff --git a/drivers/gpu/pvr/ra.c b/drivers/gpu/pvr/ra.c
index 191be844004..2bd5efbdb00 100644
--- a/drivers/gpu/pvr/ra.c
+++ b/drivers/gpu/pvr/ra.c
@@ -142,7 +142,7 @@ struct _RA_ARENA_
 #endif
 
 #if defined(CONFIG_PROC_FS) && defined(DEBUG)
-#define PROC_NAME_SIZE		32
+#define PROC_NAME_SIZE		64
 
 	struct proc_dir_entry* pProcInfo;
 	struct proc_dir_entry* pProcSegs;
diff --git a/drivers/gpu/pvr/resman.c b/drivers/gpu/pvr/resman.c
index 5d865a7d2c1..2daebf67317 100644
--- a/drivers/gpu/pvr/resman.c
+++ b/drivers/gpu/pvr/resman.c
@@ -249,6 +249,9 @@ IMG_VOID PVRSRVResManDisconnect(PRESMAN_CONTEXT psResManContext,
 		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_OS_USERMODE_MAPPING, 0, 0, IMG_TRUE);
 
 		
+		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DMA_CLIENT_FIFO_DATA, 0, 0, IMG_TRUE);
+
+		
 		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_EVENT_OBJECT, 0, 0, IMG_TRUE);
 
 		
@@ -264,15 +267,8 @@ IMG_VOID PVRSRVResManDisconnect(PRESMAN_CONTEXT psResManContext,
 		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_TRANSFER_CONTEXT, 0, 0, IMG_TRUE);
 		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_SHARED_PB_DESC_CREATE_LOCK, 0, 0, IMG_TRUE);
 		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_SHARED_PB_DESC, 0, 0, IMG_TRUE);
-
-		
-
 		
-		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DISPLAYCLASS_SWAPCHAIN_REF, 0, 0, IMG_TRUE);
-		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DISPLAYCLASS_DEVICE, 0, 0, IMG_TRUE);
-
 		
-		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_BUFFERCLASS_DEVICE, 0, 0, IMG_TRUE);
 
 		
 		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_SYNC_INFO, 0, 0, IMG_TRUE);
@@ -283,6 +279,13 @@ IMG_VOID PVRSRVResManDisconnect(PRESMAN_CONTEXT psResManContext,
 		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DEVICEMEM_ALLOCATION, 0, 0, IMG_TRUE);
 		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DEVICEMEM_CONTEXT, 0, 0, IMG_TRUE);
 		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_SHARED_MEM_INFO, 0, 0, IMG_TRUE);
+
+		
+		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DISPLAYCLASS_SWAPCHAIN_REF, 0, 0, IMG_TRUE);
+		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DISPLAYCLASS_DEVICE, 0, 0, IMG_TRUE);
+
+		
+		FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_BUFFERCLASS_DEVICE, 0, 0, IMG_TRUE);
 	}
 
 	
diff --git a/drivers/gpu/pvr/resman.h b/drivers/gpu/pvr/resman.h
index eebec57c9d6..06eb24a97b6 100644
--- a/drivers/gpu/pvr/resman.h
+++ b/drivers/gpu/pvr/resman.h
@@ -41,6 +41,9 @@ enum {
 	RESMAN_TYPE_TRANSFER_CONTEXT,					
 
 	
+	RESMAN_TYPE_DMA_CLIENT_FIFO_DATA,				
+
+	
 	
 	
 	
diff --git a/drivers/gpu/pvr/services.h b/drivers/gpu/pvr/services.h
index d1afe284912..595b52ffe7a 100644
--- a/drivers/gpu/pvr/services.h
+++ b/drivers/gpu/pvr/services.h
@@ -80,6 +80,7 @@ extern "C" {
 #define PVRSRV_MEM_BACKINGSTORE_FIELD_SHIFT	(24)
 
 #define PVRSRV_MAP_NOUSERVIRTUAL            (1UL<<27)
+#define PVRSRV_MEM_XPROC  					(1U<<28)
 
 #define PVRSRV_NO_CONTEXT_LOSS					0		
 #define PVRSRV_SEVERE_LOSS_OF_CONTEXT			1		
@@ -162,8 +163,11 @@ typedef enum
 	IMG_VISTAVPBNODE	= 0x0000000B,
 	IMG_OPENGL			= 0x0000000C,
 	IMG_D3D				= 0x0000000D,
-#if defined(SUPPORT_GRAPHICS_HAL)
-	IMG_GRAPHICS_HAL	= 0x0000000E
+#if defined(SUPPORT_GRAPHICS_HAL) || defined(SUPPORT_COMPOSER_HAL)
+	IMG_ANDROID_HAL		= 0x0000000E,
+#endif
+#if defined(SUPPORT_OPENCL)
+	IMG_OPENCL			= 0x0000000F,
 #endif
 
 } IMG_MODULE_ID;
@@ -207,7 +211,7 @@ typedef struct _PVRSRV_CLIENT_DEV_DATA_
 typedef struct _PVRSRV_CONNECTION_
 {
 	IMG_HANDLE hServices;					
-	IMG_UINTPTR_T ui32ProcessID;			
+	IMG_UINT32 ui32ProcessID;				
 	PVRSRV_CLIENT_DEV_DATA	sClientDevData;	
 	IMG_UINT32 ui32SrvFlags;				
 }PVRSRV_CONNECTION;
@@ -216,13 +220,17 @@ typedef struct _PVRSRV_CONNECTION_
 typedef struct _PVRSRV_DEV_DATA_
 {
 	IMG_CONST PVRSRV_CONNECTION	 *psConnection;	
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hDevCookie;				
+#else
 	IMG_HANDLE			hDevCookie;				
+#endif
 
 } PVRSRV_DEV_DATA;
 
 typedef struct _PVRSRV_MEMUPDATE_
 {
-	IMG_UINTPTR_T		ui32UpdateAddr;		
+	IMG_UINT32			ui32UpdateAddr;		
 	IMG_UINT32			ui32UpdateVal;		
 } PVRSRV_MEMUPDATE;
 
@@ -272,12 +280,22 @@ typedef struct _PVRSRV_CLIENT_MEM_INFO_
 	IMG_UINT32				ui32ClientFlags;
 
 	
-	IMG_SIZE_T				ui32AllocSize;
+	IMG_SIZE_T				uAllocSize;
 
 
 	
 	struct _PVRSRV_CLIENT_SYNC_INFO_	*psClientSyncInfo;
 
+#if defined (SUPPORT_SID_INTERFACE)
+	
+	IMG_SID								hMappingInfo;
+
+	
+	IMG_SID								hKernelMemInfo;
+
+	
+	IMG_SID								hResItem;
+#else
 	
 	IMG_HANDLE							hMappingInfo;
 
@@ -286,6 +304,7 @@ typedef struct _PVRSRV_CLIENT_MEM_INFO_
 
 	
 	IMG_HANDLE							hResItem;
+#endif
 
 #if defined(SUPPORT_MEMINFO_IDS)
 	#if !defined(USE_CODE)
@@ -309,7 +328,11 @@ typedef struct _PVRSRV_CLIENT_MEM_INFO_
 typedef struct _PVRSRV_HEAP_INFO_
 {
 	IMG_UINT32			ui32HeapID;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID 			hDevMemHeap;
+#else
 	IMG_HANDLE 			hDevMemHeap;
+#endif
 	IMG_DEV_VIRTADDR	sDevVAddrBase;
 	IMG_UINT32			ui32HeapByteSize;
 	IMG_UINT32			ui32Attribs;
@@ -324,7 +347,11 @@ typedef struct _PVRSRV_EVENTOBJECT_
 	
 	IMG_CHAR	szName[EVENTOBJNAME_MAXLENGTH];
 	
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID     hOSEventKM;
+#else
 	IMG_HANDLE	hOSEventKM;
+#endif
 
 } PVRSRV_EVENTOBJECT;
 
@@ -343,8 +370,13 @@ typedef struct _PVRSRV_MISC_INFO_
 	
 	IMG_VOID	*pvSOCTimerRegisterKM;
 	IMG_VOID	*pvSOCTimerRegisterUM;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hSOCTimerRegisterOSMemHandle;
+	IMG_SID		hSOCTimerRegisterMappingInfo;
+#else
 	IMG_HANDLE	hSOCTimerRegisterOSMemHandle;
 	IMG_HANDLE	hSOCTimerRegisterMappingInfo;
+#endif
 
 	
 	IMG_VOID	*pvSOCClockGateRegs;
@@ -356,7 +388,11 @@ typedef struct _PVRSRV_MISC_INFO_
 
 	
 	PVRSRV_EVENTOBJECT	sGlobalEventObject;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_EVENTSID		hOSGlobalEvent;
+#else
 	IMG_HANDLE			hOSGlobalEvent;
+#endif
 
 	
 	IMG_UINT32	aui32DDKVersion[4];
@@ -371,6 +407,7 @@ typedef struct _PVRSRV_MISC_INFO_
 		PVRSRV_MISC_INFO_CPUCACHEOP_TYPE eCacheOpType;
 
 		
+#if !defined (SUPPORT_SID_INTERFACE)
 		union
 		{
 			
@@ -379,6 +416,7 @@ typedef struct _PVRSRV_MISC_INFO_
 			
 			struct _PVRSRV_KERNEL_MEM_INFO_ *psKernelMemInfo;
 		} u;
+#endif
 
 		
 		IMG_VOID *pvBaseVAddr;
@@ -388,6 +426,22 @@ typedef struct _PVRSRV_MISC_INFO_
 	} sCacheOpCtl;
 } PVRSRV_MISC_INFO;
 
+typedef struct _PVRSRV_SYNC_TOKEN_
+{
+	
+
+	struct
+	{
+#if defined (SUPPORT_SID_INTERFACE)
+		IMG_SID    hKernelSyncInfo;
+#else
+		IMG_HANDLE hKernelSyncInfo;
+#endif
+		IMG_UINT32 ui32ReadOpsPendingSnapshot;
+		IMG_UINT32 ui32WriteOpsPendingSnapshot;
+	} sPrivate;
+} PVRSRV_SYNC_TOKEN;
+
 
 typedef enum _PVRSRV_CLIENT_EVENT_
 {
@@ -432,7 +486,11 @@ IMG_IMPORT IMG_VOID WriteHWRegs(IMG_PVOID pvLinRegBaseAddr, IMG_UINT32 ui32Count
 
 IMG_IMPORT
 PVRSRV_ERROR PVRSRVPollForValue ( const PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+							IMG_SID    hOSEvent,
+#else
 							IMG_HANDLE hOSEvent,
+#endif
 							volatile IMG_UINT32 *pui32LinMemAddr,
 							IMG_UINT32 ui32Value,
 							IMG_UINT32 ui32Mask,
@@ -441,17 +499,29 @@ PVRSRV_ERROR PVRSRVPollForValue ( const PVRSRV_CONNECTION *psConnection,
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDeviceMemContext(IMG_CONST PVRSRV_DEV_DATA *psDevData,
+#if defined (SUPPORT_SID_INTERFACE)
+											IMG_SID    *phDevMemContext,
+#else
 											IMG_HANDLE *phDevMemContext,
+#endif
 											IMG_UINT32 *pui32SharedHeapCount,
 											PVRSRV_HEAP_INFO *psHeapInfo);
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroyDeviceMemContext(IMG_CONST PVRSRV_DEV_DATA *psDevData,
+#if defined (SUPPORT_SID_INTERFACE)
+											IMG_SID 			hDevMemContext);
+#else
 											IMG_HANDLE 			hDevMemContext);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfo(IMG_CONST PVRSRV_DEV_DATA *psDevData,
+#if defined (SUPPORT_SID_INTERFACE)
+											IMG_SID     hDevMemContext,
+#else
 											IMG_HANDLE hDevMemContext,
+#endif
 											IMG_UINT32 *pui32SharedHeapCount,
 											PVRSRV_HEAP_INFO *psHeapInfo);
 
@@ -468,7 +538,11 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfo(IMG_CONST PVRSRV_DEV_DATA *
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVAllocDeviceMem(IMG_CONST PVRSRV_DEV_DATA	*psDevData,
+#if defined (SUPPORT_SID_INTERFACE)
+									IMG_SID			hDevMemHeap,
+#else
 									IMG_HANDLE		hDevMemHeap,
+#endif
 									IMG_UINT32		ui32Attribs,
 									IMG_SIZE_T		ui32Size,
 									IMG_SIZE_T		ui32Alignment,
@@ -481,11 +555,19 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVFreeDeviceMem(IMG_CONST PVRSRV_DEV_DATA	*psDevDa
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVExportDeviceMem(IMG_CONST PVRSRV_DEV_DATA	*psDevData,
 												PVRSRV_CLIENT_MEM_INFO		*psMemInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+												IMG_SID						*phMemInfo);
+#else
 												IMG_HANDLE					*phMemInfo);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVReserveDeviceVirtualMem(IMG_CONST PVRSRV_DEV_DATA *psDevData,
+#if defined (SUPPORT_SID_INTERFACE)
+											IMG_SID				hDevMemHeap,
+#else
 											IMG_HANDLE			hDevMemHeap,
+#endif
 											IMG_DEV_VIRTADDR	*psDevVAddr,
 											IMG_SIZE_T			ui32Size,
 											IMG_SIZE_T			ui32Alignment,
@@ -496,8 +578,13 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVFreeDeviceVirtualMem(IMG_CONST PVRSRV_DEV_DATA *
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemory (IMG_CONST PVRSRV_DEV_DATA *psDevData,
+#if defined (SUPPORT_SID_INTERFACE)
+									IMG_SID hKernelMemInfo,
+									IMG_SID hDstDevMemHeap,
+#else
 									IMG_HANDLE hKernelMemInfo,
 									IMG_HANDLE hDstDevMemHeap,
+#endif
 									PVRSRV_CLIENT_MEM_INFO **ppsDstMemInfo);
 
 IMG_IMPORT
@@ -516,7 +603,11 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVUnmapExtMemory (IMG_CONST PVRSRV_DEV_DATA *psDev
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemory(IMG_CONST PVRSRV_DEV_DATA *psDevData,
+#if defined (SUPPORT_SID_INTERFACE)
+												IMG_SID					hDevMemContext,
+#else
 												IMG_HANDLE				hDevMemContext,
+#endif
 												IMG_SIZE_T 				ui32ByteSize,
 												IMG_SIZE_T				ui32PageOffset,
 												IMG_BOOL				bPhysContig,
@@ -534,8 +625,13 @@ PVRSRV_ERROR PVRSRVChangeDeviceMemoryAttributes(IMG_CONST PVRSRV_DEV_DATA			*psD
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemory (IMG_CONST PVRSRV_DEV_DATA *psDevData,
+#if defined (SUPPORT_SID_INTERFACE)
+										IMG_SID hDevMemContext,
+										IMG_SID hDeviceClassBuffer,
+#else
 										IMG_HANDLE hDevMemContext,
 										IMG_HANDLE hDeviceClassBuffer,
+#endif
 										PVRSRV_CLIENT_MEM_INFO **ppsMemInfo);
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVUnmapDeviceClassMemory (IMG_CONST PVRSRV_DEV_DATA *psDevData,
@@ -554,6 +650,23 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVUnmapPhysToUserSpace(IMG_CONST PVRSRV_DEV_DATA *
 										IMG_PVOID pvUserAddr,
 										IMG_PVOID pvProcess);
 
+#if defined(LINUX)
+IMG_IMPORT
+PVRSRV_ERROR IMG_CALLCONV PVRSRVExportDeviceMem2(IMG_CONST PVRSRV_DEV_DATA	*psDevData,
+												 PVRSRV_CLIENT_MEM_INFO		*psMemInfo,
+												 IMG_INT					*iFd);
+
+IMG_IMPORT
+PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemory2(IMG_CONST PVRSRV_DEV_DATA	*psDevData,
+												 IMG_INT					iFd,
+#if defined (SUPPORT_SID_INTERFACE)
+												 IMG_SID					hDstDevMemHeap,
+#else
+												 IMG_HANDLE					hDstDevMemHeap,
+#endif
+												 PVRSRV_CLIENT_MEM_INFO		**ppsDstMemInfo);
+#endif 
+
 typedef enum _PVRSRV_SYNCVAL_MODE_
 {
 	PVRSRV_SYNCVAL_READ				= IMG_TRUE,
@@ -611,7 +724,11 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVEnumDCDims (IMG_HANDLE hDevice,
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDCSystemBuffer(IMG_HANDLE hDevice,
+#if defined (SUPPORT_SID_INTERFACE)
+										IMG_SID *phBuffer);
+#else
 										IMG_HANDLE *phBuffer);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDCInfo(IMG_HANDLE hDevice,
@@ -625,48 +742,89 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDCSwapChain (IMG_HANDLE				hDevice,
 													IMG_UINT32				ui32BufferCount,
 													IMG_UINT32				ui32OEMFlags,
 													IMG_UINT32				*pui32SwapChainID,
+#if defined (SUPPORT_SID_INTERFACE)
+													IMG_SID					*phSwapChain);
+#else
 													IMG_HANDLE				*phSwapChain);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroyDCSwapChain (IMG_HANDLE hDevice,
+#if defined (SUPPORT_SID_INTERFACE)
+											IMG_SID hSwapChain);
+#else
 											IMG_HANDLE		hSwapChain);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCDstRect (IMG_HANDLE hDevice,
+#if defined (SUPPORT_SID_INTERFACE)
+										IMG_SID		hSwapChain,
+#else
 										IMG_HANDLE	hSwapChain,
+#endif
 										IMG_RECT	*psDstRect);
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCSrcRect (IMG_HANDLE hDevice,
+#if defined (SUPPORT_SID_INTERFACE)
+										IMG_SID		hSwapChain,
+#else
 										IMG_HANDLE	hSwapChain,
+#endif
 										IMG_RECT	*psSrcRect);
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCDstColourKey (IMG_HANDLE hDevice,
+#if defined (SUPPORT_SID_INTERFACE)
+											IMG_SID		hSwapChain,
+#else
 											IMG_HANDLE	hSwapChain,
+#endif
 											IMG_UINT32	ui32CKColour);
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCSrcColourKey (IMG_HANDLE hDevice,
+#if defined (SUPPORT_SID_INTERFACE)
+											IMG_SID		hSwapChain,
+#else
 											IMG_HANDLE	hSwapChain,
+#endif
 											IMG_UINT32	ui32CKColour);
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDCBuffers(IMG_HANDLE hDevice,
+#if defined (SUPPORT_SID_INTERFACE)
+									IMG_SID     hSwapChain,
+									IMG_SID    *phBuffer);
+#else
 									IMG_HANDLE hSwapChain,
 									IMG_HANDLE *phBuffer);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVSwapToDCBuffer (IMG_HANDLE hDevice,
+#if defined (SUPPORT_SID_INTERFACE)
+										IMG_SID    hBuffer,
+#else
 										IMG_HANDLE hBuffer,
+#endif
 										IMG_UINT32 ui32ClipRectCount,
-										IMG_RECT *psClipRect,
+										IMG_RECT  *psClipRect,
 										IMG_UINT32 ui32SwapInterval,
+#if defined (SUPPORT_SID_INTERFACE)
+										IMG_SID hPrivateTag);
+#else
 										IMG_HANDLE hPrivateTag);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVSwapToDCSystem (IMG_HANDLE hDevice,
+#if defined (SUPPORT_SID_INTERFACE)
+										IMG_SID hSwapChain);
+#else
 										IMG_HANDLE hSwapChain);
+#endif
 
 
 IMG_IMPORT
@@ -684,7 +842,11 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetBCBufferInfo(IMG_HANDLE hDevice,
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetBCBuffer(IMG_HANDLE hDevice,
 												IMG_UINT32 ui32BufferIndex,
+#if defined (SUPPORT_SID_INTERFACE)
+												IMG_SID   *phBuffer);
+#else
 												IMG_HANDLE *phBuffer);
+#endif
 
 
 IMG_IMPORT
@@ -698,7 +860,11 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpStopInitPhase(IMG_CONST PVRSRV_CONNECTION *
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMemPol(IMG_CONST PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+										  IMG_SID    hKernelMemInfo,
+#else
 										  PVRSRV_CLIENT_MEM_INFO *psMemInfo,
+#endif										  
 										  IMG_UINT32 ui32Offset,
 										  IMG_UINT32 ui32Value,
 										  IMG_UINT32 ui32Mask,
@@ -707,10 +873,23 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMemPol(IMG_CONST PVRSRV_CONNECTION *psConne
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpSyncPol(IMG_CONST PVRSRV_CONNECTION *psConnection,
-										  PVRSRV_CLIENT_SYNC_INFO *psClientSyncInfo,
-										  IMG_BOOL bIsRead,
-										  IMG_UINT32 ui32Value,
-										  IMG_UINT32 ui32Mask);
+#if defined (SUPPORT_SID_INTERFACE)
+											 IMG_SID    hKernelSyncInfo,
+#else
+											 PVRSRV_CLIENT_SYNC_INFO *psClientSyncInfo,
+#endif
+											 IMG_BOOL   bIsRead,
+											 IMG_UINT32 ui32Value,
+											 IMG_UINT32 ui32Mask);
+
+IMG_IMPORT
+PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpSyncPol2(IMG_CONST PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+											 IMG_SID  hKernelSyncInfo,
+#else
+											 PVRSRV_CLIENT_SYNC_INFO *psClientSyncInfo,
+#endif
+											 IMG_BOOL bIsRead);
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMem(IMG_CONST PVRSRV_CONNECTION *psConnection,
@@ -758,15 +937,21 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpPDDevPAddr(IMG_CONST PVRSRV_CONNECTION *psC
 												IMG_UINT32 ui32Offset,
 												IMG_DEV_PHYADDR sPDDevPAddr);
 
+#if !defined(USE_CODE)
 IMG_IMPORT
-PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMemPages(IMG_CONST PVRSRV_CONNECTION *psConnection,
-												IMG_HANDLE			hKernelMemInfo,
-												IMG_DEV_PHYADDR		*pPages,
-												IMG_UINT32			ui32NumPages,
-												IMG_DEV_VIRTADDR	sDevAddr,
-												IMG_UINT32			ui32Start,
-												IMG_UINT32			ui32Length,
-												IMG_BOOL			bContinuous);
+PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMemPages(IMG_CONST PVRSRV_DEV_DATA *psDevData,
+#if defined (SUPPORT_SID_INTERFACE)
+														   IMG_SID				hKernelMemInfo,
+#else
+														   IMG_HANDLE			hKernelMemInfo,
+#endif
+														   IMG_DEV_PHYADDR		*pPages,
+														   IMG_UINT32			ui32NumPages,
+												   		   IMG_DEV_VIRTADDR		sDevVAddr,
+														   IMG_UINT32			ui32Start,
+														   IMG_UINT32			ui32Length,
+														   IMG_UINT32			ui32Flags);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpSetFrame(IMG_CONST PVRSRV_CONNECTION *psConnection,
@@ -812,7 +997,11 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpBitmap(IMG_CONST PVRSRV_DEV_DATA *psDevData
 											IMG_UINT32 ui32Height,
 											IMG_UINT32 ui32StrideInBytes,
 											IMG_DEV_VIRTADDR sDevBaseAddr,
+#if defined (SUPPORT_SID_INTERFACE)
+											IMG_SID    hDevMemContext,
+#else
 											IMG_HANDLE hDevMemContext,
+#endif
 											IMG_UINT32 ui32Size,
 											PDUMP_PIXEL_FORMAT ePixelFormat,
 											PDUMP_MEM_FORMAT eMemFormat,
@@ -843,7 +1032,7 @@ IMG_IMPORT PVRSRV_ERROR	PVRSRVGetLibFuncAddr(IMG_HANDLE hExtDrv, const IMG_CHAR
 IMG_IMPORT IMG_UINT32 PVRSRVClockus (void);
 IMG_IMPORT IMG_VOID PVRSRVWaitus (IMG_UINT32 ui32Timeus);
 IMG_IMPORT IMG_VOID PVRSRVReleaseThreadQuanta (void);
-IMG_IMPORT IMG_UINTPTR_T IMG_CALLCONV PVRSRVGetCurrentProcessID(void);
+IMG_IMPORT IMG_UINT32 IMG_CALLCONV PVRSRVGetCurrentProcessID(void);
 IMG_IMPORT IMG_CHAR * IMG_CALLCONV PVRSRVSetLocale(const IMG_CHAR *pszLocale);
 
 
@@ -939,21 +1128,37 @@ IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVReallocUserModeMemTracking(IMG_VOID *pvM
 #endif 
 
 IMG_IMPORT PVRSRV_ERROR PVRSRVEventObjectWait(const PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+									IMG_EVENTSID hOSEvent);
+#else
 									IMG_HANDLE hOSEvent);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateSyncInfoModObj(const PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+													 IMG_SID *phKernelSyncInfoModObj);
+#else
 													 IMG_HANDLE *phKernelSyncInfoModObj);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroySyncInfoModObj(const PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+													  IMG_SID hKernelSyncInfoModObj);
+#else
 													  IMG_HANDLE hKernelSyncInfoModObj);
+#endif
 
 
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVModifyPendingSyncOps(const PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+													  IMG_SID    hKernelSyncInfoModObj,
+#else
 													  IMG_HANDLE hKernelSyncInfoModObj,
+#endif
 													  PVRSRV_CLIENT_SYNC_INFO *psSyncInfo,
 													  IMG_UINT32 ui32ModifyFlags,
 													  IMG_UINT32 *pui32ReadOpsPending,
@@ -961,11 +1166,36 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVModifyPendingSyncOps(const PVRSRV_CONNECTION *ps
 
 IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVModifyCompleteSyncOps(const PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+													  IMG_SID hKernelSyncInfoModObj);
+#else
 													  IMG_HANDLE hKernelSyncInfoModObj);
+#endif
 
 IMG_IMPORT
+PVRSRV_ERROR IMG_CALLCONV PVRSRVSyncOpsTakeToken(const PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+												 const IMG_SID      hKernelSyncInfo,
+#else
+												 const PVRSRV_CLIENT_SYNC_INFO *psSyncInfo,
+#endif
+												 PVRSRV_SYNC_TOKEN *psSyncToken);
+IMG_IMPORT
+PVRSRV_ERROR IMG_CALLCONV PVRSRVSyncOpsFlushToToken(const PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+													const IMG_SID            hKernelSyncInfo,
+#else
+													const PVRSRV_CLIENT_SYNC_INFO *psSyncInfo,
+#endif
+													const PVRSRV_SYNC_TOKEN *psSyncToken,
+													IMG_BOOL bWait);
+IMG_IMPORT
 PVRSRV_ERROR IMG_CALLCONV PVRSRVSyncOpsFlushToModObj(const PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+													 IMG_SID  hKernelSyncInfoModObj,
+#else
 													 IMG_HANDLE hKernelSyncInfoModObj,
+#endif
 													 IMG_BOOL bWait);
 
 IMG_IMPORT
diff --git a/drivers/gpu/pvr/servicesext.h b/drivers/gpu/pvr/servicesext.h
index 6f7270561a8..609df3138fc 100644
--- a/drivers/gpu/pvr/servicesext.h
+++ b/drivers/gpu/pvr/servicesext.h
@@ -86,6 +86,8 @@ typedef enum _PVRSRV_ERROR_
 
 	PVRSRV_ERROR_REGISTER_BASE_NOT_SET,
 
+    PVRSRV_ERROR_BM_BAD_SHAREMEM_HANDLE,
+
 	PVRSRV_ERROR_FAILED_TO_ALLOC_USER_MEM,
 	PVRSRV_ERROR_FAILED_TO_ALLOC_VP_MEMORY,
 	PVRSRV_ERROR_FAILED_TO_MAP_SHARED_PBDESC,
@@ -434,62 +436,62 @@ typedef enum _PVRSRV_PIXEL_FORMAT_ {
 
 	
 	PVRSRV_PIXEL_FORMAT_G16R16				= 101,	
-	PVRSRV_PIXEL_FORMAT_G16R16F				= 102,
-	PVRSRV_PIXEL_FORMAT_G16R16_UINT			= 103,
-	PVRSRV_PIXEL_FORMAT_G16R16_UNORM		= 104,
-	PVRSRV_PIXEL_FORMAT_G16R16_SINT			= 105,
-	PVRSRV_PIXEL_FORMAT_G16R16_SNORM		= 106,
-
-
-	PVRSRV_PIXEL_FORMAT_R16					= 107,
-	PVRSRV_PIXEL_FORMAT_R16F				= 108,
-	PVRSRV_PIXEL_FORMAT_R16_UINT			= 109,
-	PVRSRV_PIXEL_FORMAT_R16_UNORM			= 110,
-	PVRSRV_PIXEL_FORMAT_R16_SINT			= 111,
-	PVRSRV_PIXEL_FORMAT_R16_SNORM			= 112,
-
-
-	PVRSRV_PIXEL_FORMAT_X8R8G8B8			= 113,
-	PVRSRV_PIXEL_FORMAT_X8R8G8B8_UNORM		= 114,
-	PVRSRV_PIXEL_FORMAT_X8R8G8B8_UNORM_SRGB	= 115,
-
-	PVRSRV_PIXEL_FORMAT_A8R8G8B8			= 116,
-	PVRSRV_PIXEL_FORMAT_A8R8G8B8_UNORM		= 117,
-	PVRSRV_PIXEL_FORMAT_A8R8G8B8_UNORM_SRGB	= 118,
+	PVRSRV_PIXEL_FORMAT_G16R16F				= 102,	
+	PVRSRV_PIXEL_FORMAT_G16R16_UINT			= 103,	
+	PVRSRV_PIXEL_FORMAT_G16R16_UNORM		= 104,	
+	PVRSRV_PIXEL_FORMAT_G16R16_SINT			= 105,	
+	PVRSRV_PIXEL_FORMAT_G16R16_SNORM		= 106,	
 
-	PVRSRV_PIXEL_FORMAT_A8B8G8R8			= 119,
-	PVRSRV_PIXEL_FORMAT_A8B8G8R8_UINT		= 120,
-	PVRSRV_PIXEL_FORMAT_A8B8G8R8_UNORM		= 121,
-	PVRSRV_PIXEL_FORMAT_A8B8G8R8_UNORM_SRGB	= 122,
-	PVRSRV_PIXEL_FORMAT_A8B8G8R8_SINT		= 123,
-	PVRSRV_PIXEL_FORMAT_A8B8G8R8_SNORM		= 124,
-
-
-	PVRSRV_PIXEL_FORMAT_G8R8				= 125,
-	PVRSRV_PIXEL_FORMAT_G8R8_UINT			= 126,
-	PVRSRV_PIXEL_FORMAT_G8R8_UNORM			= 127,
-	PVRSRV_PIXEL_FORMAT_G8R8_SINT			= 128,
-	PVRSRV_PIXEL_FORMAT_G8R8_SNORM			= 129,
+	
+	PVRSRV_PIXEL_FORMAT_R16					= 107,	
+	PVRSRV_PIXEL_FORMAT_R16F				= 108,	
+	PVRSRV_PIXEL_FORMAT_R16_UINT			= 109,	
+	PVRSRV_PIXEL_FORMAT_R16_UNORM			= 110,	
+	PVRSRV_PIXEL_FORMAT_R16_SINT			= 111,	
+	PVRSRV_PIXEL_FORMAT_R16_SNORM			= 112,	
 
+	
+	PVRSRV_PIXEL_FORMAT_X8R8G8B8			= 113,	
+	PVRSRV_PIXEL_FORMAT_X8R8G8B8_UNORM		= 114,	
+	PVRSRV_PIXEL_FORMAT_X8R8G8B8_UNORM_SRGB	= 115,	
 
-	PVRSRV_PIXEL_FORMAT_A8					= 130,
-	PVRSRV_PIXEL_FORMAT_R8					= 131,
-	PVRSRV_PIXEL_FORMAT_R8_UINT				= 132,
-	PVRSRV_PIXEL_FORMAT_R8_UNORM			= 133,
-	PVRSRV_PIXEL_FORMAT_R8_SINT				= 134,
-	PVRSRV_PIXEL_FORMAT_R8_SNORM			= 135,
+	PVRSRV_PIXEL_FORMAT_A8R8G8B8			= 116,	
+	PVRSRV_PIXEL_FORMAT_A8R8G8B8_UNORM		= 117,	
+	PVRSRV_PIXEL_FORMAT_A8R8G8B8_UNORM_SRGB	= 118,	
 
+	PVRSRV_PIXEL_FORMAT_A8B8G8R8			= 119,	
+	PVRSRV_PIXEL_FORMAT_A8B8G8R8_UINT		= 120,	
+	PVRSRV_PIXEL_FORMAT_A8B8G8R8_UNORM		= 121,	
+	PVRSRV_PIXEL_FORMAT_A8B8G8R8_UNORM_SRGB	= 122,	
+	PVRSRV_PIXEL_FORMAT_A8B8G8R8_SINT		= 123,	
+	PVRSRV_PIXEL_FORMAT_A8B8G8R8_SNORM		= 124,	
 
-	PVRSRV_PIXEL_FORMAT_A2B10G10R10			= 136,
-	PVRSRV_PIXEL_FORMAT_A2B10G10R10_UNORM	= 137,
-	PVRSRV_PIXEL_FORMAT_A2B10G10R10_UINT	= 138,
+	
+	PVRSRV_PIXEL_FORMAT_G8R8				= 125,	
+	PVRSRV_PIXEL_FORMAT_G8R8_UINT			= 126,	
+	PVRSRV_PIXEL_FORMAT_G8R8_UNORM			= 127,	
+	PVRSRV_PIXEL_FORMAT_G8R8_SINT			= 128,	
+	PVRSRV_PIXEL_FORMAT_G8R8_SNORM			= 129,	
 
+	
+	PVRSRV_PIXEL_FORMAT_A8					= 130,	
+	PVRSRV_PIXEL_FORMAT_R8					= 131,	
+	PVRSRV_PIXEL_FORMAT_R8_UINT				= 132,	
+	PVRSRV_PIXEL_FORMAT_R8_UNORM			= 133,	
+	PVRSRV_PIXEL_FORMAT_R8_SINT				= 134,	
+	PVRSRV_PIXEL_FORMAT_R8_SNORM			= 135,	
 
-	PVRSRV_PIXEL_FORMAT_B10G11R11			= 139,
-	PVRSRV_PIXEL_FORMAT_B10G11R11F			= 140,
+	
+	PVRSRV_PIXEL_FORMAT_A2B10G10R10			= 136,	
+	PVRSRV_PIXEL_FORMAT_A2B10G10R10_UNORM	= 137,	
+	PVRSRV_PIXEL_FORMAT_A2B10G10R10_UINT	= 138,	
 
+	
+	PVRSRV_PIXEL_FORMAT_B10G11R11			= 139,	
+	PVRSRV_PIXEL_FORMAT_B10G11R11F			= 140,	
 
-	PVRSRV_PIXEL_FORMAT_X24G8R32			= 141,
+	
+	PVRSRV_PIXEL_FORMAT_X24G8R32			= 141,	
 	PVRSRV_PIXEL_FORMAT_G8R24				= 142,	
 	PVRSRV_PIXEL_FORMAT_X8R24				= 143,
 	PVRSRV_PIXEL_FORMAT_E5B9G9R9			= 144,	
@@ -511,20 +513,20 @@ typedef enum _PVRSRV_PIXEL_FORMAT_ {
 	PVRSRV_PIXEL_FORMAT_RESERVED19			= 159,
 	PVRSRV_PIXEL_FORMAT_RESERVED20			= 160,
 
+	
+	PVRSRV_PIXEL_FORMAT_UBYTE4				= 161,	
+	PVRSRV_PIXEL_FORMAT_SHORT4				= 162,	
+	PVRSRV_PIXEL_FORMAT_SHORT4N				= 163,	
+	PVRSRV_PIXEL_FORMAT_USHORT4N			= 164,	
+	PVRSRV_PIXEL_FORMAT_SHORT2N				= 165,	
+	PVRSRV_PIXEL_FORMAT_SHORT2				= 166,	
+	PVRSRV_PIXEL_FORMAT_USHORT2N			= 167,	
+	PVRSRV_PIXEL_FORMAT_UDEC3				= 168,	
+	PVRSRV_PIXEL_FORMAT_DEC3N				= 169,	
+	PVRSRV_PIXEL_FORMAT_F16_2				= 170,	
+	PVRSRV_PIXEL_FORMAT_F16_4				= 171,	
 
-	PVRSRV_PIXEL_FORMAT_UBYTE4				= 161,
-	PVRSRV_PIXEL_FORMAT_SHORT4				= 162,
-	PVRSRV_PIXEL_FORMAT_SHORT4N				= 163,
-	PVRSRV_PIXEL_FORMAT_USHORT4N			= 164,
-	PVRSRV_PIXEL_FORMAT_SHORT2N				= 165,
-	PVRSRV_PIXEL_FORMAT_SHORT2				= 166,
-	PVRSRV_PIXEL_FORMAT_USHORT2N			= 167,
-	PVRSRV_PIXEL_FORMAT_UDEC3				= 168,
-	PVRSRV_PIXEL_FORMAT_DEC3N				= 169,
-	PVRSRV_PIXEL_FORMAT_F16_2				= 170,
-	PVRSRV_PIXEL_FORMAT_F16_4				= 171,
-
-
+	
 	PVRSRV_PIXEL_FORMAT_L_F16				= 172,
 	PVRSRV_PIXEL_FORMAT_L_F16_REP			= 173,
 	PVRSRV_PIXEL_FORMAT_L_F16_A_F16			= 174,
@@ -535,7 +537,7 @@ typedef enum _PVRSRV_PIXEL_FORMAT_ {
 	PVRSRV_PIXEL_FORMAT_A_F32				= 178,
 	PVRSRV_PIXEL_FORMAT_L_F32_A_F32			= 179,
 
-
+	
 	PVRSRV_PIXEL_FORMAT_PVRTC2				= 180,
 	PVRSRV_PIXEL_FORMAT_PVRTC4				= 181,
 	PVRSRV_PIXEL_FORMAT_PVRTCII2			= 182,
@@ -552,7 +554,7 @@ typedef enum _PVRSRV_PIXEL_FORMAT_ {
 	PVRSRV_PIXEL_FORMAT_MONO8				= 193,
 	PVRSRV_PIXEL_FORMAT_MONO16				= 194,
 
-
+	
 	PVRSRV_PIXEL_FORMAT_C0_YUYV				= 195,
 	PVRSRV_PIXEL_FORMAT_C0_UYVY				= 196,
 	PVRSRV_PIXEL_FORMAT_C0_YVYU				= 197,
@@ -562,7 +564,7 @@ typedef enum _PVRSRV_PIXEL_FORMAT_ {
 	PVRSRV_PIXEL_FORMAT_C1_YVYU				= 201,
 	PVRSRV_PIXEL_FORMAT_C1_VYUY				= 202,
 
-
+	
 	PVRSRV_PIXEL_FORMAT_C0_YUV420_2P_UV		= 203,
 	PVRSRV_PIXEL_FORMAT_C0_YUV420_2P_VU		= 204,
 	PVRSRV_PIXEL_FORMAT_C0_YUV420_3P		= 205,
@@ -573,11 +575,19 @@ typedef enum _PVRSRV_PIXEL_FORMAT_ {
 	PVRSRV_PIXEL_FORMAT_A2B10G10R10F		= 209,
 	PVRSRV_PIXEL_FORMAT_B8G8R8_SINT			= 210,
 	PVRSRV_PIXEL_FORMAT_PVRF32SIGNMASK		= 211,
-
+	
 	PVRSRV_PIXEL_FORMAT_ABGR4444			= 212,	
 	PVRSRV_PIXEL_FORMAT_ABGR1555			= 213,
-	PVRSRV_PIXEL_FORMAT_BGR565				= 214,
+	PVRSRV_PIXEL_FORMAT_BGR565				= 214,			
 
+	
+	PVRSRV_PIXEL_FORMAT_C0_4KYUV420_2P_UV	= 215,
+	PVRSRV_PIXEL_FORMAT_C0_4KYUV420_2P_VU	= 216,
+	PVRSRV_PIXEL_FORMAT_C1_4KYUV420_2P_UV	= 217,
+	PVRSRV_PIXEL_FORMAT_C1_4KYUV420_2P_VU	= 218,
+	PVRSRV_PIXEL_FORMAT_P208				= 219,			
+	PVRSRV_PIXEL_FORMAT_A8P8				= 220,			
+		
 	PVRSRV_PIXEL_FORMAT_FORCE_I32			= 0x7fffffff
 
 } PVRSRV_PIXEL_FORMAT;
@@ -612,15 +622,15 @@ typedef enum _PVRSRV_ROTATION_ {
 
 typedef struct _PVRSRV_SYNC_DATA_
 {
-
+	
 	IMG_UINT32					ui32WriteOpsPending;
 	volatile IMG_UINT32			ui32WriteOpsComplete;
 
-
+	
 	IMG_UINT32					ui32ReadOpsPending;
 	volatile IMG_UINT32			ui32ReadOpsComplete;
 
-
+	
 	IMG_UINT32					ui32LastOpDumpVal;
 	IMG_UINT32					ui32LastReadOpDumpVal;
 
@@ -628,30 +638,37 @@ typedef struct _PVRSRV_SYNC_DATA_
 
 typedef struct _PVRSRV_CLIENT_SYNC_INFO_
 {
+	
+	PVRSRV_SYNC_DATA		*psSyncData;
 
-	PVRSRV_SYNC_DATA			*psSyncData;
-
-
-
+	
 
 
+	
 	IMG_DEV_VIRTADDR		sWriteOpsCompleteDevVAddr;
 
-
+	
 	IMG_DEV_VIRTADDR		sReadOpsCompleteDevVAddr;
 
+	
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hMappingInfo;
 
+	
+	IMG_SID					hKernelSyncInfo;
+#else
 	IMG_HANDLE					hMappingInfo;
 
-
+	
 	IMG_HANDLE					hKernelSyncInfo;
+#endif
 
 } PVRSRV_CLIENT_SYNC_INFO, *PPVRSRV_CLIENT_SYNC_INFO;
 
 typedef struct PVRSRV_RESOURCE_TAG
 {
 	volatile IMG_UINT32 ui32Lock;
-	IMG_UINT32			ui32ID;
+	IMG_UINT32 			ui32ID;
 }PVRSRV_RESOURCE;
 typedef PVRSRV_RESOURCE PVRSRV_RES_HANDLE;
 
@@ -700,52 +717,52 @@ typedef struct DISPLAY_DIMS_TAG
 
 typedef struct DISPLAY_FORMAT_TAG
 {
-
+	
 	PVRSRV_PIXEL_FORMAT		pixelformat;
 } DISPLAY_FORMAT;
 
 typedef struct DISPLAY_SURF_ATTRIBUTES_TAG
 {
-
+	
 	PVRSRV_PIXEL_FORMAT		pixelformat;
-
+	
 	DISPLAY_DIMS			sDims;
 } DISPLAY_SURF_ATTRIBUTES;
 
 
 typedef struct DISPLAY_MODE_INFO_TAG
 {
-
+	
 	PVRSRV_PIXEL_FORMAT		pixelformat;
-
+	
 	DISPLAY_DIMS			sDims;
-
+	
 	IMG_UINT32				ui32RefreshHZ;
-
+	
 	IMG_UINT32				ui32OEMFlags;
 } DISPLAY_MODE_INFO;
 
 
 
-#define MAX_DISPLAY_NAME_SIZE	(50)
+#define MAX_DISPLAY_NAME_SIZE	(50) 
 
 typedef struct DISPLAY_INFO_TAG
 {
-
+	
 	IMG_UINT32 ui32MaxSwapChains;
-
+	
 	IMG_UINT32 ui32MaxSwapChainBuffers;
-
+	
 	IMG_UINT32 ui32MinSwapInterval;
-
+	
 	IMG_UINT32 ui32MaxSwapInterval;
-
+	
 	IMG_UINT32 ui32PhysicalWidthmm;
 	IMG_UINT32 ui32PhysicalHeightmm;
-
+	
 	IMG_CHAR	szDisplayName[MAX_DISPLAY_NAME_SIZE];
 #if defined(SUPPORT_HW_CURSOR)
-
+	
 	IMG_UINT16	ui32CursorWidth;
 	IMG_UINT16	ui32CursorHeight;
 #endif
@@ -754,9 +771,9 @@ typedef struct DISPLAY_INFO_TAG
 typedef struct ACCESS_INFO_TAG
 {
 	IMG_UINT32		ui32Size;
-	IMG_UINT32	ui32FBPhysBaseAddress;
-	IMG_UINT32		ui32FBMemAvailable;
-	IMG_UINT32	ui32SysPhysBaseAddress;
+	IMG_UINT32  	ui32FBPhysBaseAddress;
+	IMG_UINT32		ui32FBMemAvailable;			
+	IMG_UINT32  	ui32SysPhysBaseAddress;
 	IMG_UINT32		ui32SysSize;
 	IMG_UINT32		ui32DevIRQ;
 }ACCESS_INFO;
@@ -769,11 +786,11 @@ typedef struct PVRSRV_CURSOR_SHAPE_TAG
 	IMG_INT16			i16XHot;
 	IMG_INT16			i16YHot;
 
+	
+	IMG_VOID*   		pvMask;
+	IMG_INT16  			i16MaskByteStride;
 
-	IMG_VOID*		pvMask;
-	IMG_INT16			i16MaskByteStride;
-
-
+	
 	IMG_VOID*			pvColour;
 	IMG_INT16			i16ColourByteStride;
 	PVRSRV_PIXEL_FORMAT	eColourPixelFormat;
@@ -786,20 +803,20 @@ typedef struct PVRSRV_CURSOR_SHAPE_TAG
 
 typedef struct PVRSRV_CURSOR_INFO_TAG
 {
-
+	
 	IMG_UINT32 ui32Flags;
 
-
+	
 	IMG_BOOL bVisible;
 
-
+	
 	IMG_INT16 i16XPos;
 	IMG_INT16 i16YPos;
 
-
+	
 	PVRSRV_CURSOR_SHAPE sCursorShape;
 
-
+	
 	IMG_UINT32 ui32Rotation;
 
 } PVRSRV_CURSOR_INFO;
@@ -807,13 +824,14 @@ typedef struct PVRSRV_CURSOR_INFO_TAG
 #if defined(PDUMP_SUSPEND_IS_PER_THREAD)
 typedef struct {
 	IMG_UINT32 threadId;
-	int suspendCount;
+	IMG_INT    suspendCount;
 } PVRSRV_THREAD_SUSPEND_COUNT;
 
 #define PVRSRV_PDUMP_SUSPEND_Q_NAME "PVRSRVPDumpSuspendMsgQ"
 #define PVRSRV_PDUMP_SUSPEND_Q_LENGTH 8
 
-#endif
+#endif 
+
 
 typedef struct _PVRSRV_REGISTRY_INFO_
 {
@@ -835,11 +853,11 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVWriteRegistryString (PPVRSRV_REGISTRY_INFO psReg
 #define PVRSRV_BC_FLAGS_YUVCSC_BT601			(0 << 1)
 #define PVRSRV_BC_FLAGS_YUVCSC_BT709			(1 << 1)
 
-#define MAX_BUFFER_DEVICE_NAME_SIZE	(50)
+#define MAX_BUFFER_DEVICE_NAME_SIZE	(50) 
 
 typedef struct BUFFER_INFO_TAG
 {
-	IMG_UINT32			ui32BufferCount;
+	IMG_UINT32 			ui32BufferCount;
 	IMG_UINT32			ui32BufferDeviceID;
 	PVRSRV_PIXEL_FORMAT	pixelformat;
 	IMG_UINT32			ui32ByteStride;
@@ -857,4 +875,4 @@ typedef enum _OVERLAY_DEINTERLACE_MODE_
 	BOB_EVEN_NONINTERLEAVED
 } OVERLAY_DEINTERLACE_MODE;
 
-#endif
+#endif 
diff --git a/drivers/gpu/pvr/servicesint.h b/drivers/gpu/pvr/servicesint.h
index bc5aeb8dc0b..de404249054 100644
--- a/drivers/gpu/pvr/servicesint.h
+++ b/drivers/gpu/pvr/servicesint.h
@@ -68,7 +68,7 @@ typedef struct _PVRSRV_KERNEL_MEM_INFO_
 	IMG_UINT32				ui32Flags;
 
 	
-	IMG_SIZE_T				ui32AllocSize;
+	IMG_SIZE_T				uAllocSize;
 
 	
 	PVRSRV_MEMBLK			sMemBlk;
@@ -97,6 +97,31 @@ typedef struct _PVRSRV_KERNEL_MEM_INFO_
 	struct _PVRSRV_KERNEL_SYNC_INFO_	*psKernelSyncInfo;
 
 	PVRSRV_MEMTYPE				memType;
+
+    
+
+
+
+
+
+
+	struct {
+        
+
+		IMG_BOOL bInUse;
+
+        
+		IMG_HANDLE hDevCookieInt;
+
+        
+		IMG_UINT32 ui32ShareIndex;
+
+        
+
+		IMG_UINT32 ui32OrigReqAttribs;
+		IMG_UINT32 ui32OrigReqSize;
+		IMG_UINT32 ui32OrigReqAlignment;
+	} sShareMemWorkaround;
 } PVRSRV_KERNEL_MEM_INFO;
 
 
@@ -120,6 +145,9 @@ typedef struct _PVRSRV_KERNEL_SYNC_INFO_
 
 	
 	IMG_HANDLE hResItem;
+
+	
+	IMG_UINT32		ui32UID;
 } PVRSRV_KERNEL_SYNC_INFO;
 
 typedef struct _PVRSRV_DEVICE_SYNC_OBJECT_
@@ -141,14 +169,14 @@ typedef struct _PVRSRV_SYNC_OBJECT
 
 typedef struct _PVRSRV_COMMAND
 {
-	IMG_SIZE_T			ui32CmdSize;		
+	IMG_SIZE_T			uCmdSize;		
 	IMG_UINT32			ui32DevIndex;		
 	IMG_UINT32			CommandType;		
 	IMG_UINT32			ui32DstSyncCount;	
 	IMG_UINT32			ui32SrcSyncCount;	
 	PVRSRV_SYNC_OBJECT	*psDstSync;			
 	PVRSRV_SYNC_OBJECT	*psSrcSync;			
-	IMG_SIZE_T			ui32DataSize;		
+	IMG_SIZE_T			uDataSize;		
 	IMG_UINT32			ui32ProcessID;		
 	IMG_VOID			*pvData;			
 }PVRSRV_COMMAND, *PPVRSRV_COMMAND;
@@ -171,6 +199,75 @@ typedef struct _PVRSRV_QUEUE_INFO_
 	struct _PVRSRV_QUEUE_INFO_ *psNextKM;		
 }PVRSRV_QUEUE_INFO;
 
+
+typedef struct _PVRSRV_HEAP_INFO_KM_
+{
+	IMG_UINT32			ui32HeapID;
+	IMG_DEV_VIRTADDR	sDevVAddrBase;
+
+	IMG_HANDLE 			hDevMemHeap;
+	IMG_UINT32			ui32HeapByteSize;
+	IMG_UINT32			ui32Attribs;
+	IMG_UINT32			ui32XTileStride;
+}PVRSRV_HEAP_INFO_KM;
+
+
+typedef struct _PVRSRV_EVENTOBJECT_KM_
+{
+	
+	IMG_CHAR	szName[EVENTOBJNAME_MAXLENGTH];
+	
+	IMG_HANDLE	hOSEventKM;
+
+} PVRSRV_EVENTOBJECT_KM;
+
+
+typedef struct _PVRSRV_MISC_INFO_KM_
+{
+	IMG_UINT32	ui32StateRequest;		
+	IMG_UINT32	ui32StatePresent;		
+
+	
+	IMG_VOID	*pvSOCTimerRegisterKM;
+	IMG_VOID	*pvSOCTimerRegisterUM;
+	IMG_HANDLE	hSOCTimerRegisterOSMemHandle;
+	IMG_HANDLE	hSOCTimerRegisterMappingInfo;
+
+	
+	IMG_VOID	*pvSOCClockGateRegs;
+	IMG_UINT32	ui32SOCClockGateRegsSize;
+
+	
+	IMG_CHAR	*pszMemoryStr;
+	IMG_UINT32	ui32MemoryStrLen;
+
+	
+	PVRSRV_EVENTOBJECT_KM	sGlobalEventObject;
+	IMG_HANDLE				hOSGlobalEvent;
+
+	
+	IMG_UINT32	aui32DDKVersion[4];
+
+	
+	struct
+	{
+		
+		IMG_BOOL bDeferOp;
+
+		
+		PVRSRV_MISC_INFO_CPUCACHEOP_TYPE eCacheOpType;
+
+		PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
+
+		
+		IMG_VOID *pvBaseVAddr;
+
+		
+		IMG_UINT32	ui32Length;
+	} sCacheOpCtl;
+} PVRSRV_MISC_INFO_KM;
+
+
 typedef PVRSRV_ERROR (*PFN_INSERT_CMD) (PVRSRV_QUEUE_INFO*,
 										PVRSRV_COMMAND**,
 										IMG_UINT32,
@@ -190,13 +287,17 @@ typedef struct PVRSRV_DEVICECLASS_BUFFER_TAG
 	IMG_HANDLE				hExtDevice;
 	IMG_HANDLE				hExtBuffer;
 	PVRSRV_KERNEL_SYNC_INFO	*psKernelSyncInfo;
-
+	IMG_UINT32				ui32MemMapRefCount;
 } PVRSRV_DEVICECLASS_BUFFER;
 
 
 typedef struct PVRSRV_CLIENT_DEVICECLASS_INFO_TAG
 {
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID     hDeviceKM;
+#else
 	IMG_HANDLE hDeviceKM;
+#endif
 	IMG_HANDLE	hServices;
 } PVRSRV_CLIENT_DEVICECLASS_INFO;
 
@@ -252,7 +353,11 @@ PVRSRV_ERROR PVRSRVQueueCommand(IMG_HANDLE hQueueInfo,
 
 IMG_IMPORT PVRSRV_ERROR IMG_CALLCONV
 PVRSRVGetMMUContextPDDevPAddr(const PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+                              IMG_SID hDevMemContext,
+#else
                               IMG_HANDLE hDevMemContext,
+#endif
                               IMG_DEV_PHYADDR *sPDDevPAddr);
 
 IMG_IMPORT PVRSRV_ERROR IMG_CALLCONV
@@ -271,7 +376,11 @@ PVRSRVUnrefSharedSysMem(const PVRSRV_CONNECTION *psConnection,
 
 IMG_IMPORT PVRSRV_ERROR IMG_CALLCONV
 PVRSRVMapMemInfoMem(const PVRSRV_CONNECTION *psConnection,
+#if defined (SUPPORT_SID_INTERFACE)
+                    IMG_SID hKernelMemInfo,
+#else
                     IMG_HANDLE hKernelMemInfo,
+#endif
                     PVRSRV_CLIENT_MEM_INFO **ppsClientMemInfo);
 
 
diff --git a/drivers/gpu/pvr/sgx/bridged_sgx_bridge.c b/drivers/gpu/pvr/sgx/bridged_sgx_bridge.c
index e1b73201a12..c1d6979e3a3 100644
--- a/drivers/gpu/pvr/sgx/bridged_sgx_bridge.c
+++ b/drivers/gpu/pvr/sgx/bridged_sgx_bridge.c
@@ -40,6 +40,7 @@
 #include "power.h"
 #include "pvr_bridge_km.h"
 #include "sgx_bridge_km.h"
+#include "sgx_options.h"
 
 #if defined(SUPPORT_MSVDX)
 	#include "msvdx_bridge.h"
@@ -61,7 +62,8 @@ SGXGetClientInfoBW(IMG_UINT32 ui32BridgeID,
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_GETCLIENTINFO);
 
 	psGetClientInfoOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
+		PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDevCookieInt,
 						   psGetClientInfoIN->hDevCookie,
 						   PVRSRV_HANDLE_TYPE_DEV_NODE);
 	if(psGetClientInfoOUT->eError != PVRSRV_OK)
@@ -87,7 +89,8 @@ SGXReleaseClientInfoBW(IMG_UINT32 ui32BridgeID,
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_RELEASECLIENTINFO);
 
 	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
+		PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDevCookieInt,
 						   psReleaseClientInfoIN->hDevCookie,
 						   PVRSRV_HANDLE_TYPE_DEV_NODE);
 	if(psRetOUT->eError != PVRSRV_OK)
@@ -99,8 +102,12 @@ SGXReleaseClientInfoBW(IMG_UINT32 ui32BridgeID,
 
 	PVR_ASSERT(psDevInfo->ui32ClientRefCount > 0);
 
-	psDevInfo->ui32ClientRefCount--;
-
+	
+	if (psDevInfo->ui32ClientRefCount > 0)
+	{
+		psDevInfo->ui32ClientRefCount--;
+	}
+	
 	psRetOUT->eError = PVRSRV_OK;
 
 	return 0;
@@ -114,11 +121,15 @@ SGXGetInternalDevInfoBW(IMG_UINT32 ui32BridgeID,
 						PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
 	IMG_HANDLE hDevCookieInt;
+#if defined (SUPPORT_SID_INTERFACE)
+	SGX_INTERNAL_DEVINFO_KM sSGXInternalDevInfo;
+#endif
 
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_GETINTERNALDEVINFO);
 
 	psSGXGetInternalDevInfoOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
+		PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDevCookieInt,
 						   psSGXGetInternalDevInfoIN->hDevCookie,
 						   PVRSRV_HANDLE_TYPE_DEV_NODE);
 	if(psSGXGetInternalDevInfoOUT->eError != PVRSRV_OK)
@@ -128,13 +139,21 @@ SGXGetInternalDevInfoBW(IMG_UINT32 ui32BridgeID,
 
 	psSGXGetInternalDevInfoOUT->eError =
 		SGXGetInternalDevInfoKM(hDevCookieInt,
+#if defined (SUPPORT_SID_INTERFACE)
+								&sSGXInternalDevInfo);
+#else
 								&psSGXGetInternalDevInfoOUT->sSGXInternalDevInfo);
+#endif
 
 	
 	psSGXGetInternalDevInfoOUT->eError =
 		PVRSRVAllocHandle(psPerProc->psHandleBase,
 						  &psSGXGetInternalDevInfoOUT->sSGXInternalDevInfo.hHostCtlKernelMemInfoHandle,
+#if defined (SUPPORT_SID_INTERFACE)
+						  sSGXInternalDevInfo.hHostCtlKernelMemInfoHandle,
+#else
 						  psSGXGetInternalDevInfoOUT->sSGXInternalDevInfo.hHostCtlKernelMemInfoHandle,
+#endif
 						  PVRSRV_HANDLE_TYPE_MEM_INFO,
 						  PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
 
@@ -152,7 +171,12 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 	IMG_UINT32 i;
 	IMG_INT ret = 0;
 	IMG_UINT32 ui32NumDstSyncs;
+#if defined (SUPPORT_SID_INTERFACE)
+	SGX_CCB_KICK_KM sCCBKickKM = {{0}};
+	IMG_HANDLE	ahSyncInfoHandles[16];
+#else
 	IMG_HANDLE *phKernelSyncInfoHandles = IMG_NULL;
+#endif
 
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_DOKICK);
 
@@ -169,7 +193,11 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 
 	psRetOUT->eError =
 		PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &sCCBKickKM.hCCBKernelMemInfo,
+#else
 						   &psDoKickIN->sCCBKick.hCCBKernelMemInfo,
+#endif
 						   psDoKickIN->sCCBKick.hCCBKernelMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 
@@ -178,11 +206,24 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 		return 0;
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	if (psDoKickIN->sCCBKick.ui32NumDstSyncObjects > 16)
+	{
+		return 0;
+	}
+			
+	if(psDoKickIN->sCCBKick.hTA3DSyncInfo != 0)
+#else
 	if(psDoKickIN->sCCBKick.hTA3DSyncInfo != IMG_NULL)
+#endif
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sCCBKickKM.hTA3DSyncInfo,
+#else
 							   &psDoKickIN->sCCBKick.hTA3DSyncInfo,
+#endif
 							   psDoKickIN->sCCBKick.hTA3DSyncInfo,
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 
@@ -192,11 +233,19 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 		}
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	if(psDoKickIN->sCCBKick.hTASyncInfo != 0)
+#else
 	if(psDoKickIN->sCCBKick.hTASyncInfo != IMG_NULL)
+#endif
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sCCBKickKM.hTASyncInfo,
+#else
 							   &psDoKickIN->sCCBKick.hTASyncInfo,
+#endif
 							   psDoKickIN->sCCBKick.hTASyncInfo,
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 
@@ -206,11 +255,33 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 		}
 	}
 
+#if defined(FIX_HW_BRN_31620)
+	
+	psRetOUT->eError =
+		PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &psDoKickIN->sCCBKick.hDevMemContext,
+						   psDoKickIN->sCCBKick.hDevMemContext,
+						   PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+
+	if(psRetOUT->eError != PVRSRV_OK)
+	{
+		return 0;
+	}
+#endif
+
+#if defined (SUPPORT_SID_INTERFACE)
+	if(psDoKickIN->sCCBKick.h3DSyncInfo != 0)
+#else
 	if(psDoKickIN->sCCBKick.h3DSyncInfo != IMG_NULL)
+#endif
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sCCBKickKM.h3DSyncInfo,
+#else
 							   &psDoKickIN->sCCBKick.h3DSyncInfo,
+#endif
 							   psDoKickIN->sCCBKick.h3DSyncInfo,
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 
@@ -229,11 +300,18 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 		return 0;
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	sCCBKickKM.ui32NumTASrcSyncs = psDoKickIN->sCCBKick.ui32NumTASrcSyncs;
+#endif
 	for(i=0; i<psDoKickIN->sCCBKick.ui32NumTASrcSyncs; i++)
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sCCBKickKM.ahTASrcKernelSyncInfo[i],
+#else
 							   &psDoKickIN->sCCBKick.ahTASrcKernelSyncInfo[i],
+#endif
 							   psDoKickIN->sCCBKick.ahTASrcKernelSyncInfo[i],
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 
@@ -249,11 +327,18 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 		return 0;
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	sCCBKickKM.ui32NumTADstSyncs = psDoKickIN->sCCBKick.ui32NumTADstSyncs;
+#endif
 	for(i=0; i<psDoKickIN->sCCBKick.ui32NumTADstSyncs; i++)
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sCCBKickKM.ahTADstKernelSyncInfo[i],
+#else
 							   &psDoKickIN->sCCBKick.ahTADstKernelSyncInfo[i],
+#endif
 							   psDoKickIN->sCCBKick.ahTADstKernelSyncInfo[i],
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 
@@ -269,11 +354,18 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 		return 0;
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	sCCBKickKM.ui32Num3DSrcSyncs = psDoKickIN->sCCBKick.ui32Num3DSrcSyncs;
+#endif
 	for(i=0; i<psDoKickIN->sCCBKick.ui32Num3DSrcSyncs; i++)
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sCCBKickKM.ah3DSrcKernelSyncInfo[i],
+#else
 							   &psDoKickIN->sCCBKick.ah3DSrcKernelSyncInfo[i],
+#endif
 							   psDoKickIN->sCCBKick.ah3DSrcKernelSyncInfo[i],
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 
@@ -289,11 +381,19 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 		psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
 		return 0;
 	}
+
+#if defined (SUPPORT_SID_INTERFACE)
+	sCCBKickKM.ui32NumSrcSyncs = psDoKickIN->sCCBKick.ui32NumSrcSyncs;
+#endif
 	for(i=0; i<psDoKickIN->sCCBKick.ui32NumSrcSyncs; i++)
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sCCBKickKM.ahSrcKernelSyncInfo[i],
+#else
 							   &psDoKickIN->sCCBKick.ahSrcKernelSyncInfo[i],
+#endif
 							   psDoKickIN->sCCBKick.ahSrcKernelSyncInfo[i],
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 
@@ -314,12 +414,25 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 		psRetOUT->eError =
 #if defined(SUPPORT_SGX_NEW_STATUS_VALS)
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sCCBKickKM.asTAStatusUpdate[i].hKernelMemInfo,
+#else
 							   &psDoKickIN->sCCBKick.asTAStatusUpdate[i].hKernelMemInfo,
+#endif
 							   psDoKickIN->sCCBKick.asTAStatusUpdate[i].hKernelMemInfo,
 							   PVRSRV_HANDLE_TYPE_MEM_INFO);
+
+#if defined (SUPPORT_SID_INTERFACE)
+		sCCBKickKM.asTAStatusUpdate[i].sCtlStatus = psDoKickIN->sCCBKick.asTAStatusUpdate[i].sCtlStatus;
+#endif
+
 #else
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sCCBKickKM.ahTAStatusSyncInfo[i],
+#else
 							   &psDoKickIN->sCCBKick.ahTAStatusSyncInfo[i],
+#endif
 							   psDoKickIN->sCCBKick.ahTAStatusSyncInfo[i],
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 #endif
@@ -339,12 +452,24 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 		psRetOUT->eError =
 #if defined(SUPPORT_SGX_NEW_STATUS_VALS)
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sCCBKickKM.as3DStatusUpdate[i].hKernelMemInfo,
+#else
 							   &psDoKickIN->sCCBKick.as3DStatusUpdate[i].hKernelMemInfo,
+#endif
 							   psDoKickIN->sCCBKick.as3DStatusUpdate[i].hKernelMemInfo,
 							   PVRSRV_HANDLE_TYPE_MEM_INFO);
+							   
+#if defined (SUPPORT_SID_INTERFACE)
+		sCCBKickKM.as3DStatusUpdate[i].sCtlStatus = psDoKickIN->sCCBKick.as3DStatusUpdate[i].sCtlStatus;
+#endif
 #else
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sCCBKickKM.ah3DStatusSyncInfo[i],
+#else
 							   &psDoKickIN->sCCBKick.ah3DStatusSyncInfo[i],
+#endif
 							   psDoKickIN->sCCBKick.ah3DStatusSyncInfo[i],
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 #endif
@@ -378,6 +503,9 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 			return 0;
 		}
 
+#if defined (SUPPORT_SID_INTERFACE)
+		sCCBKickKM.pahDstSyncHandles = phKernelSyncInfoHandles;
+#else
 		if(CopyFromUserWrapper(psPerProc,
 							ui32BridgeID,
 							phKernelSyncInfoHandles,
@@ -390,12 +518,17 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 
 		
 		psDoKickIN->sCCBKick.pahDstSyncHandles = phKernelSyncInfoHandles;
+#endif
 
 		for( i = 0; i < ui32NumDstSyncs; i++)
 		{
 			psRetOUT->eError =
 				PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+									&sCCBKickKM.pahDstSyncHandles[i],
+#else
 									&psDoKickIN->sCCBKick.pahDstSyncHandles[i],
+#endif
 									psDoKickIN->sCCBKick.pahDstSyncHandles[i],
 									PVRSRV_HANDLE_TYPE_SYNC_INFO);
 
@@ -408,7 +541,11 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 
 		psRetOUT->eError =
 					PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+									   &sCCBKickKM.hKernelHWSyncListMemInfo,
+#else
 									   &psDoKickIN->sCCBKick.hKernelHWSyncListMemInfo,
+#endif
 									   psDoKickIN->sCCBKick.hKernelHWSyncListMemInfo,
 									   PVRSRV_HANDLE_TYPE_MEM_INFO);
 
@@ -418,9 +555,34 @@ SGXDoKickBW(IMG_UINT32 ui32BridgeID,
 		}
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	OSMemCopy(&sCCBKickKM.sCommand, &psDoKickIN->sCCBKick.sCommand, sizeof(sCCBKickKM.sCommand));
+
+	sCCBKickKM.ui32NumDstSyncObjects = psDoKickIN->sCCBKick.ui32NumDstSyncObjects;
+	sCCBKickKM.ui32NumTAStatusVals   = psDoKickIN->sCCBKick.ui32NumTAStatusVals;
+	sCCBKickKM.ui32Num3DStatusVals   = psDoKickIN->sCCBKick.ui32Num3DStatusVals;
+	sCCBKickKM.bFirstKickOrResume    = psDoKickIN->sCCBKick.bFirstKickOrResume;
+	sCCBKickKM.ui32CCBOffset         = psDoKickIN->sCCBKick.ui32CCBOffset;
+	sCCBKickKM.bTADependency         = psDoKickIN->sCCBKick.bTADependency;
+
+#if (defined(NO_HARDWARE) || defined(PDUMP))
+	sCCBKickKM.bTerminateOrAbort = psDoKickIN->sCCBKick.bTerminateOrAbort;
+#endif
+#if defined(PDUMP)
+	sCCBKickKM.ui32CCBDumpWOff = psDoKickIN->sCCBKick.ui32CCBDumpWOff;
+#endif
+
+#if defined(NO_HARDWARE)
+	sCCBKickKM.ui32WriteOpsPendingVal = psDoKickIN->sCCBKick.ui32WriteOpsPendingVal;
+#endif
+#endif 
 	psRetOUT->eError =
 		SGXDoKickKM(hDevCookieInt,
+#if defined (SUPPORT_SID_INTERFACE)
+					&sCCBKickKM);
+#else
 					&psDoKickIN->sCCBKick);
+#endif
 
 PVRSRV_BRIDGE_SGX_DOKICK_RETURN_RESULT:
 
@@ -472,6 +634,9 @@ SGXSubmitTransferBW(IMG_UINT32 ui32BridgeID,
 {
 	IMG_HANDLE hDevCookieInt;
 	PVRSRV_TRANSFER_SGX_KICK *psKick;
+#if defined (SUPPORT_SID_INTERFACE)
+	PVRSRV_TRANSFER_SGX_KICK_KM sKickKM = {0};
+#endif
 	IMG_UINT32 i;
 
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_SUBMITTRANSFER);
@@ -479,6 +644,20 @@ SGXSubmitTransferBW(IMG_UINT32 ui32BridgeID,
 
 	psKick = &psSubmitTransferIN->sKick;
 
+#if defined(FIX_HW_BRN_31620)
+	
+	psRetOUT->eError =
+		PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &psKick->hDevMemContext,
+						   psKick->hDevMemContext,
+						   PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+
+	if(psRetOUT->eError != PVRSRV_OK)
+	{
+		return 0;
+	}
+#endif
+
 	psRetOUT->eError =
 		PVRSRVLookupHandle(psPerProc->psHandleBase,
 						   &hDevCookieInt,
@@ -491,7 +670,11 @@ SGXSubmitTransferBW(IMG_UINT32 ui32BridgeID,
 
 	psRetOUT->eError =
 		PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &sKickKM.hCCBMemInfo,
+#else
 						   &psKick->hCCBMemInfo,
+#endif
 						   psKick->hCCBMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if(psRetOUT->eError != PVRSRV_OK)
@@ -503,7 +686,11 @@ SGXSubmitTransferBW(IMG_UINT32 ui32BridgeID,
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sKickKM.hTASyncInfo,
+#else
 							   &psKick->hTASyncInfo,
+#endif
 							   psKick->hTASyncInfo,
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 		if(psRetOUT->eError != PVRSRV_OK)
@@ -516,7 +703,11 @@ SGXSubmitTransferBW(IMG_UINT32 ui32BridgeID,
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sKickKM.h3DSyncInfo,
+#else
 							   &psKick->h3DSyncInfo,
+#endif
 							   psKick->h3DSyncInfo,
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 		if(psRetOUT->eError != PVRSRV_OK)
@@ -534,7 +725,11 @@ SGXSubmitTransferBW(IMG_UINT32 ui32BridgeID,
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sKickKM.ahSrcSyncInfo[i],
+#else
 							   &psKick->ahSrcSyncInfo[i],
+#endif
 							   psKick->ahSrcSyncInfo[i],
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 		if(psRetOUT->eError != PVRSRV_OK)
@@ -552,7 +747,11 @@ SGXSubmitTransferBW(IMG_UINT32 ui32BridgeID,
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sKickKM.ahDstSyncInfo[i],
+#else
 							   &psKick->ahDstSyncInfo[i],
+#endif
 							   psKick->ahDstSyncInfo[i],
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 		if(psRetOUT->eError != PVRSRV_OK)
@@ -561,7 +760,21 @@ SGXSubmitTransferBW(IMG_UINT32 ui32BridgeID,
 		}
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	sKickKM.sHWTransferContextDevVAddr = psKick->sHWTransferContextDevVAddr;
+	sKickKM.ui32SharedCmdCCBOffset = psKick->ui32SharedCmdCCBOffset;
+	sKickKM.ui32NumSrcSync         = psKick->ui32NumSrcSync;
+	sKickKM.ui32NumDstSync         = psKick->ui32NumDstSync;
+	sKickKM.ui32Flags              = psKick->ui32Flags;
+	sKickKM.ui32PDumpFlags         = psKick->ui32PDumpFlags;
+#if defined(PDUMP)
+	sKickKM.ui32CCBDumpWOff        = psKick->ui32CCBDumpWOff;
+#endif
+
+	psRetOUT->eError = SGXSubmitTransferKM(hDevCookieInt, &sKickKM);
+#else
 	psRetOUT->eError = SGXSubmitTransferKM(hDevCookieInt, psKick);
+#endif
 
 	return 0;
 }
@@ -575,12 +788,32 @@ SGXSubmit2DBW(IMG_UINT32 ui32BridgeID,
 			PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
 	IMG_HANDLE hDevCookieInt;
-	PVRSRV_2D_SGX_KICK *psKick;
+	PVRSRV_2D_SGX_KICK   *psKick;
+#if defined (SUPPORT_SID_INTERFACE)
+	PVRSRV_2D_SGX_KICK_KM sKickKM;
+#endif
 	IMG_UINT32 i;
 
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_SUBMIT2D);
 	PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
 
+	psKick = &psSubmit2DIN->sKick;
+
+#if defined(FIX_HW_BRN_31620)
+	
+	psRetOUT->eError =
+		PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &psKick->hDevMemContext,
+						   psKick->hDevMemContext,
+						   PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+
+	if(psRetOUT->eError != PVRSRV_OK)
+	{
+		return 0;
+	}
+#endif
+
+
 	psRetOUT->eError =
 		PVRSRVLookupHandle(psPerProc->psHandleBase,
 						   &hDevCookieInt,
@@ -592,11 +825,14 @@ SGXSubmit2DBW(IMG_UINT32 ui32BridgeID,
 		return 0;
 	}
 
-	psKick = &psSubmit2DIN->sKick;
 
 	psRetOUT->eError =
 		PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &sKickKM.hCCBMemInfo,
+#else
 						   &psKick->hCCBMemInfo,
+#endif
 						   psKick->hCCBMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if(psRetOUT->eError != PVRSRV_OK)
@@ -604,11 +840,19 @@ SGXSubmit2DBW(IMG_UINT32 ui32BridgeID,
 		return 0;
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	if (psKick->hTASyncInfo != 0)
+#else
 	if (psKick->hTASyncInfo != IMG_NULL)
+#endif
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sKickKM.hTASyncInfo,
+#else
 							   &psKick->hTASyncInfo,
+#endif
 							   psKick->hTASyncInfo,
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 		if(psRetOUT->eError != PVRSRV_OK)
@@ -616,12 +860,22 @@ SGXSubmit2DBW(IMG_UINT32 ui32BridgeID,
 			return 0;
 		}
 	}
+#if defined (SUPPORT_SID_INTERFACE)
+	else
+	{
+		sKickKM.hTASyncInfo = IMG_NULL;
+	}
+#endif
 
 	if (psKick->h3DSyncInfo != IMG_NULL)
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sKickKM.h3DSyncInfo,
+#else
 							   &psKick->h3DSyncInfo,
+#endif
 							   psKick->h3DSyncInfo,
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 		if(psRetOUT->eError != PVRSRV_OK)
@@ -629,12 +883,39 @@ SGXSubmit2DBW(IMG_UINT32 ui32BridgeID,
 			return 0;
 		}
 	}
+#if defined (SUPPORT_SID_INTERFACE)
+	else
+	{
+		sKickKM.h3DSyncInfo = IMG_NULL;
+	}
+#endif
 
 	if (psKick->ui32NumSrcSync > SGX_MAX_2D_SRC_SYNC_OPS)
 	{
 		psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
 		return 0;
 	}
+#if defined (SUPPORT_SID_INTERFACE)
+	for (i = 0; i < SGX_MAX_2D_SRC_SYNC_OPS; i++)
+	{
+		if (i < psKick->ui32NumSrcSync)
+		{
+			psRetOUT->eError =
+				PVRSRVLookupHandle(psPerProc->psHandleBase,
+								   &sKickKM.ahSrcSyncInfo[i],
+								   psKick->ahSrcSyncInfo[i],
+								   PVRSRV_HANDLE_TYPE_SYNC_INFO);
+			if(psRetOUT->eError != PVRSRV_OK)
+			{
+				return 0;
+			}
+		}
+		else
+		{
+			sKickKM.ahSrcSyncInfo[i] = IMG_NULL;
+		}
+	}
+#else
 	for (i = 0; i < psKick->ui32NumSrcSync; i++)
 	{
 		psRetOUT->eError =
@@ -647,12 +928,17 @@ SGXSubmit2DBW(IMG_UINT32 ui32BridgeID,
 			return 0;
 		}
 	}
+#endif
 
 	if (psKick->hDstSyncInfo != IMG_NULL)
 	{
 		psRetOUT->eError =
 			PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &sKickKM.hDstSyncInfo,
+#else
 							   &psKick->hDstSyncInfo,
+#endif
 							   psKick->hDstSyncInfo,
 							   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 		if(psRetOUT->eError != PVRSRV_OK)
@@ -660,9 +946,28 @@ SGXSubmit2DBW(IMG_UINT32 ui32BridgeID,
 			return 0;
 		}
 	}
+#if defined (SUPPORT_SID_INTERFACE)
+	else
+	{
+		sKickKM.hDstSyncInfo = IMG_NULL;
+	}
+
+	
+	sKickKM.ui32SharedCmdCCBOffset = psKick->ui32SharedCmdCCBOffset;
+	sKickKM.ui32NumSrcSync         = psKick->ui32NumSrcSync;
+	sKickKM.ui32PDumpFlags         = psKick->ui32PDumpFlags;
+	sKickKM.sHW2DContextDevVAddr   = psKick->sHW2DContextDevVAddr;
+#if defined(PDUMP)
+	sKickKM.ui32CCBDumpWOff        = psKick->ui32CCBDumpWOff;
+#endif
+#endif
 
 	psRetOUT->eError =
+#if defined (SUPPORT_SID_INTERFACE)
+		SGXSubmit2DKM(hDevCookieInt, &sKickKM);
+#else
 		SGXSubmit2DKM(hDevCookieInt, psKick);
+#endif
 
 	return 0;
 }
@@ -767,7 +1072,7 @@ SGXReadHWPerfCBBW(IMG_UINT32							ui32BridgeID,
 
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_READ_HWPERF_CB);
 
-	psSGXReadHWPerfCBOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+	psSGXReadHWPerfCBOUT->eError =PVRSRVLookupHandle(psPerProc->psHandleBase,
 							&hDevCookieInt,
 							psSGXReadHWPerfCBIN->hDevCookie,
 							PVRSRV_HANDLE_TYPE_DEV_NODE);
@@ -814,31 +1119,41 @@ SGXReadHWPerfCBBW(IMG_UINT32							ui32BridgeID,
 static IMG_INT
 SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 				  PVRSRV_BRIDGE_IN_SGXDEVINITPART2 *psSGXDevInitPart2IN,
-				  PVRSRV_BRIDGE_RETURN *psRetOUT,
+				  PVRSRV_BRIDGE_OUT_SGXDEVINITPART2 *psSGXDevInitPart2OUT,
 				  PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
 	IMG_HANDLE hDevCookieInt;
+#if defined (SUPPORT_SID_INTERFACE)
+	PVRSRV_ERROR eError = PVRSRV_OK;
+#else
 	PVRSRV_ERROR eError;
+#endif
 	IMG_BOOL bDissociateFailed = IMG_FALSE;
 	IMG_BOOL bLookupFailed = IMG_FALSE;
 	IMG_BOOL bReleaseFailed = IMG_FALSE;
 	IMG_HANDLE hDummy;
 	IMG_UINT32 i;
+#if defined (SUPPORT_SID_INTERFACE)
+	SGX_BRIDGE_INIT_INFO_KM asInitInfoKM = {0};
+#endif
 
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_DEVINITPART2);
 
+	
+	psSGXDevInitPart2OUT->ui32KMBuildOptions = SGX_BUILD_OPTIONS;
+
 	if(!psPerProc->bInitProcess)
 	{
-		psRetOUT->eError = PVRSRV_ERROR_PROCESS_NOT_INITIALISED;
+		psSGXDevInitPart2OUT->eError = PVRSRV_ERROR_PROCESS_NOT_INITIALISED;
 		return 0;
 	}
 
-	psRetOUT->eError =
+	psSGXDevInitPart2OUT->eError =
 		PVRSRVLookupHandle(psPerProc->psHandleBase,
 						   &hDevCookieInt,
 						   psSGXDevInitPart2IN->hDevCookie,
 						   PVRSRV_HANDLE_TYPE_DEV_NODE);
-	if(psRetOUT->eError != PVRSRV_OK)
+	if(psSGXDevInitPart2OUT->eError != PVRSRV_OK)
 	{
 		return 0;
 	}
@@ -961,6 +1276,95 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 	}
 #endif
 
+
+#if defined(FIX_HW_BRN_31542)
+	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDummy,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAVDMStreamMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bLookupFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDummy,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAIndexStreamMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bLookupFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDummy,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPDSMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bLookupFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDummy,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAUSEMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bLookupFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDummy,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAParamMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bLookupFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDummy,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPMPTMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bLookupFailed = IMG_TRUE;
+	}
+	
+	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDummy,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWATPCMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bLookupFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDummy,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPSGRgnHdrMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bLookupFailed = IMG_TRUE;
+	}
+#endif
+
+#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31425)
+	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDummy,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelVDMSnapShotBufferMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bLookupFailed = IMG_TRUE;
+	}
+
+	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDummy,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelVDMCtrlStreamBufferMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bLookupFailed = IMG_TRUE;
+	}
+#endif
+
 #if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
 	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
 						   &hDummy,
@@ -985,9 +1389,17 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 
 	for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
 	{
+#if defined (SUPPORT_SID_INTERFACE)
+		IMG_SID hHandle = psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
+#else
 		IMG_HANDLE hHandle = psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
+#endif
 
+#if defined (SUPPORT_SID_INTERFACE)
+		if (hHandle == 0)
+#else
 		if (hHandle == IMG_NULL)
+#endif
 		{
 			continue;
 		}
@@ -1005,13 +1417,17 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 	if (bLookupFailed)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "DevInitSGXPart2BW: A handle lookup failed"));
-		psRetOUT->eError = PVRSRV_ERROR_INIT2_PHASE_FAILED;
+		psSGXDevInitPart2OUT->eError = PVRSRV_ERROR_INIT2_PHASE_FAILED;
 		return 0;
 	}
 
 	
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelCCBMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelCCBMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelCCBMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1020,7 +1436,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 	}
 
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelCCBCtlMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelCCBCtlMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelCCBCtlMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1029,7 +1449,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 	}
 
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelCCBEventKickerMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelCCBEventKickerMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelCCBEventKickerMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1039,7 +1463,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 
 
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelSGXHostCtlMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelSGXHostCtlMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelSGXHostCtlMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1048,7 +1476,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 	}
 
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelSGXTA3DCtlMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelSGXTA3DCtlMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelSGXTA3DCtlMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1057,7 +1489,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 	}
 
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelSGXMiscMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelSGXMiscMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelSGXMiscMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1066,9 +1502,13 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 	}
 
 
-	#if defined(SGX_SUPPORT_HWPROFILING)
+#if defined(SGX_SUPPORT_HWPROFILING)
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelHWProfilingMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelHWProfilingMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelHWProfilingMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1079,7 +1519,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 
 #if defined(SUPPORT_SGX_HWPERF)
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelHWPerfCBMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1089,7 +1533,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 #endif
 
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+										  &asInitInfoKM.hKernelTASigBufferMemInfo,
+#else
 										  &psSGXDevInitPart2IN->sInitInfo.hKernelTASigBufferMemInfo,
+#endif
 										  psSGXDevInitPart2IN->sInitInfo.hKernelTASigBufferMemInfo,
 										  PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1098,7 +1546,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 	}
 
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+										  &asInitInfoKM.hKernel3DSigBufferMemInfo,
+#else
 										  &psSGXDevInitPart2IN->sInitInfo.hKernel3DSigBufferMemInfo,
+#endif
 										  psSGXDevInitPart2IN->sInitInfo.hKernel3DSigBufferMemInfo,
 										  PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1108,7 +1560,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 
 #if defined(FIX_HW_BRN_29702)
 	eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelCFIMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelCFIMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelCFIMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1119,7 +1575,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 
 #if defined(FIX_HW_BRN_29823)
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelDummyTermStreamMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelDummyTermStreamMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelDummyTermStreamMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1128,9 +1588,132 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 	}
 #endif
 
+
+#if defined(FIX_HW_BRN_31542)
+	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelClearClipWAVDMStreamMemInfo,
+#else
+						   &psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAVDMStreamMemInfo,
+#endif
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAVDMStreamMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bReleaseFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelClearClipWAIndexStreamMemInfo,
+#else
+						   &psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAIndexStreamMemInfo,
+#endif
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAIndexStreamMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bReleaseFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelClearClipWAPDSMemInfo,
+#else
+						   &psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPDSMemInfo,
+#endif
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPDSMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bReleaseFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelClearClipWAUSEMemInfo,
+#else
+						   &psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAUSEMemInfo,
+#endif
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAUSEMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bReleaseFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelClearClipWAParamMemInfo,
+#else
+						   &psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAParamMemInfo,
+#endif
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAParamMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bReleaseFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelClearClipWAPMPTMemInfo,
+#else
+						   &psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPMPTMemInfo,
+#endif
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPMPTMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bReleaseFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelClearClipWATPCMemInfo,
+#else
+						   &psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWATPCMemInfo,
+#endif
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWATPCMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bReleaseFailed = IMG_TRUE;
+	}
+	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelClearClipWAPSGRgnHdrMemInfo,
+#else
+						   &psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPSGRgnHdrMemInfo,
+#endif
+						   psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPSGRgnHdrMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bReleaseFailed = IMG_TRUE;
+	}
+#endif
+#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31425)
+	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+						   &psSGXDevInitPart2IN->sInitInfo.hKernelVDMSnapShotBufferMemInfo,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelVDMSnapShotBufferMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bReleaseFailed = IMG_TRUE;
+	}
+
+	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+						   &psSGXDevInitPart2IN->sInitInfo.hKernelVDMCtrlStreamBufferMemInfo,
+						   psSGXDevInitPart2IN->sInitInfo.hKernelVDMCtrlStreamBufferMemInfo,
+						   PVRSRV_HANDLE_TYPE_MEM_INFO);
+	if (eError != PVRSRV_OK)
+	{
+		bReleaseFailed = IMG_TRUE;
+	}
+#endif
+
 #if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelEDMStatusBufferMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelEDMStatusBufferMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelEDMStatusBufferMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1141,7 +1724,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 
 #if defined(SGX_FEATURE_SPM_MODE_0)
 	eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+						   &asInitInfoKM.hKernelTmpDPMStateMemInfo,
+#else
 						   &psSGXDevInitPart2IN->sInitInfo.hKernelTmpDPMStateMemInfo,
+#endif
 						   psSGXDevInitPart2IN->sInitInfo.hKernelTmpDPMStateMemInfo,
 						   PVRSRV_HANDLE_TYPE_MEM_INFO);
 	if (eError != PVRSRV_OK)
@@ -1153,14 +1740,26 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 
 	for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
 	{
+#if defined (SUPPORT_SID_INTERFACE)
+		IMG_SID hHandle = psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
+		IMG_HANDLE *phHandleKM = &asInitInfoKM.asInitMemHandles[i];
+
+		if (hHandle == 0)
+#else
 		IMG_HANDLE *phHandle = &psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
 
 		if (*phHandle == IMG_NULL)
+#endif
 			continue;
 
 		eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
+#if defined (SUPPORT_SID_INTERFACE)
+							   phHandleKM,
+							   hHandle,
+#else
 							   phHandle,
 							   *phHandle,
+#endif
 							   PVRSRV_HANDLE_TYPE_MEM_INFO);
 		if (eError != PVRSRV_OK)
 		{
@@ -1171,45 +1770,69 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 	if (bReleaseFailed)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "DevInitSGXPart2BW: A handle release failed"));
-		psRetOUT->eError = PVRSRV_ERROR_INIT2_PHASE_FAILED;
+		psSGXDevInitPart2OUT->eError = PVRSRV_ERROR_INIT2_PHASE_FAILED;
 		
 		PVR_DBG_BREAK;
 		return 0;
 	}
 
 	
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCCBMemInfo);
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCCBMemInfo);
+#endif
 	if (eError != PVRSRV_OK)
 	{
 		bDissociateFailed = IMG_TRUE;
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCCBCtlMemInfo);
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCCBCtlMemInfo);
+#endif
 	if (eError != PVRSRV_OK)
 	{
 		bDissociateFailed = IMG_TRUE;
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCCBEventKickerMemInfo);
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCCBEventKickerMemInfo);
+#endif
 	if (eError != PVRSRV_OK)
 	{
 		bDissociateFailed = IMG_TRUE;
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXHostCtlMemInfo);
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXHostCtlMemInfo);
+#endif
 	if (eError != PVRSRV_OK)
 	{
 		bDissociateFailed = IMG_TRUE;
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXTA3DCtlMemInfo);
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXTA3DCtlMemInfo);
+#endif
 	if (eError != PVRSRV_OK)
 	{
 		bDissociateFailed = IMG_TRUE;
 	}
 
 	
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXMiscMemInfo);
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXMiscMemInfo);
+#endif
 	if (eError != PVRSRV_OK)
 	{
 		bDissociateFailed = IMG_TRUE;
@@ -1217,47 +1840,186 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 
 
 #if defined(SGX_SUPPORT_HWPROFILING)
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelHWProfilingMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelHWProfilingMemInfo);
 	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
 #endif
+#endif
 
 #if defined(SUPPORT_SGX_HWPERF)
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelHWPerfCBMemInfo);
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo);
+#endif
 	if (eError != PVRSRV_OK)
 	{
 		bDissociateFailed = IMG_TRUE;
 	}
 #endif
 
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelTASigBufferMemInfo);
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelTASigBufferMemInfo);
+#endif
 	if (eError != PVRSRV_OK)
 	{
 		bDissociateFailed = IMG_TRUE;
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernel3DSigBufferMemInfo);
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernel3DSigBufferMemInfo);
+#endif
 	if (eError != PVRSRV_OK)
 	{
 		bDissociateFailed = IMG_TRUE;
 	}
 
 #if defined(FIX_HW_BRN_29702)
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCFIMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCFIMemInfo);
 	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
 #endif
+#endif
 
 #if defined(FIX_HW_BRN_29823)
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelDummyTermStreamMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelDummyTermStreamMemInfo);
 	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
 #endif
+#endif
+
+#if defined(FIX_HW_BRN_31542)
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAVDMStreamMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAVDMStreamMemInfo);
+	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
+#endif
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAIndexStreamMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAIndexStreamMemInfo);
+	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
+#endif
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAPDSMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPDSMemInfo);
+	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
+#endif
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAUSEMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAUSEMemInfo);
+	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
+#endif
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAParamMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAParamMemInfo);
+	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
+#endif
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAPMPTMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPMPTMemInfo);
+	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
+#endif
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWATPCMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWATPCMemInfo);
+	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
+#endif
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAPSGRgnHdrMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPSGRgnHdrMemInfo);
+	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
+#endif
+#endif
+
+#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31425)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelVDMSnapShotBufferMemInfo);
+	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
+	
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelVDMCtrlStreamBufferMemInfo);
+	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
+#endif
 
 #if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelEDMStatusBufferMemInfo);
+	if (eError != PVRSRV_OK)
+	{
+		bDissociateFailed = IMG_TRUE;
+	}
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelEDMStatusBufferMemInfo);
 	bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
 #endif
+#endif
 
 #if defined(SGX_FEATURE_SPM_MODE_0)
+#if defined (SUPPORT_SID_INTERFACE)
+	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelTmpDPMStateMemInfo);
+#else
 	eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelTmpDPMStateMemInfo);
+#endif
 	if (eError != PVRSRV_OK)
 	{
 		bDissociateFailed = IMG_TRUE;
@@ -1266,7 +2028,11 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 
 	for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
 	{
+#if defined (SUPPORT_SID_INTERFACE)
+		IMG_HANDLE hHandle = asInitInfoKM.asInitMemHandles[i];
+#else
 		IMG_HANDLE hHandle = psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
+#endif
 
 		if (hHandle == IMG_NULL)
 			continue;
@@ -1281,17 +2047,31 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 	
 	if(bDissociateFailed)
 	{
+#if defined (SUPPORT_SID_INTERFACE)
+		PVRSRVFreeDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCCBMemInfo);
+		PVRSRVFreeDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCCBCtlMemInfo);
+		PVRSRVFreeDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXHostCtlMemInfo);
+		PVRSRVFreeDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXTA3DCtlMemInfo);
+		PVRSRVFreeDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXMiscMemInfo);
+#else
 		PVRSRVFreeDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCCBMemInfo);
 		PVRSRVFreeDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCCBCtlMemInfo);
 		PVRSRVFreeDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXHostCtlMemInfo);
 		PVRSRVFreeDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXTA3DCtlMemInfo);
 		PVRSRVFreeDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXMiscMemInfo);
+#endif
 
 		for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
 		{
+#if defined (SUPPORT_SID_INTERFACE)
+			IMG_HANDLE hHandle = asInitInfoKM.asInitMemHandles[i];
+
+			if (hHandle == 0)
+#else
 			IMG_HANDLE hHandle = psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
 
 			if (hHandle == IMG_NULL)
+#endif
 				continue;
 
 			PVRSRVFreeDeviceMemKM(hDevCookieInt, (PVRSRV_KERNEL_MEM_INFO *)hHandle);
@@ -1300,17 +2080,40 @@ SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
 
 		PVR_DPF((PVR_DBG_ERROR, "DevInitSGXPart2BW: A dissociate failed"));
 
-		psRetOUT->eError = PVRSRV_ERROR_INIT2_PHASE_FAILED;
+		psSGXDevInitPart2OUT->eError = PVRSRV_ERROR_INIT2_PHASE_FAILED;
 
 		
 		PVR_DBG_BREAK;
 		return 0;
 	}
 
-	psRetOUT->eError =
+#if defined (SUPPORT_SID_INTERFACE)
+	asInitInfoKM.sScripts               = psSGXDevInitPart2IN->sInitInfo.sScripts;
+	asInitInfoKM.ui32ClientBuildOptions = psSGXDevInitPart2IN->sInitInfo.ui32ClientBuildOptions;
+	asInitInfoKM.sSGXStructSizes        = psSGXDevInitPart2IN->sInitInfo.sSGXStructSizes;
+	asInitInfoKM.ui32CacheControl       = psSGXDevInitPart2IN->sInitInfo.ui32CacheControl;
+	asInitInfoKM.ui32EDMTaskReg0        = psSGXDevInitPart2IN->sInitInfo.ui32EDMTaskReg0;
+	asInitInfoKM.ui32EDMTaskReg1        = psSGXDevInitPart2IN->sInitInfo.ui32EDMTaskReg1;
+	asInitInfoKM.ui32ClkGateStatusReg   = psSGXDevInitPart2IN->sInitInfo.ui32ClkGateStatusReg;
+	asInitInfoKM.ui32ClkGateStatusMask  = psSGXDevInitPart2IN->sInitInfo.ui32ClkGateStatusMask;
+
+	OSMemCopy(&asInitInfoKM.asInitDevData ,
+			  &psSGXDevInitPart2IN->sInitInfo.asInitDevData,
+			  sizeof(asInitInfoKM.asInitDevData));
+	OSMemCopy(&asInitInfoKM.aui32HostKickAddr,
+			  &psSGXDevInitPart2IN->sInitInfo.aui32HostKickAddr,
+			  sizeof(asInitInfoKM.aui32HostKickAddr));
+
+	psSGXDevInitPart2OUT->eError =
+		DevInitSGXPart2KM(psPerProc,
+						  hDevCookieInt,
+						  &asInitInfoKM);
+#else
+	psSGXDevInitPart2OUT->eError =
 		DevInitSGXPart2KM(psPerProc,
 						  hDevCookieInt,
 						  &psSGXDevInitPart2IN->sInitInfo);
+#endif
 
 	return 0;
 }
@@ -1449,7 +2252,11 @@ SGXUnregisterHWTransferContextBW(IMG_UINT32 ui32BridgeID,
 							   PVRSRV_BRIDGE_RETURN *psRetOUT,
 							   PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_HANDLE hHWTransferContextInt = 0;
+#else
 	IMG_HANDLE hHWTransferContextInt;
+#endif
 
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_UNREGISTER_HW_TRANSFER_CONTEXT);
 
@@ -1598,7 +2405,8 @@ SGX2DQueryBlitsCompleteBW(IMG_UINT32 ui32BridgeID,
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_2DQUERYBLTSCOMPLETE);
 
 	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &hDevCookieInt,
+		PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &hDevCookieInt,
 						   ps2DQueryBltsCompleteIN->hDevCookie,
 						   PVRSRV_HANDLE_TYPE_DEV_NODE);
 	if(psRetOUT->eError != PVRSRV_OK)
@@ -1607,7 +2415,8 @@ SGX2DQueryBlitsCompleteBW(IMG_UINT32 ui32BridgeID,
 	}
 
 	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, &pvSyncInfo,
+		PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   &pvSyncInfo,
 						   ps2DQueryBltsCompleteIN->hKernSyncInfo,
 						   PVRSRV_HANDLE_TYPE_SYNC_INFO);
 	if(psRetOUT->eError != PVRSRV_OK)
@@ -1808,7 +2617,11 @@ SGXAddSharedPBDescBW(IMG_UINT32 ui32BridgeID,
 	IMG_UINT32 ui32KernelMemInfoHandlesCount =
 		psSGXAddSharedPBDescIN->ui32KernelMemInfoHandlesCount;
 	IMG_INT ret = 0;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID *phKernelMemInfoHandles = 0;
+#else
 	IMG_HANDLE *phKernelMemInfoHandles = IMG_NULL;
+#endif
 	PVRSRV_KERNEL_MEM_INFO **ppsKernelMemInfos = IMG_NULL;
 	IMG_UINT32 i;
 	PVRSRV_ERROR eError;
@@ -1964,7 +2777,8 @@ SGXAddSharedPBDescBW(IMG_UINT32 ui32BridgeID,
 								  psSGXAddSharedPBDescIN->ui32TotalPBSize,
 								  &hSharedPBDesc,
 								  ppsKernelMemInfos,
-								  ui32KernelMemInfoHandlesCount);
+								  ui32KernelMemInfoHandlesCount,
+								  psSGXAddSharedPBDescIN->sHWPBDescDevVAddr);
 
 
 	if (eError != PVRSRV_OK)
@@ -2013,6 +2827,9 @@ SGXGetInfoForSrvinitBW(IMG_UINT32 ui32BridgeID,
 {
 	IMG_HANDLE hDevCookieInt;
 	IMG_UINT32 i;
+#if defined (SUPPORT_SID_INTERFACE)
+	PVRSRV_HEAP_INFO_KM asHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
+#endif
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGXINFO_FOR_SRVINIT);
 
 	NEW_HANDLE_BATCH_OR_ERROR(psSGXInfoForSrvinitOUT->eError, psPerProc, PVRSRV_MAX_CLIENT_HEAPS);
@@ -2035,7 +2852,12 @@ SGXGetInfoForSrvinitBW(IMG_UINT32 ui32BridgeID,
 
 	psSGXInfoForSrvinitOUT->eError =
 		SGXGetInfoForSrvinitKM(hDevCookieInt,
+#if defined (SUPPORT_SID_INTERFACE)
+							   &asHeapInfo[0],
+							   &psSGXInfoForSrvinitOUT->sInitInfo.sPDDevPAddr);
+#else
 							   &psSGXInfoForSrvinitOUT->sInitInfo);
+#endif
 
 	if(psSGXInfoForSrvinitOUT->eError != PVRSRV_OK)
 	{
@@ -2048,6 +2870,28 @@ SGXGetInfoForSrvinitBW(IMG_UINT32 ui32BridgeID,
 
 		psHeapInfo = &psSGXInfoForSrvinitOUT->sInitInfo.asHeapInfo[i];
 
+#if defined (SUPPORT_SID_INTERFACE)
+		if ((asHeapInfo[i].ui32HeapID != (IMG_UINT32)SGX_UNDEFINED_HEAP_ID) &&
+			(asHeapInfo[i].hDevMemHeap != IMG_NULL))
+		{
+			
+			PVRSRVAllocHandleNR(psPerProc->psHandleBase,
+							  &psHeapInfo->hDevMemHeap,
+							  asHeapInfo[i].hDevMemHeap,
+							  PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
+							  PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
+		}
+		else
+		{
+			psHeapInfo->hDevMemHeap = 0;
+		}
+
+		psHeapInfo->ui32HeapID       = asHeapInfo[i].ui32HeapID;
+		psHeapInfo->sDevVAddrBase    = asHeapInfo[i].sDevVAddrBase;
+		psHeapInfo->ui32HeapByteSize = asHeapInfo[i].ui32HeapByteSize;
+		psHeapInfo->ui32Attribs      = asHeapInfo[i].ui32Attribs;
+		psHeapInfo->ui32XTileStride  = asHeapInfo[i].ui32XTileStride;
+#else
 		if (psHeapInfo->ui32HeapID != (IMG_UINT32)SGX_UNDEFINED_HEAP_ID)
 		{
 			IMG_HANDLE hDevMemHeapExt;
@@ -2063,6 +2907,7 @@ SGXGetInfoForSrvinitBW(IMG_UINT32 ui32BridgeID,
 				psHeapInfo->hDevMemHeap = hDevMemHeapExt;
 			}
 		}
+#endif
 	}
 
 	COMMIT_HANDLE_BATCH_OR_ERROR(psSGXInfoForSrvinitOUT->eError, psPerProc);
@@ -2072,17 +2917,25 @@ SGXGetInfoForSrvinitBW(IMG_UINT32 ui32BridgeID,
 
 #if defined(PDUMP)
 static IMG_VOID
-DumpBufferArray(PVRSRV_PER_PROCESS_DATA *psPerProc,
+DumpBufferArray(PVRSRV_PER_PROCESS_DATA   *psPerProc,
+#if defined (SUPPORT_SID_INTERFACE)
+				PSGX_KICKTA_DUMP_BUFFER_KM psBufferArray,
+#else
 				PSGX_KICKTA_DUMP_BUFFER	psBufferArray,
-				IMG_UINT32						ui32BufferArrayLength,
-				IMG_BOOL						bDumpPolls)
+#endif
+				IMG_UINT32                 ui32BufferArrayLength,
+				IMG_BOOL                   bDumpPolls)
 {
 	IMG_UINT32	i;
 
 	for (i=0; i<ui32BufferArrayLength; i++)
 	{
+#if defined (SUPPORT_SID_INTERFACE)
+		PSGX_KICKTA_DUMP_BUFFER_KM psBuffer;
+#else
 		PSGX_KICKTA_DUMP_BUFFER	psBuffer;
-		PVRSRV_KERNEL_MEM_INFO 	*psCtrlMemInfoKM;
+#endif
+		PVRSRV_KERNEL_MEM_INFO    *psCtrlMemInfoKM;
 		IMG_CHAR * pszName;
 		IMG_HANDLE hUniqueTag;
 		IMG_UINT32	ui32Offset;
@@ -2191,7 +3044,12 @@ SGXPDumpBufferArrayBW(IMG_UINT32 ui32BridgeID,
 				   PVRSRV_PER_PROCESS_DATA *psPerProc)
 {
 	IMG_UINT32 i;
+#if defined (SUPPORT_SID_INTERFACE)
+	SGX_KICKTA_DUMP_BUFFER *psUMPtr;
+	SGX_KICKTA_DUMP_BUFFER_KM *psKickTADumpBufferKM, *psKMPtr;
+#else
 	SGX_KICKTA_DUMP_BUFFER *psKickTADumpBuffer;
+#endif
 	IMG_UINT32 ui32BufferArrayLength =
 		psPDumpBufferArrayIN->ui32BufferArrayLength;
 	IMG_UINT32 ui32BufferArraySize =
@@ -2202,14 +3060,22 @@ SGXPDumpBufferArrayBW(IMG_UINT32 ui32BridgeID,
 
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_PDUMP_BUFFER_ARRAY);
 
+#if defined (SUPPORT_SID_INTERFACE)
+	if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+				  ui32BufferArraySize,
+				  (IMG_PVOID *)&psKickTADumpBufferKM, 0,
+				  "Array of Kick Tile Accelerator Dump Buffer") != PVRSRV_OK)
+#else
 	if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
 				  ui32BufferArraySize,
 				  (IMG_PVOID *)&psKickTADumpBuffer, 0,
 				  "Array of Kick Tile Accelerator Dump Buffer") != PVRSRV_OK)
+#endif				  
 	{
 		return -ENOMEM;
 	}
 
+#if !defined (SUPPORT_SID_INTERFACE)
 	if(CopyFromUserWrapper(psPerProc,
 			               ui32BridgeID,
 						   psKickTADumpBuffer,
@@ -2220,14 +3086,25 @@ SGXPDumpBufferArrayBW(IMG_UINT32 ui32BridgeID,
 		
 		return -EFAULT;
 	}
+#endif
 
 	for(i = 0; i < ui32BufferArrayLength; i++)
 	{
+#if defined (SUPPORT_SID_INTERFACE)
+		IMG_VOID *pvMemInfo = IMG_NULL;
+		psUMPtr = &psPDumpBufferArrayIN->psBufferArray[i];
+		psKMPtr = &psKickTADumpBufferKM[i];
+#else
 		IMG_VOID *pvMemInfo;
+#endif
 
 		eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
 									&pvMemInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+									psUMPtr->hKernelMemInfo,
+#else
 									psKickTADumpBuffer[i].hKernelMemInfo,
+#endif
 									PVRSRV_HANDLE_TYPE_MEM_INFO);
 
 		if(eError != PVRSRV_OK)
@@ -2236,12 +3113,20 @@ SGXPDumpBufferArrayBW(IMG_UINT32 ui32BridgeID,
 					 "PVRSRVLookupHandle failed (%d)", eError));
 			break;
 		}
+#if defined (SUPPORT_SID_INTERFACE)
+		psKMPtr->hKernelMemInfo = pvMemInfo;
+#else
 		psKickTADumpBuffer[i].hKernelMemInfo = pvMemInfo;
+#endif
 
 #if defined(SUPPORT_SGX_NEW_STATUS_VALS)
 		eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
 									&pvMemInfo,
+#if defined (SUPPORT_SID_INTERFACE)
+									psUMPtr->hCtrlKernelMemInfo,
+#else
 									psKickTADumpBuffer[i].hCtrlKernelMemInfo,
+#endif
 									PVRSRV_HANDLE_TYPE_MEM_INFO);
 
 		if(eError != PVRSRV_OK)
@@ -2250,19 +3135,43 @@ SGXPDumpBufferArrayBW(IMG_UINT32 ui32BridgeID,
 					 "PVRSRVLookupHandle failed (%d)", eError));
 			break;
 		}
+#if defined (SUPPORT_SID_INTERFACE)
+		psKMPtr->hCtrlKernelMemInfo = pvMemInfo;
+		psKMPtr->sCtrlDevVAddr = psUMPtr->sCtrlDevVAddr;
+#else
 		psKickTADumpBuffer[i].hCtrlKernelMemInfo = pvMemInfo;
 #endif
+#endif
+
+#if defined (SUPPORT_SID_INTERFACE)
+		psKMPtr->ui32SpaceUsed     = psUMPtr->ui32SpaceUsed;
+		psKMPtr->ui32Start         = psUMPtr->ui32Start;
+		psKMPtr->ui32End           = psUMPtr->ui32End;
+		psKMPtr->ui32BufferSize    = psUMPtr->ui32BufferSize;
+		psKMPtr->ui32BackEndLength = psUMPtr->ui32BackEndLength;
+		psKMPtr->uiAllocIndex      = psUMPtr->uiAllocIndex;
+		psKMPtr->pvLinAddr         = psUMPtr->pvLinAddr;
+		psKMPtr->pszName           = psUMPtr->pszName;
+#endif
 	}
 
 	if(eError == PVRSRV_OK)
 	{
 		DumpBufferArray(psPerProc,
+#if defined (SUPPORT_SID_INTERFACE)
+						psKickTADumpBufferKM,
+#else
 						psKickTADumpBuffer,
+#endif
 						ui32BufferArrayLength,
 						psPDumpBufferArrayIN->bDumpPolls);
 	}
 
+#if defined (SUPPORT_SID_INTERFACE)
+	OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, ui32BufferArraySize, psKickTADumpBufferKM, 0);
+#else
 	OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, ui32BufferArraySize, psKickTADumpBuffer, 0);
+#endif
 	
 
 	return 0;
@@ -2276,11 +3185,13 @@ SGXPDump3DSignatureRegistersBW(IMG_UINT32 ui32BridgeID,
 {
 	IMG_UINT32 ui32RegisterArraySize =  psPDump3DSignatureRegistersIN->ui32NumRegisters * sizeof(IMG_UINT32);
 	IMG_UINT32 *pui32Registers = IMG_NULL;
-	PVRSRV_SGXDEV_INFO	*psDevInfo = IMG_NULL;
+	PVRSRV_SGXDEV_INFO	*psDevInfo;
 #if defined(SGX_FEATURE_MP)	&& defined(FIX_HW_BRN_27270)
 	IMG_UINT32	ui32RegVal = 0;
 #endif
 	PVRSRV_DEVICE_NODE *psDeviceNode;
+	IMG_HANDLE hDevMemContextInt = 0;
+	IMG_UINT32 ui32MMUContextID;
 	IMG_INT ret = -EFAULT;
 
 	PVR_UNREFERENCED_PARAMETER(psRetOUT);
@@ -2293,7 +3204,8 @@ SGXPDump3DSignatureRegistersBW(IMG_UINT32 ui32BridgeID,
 	}
 
 	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, (IMG_VOID**)&psDeviceNode,
+		PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   (IMG_VOID**)&psDeviceNode,
 						   psPDump3DSignatureRegistersIN->hDevCookie,
 						   PVRSRV_HANDLE_TYPE_DEV_NODE);
 	if(psRetOUT->eError != PVRSRV_OK)
@@ -2339,17 +3251,33 @@ SGXPDump3DSignatureRegistersBW(IMG_UINT32 ui32BridgeID,
 					pui32Registers,
 					psPDump3DSignatureRegistersIN->ui32NumRegisters);
 
+	psRetOUT->eError =
+		PVRSRVLookupHandle(	psPerProc->psHandleBase,
+							&hDevMemContextInt,
+							psPDump3DSignatureRegistersIN->hDevMemContext,
+							PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+	if(psRetOUT->eError != PVRSRV_OK)
+	{
+		return 0;
+	}
+
+	
+	PVR_ASSERT(psDeviceNode->pfnMMUGetContextID != IMG_NULL)
+	ui32MMUContextID = psDeviceNode->pfnMMUGetContextID(hDevMemContextInt);
+
 	PDumpSignatureBuffer(&psDeviceNode->sDevId,
-						 "out.tasig", "TA", 0, 
+						 "out.tasig", "TA", 0,
 						 psDevInfo->psKernelTASigBufferMemInfo->sDevVAddr,
-						 psDevInfo->psKernelTASigBufferMemInfo->ui32AllocSize,
+						 (IMG_UINT32)psDevInfo->psKernelTASigBufferMemInfo->uAllocSize,
+						 ui32MMUContextID,
 						 0 );
 	PDumpSignatureBuffer(&psDeviceNode->sDevId,
-						 "out.3dsig", "3D", 0, 
+						 "out.3dsig", "3D", 0,
 						 psDevInfo->psKernel3DSigBufferMemInfo->sDevVAddr,
-						 psDevInfo->psKernel3DSigBufferMemInfo->ui32AllocSize,
+						 (IMG_UINT32)psDevInfo->psKernel3DSigBufferMemInfo->uAllocSize,
+						 ui32MMUContextID,
 						 0 );
-						 
+
 ExitNoError:
 	psRetOUT->eError = PVRSRV_OK;
 	ret = 0;
@@ -2381,7 +3309,7 @@ SGXPDumpCounterRegistersBW(IMG_UINT32 ui32BridgeID,
 {
 	IMG_UINT32 ui32RegisterArraySize =  psPDumpCounterRegistersIN->ui32NumRegisters * sizeof(IMG_UINT32);
 	IMG_UINT32 *pui32Registers = IMG_NULL;
-	PVRSRV_DEVICE_NODE *psDeviceNode;
+	PVRSRV_DEVICE_NODE *psDeviceNode ;
 	IMG_INT ret = -EFAULT;
 
 	PVR_UNREFERENCED_PARAMETER(psBridgeOut);
@@ -2393,9 +3321,10 @@ SGXPDumpCounterRegistersBW(IMG_UINT32 ui32BridgeID,
 		goto ExitNoError;
 	}
 
-	if(PVRSRVLookupHandle(psPerProc->psHandleBase, (IMG_VOID**)&psDeviceNode,
-						   psPDumpCounterRegistersIN->hDevCookie,
-						   PVRSRV_HANDLE_TYPE_DEV_NODE) != PVRSRV_OK)
+	if(PVRSRVLookupHandle(psPerProc->psHandleBase,
+						  (IMG_VOID**)&psDeviceNode,
+						  psPDumpCounterRegistersIN->hDevCookie,
+						  PVRSRV_HANDLE_TYPE_DEV_NODE) != PVRSRV_OK)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "SGXPDumpCounterRegistersBW: hDevCookie lookup failed"));
 		ret = -ENOMEM;
@@ -2545,6 +3474,8 @@ SGXPDumpHWPerfCBBW(IMG_UINT32						ui32BridgeID,
 #if defined(__linux__)
 	PVRSRV_SGXDEV_INFO	*psDevInfo;
 	PVRSRV_DEVICE_NODE *psDeviceNode;
+	IMG_HANDLE hDevMemContextInt = 0;
+	IMG_UINT32 ui32MMUContextID = 0;
 
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_PDUMP_HWPERFCB);
 
@@ -2559,11 +3490,26 @@ SGXPDumpHWPerfCBBW(IMG_UINT32						ui32BridgeID,
 
 	psDevInfo = psDeviceNode->pvDevice;
 
+	psRetOUT->eError =
+		PVRSRVLookupHandle(	psPerProc->psHandleBase,
+							&hDevMemContextInt,
+							psPDumpHWPerfCBIN->hDevMemContext,
+							PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+	if(psRetOUT->eError != PVRSRV_OK)
+	{
+		return 0;
+	}
+
+	
+	PVR_ASSERT(psDeviceNode->pfnMMUGetContextID != IMG_NULL)
+	ui32MMUContextID = psDeviceNode->pfnMMUGetContextID(hDevMemContextInt);
+
 	PDumpHWPerfCBKM(&psDeviceNode->sDevId,
 					&psPDumpHWPerfCBIN->szFileName[0],
 					psPDumpHWPerfCBIN->ui32FileOffset,
 					psDevInfo->psKernelHWPerfCBMemInfo->sDevVAddr,
-					psDevInfo->psKernelHWPerfCBMemInfo->ui32AllocSize,
+					psDevInfo->psKernelHWPerfCBMemInfo->uAllocSize,
+					ui32MMUContextID,
 					psPDumpHWPerfCBIN->ui32PDumpFlags);
 
 	return 0;
@@ -2591,11 +3537,14 @@ SGXPDumpSaveMemBW(IMG_UINT32						ui32BridgeID,
 				  PVRSRV_PER_PROCESS_DATA 			*psPerProc)
 {
 	PVRSRV_DEVICE_NODE *psDeviceNode;
+	IMG_HANDLE hDevMemContextInt = 0;
+	IMG_UINT32 ui32MMUContextID;
 
 	PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_PDUMP_SAVEMEM);
 
 	psRetOUT->eError =
-		PVRSRVLookupHandle(psPerProc->psHandleBase, (IMG_VOID**)&psDeviceNode,
+		PVRSRVLookupHandle(psPerProc->psHandleBase,
+						   (IMG_VOID**)&psDeviceNode,
 						   psPDumpSaveMem->hDevCookie,
 						   PVRSRV_HANDLE_TYPE_DEV_NODE);
 	if(psRetOUT->eError != PVRSRV_OK)
@@ -2603,12 +3552,26 @@ SGXPDumpSaveMemBW(IMG_UINT32						ui32BridgeID,
 		return 0;
 	}
 
+	psRetOUT->eError =
+		PVRSRVLookupHandle(	psPerProc->psHandleBase,
+							&hDevMemContextInt,
+							psPDumpSaveMem->hDevMemContext,
+							PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+	if(psRetOUT->eError != PVRSRV_OK)
+	{
+		return 0;
+	}
+
+	
+	PVR_ASSERT(psDeviceNode->pfnMMUGetContextID != IMG_NULL)
+	ui32MMUContextID = psDeviceNode->pfnMMUGetContextID(hDevMemContextInt);
+
 	PDumpSaveMemKM(&psDeviceNode->sDevId,
 				   &psPDumpSaveMem->szFileName[0],
 				   psPDumpSaveMem->ui32FileOffset,
 				   psPDumpSaveMem->sDevVAddr,
 				   psPDumpSaveMem->ui32Size,
-				   psPDumpSaveMem->ui32DataMaster,
+				   ui32MMUContextID,
 				   psPDumpSaveMem->ui32PDumpFlags);
 	return 0;
 }
@@ -2616,7 +3579,7 @@ SGXPDumpSaveMemBW(IMG_UINT32						ui32BridgeID,
 #endif 
 
 
-   
+ 
 IMG_VOID SetSGXDispatchTableEntry(IMG_VOID)
 {
 
diff --git a/drivers/gpu/pvr/sgx/mmu.c b/drivers/gpu/pvr/sgx/mmu.c
index 2685fbf169f..67e86d92025 100644
--- a/drivers/gpu/pvr/sgx/mmu.c
+++ b/drivers/gpu/pvr/sgx/mmu.c
@@ -42,6 +42,38 @@
 
 #define SGX_MAX_PD_ENTRIES	(1<<(SGX_FEATURE_ADDRESS_SPACE_SIZE - SGX_MMU_PT_SHIFT - SGX_MMU_PAGE_SHIFT))
 
+#if defined(FIX_HW_BRN_31620)
+#define SGX_MMU_PDE_DUMMY_PAGE		(0)
+#define SGX_MMU_PTE_DUMMY_PAGE		(0)
+
+#define BRN31620_PT_ADDRESS_RANGE_SHIFT		22
+#define BRN31620_PT_ADDRESS_RANGE_SIZE		(1 << BRN31620_PT_ADDRESS_RANGE_SHIFT)
+
+#define BRN31620_PDE_CACHE_FILL_SHIFT		26
+#define BRN31620_PDE_CACHE_FILL_SIZE		(1 << BRN31620_PDE_CACHE_FILL_SHIFT)
+#define BRN31620_PDE_CACHE_FILL_MASK		(BRN31620_PDE_CACHE_FILL_SIZE - 1)
+
+#define BRN31620_PDES_PER_CACHE_LINE_SHIFT	(BRN31620_PDE_CACHE_FILL_SHIFT - BRN31620_PT_ADDRESS_RANGE_SHIFT)
+#define BRN31620_PDES_PER_CACHE_LINE_SIZE	(1 << BRN31620_PDES_PER_CACHE_LINE_SHIFT)
+#define BRN31620_PDES_PER_CACHE_LINE_MASK	(BRN31620_PDES_PER_CACHE_LINE_SIZE - 1)
+
+#define BRN31620_DUMMY_PAGE_OFFSET	(1 * SGX_MMU_PAGE_SIZE)
+#define BRN31620_DUMMY_PDE_INDEX	(BRN31620_DUMMY_PAGE_OFFSET / BRN31620_PT_ADDRESS_RANGE_SIZE)
+#define BRN31620_DUMMY_PTE_INDEX	((BRN31620_DUMMY_PAGE_OFFSET - (BRN31620_DUMMY_PDE_INDEX * BRN31620_PT_ADDRESS_RANGE_SIZE))/SGX_MMU_PAGE_SIZE)
+
+#define BRN31620_CACHE_FLUSH_SHIFT		(32 - BRN31620_PDE_CACHE_FILL_SHIFT)
+#define BRN31620_CACHE_FLUSH_SIZE		(1 << BRN31620_CACHE_FLUSH_SHIFT)
+
+#define BRN31620_CACHE_FLUSH_BITS_SHIFT		5
+#define BRN31620_CACHE_FLUSH_BITS_SIZE		(1 << BRN31620_CACHE_FLUSH_BITS_SHIFT)
+#define BRN31620_CACHE_FLUSH_BITS_MASK		(BRN31620_CACHE_FLUSH_BITS_SIZE - 1)
+
+#define BRN31620_CACHE_FLUSH_INDEX_BITS		(BRN31620_CACHE_FLUSH_SHIFT - BRN31620_CACHE_FLUSH_BITS_SHIFT)
+#define BRN31620_CACHE_FLUSH_INDEX_SIZE		(1 << BRN31620_CACHE_FLUSH_INDEX_BITS)
+
+#define BRN31620_DUMMY_PAGE_SIGNATURE	0xFEEBEE01
+#endif
+
 typedef struct _MMU_PT_INFO_
 {
 	
@@ -73,6 +105,11 @@ struct _MMU_CONTEXT_
 #endif
 #endif
 
+#if defined (FIX_HW_BRN_31620)
+	IMG_UINT32 ui32PDChangeMask[BRN31620_CACHE_FLUSH_INDEX_SIZE];
+	IMG_UINT32 ui32PDCacheRangeRefCount[BRN31620_CACHE_FLUSH_SIZE];
+	MMU_PT_INFO *apsPTInfoListSave[SGX_MAX_PD_ENTRIES];
+#endif
 	struct _MMU_CONTEXT_ *psNext;
 };
 
@@ -88,7 +125,7 @@ struct _MMU_HEAP_
 	
 	IMG_UINT32			ui32PageTableCount;
 	
-	IMG_UINT32			ui32PTETotal;
+	IMG_UINT32			ui32PTETotalUsable;
 	
 	IMG_UINT32			ui32PDEPageSizeCtrl;
 
@@ -112,7 +149,9 @@ struct _MMU_HEAP_
 	
 	IMG_UINT32			ui32PTSize;
 	
-	IMG_UINT32			ui32PTECount;
+	IMG_UINT32			ui32PTNumEntriesAllocated;
+	
+	IMG_UINT32			ui32PTNumEntriesUsable;
 
 	
 
@@ -138,6 +177,9 @@ struct _MMU_HEAP_
 #define DUMMY_DATA_PAGE_SIGNATURE	0xDEADBEEF
 #endif
 
+static IMG_VOID
+_DeferredFreePageTable (MMU_HEAP *pMMUHeap, IMG_UINT32 ui32PTIndex, IMG_BOOL bOSFreePT);
+
 #if defined(PDUMP)
 static IMG_VOID
 MMU_PDumpPageTables	(MMU_HEAP *pMMUHeap,
@@ -285,6 +327,105 @@ static IMG_VOID MMU_InvalidatePageTableCache(PVRSRV_SGXDEV_INFO *psDevInfo)
 	#endif 
 }
 
+#if defined(FIX_HW_BRN_31620)
+static IMG_VOID BRN31620InvalidatePageTableEntry(MMU_CONTEXT *psMMUContext, IMG_UINT32 ui32PDIndex, IMG_UINT32 ui32PTIndex, IMG_UINT32 *pui32PTE)
+{
+	PVRSRV_SGXDEV_INFO *psDevInfo = psMMUContext->psDevInfo;
+
+	
+	if (((ui32PDIndex % (BRN31620_PDE_CACHE_FILL_SIZE/BRN31620_PT_ADDRESS_RANGE_SIZE)) == BRN31620_DUMMY_PDE_INDEX)
+		&& (ui32PTIndex == BRN31620_DUMMY_PTE_INDEX))
+	{
+		*pui32PTE = (psDevInfo->sBRN31620DummyPageDevPAddr.uiAddr>>SGX_MMU_PTE_ADDR_ALIGNSHIFT)
+								| SGX_MMU_PTE_DUMMY_PAGE
+								| SGX_MMU_PTE_READONLY
+								| SGX_MMU_PTE_VALID;
+	}
+	else
+	{
+		*pui32PTE = 0;
+	}
+}
+
+static IMG_BOOL BRN31620FreePageTable(MMU_HEAP *psMMUHeap, IMG_UINT32 ui32PDIndex)
+{
+	MMU_CONTEXT *psMMUContext = psMMUHeap->psMMUContext;
+	PVRSRV_SGXDEV_INFO *psDevInfo = psMMUContext->psDevInfo;
+	IMG_UINT32 ui32PDCacheLine = ui32PDIndex >> BRN31620_PDES_PER_CACHE_LINE_SHIFT;
+	IMG_UINT32 bFreePTs = IMG_FALSE;
+	IMG_UINT32 *pui32Tmp;
+
+	PVR_ASSERT(psMMUHeap != IMG_NULL);
+
+	
+	PVR_ASSERT(psMMUContext->apsPTInfoListSave[ui32PDIndex] == IMG_NULL);
+
+	psMMUContext->apsPTInfoListSave[ui32PDIndex] = psMMUContext->apsPTInfoList[ui32PDIndex];
+	psMMUContext->apsPTInfoList[ui32PDIndex] = IMG_NULL;
+
+	
+	if (--psMMUContext->ui32PDCacheRangeRefCount[ui32PDCacheLine] == 0)
+	{
+		IMG_UINT32 i;
+		IMG_UINT32 ui32PDIndexStart = ui32PDCacheLine * BRN31620_PDES_PER_CACHE_LINE_SIZE;
+		IMG_UINT32 ui32PDIndexEnd = ui32PDIndexStart + BRN31620_PDES_PER_CACHE_LINE_SIZE;
+		IMG_UINT32 ui32PDBitMaskIndex, ui32PDBitMaskShift;
+
+		
+		for (i=ui32PDIndexStart;i<ui32PDIndexEnd;i++)
+		{
+			
+			psMMUContext->apsPTInfoList[i] = psMMUContext->apsPTInfoListSave[i];
+			psMMUContext->apsPTInfoListSave[i] = IMG_NULL;
+			_DeferredFreePageTable(psMMUHeap, i - psMMUHeap->ui32PDBaseIndex, IMG_TRUE);
+		}
+
+		ui32PDBitMaskIndex = ui32PDCacheLine >> BRN31620_CACHE_FLUSH_BITS_SHIFT;
+		ui32PDBitMaskShift = ui32PDCacheLine & BRN31620_CACHE_FLUSH_BITS_MASK;
+
+		
+		if (MMU_IsHeapShared(psMMUHeap))
+		{
+			
+			MMU_CONTEXT *psMMUContextWalker = (MMU_CONTEXT*) psMMUHeap->psMMUContext->psDevInfo->pvMMUContextList;
+
+			while(psMMUContextWalker)
+			{
+				psMMUContextWalker->ui32PDChangeMask[ui32PDBitMaskIndex] |= 1 << ui32PDBitMaskShift;
+
+				
+				pui32Tmp = (IMG_UINT32 *) psMMUContextWalker->pvPDCpuVAddr;
+				pui32Tmp[ui32PDIndexStart + BRN31620_DUMMY_PDE_INDEX] = (psDevInfo->sBRN31620DummyPTDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT)
+												| SGX_MMU_PDE_PAGE_SIZE_4K
+												| SGX_MMU_PDE_DUMMY_PAGE
+												| SGX_MMU_PDE_VALID;
+
+				PDUMPCOMMENT("BRN31620 Re-wire dummy PT due to releasing PT allocation block");
+				PDUMPPDENTRIES(&psMMUHeap->sMMUAttrib, psMMUContextWalker->hPDOSMemHandle, (IMG_VOID*)&pui32Tmp[ui32PDIndexStart + BRN31620_DUMMY_PDE_INDEX], sizeof(IMG_UINT32), 0, IMG_FALSE, PDUMP_PT_UNIQUETAG, PDUMP_PT_UNIQUETAG);
+				psMMUContextWalker = psMMUContextWalker->psNext;
+			}
+		}
+		else
+		{
+			psMMUContext->ui32PDChangeMask[ui32PDBitMaskIndex] |= 1 << ui32PDBitMaskShift;
+
+			
+			pui32Tmp = (IMG_UINT32 *) psMMUContext->pvPDCpuVAddr;
+			pui32Tmp[ui32PDIndexStart + BRN31620_DUMMY_PDE_INDEX] = (psDevInfo->sBRN31620DummyPTDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT)
+											| SGX_MMU_PDE_PAGE_SIZE_4K
+											| SGX_MMU_PDE_DUMMY_PAGE
+											| SGX_MMU_PDE_VALID;
+
+			PDUMPCOMMENT("BRN31620 Re-wire dummy PT due to releasing PT allocation block");
+			PDUMPPDENTRIES(&psMMUHeap->sMMUAttrib, psMMUContext->hPDOSMemHandle, (IMG_VOID*)&pui32Tmp[ui32PDIndexStart + BRN31620_DUMMY_PDE_INDEX], sizeof(IMG_UINT32), 0, IMG_FALSE, PDUMP_PT_UNIQUETAG, PDUMP_PT_UNIQUETAG);
+		}
+		
+		bFreePTs = IMG_TRUE;
+	}
+
+	return bFreePTs;
+}
+#endif
 
 static IMG_BOOL
 _AllocPageTableMemory (MMU_HEAP *pMMUHeap,
@@ -373,11 +514,16 @@ _AllocPageTableMemory (MMU_HEAP *pMMUHeap,
 
 		pui32Tmp = (IMG_UINT32*)psPTInfoList->PTPageCpuVAddr;
 		
-		for(i=0; i<pMMUHeap->ui32PTECount; i++)
+		for(i=0; i<pMMUHeap->ui32PTNumEntriesUsable; i++)
 		{
 			pui32Tmp[i] = (pMMUHeap->psMMUContext->psDevInfo->sDummyDataDevPAddr.uiAddr>>SGX_MMU_PTE_ADDR_ALIGNSHIFT)
 						| SGX_MMU_PTE_VALID;
 		}
+		
+		for(; i<pMMUHeap->ui32PTNumEntriesAllocated; i++)
+		{
+			pui32Tmp[i] = 0;
+		}
 	}
 #else
 	
@@ -388,12 +534,12 @@ _AllocPageTableMemory (MMU_HEAP *pMMUHeap,
 	{
 		IMG_UINT32 ui32Flags = 0;
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
-
+		
 		ui32Flags |= ( MMU_IsHeapShared(pMMUHeap) ) ? PDUMP_FLAGS_PERSISTENT : 0;
 #endif
-
+		
 		PDUMPMALLOCPAGETABLE(&pMMUHeap->psMMUContext->psDeviceNode->sDevId, psPTInfoList->hPTPageOSMemHandle, 0, psPTInfoList->PTPageCpuVAddr, pMMUHeap->ui32PTSize, ui32Flags, PDUMP_PT_UNIQUETAG);
-
+		
 		PDUMPMEMPTENTRIES(&pMMUHeap->sMMUAttrib, psPTInfoList->hPTPageOSMemHandle, psPTInfoList->PTPageCpuVAddr, pMMUHeap->ui32PTSize, ui32Flags, IMG_TRUE, PDUMP_PT_UNIQUETAG, PDUMP_PT_UNIQUETAG);
 	}
 #endif
@@ -482,7 +628,7 @@ _DeferredFreePageTable (MMU_HEAP *pMMUHeap, IMG_UINT32 ui32PTIndex, IMG_BOOL bOS
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
 		ui32Flags |= ( MMU_IsHeapShared(pMMUHeap) ) ? PDUMP_FLAGS_PERSISTENT : 0;
 #endif
-
+		
 		PDUMPCOMMENT("Free page table (page count == %08X)", pMMUHeap->ui32PageTableCount);
 		if(ppsPTInfoList[ui32PTIndex] && ppsPTInfoList[ui32PTIndex]->PTPageCpuVAddr)
 		{
@@ -575,9 +721,10 @@ _DeferredFreePageTable (MMU_HEAP *pMMUHeap, IMG_UINT32 ui32PTIndex, IMG_BOOL bOS
 
 			
 			for(i=0;
-				(i<pMMUHeap->ui32PTETotal) && (i<pMMUHeap->ui32PTECount);
+				(i<pMMUHeap->ui32PTETotalUsable) && (i<pMMUHeap->ui32PTNumEntriesUsable);
 				 i++)
 			{
+				
 				pui32Tmp[i] = 0;
 			}
 
@@ -591,12 +738,12 @@ _DeferredFreePageTable (MMU_HEAP *pMMUHeap, IMG_UINT32 ui32PTIndex, IMG_BOOL bOS
 			
 
 
-			pMMUHeap->ui32PTETotal -= i;
+			pMMUHeap->ui32PTETotalUsable -= i;
 		}
 		else
 		{
 			
-			pMMUHeap->ui32PTETotal -= pMMUHeap->ui32PTECount;
+			pMMUHeap->ui32PTETotalUsable -= pMMUHeap->ui32PTNumEntriesUsable;
 		}
 
 		if(bOSFreePT)
@@ -612,7 +759,7 @@ _DeferredFreePageTable (MMU_HEAP *pMMUHeap, IMG_UINT32 ui32PTIndex, IMG_BOOL bOS
 	else
 	{
 		
-		pMMUHeap->ui32PTETotal -= pMMUHeap->ui32PTECount;
+		pMMUHeap->ui32PTETotalUsable -= pMMUHeap->ui32PTNumEntriesUsable;
 	}
 
 	PDUMPCOMMENT("Finished free page table (page count == %08X)", pMMUHeap->ui32PageTableCount);
@@ -622,17 +769,59 @@ static IMG_VOID
 _DeferredFreePageTables (MMU_HEAP *pMMUHeap)
 {
 	IMG_UINT32 i;
+#if defined(FIX_HW_BRN_31620)
+	MMU_CONTEXT *psMMUContext = pMMUHeap->psMMUContext;
+	IMG_BOOL bInvalidateDirectoryCache = IMG_FALSE;
+	IMG_UINT32 ui32PDIndex;
+	IMG_UINT32 *pui32Tmp;
+	IMG_UINT32 j;
+#endif
 #if defined(PDUMP)
 	PDUMPCOMMENT("Free PTs (MMU Context ID == %u, PDBaseIndex == %u, PT count == 0x%x)",
 			pMMUHeap->psMMUContext->ui32PDumpMMUContextID,
 			pMMUHeap->ui32PDBaseIndex,
 			pMMUHeap->ui32PageTableCount);
 #endif
+#if defined(FIX_HW_BRN_31620)
+	for(i=0; i<pMMUHeap->ui32PageTableCount; i++)
+	{
+		ui32PDIndex = (pMMUHeap->ui32PDBaseIndex + i);
+
+		if (psMMUContext->apsPTInfoList[ui32PDIndex])
+		{
+			if (psMMUContext->apsPTInfoList[ui32PDIndex]->PTPageCpuVAddr)
+			{
+				
+				for (j=0;j<SGX_MMU_PT_SIZE;j++)
+				{
+					pui32Tmp = (IMG_UINT32 *) psMMUContext->apsPTInfoList[ui32PDIndex]->PTPageCpuVAddr;
+					BRN31620InvalidatePageTableEntry(psMMUContext, ui32PDIndex, j, &pui32Tmp[j]);
+				}
+			}
+			
+			if (BRN31620FreePageTable(pMMUHeap, ui32PDIndex) == IMG_TRUE)
+			{
+				bInvalidateDirectoryCache = IMG_TRUE;
+			}
+		}
+	}
+
+	
+	if (bInvalidateDirectoryCache)
+	{
+		MMU_InvalidateDirectoryCache(pMMUHeap->psMMUContext->psDevInfo);
+	}
+	else
+	{
+		MMU_InvalidatePageTableCache(pMMUHeap->psMMUContext->psDevInfo);
+	}
+#else
 	for(i=0; i<pMMUHeap->ui32PageTableCount; i++)
 	{
 		_DeferredFreePageTable(pMMUHeap, i, IMG_TRUE);
 	}
 	MMU_InvalidateDirectoryCache(pMMUHeap->psMMUContext->psDevInfo);
+#endif
 }
 
 
@@ -646,6 +835,15 @@ _DeferredAllocPagetables(MMU_HEAP *pMMUHeap, IMG_DEV_VIRTADDR DevVAddr, IMG_UINT
 	MMU_PT_INFO **ppsPTInfoList;
 	SYS_DATA *psSysData;
 	IMG_DEV_VIRTADDR sHighDevVAddr;
+#if defined(FIX_HW_BRN_31620)
+	IMG_BOOL bFlushSystemCache = IMG_FALSE;
+	IMG_BOOL bSharedPT = IMG_FALSE;
+	IMG_DEV_VIRTADDR sDevVAddrRequestStart;
+	IMG_DEV_VIRTADDR sDevVAddrRequestEnd;
+	IMG_UINT32 ui32PDRequestStart;
+	IMG_UINT32 ui32PDRequestEnd;
+	IMG_UINT32 ui32ModifiedCachelines[BRN31620_CACHE_FLUSH_INDEX_SIZE];
+#endif
 
 	
 #if SGX_FEATURE_ADDRESS_SPACE_SIZE < 32
@@ -676,6 +874,38 @@ _DeferredAllocPagetables(MMU_HEAP *pMMUHeap, IMG_DEV_VIRTADDR DevVAddr, IMG_UINT
 
 	ui32PageTableCount = sHighDevVAddr.uiAddr >> pMMUHeap->ui32PDShift;
 
+	
+	if (ui32PageTableCount == 0)
+		ui32PageTableCount = 1024;
+
+#if defined(FIX_HW_BRN_31620)
+	for (i=0;i<BRN31620_CACHE_FLUSH_INDEX_SIZE;i++)
+	{
+		ui32ModifiedCachelines[i] = 0;
+	}
+
+	
+	
+	
+	sDevVAddrRequestStart = DevVAddr;
+	ui32PDRequestStart = ui32PDIndex;
+	sDevVAddrRequestEnd = sHighDevVAddr;
+	ui32PDRequestEnd = ui32PageTableCount - 1;
+
+	
+	DevVAddr.uiAddr = DevVAddr.uiAddr & (~BRN31620_PDE_CACHE_FILL_MASK);
+
+	
+	sHighDevVAddr.uiAddr = ((sHighDevVAddr.uiAddr + (BRN31620_PDE_CACHE_FILL_SIZE - 1)) & (~BRN31620_PDE_CACHE_FILL_MASK));
+
+	ui32PDIndex = DevVAddr.uiAddr >> pMMUHeap->ui32PDShift;
+	ui32PageTableCount = sHighDevVAddr.uiAddr >> pMMUHeap->ui32PDShift;
+
+	
+	if (ui32PageTableCount == 0)
+		ui32PageTableCount = 1024;
+#endif
+
 	ui32PageTableCount -= ui32PDIndex;
 
 	
@@ -686,18 +916,45 @@ _DeferredAllocPagetables(MMU_HEAP *pMMUHeap, IMG_DEV_VIRTADDR DevVAddr, IMG_UINT
 	ppsPTInfoList = &pMMUHeap->psMMUContext->apsPTInfoList[ui32PDIndex];
 
 #if defined(PDUMP)
-	PDUMPCOMMENT("Alloc PTs (MMU Context ID == %u, PDBaseIndex == %u, Size == 0x%x)",
-			pMMUHeap->psMMUContext->ui32PDumpMMUContextID,
-			pMMUHeap->ui32PDBaseIndex,
-			ui32Size);
-	PDUMPCOMMENT("Alloc page table (page count == %08X)", ui32PageTableCount);
-	PDUMPCOMMENT("Page directory mods (page count == %08X)", ui32PageTableCount);
+	{
+		IMG_UINT32 ui32Flags = 0;
+		
+		
+		if( MMU_IsHeapShared(pMMUHeap) )
+		{
+			ui32Flags |= PDUMP_FLAGS_CONTINUOUS;
+		}
+		PDUMPCOMMENTWITHFLAGS(ui32Flags, "Alloc PTs (MMU Context ID == %u, PDBaseIndex == %u, Size == 0x%x)",
+				pMMUHeap->psMMUContext->ui32PDumpMMUContextID,
+				pMMUHeap->ui32PDBaseIndex,
+				ui32Size);
+		PDUMPCOMMENTWITHFLAGS(ui32Flags, "Alloc page table (page count == %08X)", ui32PageTableCount);
+		PDUMPCOMMENTWITHFLAGS(ui32Flags, "Page directory mods (page count == %08X)", ui32PageTableCount);
+	}
 #endif
 	
 	for(i=0; i<ui32PageTableCount; i++)
 	{
 		if(ppsPTInfoList[i] == IMG_NULL)
 		{
+#if defined(FIX_HW_BRN_31620)
+			
+			if (pMMUHeap->psMMUContext->apsPTInfoListSave[ui32PDIndex + i])
+			{
+				
+				if (((ui32PDIndex + i) >= ui32PDRequestStart) && ((ui32PDIndex + i) <= ui32PDRequestEnd))
+				{
+					IMG_UINT32 ui32PDCacheLine = (ui32PDIndex + i) >> BRN31620_PDES_PER_CACHE_LINE_SHIFT;
+
+					ppsPTInfoList[i] = pMMUHeap->psMMUContext->apsPTInfoListSave[ui32PDIndex + i];
+					pMMUHeap->psMMUContext->apsPTInfoListSave[ui32PDIndex + i] = IMG_NULL;
+
+					pMMUHeap->psMMUContext->ui32PDCacheRangeRefCount[ui32PDCacheLine]++;
+				}
+			}
+			else
+			{
+#endif
 			OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
 						 sizeof (MMU_PT_INFO),
 						 (IMG_VOID **)&ppsPTInfoList[i], IMG_NULL,
@@ -708,8 +965,15 @@ _DeferredAllocPagetables(MMU_HEAP *pMMUHeap, IMG_DEV_VIRTADDR DevVAddr, IMG_UINT
 				return IMG_FALSE;
 			}
 			OSMemSet (ppsPTInfoList[i], 0, sizeof(MMU_PT_INFO));
+#if defined(FIX_HW_BRN_31620)
+			}
+#endif
 		}
-
+#if defined(FIX_HW_BRN_31620)
+		
+		if (ppsPTInfoList[i])
+		{
+#endif
 		if(ppsPTInfoList[i]->hPTPageOSMemHandle == IMG_NULL
 		&& ppsPTInfoList[i]->PTPageCpuVAddr == IMG_NULL)
 		{
@@ -718,16 +982,43 @@ _DeferredAllocPagetables(MMU_HEAP *pMMUHeap, IMG_DEV_VIRTADDR DevVAddr, IMG_UINT
 			IMG_UINT32 *pui32Tmp;
 			IMG_UINT32 j;
 #else
+#if !defined(FIX_HW_BRN_31620)
 			
 			PVR_ASSERT(pui32PDEntry[i] == 0);
 #endif
-
+#endif
 			if(_AllocPageTableMemory (pMMUHeap, ppsPTInfoList[i], &sDevPAddr) != IMG_TRUE)
 			{
 				PVR_DPF((PVR_DBG_ERROR, "_DeferredAllocPagetables: ERROR call to _AllocPageTableMemory failed"));
 				return IMG_FALSE;
 			}
+#if defined(FIX_HW_BRN_31620)
+			bFlushSystemCache = IMG_TRUE;
+			
+			{
+				IMG_UINT32 ui32PD;
+				IMG_UINT32 ui32PDCacheLine;
+				IMG_UINT32 ui32PDBitMaskIndex;
+				IMG_UINT32 ui32PDBitMaskShift;
+
+				ui32PD = ui32PDIndex + i;
+				ui32PDCacheLine = ui32PD >> BRN31620_PDES_PER_CACHE_LINE_SHIFT;
+				ui32PDBitMaskIndex = ui32PDCacheLine >> BRN31620_CACHE_FLUSH_BITS_SHIFT;
+				ui32PDBitMaskShift = ui32PDCacheLine & BRN31620_CACHE_FLUSH_BITS_MASK;
+				ui32ModifiedCachelines[ui32PDBitMaskIndex] |= 1 << ui32PDBitMaskShift;
+
+				
+				if ((pMMUHeap->ui32PDBaseIndex + pMMUHeap->ui32PageTableCount) < (ui32PD + 1))
+				{
+					pMMUHeap->ui32PageTableCount = (ui32PD + 1) - pMMUHeap->ui32PDBaseIndex;
+				}
 
+				if (((ui32PDIndex + i) >= ui32PDRequestStart) && ((ui32PDIndex + i) <= ui32PDRequestEnd))
+				{
+					pMMUHeap->psMMUContext->ui32PDCacheRangeRefCount[ui32PDCacheLine]++;
+				}
+			}
+#endif
 			switch(pMMUHeap->psDevArena->DevMemHeapType)
 			{
 				case DEVICE_MEMORY_HEAP_SHARED :
@@ -746,21 +1037,22 @@ _DeferredAllocPagetables(MMU_HEAP *pMMUHeap, IMG_DEV_VIRTADDR DevVAddr, IMG_UINT
 						pui32PDEntry[i] = (sDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT)
 										| pMMUHeap->ui32PDEPageSizeCtrl
 										| SGX_MMU_PDE_VALID;
-
 						#if defined(PDUMP)
 						
 						#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
 						if(psMMUContext->bPDumpActive)
 						#endif
 						{
-
+							
 							PDUMPPDENTRIES(&pMMUHeap->sMMUAttrib, psMMUContext->hPDOSMemHandle, (IMG_VOID*)&pui32PDEntry[i], sizeof(IMG_UINT32), 0, IMG_FALSE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
 						}
-						#endif
-
+						#endif 
 						
 						psMMUContext = psMMUContext->psNext;
 					}
+#if defined(FIX_HW_BRN_31620)
+					bSharedPT = IMG_TRUE;
+#endif
 					break;
 				}
 				case DEVICE_MEMORY_HEAP_PERCONTEXT :
@@ -772,6 +1064,7 @@ _DeferredAllocPagetables(MMU_HEAP *pMMUHeap, IMG_DEV_VIRTADDR DevVAddr, IMG_UINT
 									| SGX_MMU_PDE_VALID;
 
 					
+					
 					PDUMPPDENTRIES(&pMMUHeap->sMMUAttrib, pMMUHeap->psMMUContext->hPDOSMemHandle, (IMG_VOID*)&pui32PDEntry[i], sizeof(IMG_UINT32), 0, IMG_FALSE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
 					break;
 				}
@@ -789,17 +1082,112 @@ _DeferredAllocPagetables(MMU_HEAP *pMMUHeap, IMG_DEV_VIRTADDR DevVAddr, IMG_UINT
 
 			MMU_InvalidateDirectoryCache(pMMUHeap->psMMUContext->psDevInfo);
 #endif
+#if defined(FIX_HW_BRN_31620)
+			
+			if (((ui32PDIndex + i) < ui32PDRequestStart) || ((ui32PDIndex + i) > ui32PDRequestEnd))
+			{
+					pMMUHeap->psMMUContext->apsPTInfoListSave[ui32PDIndex + i] = ppsPTInfoList[i];
+					ppsPTInfoList[i] = IMG_NULL;
+			}
+#endif
 		}
 		else
 		{
+#if !defined(FIX_HW_BRN_31620)
 			
 			PVR_ASSERT(pui32PDEntry[i] != 0);
+#endif
 		}
+#if defined(FIX_HW_BRN_31620)
+		}
+#endif
 	}
 
 	#if defined(SGX_FEATURE_SYSTEM_CACHE)
+	#if defined(FIX_HW_BRN_31620)
+	
+	if (bFlushSystemCache)
+	{
+	#endif
+
 	MMU_InvalidateSystemLevelCache(pMMUHeap->psMMUContext->psDevInfo);
 	#endif 
+	#if defined(FIX_HW_BRN_31620)
+	}
+
+	
+	sHighDevVAddr.uiAddr = sHighDevVAddr.uiAddr - 1;
+
+	
+	if (bFlushSystemCache)
+	{
+		MMU_CONTEXT *psMMUContext;
+
+		if (bSharedPT)
+		{
+			MMU_CONTEXT *psMMUContext = (MMU_CONTEXT*)pMMUHeap->psMMUContext->psDevInfo->pvMMUContextList;
+
+			while(psMMUContext)
+			{
+				for (i=0;i<BRN31620_CACHE_FLUSH_INDEX_SIZE;i++)
+				{
+					psMMUContext->ui32PDChangeMask[i] |= ui32ModifiedCachelines[i];
+				}
+
+				
+				psMMUContext = psMMUContext->psNext;
+			}
+		}
+		else
+		{
+			for (i=0;i<BRN31620_CACHE_FLUSH_INDEX_SIZE;i++)
+			{
+				pMMUHeap->psMMUContext->ui32PDChangeMask[i] |= ui32ModifiedCachelines[i];
+			}
+		}
+
+		
+		psMMUContext = pMMUHeap->psMMUContext;
+		for (i=0;i<BRN31620_CACHE_FLUSH_INDEX_SIZE;i++)
+		{
+			IMG_UINT32 j;
+
+			for(j=0;j<BRN31620_CACHE_FLUSH_BITS_SIZE;j++)
+			{
+				if (ui32ModifiedCachelines[i] & (1 << j))
+				{
+					PVRSRV_SGXDEV_INFO *psDevInfo = psMMUContext->psDevInfo;
+					MMU_PT_INFO *psTempPTInfo = IMG_NULL;
+					IMG_UINT32 *pui32Tmp;
+
+					ui32PDIndex = (((i * BRN31620_CACHE_FLUSH_BITS_SIZE) + j) * BRN31620_PDES_PER_CACHE_LINE_SIZE) + BRN31620_DUMMY_PDE_INDEX;
+
+					
+					if (psMMUContext->apsPTInfoList[ui32PDIndex])
+					{
+						psTempPTInfo = psMMUContext->apsPTInfoList[ui32PDIndex];
+					}
+					else
+					{
+						psTempPTInfo = psMMUContext->apsPTInfoListSave[ui32PDIndex];
+					}
+
+					PVR_ASSERT(psTempPTInfo != IMG_NULL);
+
+					pui32Tmp = (IMG_UINT32 *) psTempPTInfo->PTPageCpuVAddr;
+					PVR_ASSERT(pui32Tmp != IMG_NULL);
+					pui32Tmp[BRN31620_DUMMY_PTE_INDEX] = (psDevInfo->sBRN31620DummyPageDevPAddr.uiAddr>>SGX_MMU_PTE_ADDR_ALIGNSHIFT)
+															| SGX_MMU_PTE_DUMMY_PAGE
+															| SGX_MMU_PTE_READONLY
+															| SGX_MMU_PTE_VALID;
+
+					PDUMPCOMMENT("BRN31620 Dump PTE for dummy page after wireing up new PT");
+					PDUMPMEMPTENTRIES(&pMMUHeap->sMMUAttrib, psTempPTInfo->hPTPageOSMemHandle, (IMG_VOID *) &pui32Tmp[BRN31620_DUMMY_PTE_INDEX], sizeof(IMG_UINT32), 0, IMG_FALSE, PDUMP_PT_UNIQUETAG, PDUMP_PT_UNIQUETAG);
+				}
+			}
+		}
+	}
+	#endif
 
 	return IMG_TRUE;
 }
@@ -810,6 +1198,7 @@ IMG_UINT32 MMU_GetPDumpContextID(IMG_HANDLE hDevMemContext)
 {
 	BM_CONTEXT *pBMContext = hDevMemContext;
 	PVR_ASSERT(pBMContext);
+	 
 	return pBMContext->psMMUContext->ui32PDumpMMUContextID;
 }
 
@@ -956,6 +1345,69 @@ MMU_Initialise (PVRSRV_DEVICE_NODE *psDeviceNode, MMU_CONTEXT **ppsMMUContext, I
 			psDevInfo->sDummyDataDevPAddr = SysCpuPAddrToDevPAddr (PVRSRV_DEVICE_TYPE_SGX, sCpuPAddr);
 		}
 #endif 
+#if defined(FIX_HW_BRN_31620)
+		
+		if(!psDevInfo->pvMMUContextList)
+		{
+			IMG_UINT32 j;
+			
+			if (OSAllocPages(PVRSRV_HAP_WRITECOMBINE | PVRSRV_HAP_KERNEL_ONLY,
+								SGX_MMU_PAGE_SIZE,
+								SGX_MMU_PAGE_SIZE,
+								&psDevInfo->pvBRN31620DummyPageCpuVAddr,
+								&psDevInfo->hBRN31620DummyPageOSMemHandle) != PVRSRV_OK)
+			{
+				PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: ERROR call to OSAllocPages failed"));
+				return PVRSRV_ERROR_FAILED_TO_ALLOC_PAGES;
+			}				
+
+			
+			if(psDevInfo->pvBRN31620DummyPageCpuVAddr)
+			{
+				sCpuPAddr = OSMapLinToCPUPhys(psDevInfo->hBRN31620DummyPageOSMemHandle,
+											  psDevInfo->pvBRN31620DummyPageCpuVAddr);
+			}
+			else
+			{
+				sCpuPAddr = OSMemHandleToCpuPAddr(psDevInfo->hBRN31620DummyPageOSMemHandle, 0);
+			}
+
+			pui32Tmp = (IMG_UINT32 *)psDevInfo->pvBRN31620DummyPageCpuVAddr;
+			for(j=0; j<(SGX_MMU_PAGE_SIZE/4); j++)
+			{
+				pui32Tmp[j] = BRN31620_DUMMY_PAGE_SIGNATURE;
+			}
+
+			psDevInfo->sBRN31620DummyPageDevPAddr = SysCpuPAddrToDevPAddr(PVRSRV_DEVICE_TYPE_SGX, sCpuPAddr);
+			PDUMPMALLOCPAGETABLE(&psDeviceNode->sDevId, psDevInfo->hBRN31620DummyPageOSMemHandle, 0, psDevInfo->pvBRN31620DummyPageCpuVAddr, SGX_MMU_PAGE_SIZE, 0, PDUMP_PT_UNIQUETAG);
+
+			
+			if (OSAllocPages(PVRSRV_HAP_WRITECOMBINE | PVRSRV_HAP_KERNEL_ONLY,
+								SGX_MMU_PAGE_SIZE,
+								SGX_MMU_PAGE_SIZE,
+								&psDevInfo->pvBRN31620DummyPTCpuVAddr,
+								&psDevInfo->hBRN31620DummyPTOSMemHandle) != PVRSRV_OK)
+			{
+				PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: ERROR call to OSAllocPages failed"));
+				return PVRSRV_ERROR_FAILED_TO_ALLOC_PAGES;
+			}				
+
+			
+			if(psDevInfo->pvBRN31620DummyPTCpuVAddr)
+			{
+				sCpuPAddr = OSMapLinToCPUPhys(psDevInfo->hBRN31620DummyPTOSMemHandle,
+											  psDevInfo->pvBRN31620DummyPTCpuVAddr);
+			}
+			else
+			{
+				sCpuPAddr = OSMemHandleToCpuPAddr(psDevInfo->hBRN31620DummyPTOSMemHandle, 0);
+			}
+
+			OSMemSet(psDevInfo->pvBRN31620DummyPTCpuVAddr,0,SGX_MMU_PAGE_SIZE);
+			psDevInfo->sBRN31620DummyPTDevPAddr = SysCpuPAddrToDevPAddr(PVRSRV_DEVICE_TYPE_SGX, sCpuPAddr);
+			PDUMPMALLOCPAGETABLE(&psDeviceNode->sDevId, psDevInfo->hBRN31620DummyPTOSMemHandle, 0, psDevInfo->pvBRN31620DummyPTCpuVAddr, SGX_MMU_PAGE_SIZE, 0, PDUMP_PT_UNIQUETAG);
+		}
+#endif
 	}
 	else
 	{
@@ -1051,16 +1503,96 @@ MMU_Initialise (PVRSRV_DEVICE_NODE *psDeviceNode, MMU_CONTEXT **ppsMMUContext, I
 			}
 		}
 #endif 
+#if defined(FIX_HW_BRN_31620)
+		
+		if(!psDevInfo->pvMMUContextList)
+		{
+			IMG_UINT32 j;
+			
+			if(RA_Alloc(psDeviceNode->psLocalDevMemArena,
+						SGX_MMU_PAGE_SIZE,
+						IMG_NULL,
+						IMG_NULL,
+						0,
+						SGX_MMU_PAGE_SIZE,
+						0,
+						&(sSysPAddr.uiAddr))!= IMG_TRUE)
+			{
+				PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: ERROR call to RA_Alloc failed"));
+				return PVRSRV_ERROR_FAILED_TO_ALLOC_VIRT_MEMORY;
+			}
+
+			
+			sCpuPAddr = SysSysPAddrToCpuPAddr(sSysPAddr);
+			psDevInfo->sBRN31620DummyPageDevPAddr = SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE_SGX, sSysPAddr);
+			psDevInfo->pvBRN31620DummyPageCpuVAddr = OSMapPhysToLin(sCpuPAddr,
+																SGX_MMU_PAGE_SIZE,
+																PVRSRV_HAP_WRITECOMBINE|PVRSRV_HAP_KERNEL_ONLY,
+																&psDevInfo->hBRN31620DummyPageOSMemHandle);
+			if(!psDevInfo->pvBRN31620DummyPageCpuVAddr)
+			{
+				PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: ERROR failed to map page tables"));
+				return PVRSRV_ERROR_FAILED_TO_MAP_PAGE_TABLE;
+			}
+
+			pui32Tmp = (IMG_UINT32 *)psDevInfo->pvBRN31620DummyPageCpuVAddr;
+			for(j=0; j<(SGX_MMU_PAGE_SIZE/4); j++)
+			{
+				pui32Tmp[j] = BRN31620_DUMMY_PAGE_SIGNATURE;
+			}
+			PDUMPMALLOCPAGETABLE(&psDeviceNode->sDevId, psDevInfo->hBRN31620DummyPageOSMemHandle, 0, psDevInfo->pvBRN31620DummyPageCpuVAddr, SGX_MMU_PAGE_SIZE, 0, PDUMP_PT_UNIQUETAG);
+
+			
+			if(RA_Alloc(psDeviceNode->psLocalDevMemArena,
+						SGX_MMU_PAGE_SIZE,
+						IMG_NULL,
+						IMG_NULL,
+						0,
+						SGX_MMU_PAGE_SIZE,
+						0,
+						&(sSysPAddr.uiAddr))!= IMG_TRUE)
+			{
+				PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: ERROR call to RA_Alloc failed"));
+				return PVRSRV_ERROR_FAILED_TO_ALLOC_VIRT_MEMORY;
+			}
+
+			
+			sCpuPAddr = SysSysPAddrToCpuPAddr(sSysPAddr);
+			psDevInfo->sBRN31620DummyPTDevPAddr = SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE_SGX, sSysPAddr);
+			psDevInfo->pvBRN31620DummyPTCpuVAddr = OSMapPhysToLin(sCpuPAddr,
+																SGX_MMU_PAGE_SIZE,
+																PVRSRV_HAP_WRITECOMBINE|PVRSRV_HAP_KERNEL_ONLY,
+																&psDevInfo->hBRN31620DummyPTOSMemHandle);
+
+			if(!psDevInfo->pvBRN31620DummyPTCpuVAddr)
+			{
+				PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: ERROR failed to map page tables"));
+				return PVRSRV_ERROR_FAILED_TO_MAP_PAGE_TABLE;
+			}
+
+			OSMemSet(psDevInfo->pvBRN31620DummyPTCpuVAddr,0,SGX_MMU_PAGE_SIZE);		
+			PDUMPMALLOCPAGETABLE(&psDeviceNode->sDevId, psDevInfo->hBRN31620DummyPTOSMemHandle, 0, psDevInfo->pvBRN31620DummyPTCpuVAddr, SGX_MMU_PAGE_SIZE, 0, PDUMP_PT_UNIQUETAG);
+		}
+#endif 
+	}
+
+#if defined(FIX_HW_BRN_31620)
+	if (!psDevInfo->pvMMUContextList)
+	{
+		
+		psDevInfo->hKernelMMUContext = psMMUContext;
+		PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: saving kernel mmu context: %p", psMMUContext));
 	}
+#endif
 
 #if defined(PDUMP)
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
-
+	
 	{
 		PVRSRV_PER_PROCESS_DATA* psPerProc = PVRSRVFindPerProcessData();
 		if(psPerProc == IMG_NULL)
 		{
-
+			
 			psMMUContext->bPDumpActive = IMG_TRUE;
 		}
 		else
@@ -1068,7 +1600,7 @@ MMU_Initialise (PVRSRV_DEVICE_NODE *psDeviceNode, MMU_CONTEXT **ppsMMUContext, I
 			psMMUContext->bPDumpActive = psPerProc->bPDumpActive;
 		}
 	}
-#endif
+#endif 
 	
 #if IMG_ADDRSPACE_PHYSADDR_BITS == 32
 	PDUMPCOMMENT("Alloc page directory for new MMU context (PDDevPAddr == 0x%08x)",
@@ -1079,6 +1611,7 @@ MMU_Initialise (PVRSRV_DEVICE_NODE *psDeviceNode, MMU_CONTEXT **ppsMMUContext, I
 #endif
 	PDUMPMALLOCPAGETABLE(&psDeviceNode->sDevId, hPDOSMemHandle, 0, pvPDCpuVAddr, SGX_MMU_PAGE_SIZE, 0, PDUMP_PD_UNIQUETAG);
 #endif 
+
 #ifdef SUPPORT_SGX_MMU_BYPASS
 	EnableHostAccess(psMMUContext);
 #endif
@@ -1093,6 +1626,7 @@ MMU_Initialise (PVRSRV_DEVICE_NODE *psDeviceNode, MMU_CONTEXT **ppsMMUContext, I
 		return PVRSRV_ERROR_INVALID_CPU_ADDR;
 	}
 
+
 #if defined(SUPPORT_SGX_MMU_DUMMY_PAGE)
 	
 	for(i=0; i<SGX_MMU_PD_SIZE; i++)
@@ -1140,13 +1674,71 @@ MMU_Initialise (PVRSRV_DEVICE_NODE *psDeviceNode, MMU_CONTEXT **ppsMMUContext, I
 #if defined(PDUMP)
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
 	if(psMMUContext->bPDumpActive)
-#endif
+#endif 
 	{
-
+		
 		PDUMPCOMMENT("Page directory contents");
 		PDUMPPDENTRIES(&sMMUAttrib, hPDOSMemHandle, pvPDCpuVAddr, SGX_MMU_PAGE_SIZE, 0, IMG_TRUE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
 	}
-	
+#endif
+#if defined(FIX_HW_BRN_31620)
+	{
+		IMG_UINT32 i;
+		IMG_UINT32 ui32PDCount = 0;
+		IMG_UINT32 *pui32PT;
+		pui32Tmp = (IMG_UINT32 *)pvPDCpuVAddr;
+
+		PDUMPCOMMENT("BRN31620 Set up dummy PT");
+
+		pui32PT = (IMG_UINT32 *) psDevInfo->pvBRN31620DummyPTCpuVAddr;
+		pui32PT[BRN31620_DUMMY_PTE_INDEX] = (psDevInfo->sBRN31620DummyPageDevPAddr.uiAddr>>SGX_MMU_PTE_ADDR_ALIGNSHIFT)
+								| SGX_MMU_PTE_DUMMY_PAGE
+								| SGX_MMU_PTE_READONLY
+								| SGX_MMU_PTE_VALID;
+
+
+#if defined(PDUMP)
+		
+		PDUMPCOMMENT("BRN31620 Dump dummy PT contents");
+		PDUMPMEMPTENTRIES(&sMMUAttrib,  psDevInfo->hBRN31620DummyPTOSMemHandle, psDevInfo->pvBRN31620DummyPTCpuVAddr, SGX_MMU_PAGE_SIZE, 0, IMG_TRUE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
+		PDUMPCOMMENT("BRN31620 Dump dummy page contents");
+		PDUMPMEMPTENTRIES(&sMMUAttrib,  psDevInfo->hBRN31620DummyPageOSMemHandle, psDevInfo->pvBRN31620DummyPageCpuVAddr, SGX_MMU_PAGE_SIZE, 0, IMG_TRUE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
+
+				
+		for(i=0;i<SGX_MMU_PT_SIZE;i++)
+		{
+			PDUMPMEMPTENTRIES(&sMMUAttrib, psDevInfo->hBRN31620DummyPTOSMemHandle, &pui32PT[i], sizeof(IMG_UINT32), 0, IMG_FALSE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
+		}
+#endif
+		PDUMPCOMMENT("BRN31620 Dump PDE wire up");
+		
+		for(i=0;i<SGX_MMU_PD_SIZE;i++)
+		{
+			pui32Tmp[i] = 0;
+
+			if (ui32PDCount == BRN31620_DUMMY_PDE_INDEX)
+			{
+				pui32Tmp[i] = (psDevInfo->sBRN31620DummyPTDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT)
+						| SGX_MMU_PDE_PAGE_SIZE_4K
+						| SGX_MMU_PDE_DUMMY_PAGE
+						| SGX_MMU_PDE_VALID;
+			}
+				PDUMPMEMPTENTRIES(&sMMUAttrib, hPDOSMemHandle, (IMG_VOID *) &pui32Tmp[i], sizeof(IMG_UINT32), 0, IMG_FALSE, PDUMP_PT_UNIQUETAG, PDUMP_PT_UNIQUETAG);
+			ui32PDCount++;
+			if (ui32PDCount == BRN31620_PDES_PER_CACHE_LINE_SIZE)
+			{
+				
+				ui32PDCount = 0;
+			}
+		}
+
+
+		
+		PDUMPCOMMENT("BRN31620 dummy Page table contents");
+		PDUMPMEMPTENTRIES(&sMMUAttrib, psDevInfo->hBRN31620DummyPageOSMemHandle, psDevInfo->pvBRN31620DummyPageCpuVAddr, SGX_MMU_PAGE_SIZE, 0, IMG_TRUE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
+	}
+#endif
+#if defined(PDUMP)
 	
 	{
 		PVRSRV_ERROR eError;
@@ -1179,6 +1771,22 @@ MMU_Initialise (PVRSRV_DEVICE_NODE *psDeviceNode, MMU_CONTEXT **ppsMMUContext, I
 	PDUMPCOMMENT("Set MMU context complete (MMU Context ID == %u)", psMMUContext->ui32PDumpMMUContextID);
 #endif
 
+#if defined(FIX_HW_BRN_31620)
+	for(i=0;i<BRN31620_CACHE_FLUSH_INDEX_SIZE;i++)
+	{
+		psMMUContext->ui32PDChangeMask[i] = 0;
+	}
+
+	for(i=0;i<BRN31620_CACHE_FLUSH_SIZE;i++)
+	{
+		psMMUContext->ui32PDCacheRangeRefCount[i] = 0;
+	}
+
+	for(i=0;i<SGX_MAX_PD_ENTRIES;i++)
+	{
+		psMMUContext->apsPTInfoListSave[i] = IMG_NULL;
+	}
+#endif
 	
 	psMMUContext->pvPDCpuVAddr = pvPDCpuVAddr;
 	psMMUContext->sPDDevPAddr = sPDDevPAddr;
@@ -1207,7 +1815,7 @@ MMU_Finalise (MMU_CONTEXT *psMMUContext)
 	IMG_UINT32 *pui32Tmp, i;
 	SYS_DATA *psSysData;
 	MMU_CONTEXT **ppsMMUContext;
-#if defined(SUPPORT_SGX_MMU_DUMMY_PAGE)
+#if defined(SUPPORT_SGX_MMU_DUMMY_PAGE) || defined(FIX_HW_BRN_31620)
 	PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO*)psMMUContext->psDevInfo;
 	MMU_CONTEXT *psMMUContextList = (MMU_CONTEXT*)psDevInfo->pvMMUContextList;
 #endif
@@ -1250,11 +1858,32 @@ MMU_Finalise (MMU_CONTEXT *psMMUContext)
 
 	if(psMMUContext->psDeviceNode->psLocalDevMemArena == IMG_NULL)
 	{
+#if defined(FIX_HW_BRN_31620)
+		PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO*)psMMUContext->psDevInfo;
+#endif
 		OSFreePages(PVRSRV_HAP_WRITECOMBINE | PVRSRV_HAP_KERNEL_ONLY,
 						SGX_MMU_PAGE_SIZE,
 						psMMUContext->pvPDCpuVAddr,
 						psMMUContext->hPDOSMemHandle);
 
+#if defined(FIX_HW_BRN_31620)
+		
+		if (!psMMUContextList->psNext)
+		{
+			PDUMPFREEPAGETABLE(&psMMUContext->psDeviceNode->sDevId, psDevInfo->hBRN31620DummyPageOSMemHandle, psDevInfo->pvBRN31620DummyPageCpuVAddr, SGX_MMU_PAGE_SIZE, 0, PDUMP_PT_UNIQUETAG);
+			OSFreePages(PVRSRV_HAP_WRITECOMBINE | PVRSRV_HAP_KERNEL_ONLY,
+							SGX_MMU_PAGE_SIZE,
+							psDevInfo->pvBRN31620DummyPageCpuVAddr,
+							psDevInfo->hBRN31620DummyPageOSMemHandle);
+
+			PDUMPFREEPAGETABLE(&psMMUContext->psDeviceNode->sDevId, psDevInfo->hBRN31620DummyPTOSMemHandle, psDevInfo->pvBRN31620DummyPTCpuVAddr, SGX_MMU_PAGE_SIZE, 0, PDUMP_PT_UNIQUETAG);
+			OSFreePages(PVRSRV_HAP_WRITECOMBINE | PVRSRV_HAP_KERNEL_ONLY,
+							SGX_MMU_PAGE_SIZE,
+							psDevInfo->pvBRN31620DummyPTCpuVAddr,
+							psDevInfo->hBRN31620DummyPTOSMemHandle);
+	
+		}
+#endif
 #if defined(SUPPORT_SGX_MMU_DUMMY_PAGE)
 		
 		if(!psMMUContextList->psNext)
@@ -1319,6 +1948,41 @@ MMU_Finalise (MMU_CONTEXT *psMMUContext)
 			RA_Free (psMMUContext->psDeviceNode->psLocalDevMemArena, sSysPAddr.uiAddr, IMG_FALSE);
 		}
 #endif
+#if defined(FIX_HW_BRN_31620)
+		
+		if(!psMMUContextList->psNext)
+		{
+			
+			PDUMPFREEPAGETABLE(&psMMUContext->psDeviceNode->sDevId, psDevInfo->hBRN31620DummyPageOSMemHandle, psDevInfo->pvBRN31620DummyPageCpuVAddr, SGX_MMU_PAGE_SIZE, 0, PDUMP_PT_UNIQUETAG);
+
+			sCpuPAddr = OSMapLinToCPUPhys(psDevInfo->hBRN31620DummyPageOSMemHandle,
+										  psDevInfo->pvBRN31620DummyPageCpuVAddr);
+			sSysPAddr = SysCpuPAddrToSysPAddr(sCpuPAddr);
+
+			
+			OSUnMapPhysToLin(psDevInfo->pvBRN31620DummyPageCpuVAddr,
+								SGX_MMU_PAGE_SIZE,
+                                PVRSRV_HAP_WRITECOMBINE|PVRSRV_HAP_KERNEL_ONLY,
+								psDevInfo->hBRN31620DummyPageOSMemHandle);
+			
+			RA_Free (psMMUContext->psDeviceNode->psLocalDevMemArena, sSysPAddr.uiAddr, IMG_FALSE);
+
+			
+			PDUMPFREEPAGETABLE(&psMMUContext->psDeviceNode->sDevId, psDevInfo->hBRN31620DummyPTOSMemHandle, psDevInfo->pvBRN31620DummyPTCpuVAddr, SGX_MMU_PAGE_SIZE, 0, PDUMP_PT_UNIQUETAG);
+
+			sCpuPAddr = OSMapLinToCPUPhys(psDevInfo->hBRN31620DummyPTOSMemHandle,
+										  psDevInfo->pvBRN31620DummyPTCpuVAddr);
+			sSysPAddr = SysCpuPAddrToSysPAddr(sCpuPAddr);
+
+			
+			OSUnMapPhysToLin(psDevInfo->pvBRN31620DummyPTCpuVAddr,
+								SGX_MMU_PAGE_SIZE,
+                                PVRSRV_HAP_WRITECOMBINE|PVRSRV_HAP_KERNEL_ONLY,
+								psDevInfo->hBRN31620DummyPTOSMemHandle);
+			
+			RA_Free (psMMUContext->psDeviceNode->psLocalDevMemArena, sSysPAddr.uiAddr, IMG_FALSE);
+		}
+#endif
 	}
 
 	PVR_DPF ((PVR_DBG_MESSAGE, "MMU_Finalise"));
@@ -1374,7 +2038,7 @@ MMU_InsertHeap(MMU_CONTEXT *psMMUContext, MMU_HEAP *psMMUHeap)
 
 	for (ui32PDEntry = 0; ui32PDEntry < psMMUHeap->ui32PageTableCount; ui32PDEntry++)
 	{
-#if !defined(SUPPORT_SGX_MMU_DUMMY_PAGE)
+#if (!defined(SUPPORT_SGX_MMU_DUMMY_PAGE)) && (!defined(FIX_HW_BRN_31620))
 		
 		PVR_ASSERT(pui32PDCpuVAddr[ui32PDEntry] == 0);
 #endif
@@ -1383,12 +2047,12 @@ MMU_InsertHeap(MMU_CONTEXT *psMMUContext, MMU_HEAP *psMMUHeap)
 		pui32PDCpuVAddr[ui32PDEntry] = pui32KernelPDCpuVAddr[ui32PDEntry];
 		if (pui32PDCpuVAddr[ui32PDEntry])
 		{
-
+			
 		#if defined(PDUMP)
-
+			
 		#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
 			if(psMMUContext->bPDumpActive)
-		#endif
+		#endif 
 			{
 				PDUMPPDENTRIES(&psMMUHeap->sMMUAttrib, psMMUContext->hPDOSMemHandle, (IMG_VOID *) &pui32PDCpuVAddr[ui32PDEntry], sizeof(IMG_UINT32), 0, IMG_FALSE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
 			}
@@ -1491,8 +2155,12 @@ MMU_UnmapPagesAndFreePTs (MMU_HEAP *psMMUHeap,
 									| SGX_MMU_PTE_VALID;
 #else
 			
+#if defined(FIX_HW_BRN_31620)
+			BRN31620InvalidatePageTableEntry(psMMUHeap->psMMUContext, ui32PDIndex, ui32PTIndex, &pui32Tmp[ui32PTIndex]);
+#else
 			pui32Tmp[ui32PTIndex] = 0;
 #endif
+#endif
 
 			CheckPT(ppsPTInfoList[0]);
 		}
@@ -1501,8 +2169,15 @@ MMU_UnmapPagesAndFreePTs (MMU_HEAP *psMMUHeap,
 
 		if (ppsPTInfoList[0] && ppsPTInfoList[0]->ui32ValidPTECount == 0)
 		{
+#if defined(FIX_HW_BRN_31620)
+			if (BRN31620FreePageTable(psMMUHeap, ui32PDIndex) == IMG_TRUE)
+			{
+				bInvalidateDirectoryCache = IMG_TRUE;
+			}
+#else
 			_DeferredFreePageTable(psMMUHeap, ui32PDIndex - psMMUHeap->ui32PDBaseIndex, IMG_TRUE);
 			bInvalidateDirectoryCache = IMG_TRUE;
+#endif
 		}
 
 		
@@ -1536,9 +2211,9 @@ static IMG_VOID MMU_FreePageTables(IMG_PVOID pvMMUHeap,
 	MMU_HEAP *pMMUHeap = (MMU_HEAP*)pvMMUHeap;
 	IMG_DEV_VIRTADDR Start;
 
-	Start.uiAddr = ui32Start;
+	Start.uiAddr = (IMG_UINT32)ui32Start;
 
-	MMU_UnmapPagesAndFreePTs(pMMUHeap, Start, (ui32End - ui32Start) >> pMMUHeap->ui32PTShift, hUniqueTag);
+	MMU_UnmapPagesAndFreePTs(pMMUHeap, Start, (IMG_UINT32)((ui32End - ui32Start) >> pMMUHeap->ui32PTShift), hUniqueTag);
 }
 
 MMU_HEAP *
@@ -1618,12 +2293,16 @@ MMU_Create (MMU_CONTEXT *psMMUContext,
 	pMMUHeap->ui32PTBitWidth = SGX_MMU_PT_SHIFT - ui32ScaleSize;
 	pMMUHeap->ui32PTMask = SGX_MMU_PT_MASK & (SGX_MMU_PT_MASK<<ui32ScaleSize);
 	pMMUHeap->ui32PTSize = (IMG_UINT32)(1UL<<pMMUHeap->ui32PTBitWidth) * sizeof(IMG_UINT32);
+
 	
 	if(pMMUHeap->ui32PTSize < 4 * sizeof(IMG_UINT32))
 	{
 		pMMUHeap->ui32PTSize = 4 * sizeof(IMG_UINT32);
 	}
-	pMMUHeap->ui32PTECount = pMMUHeap->ui32PTSize >> 2;
+	pMMUHeap->ui32PTNumEntriesAllocated = pMMUHeap->ui32PTSize >> 2;
+
+	
+	pMMUHeap->ui32PTNumEntriesUsable = (IMG_UINT32)(1UL << pMMUHeap->ui32PTBitWidth);
 
 	
 	pMMUHeap->ui32PDShift = pMMUHeap->ui32PTBitWidth + pMMUHeap->ui32PTShift;
@@ -1645,7 +2324,7 @@ MMU_Create (MMU_CONTEXT *psMMUContext,
 	}
 
 	
-	pMMUHeap->ui32PTETotal = pMMUHeap->psDevArena->ui32Size >> pMMUHeap->ui32PTShift;
+	pMMUHeap->ui32PTETotalUsable = pMMUHeap->psDevArena->ui32Size >> pMMUHeap->ui32PTShift;
 
 	
 	pMMUHeap->ui32PDBaseIndex = (pMMUHeap->psDevArena->BaseDevVAddr.uiAddr & pMMUHeap->ui32PDMask) >> pMMUHeap->ui32PDShift;
@@ -1653,8 +2332,9 @@ MMU_Create (MMU_CONTEXT *psMMUContext,
 	
 
 
-	pMMUHeap->ui32PageTableCount = (pMMUHeap->ui32PTETotal + pMMUHeap->ui32PTECount - 1)
+	pMMUHeap->ui32PageTableCount = (pMMUHeap->ui32PTETotalUsable + pMMUHeap->ui32PTNumEntriesUsable - 1)
 										>> pMMUHeap->ui32PTBitWidth;
+	PVR_ASSERT(pMMUHeap->ui32PageTableCount > 0);
 
 	
 	pMMUHeap->psVMArena = RA_Create(psDevArena->pszName,
@@ -1808,7 +2488,7 @@ MMU_Alloc (MMU_HEAP *pMMUHeap,
 	#endif
 
 	
-	bStatus = _DeferredAllocPagetables(pMMUHeap, *psDevVAddr, uSize);
+	bStatus = _DeferredAllocPagetables(pMMUHeap, *psDevVAddr, (IMG_UINT32)uSize);
 
 	#ifdef SUPPORT_SGX_MMU_BYPASS
 	DisableHostAccess(pMMUHeap->psMMUContext);
@@ -1874,6 +2554,26 @@ MMU_Disable (MMU_HEAP *pMMUHeap)
 	
 }
 
+#if defined(FIX_HW_BRN_31620)
+IMG_VOID MMU_GetCacheFlushRange(MMU_CONTEXT *pMMUContext, IMG_UINT32 *pui32RangeMask)
+{
+	IMG_UINT32 i;
+
+	for (i=0;i<BRN31620_CACHE_FLUSH_INDEX_SIZE;i++)
+	{
+		pui32RangeMask[i] = pMMUContext->ui32PDChangeMask[i];
+
+		
+		pMMUContext->ui32PDChangeMask[i] = 0;
+	}
+}
+
+IMG_VOID MMU_GetPDPhysAddr(MMU_CONTEXT *pMMUContext, IMG_DEV_PHYADDR *psDevPAddr)
+{
+	*psDevPAddr = pMMUContext->sPDDevPAddr;
+}
+
+#endif
 #if defined(PDUMP)
 static IMG_VOID
 MMU_PDumpPageTables	(MMU_HEAP *pMMUHeap,
@@ -1891,7 +2591,7 @@ MMU_PDumpPageTables	(MMU_HEAP *pMMUHeap,
 	IMG_UINT32 ui32PTDumpCount;
 
 	
-	ui32NumPTEntries = (uSize + pMMUHeap->ui32DataPageMask) >> pMMUHeap->ui32PTShift;
+	ui32NumPTEntries = (IMG_UINT32)((uSize + pMMUHeap->ui32DataPageMask) >> pMMUHeap->ui32PTShift);
 
 	
 	ui32PDIndex = DevVAddr.uiAddr >> pMMUHeap->ui32PDShift;
@@ -1910,13 +2610,13 @@ MMU_PDumpPageTables	(MMU_HEAP *pMMUHeap,
 	{
 		MMU_PT_INFO* psPTInfo = *ppsPTInfoList++;
 
-		if(ui32NumPTEntries <= pMMUHeap->ui32PTECount - ui32PTIndex)
+		if(ui32NumPTEntries <= pMMUHeap->ui32PTNumEntriesUsable - ui32PTIndex)
 		{
 			ui32PTDumpCount = ui32NumPTEntries;
 		}
 		else
 		{
-			ui32PTDumpCount = pMMUHeap->ui32PTECount - ui32PTIndex;
+			ui32PTDumpCount = pMMUHeap->ui32PTNumEntriesUsable - ui32PTIndex;
 		}
 
 		if (psPTInfo)
@@ -2009,7 +2709,12 @@ MMU_MapPage (MMU_HEAP *pMMUHeap,
 		IMG_UINT32 uTmp = pui32Tmp[ui32Index];
 		
 		
-		if (uTmp & SGX_MMU_PTE_VALID)
+#if defined(FIX_HW_BRN_31620)
+		if ((uTmp & SGX_MMU_PTE_VALID) && ((DevVAddr.uiAddr & BRN31620_PDE_CACHE_FILL_MASK) != BRN31620_DUMMY_PAGE_OFFSET))
+#else
+ 		if ((uTmp & SGX_MMU_PTE_VALID) != 0)
+#endif
+
 		{
 			PVR_DPF((PVR_DBG_ERROR, "MMU_MapPage: Page is already valid for alloc at VAddr:0x%08X PDIdx:%u PTIdx:%u",
 									DevVAddr.uiAddr,
@@ -2018,8 +2723,9 @@ MMU_MapPage (MMU_HEAP *pMMUHeap,
 			PVR_DPF((PVR_DBG_ERROR, "MMU_MapPage: Page table entry value: 0x%08X", uTmp));
 			PVR_DPF((PVR_DBG_ERROR, "MMU_MapPage: Physical page to map: 0x%08X", DevPAddr.uiAddr));
 		}
-		
+#if !defined(FIX_HW_BRN_31620)
 		PVR_ASSERT((uTmp & SGX_MMU_PTE_VALID) == 0);
+#endif
 	}
 #endif
 
@@ -2322,8 +3028,12 @@ MMU_UnmapPages (MMU_HEAP *psMMUHeap,
 								| SGX_MMU_PTE_VALID;
 #else
 		
+#if defined(FIX_HW_BRN_31620)
+		BRN31620InvalidatePageTableEntry(psMMUHeap->psMMUContext, ui32PDIndex, ui32PTIndex, &pui32Tmp[ui32PTIndex]);
+#else
 		pui32Tmp[ui32PTIndex] = 0;
 #endif
+#endif
 
 		CheckPT(ppsPTInfoList[0]);
 
@@ -2906,9 +3616,9 @@ PVRSRV_ERROR MMU_MapExtSystemCacheRegs(PVRSRV_DEVICE_NODE *psDeviceNode)
 							| SGX_MMU_PTE_VALID;
 
 	
-	PDUMPMALLOCPAGETABLE(&psDeviceNode->sDevID, hPTPageOSMemHandle, 0, pui32PT, SGX_MMU_PAGE_SIZE, 0, PDUMP_PT_UNIQUETAG);
-	PDUMPMEMPTENTRIES(PVRSRV_DEVICE_TYPE_SGX, hPDPageOSMemHandle, pui32PD, SGX_MMU_PAGE_SIZE, 0, IMG_TRUE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
-	PDUMPMEMPTENTRIES(PVRSRV_DEVICE_TYPE_SGX, hPTPageOSMemHandle, pui32PT, SGX_MMU_PAGE_SIZE, 0, IMG_TRUE, PDUMP_PT_UNIQUETAG, PDUMP_PD_UNIQUETAG);
+	PDUMPMALLOCPAGETABLE(&psDeviceNode->sDevId, hPTPageOSMemHandle, 0, pui32PT, SGX_MMU_PAGE_SIZE, 0, PDUMP_PT_UNIQUETAG);
+	PDUMPMEMPTENTRIES(&psDevInfo->sMMUAttrib, psDeviceNode->sDevMemoryInfo.pBMKernelContext->psMMUContext->hPDOSMemHandle, pui32PD, SGX_MMU_PAGE_SIZE, 0, IMG_TRUE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
+	PDUMPMEMPTENTRIES(&psDevInfo->sMMUAttrib, hPTPageOSMemHandle, pui32PT, SGX_MMU_PAGE_SIZE, 0, IMG_TRUE, PDUMP_PT_UNIQUETAG, PDUMP_PD_UNIQUETAG);
 
 	
 	psDevInfo->pui32ExtSystemCacheRegsPT = pui32PT;
diff --git a/drivers/gpu/pvr/sgx/mmu.h b/drivers/gpu/pvr/sgx/mmu.h
index 80e3122a438..3c471a4994f 100644
--- a/drivers/gpu/pvr/sgx/mmu.h
+++ b/drivers/gpu/pvr/sgx/mmu.h
@@ -78,7 +78,7 @@ MMU_MapPages (MMU_HEAP *pMMUHeap,
 IMG_VOID
 MMU_MapShadow (MMU_HEAP          * pMMUHeap,
                IMG_DEV_VIRTADDR    MapBaseDevVAddr,
-               IMG_SIZE_T          uByteSize,
+               IMG_SIZE_T          uByteSize, 
                IMG_CPU_VIRTADDR    CpuVAddr,
                IMG_HANDLE          hOSMemHandle,
                IMG_DEV_VIRTADDR  * pDevVAddr,
@@ -139,6 +139,12 @@ PVRSRV_ERROR MMU_UnmapExtSystemCacheRegs(PVRSRV_DEVICE_NODE *psDeviceNode);
 
 IMG_BOOL MMU_IsHeapShared(MMU_HEAP* pMMU_Heap);
 
+#if defined(FIX_HW_BRN_31620)
+IMG_VOID MMU_GetCacheFlushRange(MMU_CONTEXT *pMMUContext, IMG_UINT32 *pui32RangeMask);
+
+IMG_VOID MMU_GetPDPhysAddr(MMU_CONTEXT *pMMUContext, IMG_DEV_PHYADDR *psDevPAddr);
+
+#endif
 #if defined(PDUMP)
 IMG_UINT32 MMU_GetPDumpContextID(IMG_HANDLE hDevMemContext);
 #endif 
diff --git a/drivers/gpu/pvr/sgx/pb.c b/drivers/gpu/pvr/sgx/pb.c
index f9e8b19a70a..b2ba005d008 100644
--- a/drivers/gpu/pvr/sgx/pb.c
+++ b/drivers/gpu/pvr/sgx/pb.c
@@ -185,6 +185,7 @@ SGXCleanupSharedPBDescKM(PVRSRV_STUB_PBDESC *psStubPBDescIn)
 	psStubPBDescIn->ui32RefCount--;
 	if (psStubPBDescIn->ui32RefCount == 0)
 	{
+		IMG_DEV_VIRTADDR sHWPBDescDevVAddr = psStubPBDescIn->sHWPBDescDevVAddr;
 		List_PVRSRV_STUB_PBDESC_Remove(psStubPBDescIn);
 		for(i=0 ; i<psStubPBDescIn->ui32SubKernelMemInfosCount; i++)
 		{
@@ -215,7 +216,7 @@ SGXCleanupSharedPBDescKM(PVRSRV_STUB_PBDESC *psStubPBDescIn)
 
 		
 		SGXCleanupRequest(psDeviceNode,
-						  IMG_NULL,
+						  &sHWPBDescDevVAddr,
 						  PVRSRV_CLEANUPCMD_PB);
 	}
 	return PVRSRV_OK;
@@ -268,7 +269,8 @@ SGXAddSharedPBDescKM(PVRSRV_PER_PROCESS_DATA	*psPerProc,
 					 IMG_UINT32					ui32TotalPBSize,
 					 IMG_HANDLE					*phSharedPBDesc,
 					 PVRSRV_KERNEL_MEM_INFO		**ppsSharedPBDescSubKernelMemInfos,
-					 IMG_UINT32					ui32SharedPBDescSubKernelMemInfosCount)
+					 IMG_UINT32					ui32SharedPBDescSubKernelMemInfosCount,
+					 IMG_DEV_VIRTADDR			sHWPBDescDevVAddr)
 {
 	PVRSRV_STUB_PBDESC *psStubPBDesc=IMG_NULL;
 	PVRSRV_ERROR eRet = PVRSRV_ERROR_INVALID_PERPROC;
@@ -402,6 +404,8 @@ SGXAddSharedPBDescKM(PVRSRV_PER_PROCESS_DATA	*psPerProc,
 		}
 	}
 
+	psStubPBDesc->sHWPBDescDevVAddr = sHWPBDescDevVAddr;
+
 	psResItem = ResManRegisterRes(psPerProc->hResManContext,
 								  RESMAN_TYPE_SHARED_PB_DESC,
 								  psStubPBDesc,
diff --git a/drivers/gpu/pvr/sgx/sgx_bridge_km.h b/drivers/gpu/pvr/sgx/sgx_bridge_km.h
index 7738be13f38..7a14024f4ad 100644
--- a/drivers/gpu/pvr/sgx/sgx_bridge_km.h
+++ b/drivers/gpu/pvr/sgx/sgx_bridge_km.h
@@ -39,16 +39,28 @@ extern "C" {
 #endif
 
 IMG_IMPORT
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK_KM *psKick);
+#else
 PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK *psKick);
+#endif
 
 #if defined(SGX_FEATURE_2D_HARDWARE)
 IMG_IMPORT
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK_KM *psKick);
+#else
 PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK *psKick);
 #endif
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle,
+#if defined (SUPPORT_SID_INTERFACE)
+						 SGX_CCB_KICK_KM *psCCBKick);
+#else
 						 SGX_CCB_KICK *psCCBKick);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR SGXGetPhysPageAddrKM(IMG_HANDLE hDevMemHeap,
@@ -86,12 +98,21 @@ PVRSRV_ERROR SGX2DQueryBlitsCompleteKM(PVRSRV_SGXDEV_INFO		*psDevInfo,
 
 IMG_IMPORT
 PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle,
+#if defined (SUPPORT_SID_INTERFACE)
+									PVRSRV_HEAP_INFO_KM *pasHeapInfo,
+									IMG_DEV_PHYADDR *psPDDevPAddr);
+#else
 									SGX_BRIDGE_INFO_FOR_SRVINIT *psInitInfo);
+#endif
 
 IMG_IMPORT
 PVRSRV_ERROR DevInitSGXPart2KM(PVRSRV_PER_PROCESS_DATA *psPerProc,
 							   IMG_HANDLE hDevHandle,
+#if defined (SUPPORT_SID_INTERFACE)
+							   SGX_BRIDGE_INIT_INFO_KM *psInitInfo);
+#else
 							   SGX_BRIDGE_INIT_INFO *psInitInfo);
+#endif
 
 IMG_IMPORT PVRSRV_ERROR
 SGXFindSharedPBDescKM(PVRSRV_PER_PROCESS_DATA	*psPerProc,
@@ -119,12 +140,17 @@ SGXAddSharedPBDescKM(PVRSRV_PER_PROCESS_DATA	*psPerProc,
 					 IMG_UINT32					ui32TotalPBSize,
 					 IMG_HANDLE					*phSharedPBDesc,
 					 PVRSRV_KERNEL_MEM_INFO		**psSharedPBDescSubKernelMemInfos,
-					 IMG_UINT32					ui32SharedPBDescSubKernelMemInfosCount);
+					 IMG_UINT32					ui32SharedPBDescSubKernelMemInfosCount,
+					 IMG_DEV_VIRTADDR			sHWPBDescDevVAddr);
 
 
 IMG_IMPORT PVRSRV_ERROR
 SGXGetInternalDevInfoKM(IMG_HANDLE hDevCookie,
+#if defined (SUPPORT_SID_INTERFACE)
+						SGX_INTERNAL_DEVINFO_KM *psSGXInternalDevInfo);
+#else
 						SGX_INTERNAL_DEVINFO *psSGXInternalDevInfo);
+#endif
 
 #if defined (__cplusplus)
 }
diff --git a/drivers/gpu/pvr/sgx/sgxconfig.h b/drivers/gpu/pvr/sgx/sgxconfig.h
index 6d9d077bb85..8cbe39bc11f 100644
--- a/drivers/gpu/pvr/sgx/sgxconfig.h
+++ b/drivers/gpu/pvr/sgx/sgxconfig.h
@@ -36,6 +36,70 @@
 #define DEV_MINOR_VERSION		0
 
 #if SGX_FEATURE_ADDRESS_SPACE_SIZE == 32
+#if defined(FIX_HW_BRN_31620)
+	#if defined(SGX_FEATURE_2D_HARDWARE)
+	#define SGX_2D_HEAP_BASE					 0x04000000
+	#define SGX_2D_HEAP_SIZE					(0x08000000-0x04000000-0x00001000)
+	#endif
+
+	#define SGX_GENERAL_HEAP_BASE				 0x08000000
+	#define SGX_GENERAL_HEAP_SIZE				(0xB8000000-0x00001000)
+
+	
+	#define SGX_3DPARAMETERS_HEAP_SIZE			0x10000000
+
+	
+#if !defined(HYBRID_SHARED_PB_SIZE)
+	#define HYBRID_SHARED_PB_SIZE				(SGX_3DPARAMETERS_HEAP_SIZE >> 1)
+#endif
+#if defined(SUPPORT_HYBRID_PB)
+	#define SGX_SHARED_3DPARAMETERS_SIZE			(HYBRID_SHARED_PB_SIZE)
+	#define SGX_SHARED_3DPARAMETERS_HEAP_SIZE		(HYBRID_SHARED_PB_SIZE-0x00001000)
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE		(SGX_3DPARAMETERS_HEAP_SIZE - SGX_SHARED_3DPARAMETERS_SIZE - 0x00001000)
+#else
+#if defined(SUPPORT_PERCONTEXT_PB)
+	#define SGX_SHARED_3DPARAMETERS_SIZE			0
+	#define SGX_SHARED_3DPARAMETERS_HEAP_SIZE		0
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE		(SGX_3DPARAMETERS_HEAP_SIZE - 0x00001000)
+#endif
+#if defined(SUPPORT_SHARED_PB)
+	#define SGX_SHARED_3DPARAMETERS_SIZE			SGX_3DPARAMETERS_HEAP_SIZE
+	#define SGX_SHARED_3DPARAMETERS_HEAP_SIZE		(SGX_3DPARAMETERS_HEAP_SIZE - 0x00001000)
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE		0
+#endif
+#endif
+
+	#define SGX_SHARED_3DPARAMETERS_HEAP_BASE		 0xC0000000
+	
+
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_BASE		 (SGX_SHARED_3DPARAMETERS_HEAP_BASE + SGX_SHARED_3DPARAMETERS_SIZE)
+	
+
+	#define SGX_TADATA_HEAP_BASE				 0xD0000000
+	#define SGX_TADATA_HEAP_SIZE				(0x0D000000-0x00001000)
+
+	#define SGX_SYNCINFO_HEAP_BASE				 0xE0000000
+	#define SGX_SYNCINFO_HEAP_SIZE				(0x01000000-0x00001000)
+
+	#define SGX_PDSPIXEL_CODEDATA_HEAP_BASE		 0xE4000000
+	#define SGX_PDSPIXEL_CODEDATA_HEAP_SIZE		(0x02000000-0x00001000)
+
+	#define SGX_KERNEL_CODE_HEAP_BASE			 0xE8000000
+	#define SGX_KERNEL_CODE_HEAP_SIZE			(0x00080000-0x00001000)
+
+	#define SGX_PDSVERTEX_CODEDATA_HEAP_BASE	 0xEC000000
+	#define SGX_PDSVERTEX_CODEDATA_HEAP_SIZE	(0x01C00000-0x00001000)
+
+	#define SGX_KERNEL_DATA_HEAP_BASE		 	 0xF0000000
+	#define SGX_KERNEL_DATA_HEAP_SIZE			(0x03000000-0x00001000)
+
+	
+	#define SGX_PIXELSHADER_HEAP_BASE			 0xF4000000
+	#define SGX_PIXELSHADER_HEAP_SIZE			(0x05000000-0x00001000)
+	
+	#define SGX_VERTEXSHADER_HEAP_BASE			 0xFC000000
+	#define SGX_VERTEXSHADER_HEAP_SIZE			(0x02000000-0x00001000)
+#else 
 	#if defined(SGX_FEATURE_2D_HARDWARE)
 	#define SGX_2D_HEAP_BASE					 0x00100000
 	#define SGX_2D_HEAP_SIZE					(0x08000000-0x00100000-0x00001000)
@@ -54,8 +118,35 @@
 	#define SGX_GENERAL_HEAP_BASE				 0x10000000
 	#define SGX_GENERAL_HEAP_SIZE				(0xC2000000-0x00001000)
 
-	#define SGX_3DPARAMETERS_HEAP_BASE			 0xD2000000
-	#define SGX_3DPARAMETERS_HEAP_SIZE			(0x10000000-0x00001000)
+	
+	#define SGX_3DPARAMETERS_HEAP_SIZE			0x10000000
+
+	
+#if !defined(HYBRID_SHARED_PB_SIZE)
+	#define HYBRID_SHARED_PB_SIZE				(SGX_3DPARAMETERS_HEAP_SIZE >> 1)
+#endif
+#if defined(SUPPORT_HYBRID_PB)
+	#define SGX_SHARED_3DPARAMETERS_SIZE			(HYBRID_SHARED_PB_SIZE)
+	#define SGX_SHARED_3DPARAMETERS_HEAP_SIZE		(HYBRID_SHARED_PB_SIZE-0x00001000)
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE		(SGX_3DPARAMETERS_HEAP_SIZE - SGX_SHARED_3DPARAMETERS_SIZE - 0x00001000)
+#else
+#if defined(SUPPORT_PERCONTEXT_PB)
+	#define SGX_SHARED_3DPARAMETERS_SIZE			0
+	#define SGX_SHARED_3DPARAMETERS_HEAP_SIZE		0
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE		(SGX_3DPARAMETERS_HEAP_SIZE - 0x00001000)
+#endif
+#if defined(SUPPORT_SHARED_PB)
+	#define SGX_SHARED_3DPARAMETERS_SIZE			SGX_3DPARAMETERS_HEAP_SIZE
+	#define SGX_SHARED_3DPARAMETERS_HEAP_SIZE		(SGX_3DPARAMETERS_HEAP_SIZE - 0x00001000)
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE		0
+#endif
+#endif
+
+	#define SGX_SHARED_3DPARAMETERS_HEAP_BASE		 0xD2000000
+	
+
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_BASE		 (SGX_SHARED_3DPARAMETERS_HEAP_BASE + SGX_SHARED_3DPARAMETERS_SIZE)
+	
 
 	#define SGX_TADATA_HEAP_BASE				 0xE2000000
 	#define SGX_TADATA_HEAP_SIZE				(0x0D000000-0x00001000)
@@ -81,10 +172,10 @@
 	
 	#define SGX_VERTEXSHADER_HEAP_BASE			 0xFE000000
 	#define SGX_VERTEXSHADER_HEAP_SIZE			(0x02000000-0x00001000)
-
-
+#endif 
+	
 	#define SGX_CORE_IDENTIFIED
-#endif
+#endif 
 
 #if SGX_FEATURE_ADDRESS_SPACE_SIZE == 28
 
@@ -99,9 +190,35 @@
 	#define SGX_GENERAL_HEAP_BASE				 0x00001000
 	#define SGX_GENERAL_HEAP_SIZE				(0x08800000-0x00001000-0x00001000)
 #endif
+	
+	#define SGX_3DPARAMETERS_HEAP_SIZE			0x04000000
+
+	
+#if !defined(HYBRID_SHARED_PB_SIZE)
+	#define HYBRID_SHARED_PB_SIZE				(SGX_3DPARAMETERS_HEAP_SIZE >> 1)
+#endif
+#if defined(SUPPORT_HYBRID_PB)
+	#define SGX_SHARED_3DPARAMETERS_SIZE			(HYBRID_SHARED_PB_SIZE)
+	#define SGX_SHARED_3DPARAMETERS_HEAP_SIZE		(HYBRID_SHARED_PB_SIZE-0x00001000)
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE		(SGX_3DPARAMETERS_HEAP_SIZE - SGX_SHARED_3DPARAMETERS_SIZE - 0x00001000)
+#else
+#if defined(SUPPORT_PERCONTEXT_PB)
+	#define SGX_SHARED_3DPARAMETERS_SIZE			0
+	#define SGX_SHARED_3DPARAMETERS_HEAP_SIZE		0
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE		(SGX_3DPARAMETERS_HEAP_SIZE - 0x00001000)
+#endif
+#if defined(SUPPORT_SHARED_PB)
+	#define SGX_SHARED_3DPARAMETERS_SIZE			SGX_3DPARAMETERS_HEAP_SIZE
+	#define SGX_SHARED_3DPARAMETERS_HEAP_SIZE		(SGX_3DPARAMETERS_HEAP_SIZE - 0x00001000)
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE		0
+#endif
+#endif
 
-	#define SGX_3DPARAMETERS_HEAP_BASE			 0x08800000
-	#define SGX_3DPARAMETERS_HEAP_SIZE			(0x04000000-0x00001000)
+	#define SGX_SHARED_3DPARAMETERS_HEAP_BASE		 0x08800000
+	
+
+	#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_BASE		 (SGX_SHARED_3DPARAMETERS_HEAP_BASE + SGX_SHARED_3DPARAMETERS_SIZE)
+	
 
 	#define SGX_TADATA_HEAP_BASE				 0x0C800000
 	#define SGX_TADATA_HEAP_SIZE				(0x01000000-0x00001000)
@@ -127,10 +244,10 @@
 	#define SGX_VERTEXSHADER_HEAP_BASE			 0x0FC00000
 	#define SGX_VERTEXSHADER_HEAP_SIZE			(0x00200000-0x00001000)
 
-
+	
 	#define SGX_CORE_IDENTIFIED
 
-#endif
+#endif 
 
 #if !defined(SGX_CORE_IDENTIFIED)
 	#error "sgxconfig.h: ERROR: unspecified SGX Core version"
@@ -188,12 +305,18 @@
 	#endif
 #endif
 
-#if ((SGX_GENERAL_HEAP_BASE + SGX_GENERAL_HEAP_SIZE) >= SGX_3DPARAMETERS_HEAP_BASE)
+#if defined(SUPPORT_HYBRID_PB)
+	#if ((HYBRID_SHARED_PB_SIZE + 0x000001000) > SGX_3DPARAMETERS_HEAP_SIZE)
+		#error "sgxconfig.h: ERROR: HYBRID_SHARED_PB_SIZE too large"
+	#endif
+#endif
+
+#if ((SGX_GENERAL_HEAP_BASE + SGX_GENERAL_HEAP_SIZE) >= SGX_SHARED_3DPARAMETERS_HEAP_BASE)
 	#error "sgxconfig.h: ERROR: SGX_GENERAL_HEAP overlaps SGX_3DPARAMETERS_HEAP"
 #endif
 
-#if ((SGX_3DPARAMETERS_HEAP_BASE + SGX_3DPARAMETERS_HEAP_SIZE) >= SGX_TADATA_HEAP_BASE)
-	#error "sgxconfig.h: ERROR: SGX_3DPARAMETERS_HEAP overlaps SGX_TADATA_HEAP"
+#if (((SGX_PERCONTEXT_3DPARAMETERS_HEAP_BASE + SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE) >= SGX_TADATA_HEAP_BASE) && (SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE > 0))
+	#error "sgxconfig.h: ERROR: SGX_PERCONTEXT_3DPARAMETERS_HEAP_BASE overlaps SGX_TADATA_HEAP"
 #endif
 
 #if ((SGX_TADATA_HEAP_BASE + SGX_TADATA_HEAP_SIZE) >= SGX_SYNCINFO_HEAP_BASE)
diff --git a/drivers/gpu/pvr/sgx/sgxinfokm.h b/drivers/gpu/pvr/sgx/sgxinfokm.h
index 056db35831d..fdb0f671b9d 100644
--- a/drivers/gpu/pvr/sgx/sgxinfokm.h
+++ b/drivers/gpu/pvr/sgx/sgxinfokm.h
@@ -126,6 +126,10 @@ typedef struct _PVRSRV_SGXDEV_INFO_
 #if defined(FIX_HW_BRN_29823)
 	PPVRSRV_KERNEL_MEM_INFO	psKernelDummyTermStreamMemInfo; 
 #endif
+#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31425)
+	PPVRSRV_KERNEL_MEM_INFO	psKernelVDMSnapShotBufferMemInfo; 
+	PPVRSRV_KERNEL_MEM_INFO	psKernelVDMCtrlStreamBufferMemInfo; 
+#endif
 #if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
 	PPVRSRV_KERNEL_MEM_INFO	psKernelEDMStatusBufferMemInfo; 
 #endif
@@ -159,6 +163,8 @@ typedef struct _PVRSRV_SGXDEV_INFO_
 	IMG_UINT32				ui32EDMTaskReg0;
 	IMG_UINT32				ui32EDMTaskReg1;
 
+	IMG_UINT32				ui32ClkGateCtl;
+	IMG_UINT32				ui32ClkGateCtl2;
 	IMG_UINT32				ui32ClkGateStatusReg;
 	IMG_UINT32				ui32ClkGateStatusMask;
 #if defined(SGX_FEATURE_MP)
@@ -228,6 +234,20 @@ typedef struct _PVRSRV_SGXDEV_INFO_
 #endif
 	IMG_UINT32				asSGXDevData[SGX_MAX_DEV_DATA];
 
+#if defined(FIX_HW_BRN_31620)
+	
+	IMG_VOID			*pvBRN31620DummyPageCpuVAddr;
+	IMG_HANDLE			hBRN31620DummyPageOSMemHandle;
+	IMG_DEV_PHYADDR			sBRN31620DummyPageDevPAddr;
+
+	
+	IMG_VOID			*pvBRN31620DummyPTCpuVAddr;
+	IMG_HANDLE			hBRN31620DummyPTOSMemHandle;
+	IMG_DEV_PHYADDR			sBRN31620DummyPTDevPAddr;
+
+	IMG_HANDLE			hKernelMMUContext;
+#endif
+
 } PVRSRV_SGXDEV_INFO;
 
 
@@ -292,6 +312,7 @@ struct _PVRSRV_STUB_PBDESC_
 	IMG_HANDLE		hDevCookie;
 	PVRSRV_KERNEL_MEM_INFO  *psBlockKernelMemInfo;
 	PVRSRV_KERNEL_MEM_INFO  *psHWBlockKernelMemInfo;
+	IMG_DEV_VIRTADDR	sHWPBDescDevVAddr;
 	PVRSRV_STUB_PBDESC	*psNext;
 	PVRSRV_STUB_PBDESC	**ppsThis;
 };
@@ -308,6 +329,183 @@ typedef struct _PVRSRV_SGX_CCB_INFO_
 #endif
 } PVRSRV_SGX_CCB_INFO;
 
+
+typedef struct _SGX_BRIDGE_INIT_INFO_KM_
+{
+	IMG_HANDLE	hKernelCCBMemInfo;
+	IMG_HANDLE	hKernelCCBCtlMemInfo;
+	IMG_HANDLE	hKernelCCBEventKickerMemInfo;
+	IMG_HANDLE	hKernelSGXHostCtlMemInfo;
+	IMG_HANDLE	hKernelSGXTA3DCtlMemInfo;
+	IMG_HANDLE	hKernelSGXMiscMemInfo;
+
+	IMG_UINT32	aui32HostKickAddr[SGXMKIF_CMD_MAX];
+
+	SGX_INIT_SCRIPTS sScripts;
+
+	IMG_UINT32	ui32ClientBuildOptions;
+	SGX_MISCINFO_STRUCT_SIZES	sSGXStructSizes;
+
+#if defined(SGX_SUPPORT_HWPROFILING)
+	IMG_HANDLE	hKernelHWProfilingMemInfo;
+#endif
+#if defined(SUPPORT_SGX_HWPERF)
+	IMG_HANDLE	hKernelHWPerfCBMemInfo;
+#endif
+	IMG_HANDLE	hKernelTASigBufferMemInfo;
+	IMG_HANDLE	hKernel3DSigBufferMemInfo;
+
+#if defined(FIX_HW_BRN_29702)
+	IMG_HANDLE	hKernelCFIMemInfo;
+#endif
+#if defined(FIX_HW_BRN_29823)
+	IMG_HANDLE	hKernelDummyTermStreamMemInfo;
+#endif
+#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
+	IMG_HANDLE	hKernelEDMStatusBufferMemInfo;
+#endif
+#if defined(SGX_FEATURE_OVERLAPPED_SPM)
+	IMG_HANDLE hKernelTmpRgnHeaderMemInfo;
+#endif
+#if defined(SGX_FEATURE_SPM_MODE_0)
+	IMG_HANDLE hKernelTmpDPMStateMemInfo;
+#endif
+
+	IMG_UINT32 ui32EDMTaskReg0;
+	IMG_UINT32 ui32EDMTaskReg1;
+
+	IMG_UINT32 ui32ClkGateStatusReg;
+	IMG_UINT32 ui32ClkGateStatusMask;
+#if defined(SGX_FEATURE_MP)
+#endif 
+
+	IMG_UINT32 ui32CacheControl;
+
+	IMG_UINT32	asInitDevData[SGX_MAX_DEV_DATA];
+	IMG_HANDLE	asInitMemHandles[SGX_MAX_INIT_MEM_HANDLES];
+
+} SGX_BRIDGE_INIT_INFO_KM;
+
+
+typedef struct _SGX_INTERNEL_STATUS_UPDATE_KM_
+{
+	CTL_STATUS				sCtlStatus;
+	IMG_HANDLE				hKernelMemInfo;
+} SGX_INTERNEL_STATUS_UPDATE_KM;
+
+
+typedef struct _SGX_CCB_KICK_KM_
+{
+	SGXMKIF_COMMAND		sCommand;
+	IMG_HANDLE	hCCBKernelMemInfo;
+
+	IMG_UINT32	ui32NumDstSyncObjects;
+	IMG_HANDLE	hKernelHWSyncListMemInfo;
+
+	
+	IMG_HANDLE	*pahDstSyncHandles;
+
+	IMG_UINT32	ui32NumTAStatusVals;
+	IMG_UINT32	ui32Num3DStatusVals;
+
+#if defined(SUPPORT_SGX_NEW_STATUS_VALS)
+	SGX_INTERNEL_STATUS_UPDATE_KM	asTAStatusUpdate[SGX_MAX_TA_STATUS_VALS];
+	SGX_INTERNEL_STATUS_UPDATE_KM	as3DStatusUpdate[SGX_MAX_3D_STATUS_VALS];
+#else
+	IMG_HANDLE	ahTAStatusSyncInfo[SGX_MAX_TA_STATUS_VALS];
+	IMG_HANDLE	ah3DStatusSyncInfo[SGX_MAX_3D_STATUS_VALS];
+#endif
+
+	IMG_BOOL	bFirstKickOrResume;
+#if (defined(NO_HARDWARE) || defined(PDUMP))
+	IMG_BOOL	bTerminateOrAbort;
+#endif
+
+	
+	IMG_UINT32	ui32CCBOffset;
+
+#if defined(SUPPORT_SGX_GENERALISED_SYNCOBJECTS)
+	
+	IMG_UINT32	ui32NumTASrcSyncs;
+	IMG_HANDLE	ahTASrcKernelSyncInfo[SGX_MAX_TA_SRC_SYNCS];
+	IMG_UINT32	ui32NumTADstSyncs;
+	IMG_HANDLE	ahTADstKernelSyncInfo[SGX_MAX_TA_DST_SYNCS];
+	IMG_UINT32	ui32Num3DSrcSyncs;
+	IMG_HANDLE	ah3DSrcKernelSyncInfo[SGX_MAX_3D_SRC_SYNCS];
+#else
+	
+	IMG_UINT32	ui32NumSrcSyncs;
+	IMG_HANDLE	ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS];
+#endif
+
+	
+	IMG_BOOL	bTADependency;
+	IMG_HANDLE	hTA3DSyncInfo;
+
+	IMG_HANDLE	hTASyncInfo;
+	IMG_HANDLE	h3DSyncInfo;
+#if defined(PDUMP)
+	IMG_UINT32	ui32CCBDumpWOff;
+#endif
+#if defined(NO_HARDWARE)
+	IMG_UINT32	ui32WriteOpsPendingVal;
+#endif
+} SGX_CCB_KICK_KM;
+
+
+#if defined(TRANSFER_QUEUE)
+typedef struct _PVRSRV_TRANSFER_SGX_KICK_KM_
+{
+	IMG_HANDLE		hCCBMemInfo;
+	IMG_UINT32		ui32SharedCmdCCBOffset;
+
+	IMG_DEV_VIRTADDR 	sHWTransferContextDevVAddr;
+
+	IMG_HANDLE		hTASyncInfo;
+	IMG_HANDLE		h3DSyncInfo;
+
+	IMG_UINT32		ui32NumSrcSync;
+	IMG_HANDLE		ahSrcSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
+
+	IMG_UINT32		ui32NumDstSync;
+	IMG_HANDLE		ahDstSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
+
+	IMG_UINT32		ui32Flags;
+
+	IMG_UINT32		ui32PDumpFlags;
+#if defined(PDUMP)
+	IMG_UINT32		ui32CCBDumpWOff;
+#endif
+} PVRSRV_TRANSFER_SGX_KICK_KM, *PPVRSRV_TRANSFER_SGX_KICK_KM;
+
+#if defined(SGX_FEATURE_2D_HARDWARE)
+typedef struct _PVRSRV_2D_SGX_KICK_KM_
+{
+	IMG_HANDLE		hCCBMemInfo;
+	IMG_UINT32		ui32SharedCmdCCBOffset;
+
+	IMG_DEV_VIRTADDR 	sHW2DContextDevVAddr;
+
+	IMG_UINT32		ui32NumSrcSync;
+	IMG_HANDLE		ahSrcSyncInfo[SGX_MAX_2D_SRC_SYNC_OPS];
+
+	
+	IMG_HANDLE 		hDstSyncInfo;
+
+	
+	IMG_HANDLE		hTASyncInfo;
+
+	
+	IMG_HANDLE		h3DSyncInfo;
+
+	IMG_UINT32		ui32PDumpFlags;
+#if defined(PDUMP)
+	IMG_UINT32		ui32CCBDumpWOff;
+#endif
+} PVRSRV_2D_SGX_KICK_KM, *PPVRSRV_2D_SGX_KICK_KM;
+#endif	
+#endif 
+
 PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode);
 
 IMG_VOID SGXOSTimer(IMG_VOID *pvData);
@@ -316,6 +514,9 @@ IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
 				  IMG_BOOL				bHardwareRecovery,
 				  IMG_UINT32			ui32PDUMPFlags);
 
+IMG_VOID SGXInitClocks(PVRSRV_SGXDEV_INFO	*psDevInfo,
+					   IMG_UINT32			ui32PDUMPFlags);
+
 PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO	*psDevInfo,
 						   IMG_BOOL				bHardwareRecovery);
 PVRSRV_ERROR SGXDeinitialise(IMG_HANDLE hDevCookie);
diff --git a/drivers/gpu/pvr/sgx/sgxinit.c b/drivers/gpu/pvr/sgx/sgxinit.c
index 3872102029f..e73c067bd4f 100644
--- a/drivers/gpu/pvr/sgx/sgxinit.c
+++ b/drivers/gpu/pvr/sgx/sgxinit.c
@@ -51,6 +51,7 @@
 
 #include "lists.h"
 #include "srvkm.h"
+#include "ttrace.h"
 
 #define VAR(x) #x
 
@@ -74,7 +75,8 @@ IMG_BOOL SGX_ISRHandler(IMG_VOID *pvData);
 
 static
 PVRSRV_ERROR SGXGetMiscInfoUkernel(PVRSRV_SGXDEV_INFO	*psDevInfo,
-								   PVRSRV_DEVICE_NODE 	*psDeviceNode);
+								   PVRSRV_DEVICE_NODE 	*psDeviceNode,
+								   IMG_HANDLE hDevMemContext);
 #if defined(PDUMP)
 static
 PVRSRV_ERROR SGXResetPDump(PVRSRV_DEVICE_NODE *psDeviceNode);
@@ -111,7 +113,11 @@ static IMG_UINT32 DeinitDevInfo(PVRSRV_SGXDEV_INFO *psDevInfo)
 
 static PVRSRV_ERROR InitDevInfo(PVRSRV_PER_PROCESS_DATA *psPerProc,
 								PVRSRV_DEVICE_NODE *psDeviceNode,
+#if defined (SUPPORT_SID_INTERFACE)
+								SGX_BRIDGE_INIT_INFO_KM *psInitInfo)
+#else
 								SGX_BRIDGE_INIT_INFO *psInitInfo)
+#endif
 {
 	PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO *)psDeviceNode->pvDevice;
 	PVRSRV_ERROR		eError;
@@ -135,7 +141,7 @@ static PVRSRV_ERROR InitDevInfo(PVRSRV_PER_PROCESS_DATA *psPerProc,
 
 	psDevInfo->psKernelSGXTA3DCtlMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelSGXTA3DCtlMemInfo;
 
- 	psDevInfo->psKernelSGXMiscMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelSGXMiscMemInfo;
+	psDevInfo->psKernelSGXMiscMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelSGXMiscMemInfo;
 
 #if defined(SGX_SUPPORT_HWPROFILING)
 	psDevInfo->psKernelHWProfilingMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelHWProfilingMemInfo;
@@ -151,6 +157,10 @@ static PVRSRV_ERROR InitDevInfo(PVRSRV_PER_PROCESS_DATA *psPerProc,
 #if defined(FIX_HW_BRN_29823)
 	psDevInfo->psKernelDummyTermStreamMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelDummyTermStreamMemInfo;
 #endif
+#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31425)
+	psDevInfo->psKernelVDMSnapShotBufferMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelVDMSnapShotBufferMemInfo;
+	psDevInfo->psKernelVDMCtrlStreamBufferMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelVDMCtrlStreamBufferMemInfo;
+#endif
 #if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
 	psDevInfo->psKernelEDMStatusBufferMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelEDMStatusBufferMemInfo;
 #endif
@@ -168,7 +178,7 @@ static PVRSRV_ERROR InitDevInfo(PVRSRV_PER_PROCESS_DATA *psPerProc,
 
 	
 
-	eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+	eError = OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
 						sizeof(PVRSRV_SGX_CCB_INFO),
 						(IMG_VOID **)&psKernelCCBInfo, 0,
 						"SGX Circular Command Buffer Info");
@@ -198,6 +208,8 @@ static PVRSRV_ERROR InitDevInfo(PVRSRV_PER_PROCESS_DATA *psPerProc,
 
 	psDevInfo->ui32EDMTaskReg0 = psInitInfo->ui32EDMTaskReg0;
 	psDevInfo->ui32EDMTaskReg1 = psInitInfo->ui32EDMTaskReg1;
+	psDevInfo->ui32ClkGateCtl = psInitInfo->ui32ClkGateCtl;
+	psDevInfo->ui32ClkGateCtl2 = psInitInfo->ui32ClkGateCtl2;
 	psDevInfo->ui32ClkGateStatusReg = psInitInfo->ui32ClkGateStatusReg;
 	psDevInfo->ui32ClkGateStatusMask = psInitInfo->ui32ClkGateStatusMask;
 #if defined(SGX_FEATURE_MP)
@@ -277,6 +289,12 @@ PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO	*psDevInfo,
 	IMG_BOOL				bPDumpIsSuspended = PDumpIsSuspended();
 #endif 
 
+#if defined(SGX_FEATURE_MP)
+	
+#else
+	SGXInitClocks(psDevInfo, PDUMP_FLAGS_CONTINUOUS);
+#endif 
+	
 	
 
 	PDUMPCOMMENTWITHFLAGS(PDUMP_FLAGS_CONTINUOUS, "SGX initialisation script part 1\n");
@@ -289,6 +307,7 @@ PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO	*psDevInfo,
 	PDUMPCOMMENTWITHFLAGS(PDUMP_FLAGS_CONTINUOUS, "End of SGX initialisation script part 1\n");
 
 	
+	psDevInfo->ui32NumResets++;
 	SGXReset(psDevInfo, bFirstTime || bHardwareRecovery, PDUMP_FLAGS_CONTINUOUS);
 
 #if defined(EUR_CR_POWER)
@@ -379,12 +398,12 @@ PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO	*psDevInfo,
 				 PDUMP_FLAGS_CONTINUOUS,
 				 MAKEUNIQUETAG(psDevInfo->psKernelCCBEventKickerMemInfo));
 		PDUMPREG(SGX_PDUMPREG_NAME, SGX_MP_CORE_SELECT(EUR_CR_EVENT_KICK, 0), EUR_CR_EVENT_KICK_NOW_MASK);
-#endif
+#endif 
 	}
-#endif
+#endif 
 
 #if !defined(NO_HARDWARE)
-
+	
 
 	if (PollForValueKM(&psSGXHostCtl->ui32InitStatus,
 					   PVRSRV_USSE_EDM_INIT_COMPLETE,
@@ -396,10 +415,10 @@ PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO	*psDevInfo,
 		PVR_DPF((PVR_DBG_ERROR, "SGXInitialise: Wait for uKernel initialisation failed"));
 		#if !defined(FIX_HW_BRN_23281)
 		PVR_DBG_BREAK;
-		#endif
+		#endif 
 		return PVRSRV_ERROR_RETRY;
 	}
-#endif
+#endif 
 
 #if defined(PDUMP)
 	PDUMPCOMMENTWITHFLAGS(PDUMP_FLAGS_CONTINUOUS,
@@ -411,19 +430,19 @@ PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO	*psDevInfo,
 				PDUMP_POLL_OPERATOR_EQUAL,
 				PDUMP_FLAGS_CONTINUOUS,
 				MAKEUNIQUETAG(psSGXHostCtlMemInfo));
-#endif
+#endif 
 
 #if defined(FIX_HW_BRN_22997) && defined(FIX_HW_BRN_23030) && defined(SGX_FEATURE_HOST_PORT)
-
+	
 
 
 	WorkaroundBRN22997ReadHostPort(psDevInfo);
-#endif
+#endif 
 
 	PVR_ASSERT(psDevInfo->psKernelCCBCtl->ui32ReadOffset == psDevInfo->psKernelCCBCtl->ui32WriteOffset);
 
 	bFirstTime = IMG_FALSE;
-
+	
 	return PVRSRV_OK;
 }
 
@@ -433,7 +452,7 @@ PVRSRV_ERROR SGXDeinitialise(IMG_HANDLE hDevCookie)
 	PVRSRV_SGXDEV_INFO	*psDevInfo = (PVRSRV_SGXDEV_INFO *) hDevCookie;
 	PVRSRV_ERROR		eError;
 
-
+	
 	if (psDevInfo->pvRegsBaseKM == IMG_NULL)
 	{
 		return PVRSRV_OK;
@@ -461,12 +480,16 @@ static PVRSRV_ERROR DevInitSGXPart1 (IMG_VOID *pvDeviceNode)
 	DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap = psDeviceNode->sDevMemoryInfo.psDeviceMemoryHeap;
 	PVRSRV_ERROR		eError;
 
-
+	
 	PDUMPCOMMENT("SGX Core Version Information: %s", SGX_CORE_FRIENDLY_NAME);
-
+	
 	#if defined(SGX_FEATURE_MP)
+	#if !defined(SGX_FEATURE_MP_PLUS)
 	PDUMPCOMMENT("SGX Multi-processor: %d cores", SGX_FEATURE_MP_CORE_COUNT);
+	#else
+	PDUMPCOMMENT("SGX Multi-processor: %d TA cores, %d 3D cores", SGX_FEATURE_MP_CORE_COUNT_TA, SGX_FEATURE_MP_CORE_COUNT_3D);
 	#endif
+	#endif 
 
 #if (SGX_CORE_REV == 0)
 	PDUMPCOMMENT("SGX Core Revision Information: head RTL");
@@ -478,8 +501,8 @@ static PVRSRV_ERROR DevInitSGXPart1 (IMG_VOID *pvDeviceNode)
 	PDUMPCOMMENT("SGX System Level Cache is present\r\n");
 	#if defined(SGX_BYPASS_SYSTEM_CACHE)
 	PDUMPCOMMENT("SGX System Level Cache is bypassed\r\n");
-	#endif
-	#endif
+	#endif 
+	#endif 
 
 	PDUMPCOMMENT("SGX Initialisation Part 1");
 
@@ -526,12 +549,16 @@ static PVRSRV_ERROR DevInitSGXPart1 (IMG_VOID *pvDeviceNode)
 			case DEVICE_MEMORY_HEAP_SHARED:
 			case DEVICE_MEMORY_HEAP_SHARED_EXPORTED:
 			{
-				hDevMemHeap = BM_CreateHeap (hKernelDevMemContext,
-												&psDeviceMemoryHeap[i]);
 				
+				if (psDeviceMemoryHeap[i].ui32HeapSize > 0)
+				{
+					hDevMemHeap = BM_CreateHeap (hKernelDevMemContext,
+												&psDeviceMemoryHeap[i]);
+					
 
 
-				psDeviceMemoryHeap[i].hDevMemHeap = hDevMemHeap;
+					psDeviceMemoryHeap[i].hDevMemHeap = hDevMemHeap;
+				}
 				break;
 			}
 		}
@@ -554,7 +581,11 @@ static PVRSRV_ERROR DevInitSGXPart1 (IMG_VOID *pvDeviceNode)
 }
 
 IMG_EXPORT
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle, PVRSRV_HEAP_INFO_KM *pasHeapInfo, IMG_DEV_PHYADDR *psPDDevPAddr)
+#else
 PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle, SGX_BRIDGE_INFO_FOR_SRVINIT *psInitInfo)
+#endif
 {
 	PVRSRV_DEVICE_NODE	*psDeviceNode;
 	PVRSRV_SGXDEV_INFO	*psDevInfo;
@@ -565,9 +596,15 @@ PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle, SGX_BRIDGE_INFO_FOR_S
 	psDeviceNode = (PVRSRV_DEVICE_NODE *)hDevHandle;
 	psDevInfo = (PVRSRV_SGXDEV_INFO *)psDeviceNode->pvDevice;
 
+#if defined (SUPPORT_SID_INTERFACE)
+	*psPDDevPAddr = psDevInfo->sKernelPDDevPAddr;
+
+	eError = PVRSRVGetDeviceMemHeapsKM(hDevHandle, pasHeapInfo);
+#else
 	psInitInfo->sPDDevPAddr = psDevInfo->sKernelPDDevPAddr;
 
 	eError = PVRSRVGetDeviceMemHeapsKM(hDevHandle, &psInitInfo->asHeapInfo[0]);
+#endif
 	if (eError != PVRSRV_OK)
 	{
 		PVR_DPF((PVR_DBG_ERROR,"SGXGetInfoForSrvinit: PVRSRVGetDeviceMemHeapsKM failed (%d)", eError));
@@ -580,7 +617,11 @@ PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle, SGX_BRIDGE_INFO_FOR_S
 IMG_EXPORT
 PVRSRV_ERROR DevInitSGXPart2KM (PVRSRV_PER_PROCESS_DATA *psPerProc,
                                 IMG_HANDLE hDevHandle,
+#if defined (SUPPORT_SID_INTERFACE)
+                                SGX_BRIDGE_INIT_INFO_KM *psInitInfo)
+#else
                                 SGX_BRIDGE_INIT_INFO *psInitInfo)
+#endif
 {
 	PVRSRV_DEVICE_NODE		*psDeviceNode;
 	PVRSRV_SGXDEV_INFO		*psDevInfo;
@@ -877,9 +918,12 @@ static IMG_VOID SGXDumpDebugInfo (PVRSRV_SGXDEV_INFO	*psDevInfo,
 		PVR_DPF((PVR_DBG_ERROR,"SGX Register Base Address (Linear):   0x%08X", (IMG_UINTPTR_T)psDevInfo->pvRegsBaseKM));
 		PVR_DPF((PVR_DBG_ERROR,"SGX Register Base Address (Physical): 0x%08X", psDevInfo->sRegsPhysBase.uiAddr));
 
-		for (ui32CoreNum = 0; ui32CoreNum < SGX_FEATURE_MP_CORE_COUNT; ui32CoreNum++)
+		SGXDumpDebugReg(psDevInfo, 0, "EUR_CR_CORE_ID:          ", EUR_CR_CORE_ID);
+		SGXDumpDebugReg(psDevInfo, 0, "EUR_CR_CORE_REVISION:    ", EUR_CR_CORE_REVISION);
+
+		for (ui32CoreNum = 0; ui32CoreNum < SGX_FEATURE_MP_CORE_COUNT_3D; ui32CoreNum++)
 		{
-		
+			
 			SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_EVENT_STATUS:     ", EUR_CR_EVENT_STATUS);
 			SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_EVENT_STATUS2:    ", EUR_CR_EVENT_STATUS2);
 			SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_BIF_CTRL:         ", EUR_CR_BIF_CTRL);
@@ -903,8 +947,15 @@ static IMG_VOID SGXDumpDebugInfo (PVRSRV_SGXDEV_INFO	*psDevInfo,
 	{
 		
 
-		IMG_UINT32	*pui32HostCtlBuffer = (IMG_UINT32 *)psDevInfo->psSGXHostCtl;
-		IMG_UINT32	ui32LoopCounter;
+		SGXMKIF_HOST_CTL	*psSGXHostCtl = psDevInfo->psSGXHostCtl;
+		IMG_UINT32			*pui32HostCtlBuffer = (IMG_UINT32 *)psSGXHostCtl;
+		IMG_UINT32			ui32LoopCounter;
+
+		if (psSGXHostCtl->ui32AssertFail != 0)
+		{
+			PVR_LOG(("SGX Microkernel assert fail: 0x%08X", psSGXHostCtl->ui32AssertFail));
+			psSGXHostCtl->ui32AssertFail = 0;
+		}
 
 		PVR_LOG(("SGX Host control:"));
 
@@ -927,7 +978,7 @@ static IMG_VOID SGXDumpDebugInfo (PVRSRV_SGXDEV_INFO	*psDevInfo,
 		PVR_LOG(("SGX TA/3D control:"));
 
 		for (ui32LoopCounter = 0;
-			 ui32LoopCounter < psDevInfo->psKernelSGXTA3DCtlMemInfo->ui32AllocSize / sizeof(*pui32TA3DCtlBuffer);
+			 ui32LoopCounter < psDevInfo->psKernelSGXTA3DCtlMemInfo->uAllocSize / sizeof(*pui32TA3DCtlBuffer);
 			 ui32LoopCounter += 4)
 		{
 			PVR_LOG(("\t(T3C-%X) 0x%08X 0x%08X 0x%08X 0x%08X", ui32LoopCounter * sizeof(*pui32TA3DCtlBuffer),
@@ -995,6 +1046,10 @@ static IMG_VOID SGXDumpDebugInfo (PVRSRV_SGXDEV_INFO	*psDevInfo,
 		}
 		#endif 
 	}
+	#if defined (TTRACE)
+	PVRSRVDumpTimeTraceBuffers();
+	#endif
+
 }
 
 
@@ -1028,36 +1083,35 @@ IMG_VOID HWRecoveryResetSGX (PVRSRV_DEVICE_NODE *psDeviceNode,
 
 	SGXDumpDebugInfo(psDeviceNode->pvDevice, IMG_TRUE);
 
-
+	
 	PDUMPSUSPEND();
 
-
+	
 #if defined(FIX_HW_BRN_23281)
-
+	
 	for (eError = PVRSRV_ERROR_RETRY; eError == PVRSRV_ERROR_RETRY;)
-#endif
+#endif 
 	{
-	eError = SGXInitialise(psDevInfo, IMG_TRUE);
+		eError = SGXInitialise(psDevInfo, IMG_TRUE);
 	}
-
 	if (eError != PVRSRV_OK)
 	{
 		PVR_DPF((PVR_DBG_ERROR,"HWRecoveryResetSGX: SGXInitialise failed (%d)", eError));
 	}
 
-
+	
 	PDUMPRESUME();
 
 	PVRSRVPowerUnlock(ui32CallerID);
 
-
+	
 	SGXScheduleProcessQueuesKM(psDeviceNode);
 
-
-
-	PVRSRVProcessQueues(ui32CallerID, IMG_TRUE);
+	
+	
+	PVRSRVProcessQueues(IMG_TRUE);
 }
-#endif
+#endif 
 
 
 #if defined(SUPPORT_HW_RECOVERY)
@@ -1066,7 +1120,7 @@ IMG_VOID SGXOSTimer(IMG_VOID *pvData)
 	PVRSRV_DEVICE_NODE *psDeviceNode = pvData;
 	PVRSRV_SGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice;
 	static IMG_UINT32	ui32EDMTasks = 0;
-	static IMG_UINT32	ui32LockupCounter = 0;
+	static IMG_UINT32	ui32LockupCounter = 0; 
 	static IMG_UINT32	ui32NumResets = 0;
 #if defined(FIX_HW_BRN_31093)
 	static IMG_BOOL		bBRN31093Inval = IMG_FALSE;
@@ -1075,17 +1129,17 @@ IMG_VOID SGXOSTimer(IMG_VOID *pvData)
 	IMG_BOOL		bLockup = IMG_FALSE;
 	IMG_BOOL		bPoweredDown;
 
-
+	
 	psDevInfo->ui32TimeStamp++;
 
 #if defined(NO_HARDWARE)
 	bPoweredDown = IMG_TRUE;
 #else
 	bPoweredDown = (SGXIsDevicePowered(psDeviceNode)) ? IMG_FALSE : IMG_TRUE;
-#endif
-
-
+#endif 
 
+	
+	
 	if (bPoweredDown)
 	{
 		ui32LockupCounter = 0;
@@ -1095,7 +1149,7 @@ IMG_VOID SGXOSTimer(IMG_VOID *pvData)
 	}
 	else
 	{
-
+		
 		ui32CurrentEDMTasks = OSReadHWReg(psDevInfo->pvRegsBaseKM, psDevInfo->ui32EDMTaskReg0);
 		if (psDevInfo->ui32EDMTaskReg1 != 0)
 		{
@@ -1108,40 +1162,40 @@ IMG_VOID SGXOSTimer(IMG_VOID *pvData)
 			if (ui32LockupCounter == 3)
 			{
 				ui32LockupCounter = 0;
-
+	
 	#if defined(FIX_HW_BRN_31093)
 				if (bBRN31093Inval == IMG_FALSE)
 				{
-
+					
 		#if defined(FIX_HW_BRN_29997)
 					IMG_UINT32	ui32BIFCtrl;
-
+					
 					ui32BIFCtrl = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL);
 					OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32BIFCtrl | EUR_CR_BIF_CTRL_PAUSE_MASK);
-
+					
 					OSWaitus(200 * 1000000 / psDevInfo->ui32CoreClockSpeed);
 		#endif
-
+					
 					bBRN31093Inval = IMG_TRUE;
-
+					
 					OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL_INVAL, EUR_CR_BIF_CTRL_INVAL_PTE_MASK);
-
+					
 					OSWaitus(200 * 1000000 / psDevInfo->ui32CoreClockSpeed);
-
-		#if defined(FIX_HW_BRN_29997)
-
+						
+		#if defined(FIX_HW_BRN_29997)	
+						
 					OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32BIFCtrl);
 		#endif
 				}
 				else
 	#endif
 				{
-					PVR_DPF((PVR_DBG_ERROR, "SGXOSTimer() detected SGX lockup (0x%x tasks)", ui32EDMTasks));
+				PVR_DPF((PVR_DBG_ERROR, "SGXOSTimer() detected SGX lockup (0x%x tasks)", ui32EDMTasks));
 
-					bLockup = IMG_TRUE;
-				}
+				bLockup = IMG_TRUE;
 			}
 		}
+		}
 		else
 		{
 	#if defined(FIX_HW_BRN_31093)
@@ -1157,14 +1211,14 @@ IMG_VOID SGXOSTimer(IMG_VOID *pvData)
 	{
 		SGXMKIF_HOST_CTL	*psSGXHostCtl = (SGXMKIF_HOST_CTL *)psDevInfo->psSGXHostCtl;
 
-
+		
 		psSGXHostCtl->ui32HostDetectedLockups ++;
 
-
+		
 		HWRecoveryResetSGX(psDeviceNode, 0, KERNEL_ID);
 	}
 }
-#endif
+#endif 
 
 
 #if defined(SYS_USING_INTERRUPTS)
@@ -1174,18 +1228,18 @@ IMG_BOOL SGX_ISRHandler (IMG_VOID *pvData)
 	IMG_BOOL bInterruptProcessed = IMG_FALSE;
 
 
-
+	
 	{
 		IMG_UINT32 ui32EventStatus, ui32EventEnable;
 		IMG_UINT32 ui32EventClear = 0;
 #if defined(SGX_FEATURE_DATA_BREAKPOINTS)
 		IMG_UINT32 ui32EventStatus2, ui32EventEnable2;
-#endif
+#endif		
 		IMG_UINT32 ui32EventClear2 = 0;
 		PVRSRV_DEVICE_NODE *psDeviceNode;
 		PVRSRV_SGXDEV_INFO *psDevInfo;
 
-
+		
 		if(pvData == IMG_NULL)
 		{
 			PVR_DPF((PVR_DBG_ERROR, "SGX_ISRHandler: Invalid params\n"));
@@ -1198,18 +1252,18 @@ IMG_BOOL SGX_ISRHandler (IMG_VOID *pvData)
 		ui32EventStatus = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_STATUS);
 		ui32EventEnable = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_ENABLE);
 
-
+		
 		ui32EventStatus &= ui32EventEnable;
 
 #if defined(SGX_FEATURE_DATA_BREAKPOINTS)
 		ui32EventStatus2 = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_STATUS2);
 		ui32EventEnable2 = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_ENABLE2);
 
-
+		
 		ui32EventStatus2 &= ui32EventEnable2;
-#endif
-
+#endif 
 
+		
 
 		if (ui32EventStatus & EUR_CR_EVENT_STATUS_SW_EVENT_MASK)
 		{
@@ -1226,16 +1280,16 @@ IMG_BOOL SGX_ISRHandler (IMG_VOID *pvData)
 		{
 			ui32EventClear2 |= EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_TRAPPED_MASK;
 		}
-#endif
+#endif 
 
 		if (ui32EventClear || ui32EventClear2)
 		{
 			bInterruptProcessed = IMG_TRUE;
 
-
+			
 			ui32EventClear |= EUR_CR_EVENT_HOST_CLEAR_MASTER_INTERRUPT_MASK;
 
-
+			
 			OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR, ui32EventClear);
 			OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR2, ui32EventClear2);
 		}
@@ -1266,7 +1320,7 @@ static IMG_VOID SGX_MISRHandler (IMG_VOID *pvData)
 
 	SGXTestActivePowerEvent(psDeviceNode, ISR_ID);
 }
-#endif
+#endif 
 
 
 
@@ -1284,14 +1338,14 @@ PVRSRV_ERROR SGX_AllocMemTilingRange(PVRSRV_DEVICE_NODE *psDeviceNode,
 	IMG_UINT32 ui32Offset;
 	IMG_UINT32 ui32Val;
 
-
+	
 	for(i=0; i<10; i++)
 	{
 		if((psDevInfo->ui32MemTilingUsage & (1U << i)) == 0)
 		{
-
+			
 			psDevInfo->ui32MemTilingUsage |= 1U << i;
-
+			
 			*pui32RangeIndex = i;
 			goto RangeAllocated;
 		}
@@ -1304,14 +1358,14 @@ RangeAllocated:
 	ui32Offset = EUR_CR_BIF_TILE0 + (i<<2);
 
 	ui32Start = psMemInfo->sDevVAddr.uiAddr;
-	ui32End = ui32Start + psMemInfo->ui32AllocSize + SGX_MMU_PAGE_SIZE - 1;
+	ui32End = ui32Start + psMemInfo->uAllocSize + SGX_MMU_PAGE_SIZE - 1;
 
 	ui32Val = ((ui32TilingStride << EUR_CR_BIF_TILE0_CFG_SHIFT) & EUR_CR_BIF_TILE0_CFG_MASK)
 			| (((ui32End>>20) << EUR_CR_BIF_TILE0_MAX_ADDRESS_SHIFT) & EUR_CR_BIF_TILE0_MAX_ADDRESS_MASK)
 			| (((ui32Start>>20) << EUR_CR_BIF_TILE0_MIN_ADDRESS_SHIFT) & EUR_CR_BIF_TILE0_MIN_ADDRESS_MASK)
 			| (0x8 << EUR_CR_BIF_TILE0_CFG_SHIFT);
 
-
+	
 	OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32Offset, ui32Val);
 	PDUMPREG(SGX_PDUMPREG_NAME, ui32Offset, ui32Val);
 
@@ -1320,7 +1374,7 @@ RangeAllocated:
 	ui32Val = (((ui32End>>12) << EUR_CR_BIF_TILE0_ADDR_EXT_MAX_SHIFT) & EUR_CR_BIF_TILE0_ADDR_EXT_MAX_MASK)
 			| (((ui32Start>>12) << EUR_CR_BIF_TILE0_ADDR_EXT_MIN_SHIFT) & EUR_CR_BIF_TILE0_ADDR_EXT_MIN_MASK);
 
-
+	
 	OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32Offset, ui32Val);
 	PDUMPREG(SGX_PDUMPREG_NAME, ui32Offset, ui32Val);
 
@@ -1350,14 +1404,14 @@ PVRSRV_ERROR SGX_FreeMemTilingRange(PVRSRV_DEVICE_NODE *psDeviceNode,
 		return PVRSRV_ERROR_INVALID_PARAMS;
 	}
 
-
+	
 	psDevInfo->ui32MemTilingUsage &= ~(1<<ui32RangeIndex);
 
-
+	
 	ui32Offset = EUR_CR_BIF_TILE0 + (ui32RangeIndex<<2);
 	ui32Val = 0;
 
-
+	
 	OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32Offset, ui32Val);
 	PDUMPREG(SGX_PDUMPREG_NAME, ui32Offset, ui32Val);
 
@@ -1378,12 +1432,12 @@ PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode)
 	DEVICE_MEMORY_INFO *psDevMemoryInfo;
 	DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
 
-
+	
 	psDeviceNode->sDevId.eDeviceType		= DEV_DEVICE_TYPE;
 	psDeviceNode->sDevId.eDeviceClass		= DEV_DEVICE_CLASS;
 #if defined(PDUMP)
 	{
-
+		
 		SGX_DEVICE_MAP *psSGXDeviceMemMap;
 		SysGetDeviceMemoryMap(PVRSRV_DEVICE_TYPE_SGX,
 							  (IMG_VOID**)&psSGXDeviceMemMap);
@@ -1391,9 +1445,9 @@ PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode)
 		psDeviceNode->sDevId.pszPDumpDevName = psSGXDeviceMemMap->pszPDumpDevName;
 		PVR_ASSERT(psDeviceNode->sDevId.pszPDumpDevName != IMG_NULL);
 	}
-
+	
 	psDeviceNode->sDevId.pszPDumpRegName	= SGX_PDUMPREG_NAME;
-#endif
+#endif 
 
 	psDeviceNode->pfnInitDevice		= &DevInitSGXPart1;
 	psDeviceNode->pfnDeInitDevice	= &DevDeInitSGX;
@@ -1403,7 +1457,7 @@ PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode)
 	psDeviceNode->pfnPDumpInitDevice = &SGXResetPDump;
 	psDeviceNode->pfnMMUGetContextID = &MMU_GetPDumpContextID;
 #endif
-
+	
 
 	psDeviceNode->pfnMMUInitialise = &MMU_Initialise;
 	psDeviceNode->pfnMMUFinalise = &MMU_Finalise;
@@ -1421,9 +1475,15 @@ PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode)
 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
 	psDeviceNode->pfnMMUIsHeapShared = &MMU_IsHeapShared;
 #endif
-
+#if defined(FIX_HW_BRN_31620)
+	psDeviceNode->pfnMMUGetCacheFlushRange = &MMU_GetCacheFlushRange;
+	psDeviceNode->pfnMMUGetPDPhysAddr = &MMU_GetPDPhysAddr;
+#else
+	psDeviceNode->pfnMMUGetCacheFlushRange = IMG_NULL;
+	psDeviceNode->pfnMMUGetPDPhysAddr = IMG_NULL;
+#endif
 #if defined (SYS_USING_INTERRUPTS)
-
+	
 
 	psDeviceNode->pfnDeviceISR = SGX_ISRHandler;
 	psDeviceNode->pfnDeviceMISR = SGX_MISRHandler;
@@ -1434,20 +1494,20 @@ PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode)
 	psDeviceNode->pfnFreeMemTilingRange = SGX_FreeMemTilingRange;
 #endif
 
-
+	
 
 	psDeviceNode->pfnDeviceCommandComplete = &SGXCommandComplete;
 
-
+	
 
 	psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo;
-
+	
 	psDevMemoryInfo->ui32AddressSpaceSizeLog2 = SGX_FEATURE_ADDRESS_SPACE_SIZE;
 
-
+	
 	psDevMemoryInfo->ui32Flags = 0;
 
-
+	
 	if(OSAllocMem( PVRSRV_OS_PAGEABLE_HEAP,
 					 sizeof(DEVICE_MEMORY_HEAP_INFO) * SGX_MAX_HEAP_ID,
 					 (IMG_VOID **)&psDevMemoryInfo->psDeviceMemoryHeap, 0,
@@ -1460,7 +1520,10 @@ PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode)
 
 	psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap;
 
+	
+
 
+	
 	psDeviceMemoryHeap->ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_GENERAL_HEAP_ID);
 	psDeviceMemoryHeap->sDevVAddrBase.uiAddr = SGX_GENERAL_HEAP_BASE;
 	psDeviceMemoryHeap->ui32HeapSize = SGX_GENERAL_HEAP_SIZE;
@@ -1470,16 +1533,16 @@ PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode)
 	psDeviceMemoryHeap->pszName = "General";
 	psDeviceMemoryHeap->pszBSName = "General BS";
 	psDeviceMemoryHeap->DevMemHeapType = DEVICE_MEMORY_HEAP_PERCONTEXT;
-
+	
 	psDeviceMemoryHeap->ui32DataPageSize = SGX_MMU_PAGE_SIZE;
 #if !defined(SUPPORT_SGX_GENERAL_MAPPING_HEAP)
-
+	
 	psDevMemoryInfo->ui32MappingHeapID = (IMG_UINT32)(psDeviceMemoryHeap - psDevMemoryInfo->psDeviceMemoryHeap);
 #endif
 	psDeviceMemoryHeap++;
 
 
-
+	
 	psDeviceMemoryHeap->ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_TADATA_HEAP_ID);
 	psDeviceMemoryHeap->sDevVAddrBase.uiAddr = SGX_TADATA_HEAP_BASE;
 	psDeviceMemoryHeap->ui32HeapSize = SGX_TADATA_HEAP_SIZE;
@@ -1489,12 +1552,12 @@ PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode)
 	psDeviceMemoryHeap->pszName = "TA Data";
 	psDeviceMemoryHeap->pszBSName = "TA Data BS";
 	psDeviceMemoryHeap->DevMemHeapType = DEVICE_MEMORY_HEAP_PERCONTEXT;
-
+	
 	psDeviceMemoryHeap->ui32DataPageSize = SGX_MMU_PAGE_SIZE;
 	psDeviceMemoryHeap++;
 
 
-
+	
 	psDeviceMemoryHeap->ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_KERNEL_CODE_HEAP_ID);
 	psDeviceMemoryHeap->sDevVAddrBase.uiAddr = SGX_KERNEL_CODE_HEAP_BASE;
 	psDeviceMemoryHeap->ui32HeapSize = SGX_KERNEL_CODE_HEAP_SIZE;
@@ -1611,22 +1674,30 @@ PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode)
 
 
 	
-	psDeviceMemoryHeap->ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_3DPARAMETERS_HEAP_ID);
-	psDeviceMemoryHeap->sDevVAddrBase.uiAddr = SGX_3DPARAMETERS_HEAP_BASE;
-	psDeviceMemoryHeap->ui32HeapSize = SGX_3DPARAMETERS_HEAP_SIZE;
-	psDeviceMemoryHeap->pszName = "3DParameters";
-	psDeviceMemoryHeap->pszBSName = "3DParameters BS";
-#if defined(SUPPORT_PERCONTEXT_PB)
-	psDeviceMemoryHeap->ui32Attribs = PVRSRV_HAP_WRITECOMBINE
-															| PVRSRV_MEM_RAM_BACKED_ALLOCATION
-															| PVRSRV_HAP_SINGLE_PROCESS;
-	psDeviceMemoryHeap->DevMemHeapType = DEVICE_MEMORY_HEAP_PERCONTEXT;
-#else
+	psDeviceMemoryHeap->ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_SHARED_3DPARAMETERS_HEAP_ID);
+	psDeviceMemoryHeap->sDevVAddrBase.uiAddr = SGX_SHARED_3DPARAMETERS_HEAP_BASE;
+	psDeviceMemoryHeap->ui32HeapSize = SGX_SHARED_3DPARAMETERS_HEAP_SIZE;
+	psDeviceMemoryHeap->pszName = "Shared 3DParameters";
+	psDeviceMemoryHeap->pszBSName = "Shared 3DParameters BS";
 	psDeviceMemoryHeap->ui32Attribs = PVRSRV_HAP_WRITECOMBINE
 													| PVRSRV_MEM_RAM_BACKED_ALLOCATION
 													| PVRSRV_HAP_MULTI_PROCESS;
 	psDeviceMemoryHeap->DevMemHeapType = DEVICE_MEMORY_HEAP_SHARED_EXPORTED;
-#endif
+
+	
+	psDeviceMemoryHeap->ui32DataPageSize = SGX_MMU_PAGE_SIZE;
+	psDeviceMemoryHeap++;
+
+	
+	psDeviceMemoryHeap->ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_PERCONTEXT_3DPARAMETERS_HEAP_ID);
+	psDeviceMemoryHeap->sDevVAddrBase.uiAddr = SGX_PERCONTEXT_3DPARAMETERS_HEAP_BASE;
+	psDeviceMemoryHeap->ui32HeapSize = SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE;
+	psDeviceMemoryHeap->pszName = "Percontext 3DParameters";
+	psDeviceMemoryHeap->pszBSName = "Percontext 3DParameters BS";
+	psDeviceMemoryHeap->ui32Attribs = PVRSRV_HAP_WRITECOMBINE
+															| PVRSRV_MEM_RAM_BACKED_ALLOCATION
+															| PVRSRV_HAP_SINGLE_PROCESS;
+	psDeviceMemoryHeap->DevMemHeapType = DEVICE_MEMORY_HEAP_PERCONTEXT;
 	
 	psDeviceMemoryHeap->ui32DataPageSize = SGX_MMU_PAGE_SIZE;
 	psDeviceMemoryHeap++;
@@ -1813,7 +1884,7 @@ PVRSRV_ERROR SGXDevInitCompatCheck(PVRSRV_DEVICE_NODE *psDeviceNode)
 	psSGXMiscInfoInt = psMemInfo->pvLinAddrKM;
 	psSGXMiscInfoInt->ui32MiscInfoFlags = 0;
 	psSGXMiscInfoInt->ui32MiscInfoFlags |= PVRSRV_USSE_MISCINFO_GET_STRUCT_SIZES;
-	eError = SGXGetMiscInfoUkernel(psDevInfo, psDeviceNode);
+	eError = SGXGetMiscInfoUkernel(psDevInfo, psDeviceNode, IMG_NULL);
 
 	
 	if(eError != PVRSRV_OK)
@@ -1954,7 +2025,8 @@ chk_exit:
 
 static
 PVRSRV_ERROR SGXGetMiscInfoUkernel(PVRSRV_SGXDEV_INFO	*psDevInfo,
-								   PVRSRV_DEVICE_NODE 	*psDeviceNode)
+								   PVRSRV_DEVICE_NODE 	*psDeviceNode,
+								   IMG_HANDLE hDevMemContext)
 {
 	PVRSRV_ERROR		eError;
 	SGXMKIF_COMMAND		sCommandData;  
@@ -1988,6 +2060,7 @@ PVRSRV_ERROR SGXGetMiscInfoUkernel(PVRSRV_SGXDEV_INFO	*psDevInfo,
 									 &sCommandData,
 									 KERNEL_ID,
 									 0,
+									 hDevMemContext,
 									 IMG_FALSE);
 
 	if (eError != PVRSRV_OK)
@@ -2099,6 +2172,7 @@ PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO	*psDevInfo,
 											 &sCommandData,
 											 KERNEL_ID,
 											 0,
+											 hDevMemContext,
 											 IMG_FALSE);
 
 			if (eError != PVRSRV_OK)
@@ -2138,37 +2212,6 @@ PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO	*psDevInfo,
 			return PVRSRV_OK;
 		}
 
-		case SGX_MISC_INFO_REQUEST_WAIT_FOR_BREAKPOINT:
-		{
-			
-			
-			PDUMPCOMMENT("Wait for data breakpoint hit");
-
-#if defined(NO_HARDWARE) && defined(PDUMP)
-			{
-				PDUMPREGPOL(SGX_PDUMPREG_NAME,
-							EUR_CR_EVENT_STATUS2,
-							EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_TRAPPED_MASK,
-							EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_TRAPPED_MASK);
-
-				PDUMPREG(SGX_PDUMPREG_NAME,
-						 EUR_CR_EVENT_HOST_CLEAR2,
-						 EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_TRAPPED_MASK);
-
-				PDUMPCOMMENT("Breakpoint detected.  Wait a bit to show that pipeline stops in simulation");
-				PDUMPIDL(2000);
-
-				PDUMPCOMMENT("Now we can resume");
-				PDUMPREG(SGX_PDUMPREG_NAME, EUR_CR_BREAKPOINT_TRAP, EUR_CR_BREAKPOINT_TRAP_WRNOTIFY_MASK | EUR_CR_BREAKPOINT_TRAP_CONTINUE_MASK);
-			}
-#else
-			{
-				
-			}
-#endif 
-			return PVRSRV_OK;
-		}
-
 		case SGX_MISC_INFO_REQUEST_POLL_BREAKPOINT:
 		{
 			
@@ -2179,40 +2222,114 @@ PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO	*psDevInfo,
 			
 
 #if !defined(NO_HARDWARE)
+#if defined(SGX_FEATURE_MP)
 			IMG_BOOL bTrappedBPMaster;
-			IMG_BOOL abTrappedBPPerCore[SGX_FEATURE_MP_CORE_COUNT];
 			IMG_UINT32 ui32CoreNum, ui32TrappedBPCoreNum;
+#if defined(SGX_FEATURE_PERPIPE_BKPT_REGS)
+			IMG_UINT32 ui32PipeNum, ui32TrappedBPPipeNum;
+#define NUM_PIPES_PLUS_ONE (SGX_FEATURE_PERPIPE_BKPT_REGS_NUMPIPES+1)
+#endif
 			IMG_BOOL bTrappedBPAny;
+#endif 
+			IMG_BOOL bFoundOne;
 
+#if defined(SGX_FEATURE_MP)
 			ui32TrappedBPCoreNum = 0;
 			bTrappedBPMaster = !!(EUR_CR_MASTER_BREAKPOINT_TRAPPED_MASK & OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_BREAKPOINT));
 			bTrappedBPAny = bTrappedBPMaster;
-			for (ui32CoreNum = 0; ui32CoreNum < SGX_FEATURE_MP_CORE_COUNT; ui32CoreNum++)
+#if defined(SGX_FEATURE_PERPIPE_BKPT_REGS)
+			ui32TrappedBPPipeNum = 0; 
+#endif
+			for (ui32CoreNum = 0; ui32CoreNum < SGX_FEATURE_MP_CORE_COUNT_3D; ui32CoreNum++)
 			{
-				abTrappedBPPerCore[ui32CoreNum] = !!(EUR_CR_BREAKPOINT_TRAPPED_MASK & OSReadHWReg(psDevInfo->pvRegsBaseKM, SGX_MP_CORE_SELECT(EUR_CR_BREAKPOINT, ui32CoreNum)));
-				if (abTrappedBPPerCore[ui32CoreNum])
+#if defined(SGX_FEATURE_PERPIPE_BKPT_REGS)
+				
+
+
+#define SGX_MP_CORE_PIPE_SELECT(r,c,p) \
+				((SGX_MP_CORE_SELECT(EUR_CR_PARTITION_##r,c) + p*(EUR_CR_PIPE0_##r-EUR_CR_PARTITION_##r)))
+				for (ui32PipeNum = 0; ui32PipeNum < NUM_PIPES_PLUS_ONE; ui32PipeNum++)
+				{
+					bFoundOne =
+						0 != (EUR_CR_PARTITION_BREAKPOINT_TRAPPED_MASK & 
+							  OSReadHWReg(psDevInfo->pvRegsBaseKM, 
+										  SGX_MP_CORE_PIPE_SELECT(BREAKPOINT,
+																  ui32CoreNum,
+																  ui32PipeNum)));
+					if (bFoundOne)
+					{
+						bTrappedBPAny = IMG_TRUE;
+						ui32TrappedBPCoreNum = ui32CoreNum;
+						ui32TrappedBPPipeNum = ui32PipeNum;
+					}
+				}
+#else 
+				bFoundOne = !!(EUR_CR_BREAKPOINT_TRAPPED_MASK & OSReadHWReg(psDevInfo->pvRegsBaseKM, SGX_MP_CORE_SELECT(EUR_CR_BREAKPOINT, ui32CoreNum)));
+				if (bFoundOne)
 				{
 					bTrappedBPAny = IMG_TRUE;
 					ui32TrappedBPCoreNum = ui32CoreNum;
 				}
+#endif 
 			}
 
 			psMiscInfo->uData.sSGXBreakpointInfo.bTrappedBP = bTrappedBPAny;
+#else 
+#if defined(SGX_FEATURE_PERPIPE_BKPT_REGS)
+			#error Not yet considered the case for per-pipe regs in non-mp case
+#endif
+			psMiscInfo->uData.sSGXBreakpointInfo.bTrappedBP = 0 != (EUR_CR_BREAKPOINT_TRAPPED_MASK & OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BREAKPOINT));
+#endif 
 
 			if (psMiscInfo->uData.sSGXBreakpointInfo.bTrappedBP)
 			{
 				IMG_UINT32 ui32Info0, ui32Info1;
 
+#if defined(SGX_FEATURE_MP)
+#if defined(SGX_FEATURE_PERPIPE_BKPT_REGS)
+				ui32Info0 = OSReadHWReg(psDevInfo->pvRegsBaseKM, bTrappedBPMaster?EUR_CR_MASTER_BREAKPOINT_TRAP_INFO0:SGX_MP_CORE_PIPE_SELECT(BREAKPOINT_TRAP_INFO0, ui32TrappedBPCoreNum, ui32TrappedBPPipeNum));
+				ui32Info1 = OSReadHWReg(psDevInfo->pvRegsBaseKM, bTrappedBPMaster?EUR_CR_MASTER_BREAKPOINT_TRAP_INFO1:SGX_MP_CORE_PIPE_SELECT(BREAKPOINT_TRAP_INFO1, ui32TrappedBPCoreNum, ui32TrappedBPPipeNum));
+#else 
 				ui32Info0 = OSReadHWReg(psDevInfo->pvRegsBaseKM, bTrappedBPMaster?EUR_CR_MASTER_BREAKPOINT_TRAP_INFO0:SGX_MP_CORE_SELECT(EUR_CR_BREAKPOINT_TRAP_INFO0, ui32TrappedBPCoreNum));
 				ui32Info1 = OSReadHWReg(psDevInfo->pvRegsBaseKM, bTrappedBPMaster?EUR_CR_MASTER_BREAKPOINT_TRAP_INFO1:SGX_MP_CORE_SELECT(EUR_CR_BREAKPOINT_TRAP_INFO1, ui32TrappedBPCoreNum));
+#endif 
+#else 
+				ui32Info0 = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BREAKPOINT_TRAP_INFO0);
+				ui32Info1 = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BREAKPOINT_TRAP_INFO1);
+#endif 
 
+#ifdef SGX_FEATURE_PERPIPE_BKPT_REGS
+				psMiscInfo->uData.sSGXBreakpointInfo.ui32BPIndex = (ui32Info1 & EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_NUMBER_MASK) >> EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_NUMBER_SHIFT;
+				psMiscInfo->uData.sSGXBreakpointInfo.sTrappedBPDevVAddr.uiAddr = ui32Info0 & EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO0_ADDRESS_MASK;
+				psMiscInfo->uData.sSGXBreakpointInfo.ui32TrappedBPBurstLength = (ui32Info1 & EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_SIZE_MASK) >> EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_SIZE_SHIFT;
+				psMiscInfo->uData.sSGXBreakpointInfo.bTrappedBPRead = !!(ui32Info1 & EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_RNW_MASK);
+				psMiscInfo->uData.sSGXBreakpointInfo.ui32TrappedBPDataMaster = (ui32Info1 & EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_DATA_MASTER_MASK) >> EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SHIFT;
+				psMiscInfo->uData.sSGXBreakpointInfo.ui32TrappedBPTag = (ui32Info1 & EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_TAG_MASK) >> EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_TAG_SHIFT;
+#else 
 				psMiscInfo->uData.sSGXBreakpointInfo.ui32BPIndex = (ui32Info1 & EUR_CR_BREAKPOINT_TRAP_INFO1_NUMBER_MASK) >> EUR_CR_BREAKPOINT_TRAP_INFO1_NUMBER_SHIFT;
 				psMiscInfo->uData.sSGXBreakpointInfo.sTrappedBPDevVAddr.uiAddr = ui32Info0 & EUR_CR_BREAKPOINT_TRAP_INFO0_ADDRESS_MASK;
 				psMiscInfo->uData.sSGXBreakpointInfo.ui32TrappedBPBurstLength = (ui32Info1 & EUR_CR_BREAKPOINT_TRAP_INFO1_SIZE_MASK) >> EUR_CR_BREAKPOINT_TRAP_INFO1_SIZE_SHIFT;
 				psMiscInfo->uData.sSGXBreakpointInfo.bTrappedBPRead = !!(ui32Info1 & EUR_CR_BREAKPOINT_TRAP_INFO1_RNW_MASK);
 				psMiscInfo->uData.sSGXBreakpointInfo.ui32TrappedBPDataMaster = (ui32Info1 & EUR_CR_BREAKPOINT_TRAP_INFO1_DATA_MASTER_MASK) >> EUR_CR_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SHIFT;
 				psMiscInfo->uData.sSGXBreakpointInfo.ui32TrappedBPTag = (ui32Info1 & EUR_CR_BREAKPOINT_TRAP_INFO1_TAG_MASK) >> EUR_CR_BREAKPOINT_TRAP_INFO1_TAG_SHIFT;
+#endif 
+#if defined(SGX_FEATURE_MP)
+#if defined(SGX_FEATURE_PERPIPE_BKPT_REGS)
+				
+				psMiscInfo->uData.sSGXBreakpointInfo.ui32CoreNum = bTrappedBPMaster?65535:(ui32TrappedBPCoreNum + (ui32TrappedBPPipeNum<<10));
+#else 
+				
 				psMiscInfo->uData.sSGXBreakpointInfo.ui32CoreNum = bTrappedBPMaster?65535:ui32TrappedBPCoreNum;
+#endif 
+#else 
+#if defined(SGX_FEATURE_PERPIPE_BKPT_REGS)
+				
+#error non-mp perpipe regs not yet supported
+#else 
+				
+				psMiscInfo->uData.sSGXBreakpointInfo.ui32CoreNum = 65534;
+#endif 
+#endif 
 			}
 #endif 
 			return PVRSRV_OK;
@@ -2224,12 +2341,24 @@ PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO	*psDevInfo,
 			
 			
 #if !defined(NO_HARDWARE)
+#if defined(SGX_FEATURE_MP)
 			IMG_UINT32 ui32CoreNum;
 			IMG_BOOL bMaster;
+#if defined(SGX_FEATURE_PERPIPE_BKPT_REGS)
+			IMG_UINT32 ui32PipeNum;
+#endif
+#endif 
 			IMG_UINT32 ui32OldSeqNum, ui32NewSeqNum;
 
+#if defined(SGX_FEATURE_MP)
+#if defined(SGX_FEATURE_PERPIPE_BKPT_REGS)
+			ui32PipeNum = psMiscInfo->uData.sSGXBreakpointInfo.ui32CoreNum >> 10;
+			ui32CoreNum = psMiscInfo->uData.sSGXBreakpointInfo.ui32CoreNum & 1023;
+			bMaster = psMiscInfo->uData.sSGXBreakpointInfo.ui32CoreNum > 32767;
+#else 
 			ui32CoreNum = psMiscInfo->uData.sSGXBreakpointInfo.ui32CoreNum;
-			bMaster = ui32CoreNum > SGX_FEATURE_MP_CORE_COUNT;
+			bMaster = ui32CoreNum > SGX_FEATURE_MP_CORE_COUNT_3D;
+#endif 
 			if (bMaster)
 			{
 				
@@ -2243,8 +2372,18 @@ PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO	*psDevInfo,
 				while (ui32OldSeqNum == ui32NewSeqNum);
 			}
 			else
+#endif 
 			{
 				
+#if defined(SGX_FEATURE_PERPIPE_BKPT_REGS)
+				ui32OldSeqNum = 0x1c & OSReadHWReg(psDevInfo->pvRegsBaseKM, SGX_MP_CORE_PIPE_SELECT(BREAKPOINT, ui32CoreNum, ui32PipeNum));
+				OSWriteHWReg(psDevInfo->pvRegsBaseKM, SGX_MP_CORE_PIPE_SELECT(BREAKPOINT_TRAP, ui32CoreNum, ui32PipeNum), EUR_CR_PARTITION_BREAKPOINT_TRAP_WRNOTIFY_MASK | EUR_CR_PARTITION_BREAKPOINT_TRAP_CONTINUE_MASK);
+				do
+				{
+					ui32NewSeqNum = 0x1c & OSReadHWReg(psDevInfo->pvRegsBaseKM, SGX_MP_CORE_PIPE_SELECT(BREAKPOINT, ui32CoreNum, ui32PipeNum));
+				}
+				while (ui32OldSeqNum == ui32NewSeqNum);
+#else 
 				ui32OldSeqNum = 0x1c & OSReadHWReg(psDevInfo->pvRegsBaseKM, SGX_MP_CORE_SELECT(EUR_CR_BREAKPOINT, ui32CoreNum));
 				OSWriteHWReg(psDevInfo->pvRegsBaseKM, SGX_MP_CORE_SELECT(EUR_CR_BREAKPOINT_TRAP, ui32CoreNum), EUR_CR_BREAKPOINT_TRAP_WRNOTIFY_MASK | EUR_CR_BREAKPOINT_TRAP_CONTINUE_MASK);
 				do
@@ -2252,6 +2391,7 @@ PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO	*psDevInfo,
 					ui32NewSeqNum = 0x1c & OSReadHWReg(psDevInfo->pvRegsBaseKM, SGX_MP_CORE_SELECT(EUR_CR_BREAKPOINT, ui32CoreNum));
 				}
 				while (ui32OldSeqNum == ui32NewSeqNum);
+#endif 
 			}
 #endif 
 			return PVRSRV_OK;
@@ -2291,7 +2431,7 @@ PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO	*psDevInfo,
 		case SGX_MISC_INFO_REQUEST_SGXREV:
 		{
 			PVRSRV_SGX_MISCINFO_FEATURES		*psSGXFeatures;
-			eError = SGXGetMiscInfoUkernel(psDevInfo, psDeviceNode);
+			eError = SGXGetMiscInfoUkernel(psDevInfo, psDeviceNode, hDevMemContext);
 			if(eError != PVRSRV_OK)
 			{
 				PVR_DPF((PVR_DBG_ERROR, "An error occurred in SGXGetMiscInfoUkernel: %d\n",
@@ -2481,6 +2621,7 @@ PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO	*psDevInfo,
 											 &sCommandData,
 											 KERNEL_ID,
 											 0,
+											 hDevMemContext,
 											 IMG_FALSE);
 			return eError;
 		}
@@ -2535,6 +2676,8 @@ PVRSRV_ERROR SGXReadHWPerfCBKM(IMG_HANDLE					hDevHandle,
 		SGXMKIF_HWPERF_CB_ENTRY *psMKPerfEntry = &psHWPerfCB->psHWPerfCBData[psHWPerfCB->ui32Roff];
 
 		psClientHWPerfEntry[i].ui32FrameNo = psMKPerfEntry->ui32FrameNo;
+		psClientHWPerfEntry[i].ui32PID = psMKPerfEntry->ui32PID;
+		psClientHWPerfEntry[i].ui32RTData = psMKPerfEntry->ui32RTData;
 		psClientHWPerfEntry[i].ui32Type = psMKPerfEntry->ui32Type;
 		psClientHWPerfEntry[i].ui32Ordinal	= psMKPerfEntry->ui32Ordinal;
 		psClientHWPerfEntry[i].ui32Info	= psMKPerfEntry->ui32Info;
@@ -2545,6 +2688,10 @@ PVRSRV_ERROR SGXReadHWPerfCBKM(IMG_HANDLE					hDevHandle,
 				  &psMKPerfEntry->ui32Counters[0][0],
 				  sizeof(psMKPerfEntry->ui32Counters));
 
+		OSMemCopy(&psClientHWPerfEntry[i].ui32MiscCounters[0][0],
+				  &psMKPerfEntry->ui32MiscCounters[0][0],
+				  sizeof(psMKPerfEntry->ui32MiscCounters));
+
 		psHWPerfCB->ui32Roff = (psHWPerfCB->ui32Roff + 1) & (SGXMKIF_HWPERF_CB_SIZE - 1);
 	}
 
diff --git a/drivers/gpu/pvr/sgx/sgxkick.c b/drivers/gpu/pvr/sgx/sgxkick.c
index 581640b8fd1..115204f67c2 100644
--- a/drivers/gpu/pvr/sgx/sgxkick.c
+++ b/drivers/gpu/pvr/sgx/sgxkick.c
@@ -36,29 +36,48 @@
 #include "osfunc.h"
 #include "pvr_debug.h"
 #include "sgxutils.h"
+#include "ttrace.h"
 
 IMG_EXPORT
+#if defined (SUPPORT_SID_INTERFACE)
+PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK_KM *psCCBKick)
+#else
 PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK *psCCBKick)
+#endif
 {
 	PVRSRV_ERROR eError;
 	PVRSRV_KERNEL_SYNC_INFO	*psSyncInfo;
 	PVRSRV_KERNEL_MEM_INFO	*psCCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *) psCCBKick->hCCBKernelMemInfo;
 	SGXMKIF_CMDTA_SHARED *psTACmd;
 	IMG_UINT32 i;
+	IMG_HANDLE hDevMemContext = IMG_NULL;
+#if defined(FIX_HW_BRN_31620)
+	hDevMemContext = psCCBKick->hDevMemContext;
+#endif
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_KICK, PVRSRV_TRACE_CLASS_FUNCTION_ENTER, KICK_TOKEN_DOKICK);
 
 	if (!CCB_OFFSET_IS_VALID(SGXMKIF_CMDTA_SHARED, psCCBMemInfo, psCCBKick, ui32CCBOffset))
 	{
 		PVR_DPF((PVR_DBG_ERROR, "SGXDoKickKM: Invalid CCB offset"));
+		PVR_TTRACE(PVRSRV_TRACE_GROUP_KICK, PVRSRV_TRACE_CLASS_FUNCTION_EXIT, KICK_TOKEN_DOKICK);
 		return PVRSRV_ERROR_INVALID_PARAMS;
 	}
 	
 	
 	psTACmd = CCB_DATA_FROM_OFFSET(SGXMKIF_CMDTA_SHARED, psCCBMemInfo, psCCBKick, ui32CCBOffset);
 
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_KICK, PVRSRV_TRACE_CLASS_CMD_START, KICK_TOKEN_DOKICK);
+	PVR_TTRACE_UI32(PVRSRV_TRACE_GROUP_KICK, PVRSRV_TRACE_CLASS_CCB,
+			KICK_TOKEN_CCB_OFFSET, psCCBKick->ui32CCBOffset);
+
 	
 	if (psCCBKick->hTA3DSyncInfo)
 	{
 		psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTA3DSyncInfo;
+
+		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_KICK, KICK_TOKEN_TA3D_SYNC,
+					  psSyncInfo, PVRSRV_SYNCOP_SAMPLE);
+
 		psTACmd->sTA3DDependency.sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
 
 		psTACmd->sTA3DDependency.ui32WriteOpsPendingVal   = psSyncInfo->psSyncData->ui32WriteOpsPending;
@@ -73,6 +92,9 @@ PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK *psCCBKick)
 	{
 		psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTASyncInfo;
 
+		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_KICK, KICK_TOKEN_TA_SYNC,
+					  psSyncInfo, PVRSRV_SYNCOP_SAMPLE);
+
 		psTACmd->sTATQSyncReadOpsCompleteDevVAddr  = psSyncInfo->sReadOpsCompleteDevVAddr;
 		psTACmd->sTATQSyncWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
 
@@ -84,6 +106,9 @@ PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK *psCCBKick)
 	{
 		psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->h3DSyncInfo;
 
+		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_KICK, KICK_TOKEN_3D_SYNC,
+					  psSyncInfo, PVRSRV_SYNCOP_SAMPLE);
+
 		psTACmd->s3DTQSyncReadOpsCompleteDevVAddr  = psSyncInfo->sReadOpsCompleteDevVAddr;
 		psTACmd->s3DTQSyncWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
 
@@ -174,6 +199,9 @@ PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK *psCCBKick)
 	{
 		psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ahSrcKernelSyncInfo[i];
 
+		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_KICK, KICK_TOKEN_SRC_SYNC,
+					  psSyncInfo, PVRSRV_SYNCOP_SAMPLE);
+
 		psTACmd->asSrcSyncs[i].sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
 		psTACmd->asSrcSyncs[i].sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
 
@@ -191,7 +219,7 @@ PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK *psCCBKick)
 		SGXMKIF_HWDEVICE_SYNC_LIST *psHWDeviceSyncList = psHWDstSyncListMemInfo->pvLinAddrKM;
 		IMG_UINT32	ui32NumDstSyncs = psCCBKick->ui32NumDstSyncObjects;
 
-		PVR_ASSERT(((PVRSRV_KERNEL_MEM_INFO *)psCCBKick->hKernelHWSyncListMemInfo)->ui32AllocSize >= (sizeof(SGXMKIF_HWDEVICE_SYNC_LIST) +
+		PVR_ASSERT(((PVRSRV_KERNEL_MEM_INFO *)psCCBKick->hKernelHWSyncListMemInfo)->uAllocSize >= (sizeof(SGXMKIF_HWDEVICE_SYNC_LIST) +
 								(sizeof(PVRSRV_DEVICE_SYNC_OBJECT) * ui32NumDstSyncs)));
 
 		psHWDeviceSyncList->ui32NumSyncObjects = ui32NumDstSyncs;
@@ -214,6 +242,10 @@ PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK *psCCBKick)
 
 			if (psSyncInfo)
 			{
+
+				PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_KICK, KICK_TOKEN_DST_SYNC,
+							psSyncInfo, PVRSRV_SYNCOP_SAMPLE);
+
 				psHWDeviceSyncList->asSyncData[i].sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
 				psHWDeviceSyncList->asSyncData[i].sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
 
@@ -550,7 +582,10 @@ PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK *psCCBKick)
 	}
 #endif	
 
-	eError = SGXScheduleCCBCommandKM(hDevHandle, SGXMKIF_CMD_TA, &psCCBKick->sCommand, KERNEL_ID, 0, psCCBKick->bLastInScene);
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_KICK, PVRSRV_TRACE_CLASS_CMD_END,
+			KICK_TOKEN_DOKICK);
+
+	eError = SGXScheduleCCBCommandKM(hDevHandle, SGXMKIF_CMD_TA, &psCCBKick->sCommand, KERNEL_ID, 0, hDevMemContext, psCCBKick->bLastInScene);
 	if (eError == PVRSRV_ERROR_RETRY)
 	{
 		if (psCCBKick->bFirstKickOrResume && psCCBKick->ui32NumDstSyncObjects > 0)
@@ -597,11 +632,15 @@ PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK *psCCBKick)
 		}
 #endif
 
+		PVR_TTRACE(PVRSRV_TRACE_GROUP_KICK, PVRSRV_TRACE_CLASS_FUNCTION_EXIT,
+				KICK_TOKEN_DOKICK);
 		return eError;
 	}
 	else if (PVRSRV_OK != eError)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "SGXDoKickKM: SGXScheduleCCBCommandKM failed."));
+		PVR_TTRACE(PVRSRV_TRACE_GROUP_KICK, PVRSRV_TRACE_CLASS_FUNCTION_EXIT,
+				KICK_TOKEN_DOKICK);
 		return eError;
 	}
 
@@ -707,7 +746,8 @@ PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK *psCCBKick)
 		}
 	}
 #endif
-
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_KICK, PVRSRV_TRACE_CLASS_FUNCTION_EXIT,
+			KICK_TOKEN_DOKICK);
 	return eError;
 }
 
diff --git a/drivers/gpu/pvr/sgx/sgxpower.c b/drivers/gpu/pvr/sgx/sgxpower.c
index 427cb50dd92..bea113ed354 100644
--- a/drivers/gpu/pvr/sgx/sgxpower.c
+++ b/drivers/gpu/pvr/sgx/sgxpower.c
@@ -207,7 +207,7 @@ static IMG_VOID SGXPollForClockGating (PVRSRV_SGXDEV_INFO	*psDevInfo,
 	#endif 
 
 	PDUMPCOMMENT("%s", pszComment);
-	PDUMPREGPOL(SGX_PDUMPREG_NAME, ui32Register, 0, ui32RegisterValue);
+	PDUMPREGPOL(SGX_PDUMPREG_NAME, ui32Register, 0, ui32RegisterValue, PDUMP_POLL_OPERATOR_EQUAL);
 }
 
 
@@ -224,6 +224,7 @@ PVRSRV_ERROR SGXPrePowerState (IMG_HANDLE				hDevHandle,
 		IMG_UINT32			ui32PowerCmd, ui32CompleteStatus;
 		SGXMKIF_COMMAND		sCommand = {0};
 		IMG_UINT32			ui32Core;
+		IMG_UINT32			ui32CoresEnabled;
 
 		#if defined(SUPPORT_HW_RECOVERY)
 		
@@ -252,7 +253,7 @@ PVRSRV_ERROR SGXPrePowerState (IMG_HANDLE				hDevHandle,
 
 		sCommand.ui32Data[1] = ui32PowerCmd;
 
-		eError = SGXScheduleCCBCommand(psDevInfo, SGXMKIF_CMD_POWER, &sCommand, KERNEL_ID, 0, IMG_FALSE);
+		eError = SGXScheduleCCBCommand(psDeviceNode, SGXMKIF_CMD_POWER, &sCommand, KERNEL_ID, 0, IMG_NULL, IMG_FALSE);
 		if (eError != PVRSRV_OK)
 		{
 			PVR_DPF((PVR_DBG_ERROR,"SGXPrePowerState: Failed to submit power down command"));
@@ -284,7 +285,13 @@ PVRSRV_ERROR SGXPrePowerState (IMG_HANDLE				hDevHandle,
 					MAKEUNIQUETAG(psDevInfo->psKernelSGXHostCtlMemInfo));
 		#endif 
 
-		for (ui32Core = 0; ui32Core < SGX_FEATURE_MP_CORE_COUNT; ui32Core++)
+#if defined(SGX_FEATURE_MP)
+		ui32CoresEnabled = ((OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_CORE) & EUR_CR_MASTER_CORE_ENABLE_MASK) >> EUR_CR_MASTER_CORE_ENABLE_SHIFT) + 1;
+#else
+		ui32CoresEnabled = 1;
+#endif
+
+		for (ui32Core = 0; ui32Core < ui32CoresEnabled; ui32Core++)
 		{
 			
 			SGXPollForClockGating(psDevInfo,
@@ -373,7 +380,7 @@ PVRSRV_ERROR SGXPostPowerState (IMG_HANDLE				hDevHandle,
 			SGXMKIF_COMMAND		sCommand = {0};
 
 			sCommand.ui32Data[1] = PVRSRV_POWERCMD_RESUME;
-			eError = SGXScheduleCCBCommand(psDevInfo, SGXMKIF_CMD_POWER, &sCommand, ISR_ID, 0, IMG_FALSE);
+			eError = SGXScheduleCCBCommand(psDeviceNode, SGXMKIF_CMD_POWER, &sCommand, ISR_ID, 0, IMG_NULL, IMG_FALSE);
 			if (eError != PVRSRV_OK)
 			{
 				PVR_DPF((PVR_DBG_ERROR,"SGXPostPowerState failed to schedule CCB command: %u", eError));
diff --git a/drivers/gpu/pvr/sgx/sgxreset.c b/drivers/gpu/pvr/sgx/sgxreset.c
index 847ca24a233..d28898b1025 100644
--- a/drivers/gpu/pvr/sgx/sgxreset.c
+++ b/drivers/gpu/pvr/sgx/sgxreset.c
@@ -33,38 +33,162 @@
 #include "pdump_km.h"
 
 
-static IMG_VOID SGXResetSoftReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
-								  IMG_BOOL				bResetBIF,
-								  IMG_UINT32			ui32PDUMPFlags,
-								  IMG_BOOL				bPDump)
+IMG_VOID SGXInitClocks(PVRSRV_SGXDEV_INFO	*psDevInfo,
+					   IMG_UINT32			ui32PDUMPFlags)
 {
-	IMG_UINT32 ui32SoftResetRegVal;
+	IMG_UINT32	ui32RegVal;
+	
+#if !defined(PDUMP)
+	PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
+#endif 
+	
+	ui32RegVal = psDevInfo->ui32ClkGateCtl;
+	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_CLKGATECTL, ui32RegVal);
+	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_CLKGATECTL, ui32RegVal, ui32PDUMPFlags);
+
+#if defined(EUR_CR_CLKGATECTL2)
+	ui32RegVal = psDevInfo->ui32ClkGateCtl2;
+	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_CLKGATECTL2, ui32RegVal);
+	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_CLKGATECTL2, ui32RegVal, ui32PDUMPFlags);
+#endif
+}
 
-#if defined(SGX_FEATURE_MP)
-	ui32SoftResetRegVal =
-					EUR_CR_MASTER_SOFT_RESET_IPF_RESET_MASK  |
-					EUR_CR_MASTER_SOFT_RESET_DPM_RESET_MASK  |
-					EUR_CR_MASTER_SOFT_RESET_VDM_RESET_MASK;
 
-#if defined(SGX_FEATURE_PTLA)
-	ui32SoftResetRegVal |= EUR_CR_MASTER_SOFT_RESET_PTLA_RESET_MASK;
-#endif
-#if defined(SGX_FEATURE_SYSTEM_CACHE)
-	ui32SoftResetRegVal |= EUR_CR_MASTER_SOFT_RESET_SLC_RESET_MASK;
-#endif
+static IMG_VOID SGXResetInitBIFContexts(PVRSRV_SGXDEV_INFO	*psDevInfo,
+										IMG_UINT32			ui32PDUMPFlags)
+{
+	IMG_UINT32	ui32RegVal;
 
-	if (bResetBIF)
+#if !defined(PDUMP)
+	PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
+#endif 
+
+	ui32RegVal = 0;
+	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
+	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
+
+#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
+	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Initialise the BIF bank settings\r\n");
+	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK_SET, ui32RegVal);
+	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_BANK_SET, ui32RegVal, ui32PDUMPFlags);
+	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32RegVal);
+	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_BANK0, ui32RegVal, ui32PDUMPFlags);
+#endif 
+
+	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Initialise the BIF directory list\r\n");
+	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal);
+	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal, ui32PDUMPFlags);
+
+#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
 	{
-		ui32SoftResetRegVal |= EUR_CR_MASTER_SOFT_RESET_BIF_RESET_MASK;
+		IMG_UINT32	ui32DirList, ui32DirListReg;
+
+		for (ui32DirList = 1;
+			 ui32DirList < SGX_FEATURE_BIF_NUM_DIRLISTS;
+			 ui32DirList++)
+		{
+			ui32DirListReg = EUR_CR_BIF_DIR_LIST_BASE1 + 4 * (ui32DirList - 1);
+			OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32DirListReg, ui32RegVal);
+			PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, ui32DirListReg, ui32RegVal, ui32PDUMPFlags);
+		}
 	}
+#endif 
+}
+
+
+static IMG_VOID SGXResetSetupBIFContexts(PVRSRV_SGXDEV_INFO	*psDevInfo,
+										 IMG_UINT32			ui32PDUMPFlags)
+{
+	IMG_UINT32	ui32RegVal;
+
+#if !defined(PDUMP)
+	PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
+#endif 
+	
+	#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
+	
+	ui32RegVal = (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT);
+
+	#if defined(SGX_FEATURE_2D_HARDWARE) && !defined(SGX_FEATURE_PTLA)
+	
+	ui32RegVal |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_2D_SHIFT);
+	#endif 
+
+	#if defined(FIX_HW_BRN_23410)
+	
+	ui32RegVal |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_TA_SHIFT);
+	#endif 
+
+	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32RegVal);
+	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Set up EDM requestor page table in BIF\r\n");
+	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_BANK0, ui32RegVal, ui32PDUMPFlags);
+	#endif 
 
-	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_SOFT_RESET, ui32SoftResetRegVal);
-	if (bPDump)
 	{
-		PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_MASTER_SOFT_RESET, ui32SoftResetRegVal, ui32PDUMPFlags);
+		IMG_UINT32	ui32EDMDirListReg;
+
+		
+		#if (SGX_BIF_DIR_LIST_INDEX_EDM == 0)
+		ui32EDMDirListReg = EUR_CR_BIF_DIR_LIST_BASE0;
+		#else
+		
+		ui32EDMDirListReg = EUR_CR_BIF_DIR_LIST_BASE1 + 4 * (SGX_BIF_DIR_LIST_INDEX_EDM - 1);
+		#endif 
+
+		ui32RegVal = psDevInfo->sKernelPDDevPAddr.uiAddr >> SGX_MMU_PDE_ADDR_ALIGNSHIFT;
+		
+#if defined(FIX_HW_BRN_28011)
+		OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal);
+		PDUMPPDREGWITHFLAGS(&psDevInfo->sMMUAttrib, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal, ui32PDUMPFlags, PDUMP_PD_UNIQUETAG);
+#endif
+
+		OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32EDMDirListReg, ui32RegVal);
+		PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Initialise the EDM's directory list base\r\n");
+		PDUMPPDREGWITHFLAGS(&psDevInfo->sMMUAttrib, ui32EDMDirListReg, ui32RegVal, ui32PDUMPFlags, PDUMP_PD_UNIQUETAG);
 	}
+}
+
+
+static IMG_VOID SGXResetSleep(PVRSRV_SGXDEV_INFO	*psDevInfo,
+							  IMG_UINT32			ui32PDUMPFlags,
+							  IMG_BOOL				bPDump)
+{
+#if defined(PDUMP)
+	IMG_UINT32	ui32ReadRegister;
+
+	#if defined(SGX_FEATURE_MP)
+	ui32ReadRegister = EUR_CR_MASTER_SOFT_RESET;
+	#else
+	ui32ReadRegister = EUR_CR_SOFT_RESET;
+	#endif 
+#endif
+
+#if !defined(PDUMP)
+	PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
 #endif 
 
+	
+	OSWaitus(100 * 1000000 / psDevInfo->ui32CoreClockSpeed);
+	if (bPDump)
+	{
+		PDUMPIDLWITHFLAGS(30, ui32PDUMPFlags);
+#if defined(PDUMP)
+		PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Read back to flush the register writes\r\n");
+		PDumpRegRead(SGX_PDUMPREG_NAME, ui32ReadRegister, ui32PDUMPFlags);
+#endif
+	}
+
+}
+
+
+#if !defined(SGX_FEATURE_MP)
+static IMG_VOID SGXResetSoftReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
+								  IMG_BOOL				bResetBIF,
+								  IMG_UINT32			ui32PDUMPFlags,
+								  IMG_BOOL				bPDump)
+{
+	IMG_UINT32 ui32SoftResetRegVal;
+
 	ui32SoftResetRegVal =
 					
 					EUR_CR_SOFT_RESET_DPM_RESET_MASK |
@@ -139,27 +263,6 @@ static IMG_VOID SGXResetSoftReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
 }
 
 
-static IMG_VOID SGXResetSleep(PVRSRV_SGXDEV_INFO	*psDevInfo,
-							  IMG_UINT32			ui32PDUMPFlags,
-							  IMG_BOOL				bPDump)
-{
-#if !defined(PDUMP)
-	PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
-#endif 
-
-	
-	OSWaitus(100 * 1000000 / psDevInfo->ui32CoreClockSpeed);
-	if (bPDump)
-	{
-		PDUMPIDLWITHFLAGS(30, ui32PDUMPFlags);
-#if defined(PDUMP)
-		PDumpRegRead(SGX_PDUMPREG_NAME, EUR_CR_SOFT_RESET, ui32PDUMPFlags);
-#endif
-	}
-
-}
-
-
 static IMG_VOID SGXResetInvalDC(PVRSRV_SGXDEV_INFO	*psDevInfo,
 							    IMG_UINT32			ui32PDUMPFlags,
 								IMG_BOOL			bPDump)
@@ -209,16 +312,18 @@ static IMG_VOID SGXResetInvalDC(PVRSRV_SGXDEV_INFO	*psDevInfo,
 
 		if (bPDump)
 		{
-			PDUMPREGPOLWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_MEM_REQ_STAT, 0, EUR_CR_BIF_MEM_REQ_STAT_READS_MASK, ui32PDUMPFlags);
+			PDUMPREGPOLWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_MEM_REQ_STAT, 0, EUR_CR_BIF_MEM_REQ_STAT_READS_MASK, ui32PDUMPFlags, PDUMP_POLL_OPERATOR_EQUAL);
 		}
 	}
 #endif 
 }
+#endif 
 
 
 IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
 				  IMG_BOOL				bHardwareRecovery,
 				  IMG_UINT32			ui32PDUMPFlags)
+#if !defined(SGX_FEATURE_MP)
 {
 	IMG_UINT32 ui32RegVal;
 #if defined(EUR_CR_BIF_INT_STAT_FAULT_REQ_MASK)
@@ -227,12 +332,10 @@ IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
 	const IMG_UINT32 ui32BifFaultMask = EUR_CR_BIF_INT_STAT_FAULT_MASK;
 #endif
 
-#ifndef PDUMP
+#if !defined(PDUMP)
 	PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
 #endif 
 
-	psDevInfo->ui32NumResets++;
-
 	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Start of SGX reset sequence\r\n");
 
 #if defined(FIX_HW_BRN_23944)
@@ -274,37 +377,7 @@ IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
 	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_36BIT_ADDRESSING, EUR_CR_BIF_36BIT_ADDRESSING_ENABLE_MASK, ui32PDUMPFlags);
 #endif
 
-	ui32RegVal = 0;
-	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
-	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
-#if defined(SGX_FEATURE_MP)
-	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_BIF_CTRL, ui32RegVal);
-	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_MASTER_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
-#endif 
-#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
-	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK_SET, ui32RegVal);
-	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_BANK_SET, ui32RegVal, ui32PDUMPFlags);
-	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32RegVal);
-	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_BANK0, ui32RegVal, ui32PDUMPFlags);
-#endif 
-
-	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal);
-	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal, ui32PDUMPFlags);
-
-#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
-	{
-		IMG_UINT32	ui32DirList, ui32DirListReg;
-
-		for (ui32DirList = 1;
-			 ui32DirList < SGX_FEATURE_BIF_NUM_DIRLISTS;
-			 ui32DirList++)
-		{
-			ui32DirListReg = EUR_CR_BIF_DIR_LIST_BASE1 + 4 * (ui32DirList - 1);
-			OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32DirListReg, ui32RegVal);
-			PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, ui32DirListReg, ui32RegVal, ui32PDUMPFlags);
-		}
-	}
-#endif 
+	SGXResetInitBIFContexts(psDevInfo, ui32PDUMPFlags);
 
 #if defined(EUR_CR_BIF_MEM_ARB_CONFIG)
 	
@@ -317,30 +390,6 @@ IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
 #endif 
 
 #if defined(SGX_FEATURE_SYSTEM_CACHE)
-#if defined(SGX_FEATURE_MP)
-	#if defined(SGX_BYPASS_SYSTEM_CACHE)
-		#error SGX_BYPASS_SYSTEM_CACHE not supported
-	#else
-		ui32RegVal = EUR_CR_MASTER_SLC_CTRL_USSE_INVAL_REQ0_MASK |
-		#if defined(FIX_HW_BRN_30954)
-						EUR_CR_MASTER_SLC_CTRL_DISABLE_REORDERING_MASK |
-		#endif
-						(0xC << EUR_CR_MASTER_SLC_CTRL_ARB_PAGE_SIZE_SHIFT);
-		OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_SLC_CTRL, ui32RegVal);
-		PDUMPREG(SGX_PDUMPREG_NAME, EUR_CR_MASTER_SLC_CTRL, ui32RegVal);
-
-		ui32RegVal = EUR_CR_MASTER_SLC_CTRL_BYPASS_BYP_CC_MASK;
-	#if defined(FIX_HW_BRN_31195)
-		ui32RegVal |= EUR_CR_MASTER_SLC_CTRL_BYPASS_REQ_USE0_MASK |
-				EUR_CR_MASTER_SLC_CTRL_BYPASS_REQ_USE1_MASK |
-				EUR_CR_MASTER_SLC_CTRL_BYPASS_REQ_USE2_MASK |
-				EUR_CR_MASTER_SLC_CTRL_BYPASS_REQ_USE3_MASK |
-				EUR_CR_MASTER_SLC_CTRL_BYPASS_REQ_TA_MASK;
-	#endif
-		OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_SLC_CTRL_BYPASS, ui32RegVal);
-		PDUMPREG(SGX_PDUMPREG_NAME, EUR_CR_MASTER_SLC_CTRL_BYPASS, ui32RegVal);
-	#endif 
-#else
 	#if defined(SGX_BYPASS_SYSTEM_CACHE)
 		
 		ui32RegVal = MNE_CR_CTRL_BYPASS_ALL_MASK;
@@ -355,7 +404,6 @@ IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
 	OSWriteHWReg(psDevInfo->pvRegsBaseKM, MNE_CR_CTRL, ui32RegVal);
 	PDUMPREG(SGX_PDUMPREG_NAME, MNE_CR_CTRL, ui32RegVal);
 #endif 
-#endif 
 
 	if (bHardwareRecovery)
 	{
@@ -439,43 +487,7 @@ IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
 
 	
 
-	#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
-	
-	ui32RegVal = (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT);
-
-	#if defined(SGX_FEATURE_2D_HARDWARE) && !defined(SGX_FEATURE_PTLA)
-	
-	ui32RegVal |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_2D_SHIFT);
-	#endif 
-
-	#if defined(FIX_HW_BRN_23410)
-	
-	ui32RegVal |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_TA_SHIFT);
-	#endif 
-
-	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32RegVal);
-	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_BANK0, ui32RegVal, ui32PDUMPFlags);
-	#endif 
-
-	{
-		IMG_UINT32	ui32EDMDirListReg;
-
-		
-		#if (SGX_BIF_DIR_LIST_INDEX_EDM == 0)
-		ui32EDMDirListReg = EUR_CR_BIF_DIR_LIST_BASE0;
-		#else
-		
-		ui32EDMDirListReg = EUR_CR_BIF_DIR_LIST_BASE1 + 4 * (SGX_BIF_DIR_LIST_INDEX_EDM - 1);
-		#endif 
-
-#if defined(FIX_HW_BRN_28011)
-		OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0, psDevInfo->sKernelPDDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT);
-		PDUMPPDREGWITHFLAGS(&psDevInfo->sMMUAttrib, EUR_CR_BIF_DIR_LIST_BASE0, psDevInfo->sKernelPDDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT, ui32PDUMPFlags, PDUMP_PD_UNIQUETAG);
-#endif
-
-		OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32EDMDirListReg, psDevInfo->sKernelPDDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT);
-		PDUMPPDREGWITHFLAGS(&psDevInfo->sMMUAttrib, ui32EDMDirListReg, psDevInfo->sKernelPDDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT, ui32PDUMPFlags, PDUMP_PD_UNIQUETAG);
-	}
+	SGXResetSetupBIFContexts(psDevInfo, ui32PDUMPFlags);
 
 #if defined(SGX_FEATURE_2D_HARDWARE) && !defined(SGX_FEATURE_PTLA)
 	
@@ -494,10 +506,6 @@ IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
 
 	
 	ui32RegVal = 0;
-#if defined(SGX_FEATURE_MP)
-	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_SOFT_RESET, ui32RegVal);
-	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_MASTER_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
-#endif 
 	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
 	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
 
@@ -507,4 +515,140 @@ IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
 	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "End of SGX reset sequence\r\n");
 }
 
+#else
+
+{
+	IMG_UINT32 ui32RegVal;
+	
+	PVR_UNREFERENCED_PARAMETER(bHardwareRecovery);
+
+#if !defined(PDUMP)
+	PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
+#endif 
+
+	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Start of SGX MP reset sequence\r\n");
+
+	
+	ui32RegVal = EUR_CR_MASTER_SOFT_RESET_BIF_RESET_MASK  |
+				 EUR_CR_MASTER_SOFT_RESET_IPF_RESET_MASK  |
+				 EUR_CR_MASTER_SOFT_RESET_DPM_RESET_MASK  |
+				 EUR_CR_MASTER_SOFT_RESET_VDM_RESET_MASK;
+
+#if defined(SGX_FEATURE_PTLA)
+	ui32RegVal |= EUR_CR_MASTER_SOFT_RESET_PTLA_RESET_MASK;
+#endif
+#if defined(SGX_FEATURE_SYSTEM_CACHE)
+	ui32RegVal |= EUR_CR_MASTER_SOFT_RESET_SLC_RESET_MASK;
+#endif
+
+	
+	ui32RegVal |= EUR_CR_MASTER_SOFT_RESET_CORE_RESET_MASK(0)  |
+				  EUR_CR_MASTER_SOFT_RESET_CORE_RESET_MASK(1)  |
+				  EUR_CR_MASTER_SOFT_RESET_CORE_RESET_MASK(2)  |
+				  EUR_CR_MASTER_SOFT_RESET_CORE_RESET_MASK(3);
+
+	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_SOFT_RESET, ui32RegVal);
+	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Soft reset hydra partition, hard reset the cores\r\n");
+	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_MASTER_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
+
+	SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
+
+	ui32RegVal = 0;
+	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_BIF_CTRL, ui32RegVal);
+	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Initialise the hydra BIF control\r\n");
+	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_MASTER_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
+
+#if defined(SGX_FEATURE_SYSTEM_CACHE)
+	#if defined(SGX_BYPASS_SYSTEM_CACHE)
+		#error SGX_BYPASS_SYSTEM_CACHE not supported
+	#else
+		ui32RegVal = EUR_CR_MASTER_SLC_CTRL_USSE_INVAL_REQ0_MASK |
+		#if defined(FIX_HW_BRN_30954)
+						EUR_CR_MASTER_SLC_CTRL_DISABLE_REORDERING_MASK |
+		#endif
+						(0xC << EUR_CR_MASTER_SLC_CTRL_ARB_PAGE_SIZE_SHIFT);
+		OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_SLC_CTRL, ui32RegVal);
+		PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Initialise the hydra SLC control\r\n");
+		PDUMPREG(SGX_PDUMPREG_NAME, EUR_CR_MASTER_SLC_CTRL, ui32RegVal);
+
+		ui32RegVal = EUR_CR_MASTER_SLC_CTRL_BYPASS_BYP_CC_MASK;
+	#if defined(FIX_HW_BRN_31620)
+		ui32RegVal |= EUR_CR_MASTER_SLC_CTRL_BYPASS_REQ_MMU_MASK;
+	#endif
+	#if defined(FIX_HW_BRN_31195)
+		ui32RegVal |= EUR_CR_MASTER_SLC_CTRL_BYPASS_REQ_USE0_MASK |
+				EUR_CR_MASTER_SLC_CTRL_BYPASS_REQ_USE1_MASK |
+				EUR_CR_MASTER_SLC_CTRL_BYPASS_REQ_USE2_MASK |
+				EUR_CR_MASTER_SLC_CTRL_BYPASS_REQ_USE3_MASK |
+				EUR_CR_MASTER_SLC_CTRL_BYPASS_REQ_TA_MASK;
+	#endif
+		OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_SLC_CTRL_BYPASS, ui32RegVal);
+		PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Initialise the hydra SLC bypass control\r\n");
+		PDUMPREG(SGX_PDUMPREG_NAME, EUR_CR_MASTER_SLC_CTRL_BYPASS, ui32RegVal);
+	#endif 
+#endif 
+
+	SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
+
+	
+	ui32RegVal = 0;
+	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_SOFT_RESET, ui32RegVal);
+	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Remove the resets from all of SGX\r\n");
+	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_MASTER_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
+	
+	SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
+
+	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Turn on the slave cores' clock gating\r\n");
+	SGXInitClocks(psDevInfo, ui32PDUMPFlags);
+
+	SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
+
+	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Initialise the slave BIFs\r\n");
+
+#if defined(FIX_HW_BRN_31278) || defined(FIX_HW_BRN_31620) || defined(FIX_HW_BRN_31671)
+	#if defined(FIX_HW_BRN_31278)
+	
+	ui32RegVal = (1<<EUR_CR_MASTER_BIF_MMU_CTRL_ADDR_HASH_MODE_SHIFT);
+	#else
+	ui32RegVal = (1<<EUR_CR_MASTER_BIF_MMU_CTRL_ADDR_HASH_MODE_SHIFT) | EUR_CR_MASTER_BIF_MMU_CTRL_PREFETCHING_ON_MASK; 
+	#endif
+	#if !defined(FIX_HW_BRN_31620) && !defined(FIX_HW_BRN_31671)
+	
+	ui32RegVal |= EUR_CR_MASTER_BIF_MMU_CTRL_ENABLE_DC_TLB_MASK;
+	#endif
+
+	
+	OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_BIF_MMU_CTRL, ui32RegVal);
+	PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_MASTER_BIF_MMU_CTRL, ui32RegVal, ui32PDUMPFlags);
+
+	#if defined(FIX_HW_BRN_31278)
+	
+	ui32RegVal = (1<<EUR_CR_BIF_MMU_CTRL_ADDR_HASH_MODE_SHIFT);
+	#else
+	ui32RegVal = (1<<EUR_CR_BIF_MMU_CTRL_ADDR_HASH_MODE_SHIFT) | EUR_CR_BIF_MMU_CTRL_PREFETCHING_ON_MASK; 
+	#endif
+	#if !defined(FIX_HW_BRN_31620) && !defined(FIX_HW_BRN_31671)
+	
+	ui32RegVal |= EUR_CR_BIF_MMU_CTRL_ENABLE_DC_TLB_MASK;
+	#endif
+
+	
+	{
+		IMG_UINT32 ui32Core;
+
+		for (ui32Core=0;ui32Core<SGX_FEATURE_MP_CORE_COUNT;ui32Core++)
+		{
+			OSWriteHWReg(psDevInfo->pvRegsBaseKM, SGX_MP_CORE_SELECT(EUR_CR_BIF_MMU_CTRL, ui32Core), ui32RegVal);
+			PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, SGX_MP_CORE_SELECT(EUR_CR_BIF_MMU_CTRL, ui32Core), ui32RegVal, ui32PDUMPFlags);
+		}
+	}
+#endif
+
+	SGXResetInitBIFContexts(psDevInfo, ui32PDUMPFlags);
+	SGXResetSetupBIFContexts(psDevInfo, ui32PDUMPFlags);
+	
+	PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "End of SGX MP reset sequence\r\n");
+}	
+#endif 
+
 
diff --git a/drivers/gpu/pvr/sgx/sgxtransfer.c b/drivers/gpu/pvr/sgx/sgxtransfer.c
index ab46ff70b27..ff738453c82 100644
--- a/drivers/gpu/pvr/sgx/sgxtransfer.c
+++ b/drivers/gpu/pvr/sgx/sgxtransfer.c
@@ -42,8 +42,13 @@
 #include "osfunc.h"
 #include "pvr_debug.h"
 #include "sgxutils.h"
+#include "ttrace.h"
 
+#if defined (SUPPORT_SID_INTERFACE)
+IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK_KM *psKick)
+#else
 IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK *psKick)
+#endif
 {
 	PVRSRV_KERNEL_MEM_INFO  *psCCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psKick->hCCBMemInfo;
 	SGXMKIF_COMMAND sCommand = {0};
@@ -51,6 +56,7 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 	PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
 	PVRSRV_ERROR eError;
 	IMG_UINT32 loop;
+	IMG_HANDLE hDevMemContext = IMG_NULL;
 #if defined(PDUMP)
 	IMG_BOOL bPersistentProcess = IMG_FALSE;
 	
@@ -62,20 +68,33 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 		}
 	}
 #endif 
+#if defined(FIX_HW_BRN_31620)
+	hDevMemContext = psKick->hDevMemContext;
+#endif
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_TRANSFER, PVRSRV_TRACE_CLASS_FUNCTION_ENTER, TRANSFER_TOKEN_SUBMIT);
 
 	if (!CCB_OFFSET_IS_VALID(SGXMKIF_TRANSFERCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset))
 	{
 		PVR_DPF((PVR_DBG_ERROR, "SGXSubmitTransferKM: Invalid CCB offset"));
+		PVR_TTRACE(PVRSRV_TRACE_GROUP_TRANSFER, PVRSRV_TRACE_CLASS_FUNCTION_EXIT,
+				TRANSFER_TOKEN_SUBMIT);
 		return PVRSRV_ERROR_INVALID_PARAMS;
 	}
 	
 	
 	psSharedTransferCmd =  CCB_DATA_FROM_OFFSET(SGXMKIF_TRANSFERCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset);
 
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_TRANSFER, PVRSRV_TRACE_CLASS_CMD_START, TRANSFER_TOKEN_SUBMIT);
+	PVR_TTRACE_UI32(PVRSRV_TRACE_GROUP_TRANSFER, PVRSRV_TRACE_CLASS_CCB,
+			TRANSFER_TOKEN_CCB_OFFSET, psKick->ui32SharedCmdCCBOffset);
+
 	if (psKick->hTASyncInfo != IMG_NULL)
 	{
 		psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
 
+		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_TRANSFER, TRANSFER_TOKEN_TA_SYNC,
+					  psSyncInfo, PVRSRV_SYNCOP_SAMPLE);
+
 		psSharedTransferCmd->ui32TASyncWriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
 		psSharedTransferCmd->ui32TASyncReadOpsPendingVal  = psSyncInfo->psSyncData->ui32ReadOpsPending;
 
@@ -92,6 +111,9 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 	{
 		psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
 
+		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_TRANSFER, TRANSFER_TOKEN_3D_SYNC,
+					  psSyncInfo, PVRSRV_SYNCOP_SAMPLE);
+
 		psSharedTransferCmd->ui323DSyncWriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
 		psSharedTransferCmd->ui323DSyncReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
 
@@ -112,10 +134,13 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 		{
 			psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[loop];
 
+ 			PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_TRANSFER, TRANSFER_TOKEN_SRC_SYNC,
+ 						  psSyncInfo, PVRSRV_SYNCOP_SAMPLE);
+
 			psSharedTransferCmd->asSrcSyncs[loop].ui32WriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
 			psSharedTransferCmd->asSrcSyncs[loop].ui32ReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
 
-			psSharedTransferCmd->asSrcSyncs[loop].sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
+			psSharedTransferCmd->asSrcSyncs[loop].sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr; 
 			psSharedTransferCmd->asSrcSyncs[loop].sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
 
 		}
@@ -123,6 +148,9 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 		{
 			psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahDstSyncInfo[loop];
 
+ 			PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_TRANSFER, TRANSFER_TOKEN_DST_SYNC,
+ 						  psSyncInfo, PVRSRV_SYNCOP_SAMPLE);
+
 			psSharedTransferCmd->asDstSyncs[loop].ui32WriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
 			psSharedTransferCmd->asDstSyncs[loop].ui32ReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
 
@@ -131,7 +159,7 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 
 		}
 
-
+		
 		for (loop=0; loop<psKick->ui32NumSrcSync; loop++)
 		{
 			psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[loop];
@@ -146,7 +174,7 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 
 #if defined(PDUMP)
 	if ((PDumpIsCaptureFrameKM()
-	|| ((psKick->ui32PDumpFlags & PDUMP_FLAGS_CONTINUOUS) != 0))
+	|| ((psKick->ui32PDumpFlags & PDUMP_FLAGS_CONTINUOUS) != 0)) 
 	&&  (bPersistentProcess == IMG_FALSE) )
 	{
 		PDUMPCOMMENT("Shared part of transfer command\r\n");
@@ -162,19 +190,19 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 			for (loop=0; loop<psKick->ui32NumSrcSync ; loop++)
 			{
 				psSyncInfo = psKick->ahSrcSyncInfo[loop];
-
+	
 				PDUMPCOMMENT("Hack src surface write op in transfer cmd\r\n");
 				PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
 						psCCBMemInfo,
-						psKick->ui32CCBDumpWOff + offsetof(SGXMKIF_TRANSFERCMD_SHARED, asSrcSyncs) + loop * sizeof(PVRSRV_DEVICE_SYNC_OBJECT) + offsetof(PVRSRV_DEVICE_SYNC_OBJECT, ui32WriteOpsPendingVal),
-					sizeof(psSyncInfo->psSyncData->ui32LastOpDumpVal),
+						psKick->ui32CCBDumpWOff + (IMG_UINT32)(offsetof(SGXMKIF_TRANSFERCMD_SHARED, asSrcSyncs) + loop * sizeof(PVRSRV_DEVICE_SYNC_OBJECT) + offsetof(PVRSRV_DEVICE_SYNC_OBJECT, ui32WriteOpsPendingVal)),
+						sizeof(psSyncInfo->psSyncData->ui32LastOpDumpVal),
 						psKick->ui32PDumpFlags,
 						MAKEUNIQUETAG(psCCBMemInfo));
 
 				PDUMPCOMMENT("Hack src surface read op in transfer cmd\r\n");
 				PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
 						psCCBMemInfo,
-						psKick->ui32CCBDumpWOff + offsetof(SGXMKIF_TRANSFERCMD_SHARED, asSrcSyncs) + loop * sizeof(PVRSRV_DEVICE_SYNC_OBJECT) + offsetof(PVRSRV_DEVICE_SYNC_OBJECT, ui32ReadOpsPendingVal),
+						psKick->ui32CCBDumpWOff + (IMG_UINT32)(offsetof(SGXMKIF_TRANSFERCMD_SHARED, asSrcSyncs) + loop * sizeof(PVRSRV_DEVICE_SYNC_OBJECT) + offsetof(PVRSRV_DEVICE_SYNC_OBJECT, ui32ReadOpsPendingVal)),
 						sizeof(psSyncInfo->psSyncData->ui32LastReadOpDumpVal),
 						psKick->ui32PDumpFlags,
 						MAKEUNIQUETAG(psCCBMemInfo));
@@ -186,11 +214,11 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 			for (loop=0; loop< psKick->ui32NumDstSync; loop++)
 			{
 				psSyncInfo = psKick->ahDstSyncInfo[loop];
-
+	
 				PDUMPCOMMENT("Hack dest surface write op in transfer cmd\r\n");
 				PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
 						psCCBMemInfo,
-						psKick->ui32CCBDumpWOff + offsetof(SGXMKIF_TRANSFERCMD_SHARED, asDstSyncs) + loop * sizeof(PVRSRV_DEVICE_SYNC_OBJECT) + offsetof(PVRSRV_DEVICE_SYNC_OBJECT, ui32WriteOpsPendingVal)  ,
+						psKick->ui32CCBDumpWOff + (IMG_UINT32)(offsetof(SGXMKIF_TRANSFERCMD_SHARED, asDstSyncs) + loop * sizeof(PVRSRV_DEVICE_SYNC_OBJECT) + offsetof(PVRSRV_DEVICE_SYNC_OBJECT, ui32WriteOpsPendingVal)),
 						sizeof(psSyncInfo->psSyncData->ui32LastOpDumpVal),
 						psKick->ui32PDumpFlags,
 						MAKEUNIQUETAG(psCCBMemInfo));
@@ -198,7 +226,7 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 				PDUMPCOMMENT("Hack dest surface read op in transfer cmd\r\n");
 				PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
 						psCCBMemInfo,
-						psKick->ui32CCBDumpWOff + offsetof(SGXMKIF_TRANSFERCMD_SHARED, asDstSyncs) + loop * sizeof(PVRSRV_DEVICE_SYNC_OBJECT) + offsetof(PVRSRV_DEVICE_SYNC_OBJECT, ui32ReadOpsPendingVal),
+						psKick->ui32CCBDumpWOff + (IMG_UINT32)(offsetof(SGXMKIF_TRANSFERCMD_SHARED, asDstSyncs) + loop * sizeof(PVRSRV_DEVICE_SYNC_OBJECT) + offsetof(PVRSRV_DEVICE_SYNC_OBJECT, ui32ReadOpsPendingVal)),
 						sizeof(psSyncInfo->psSyncData->ui32LastReadOpDumpVal),
 						psKick->ui32PDumpFlags,
 						MAKEUNIQUETAG(psCCBMemInfo));
@@ -206,7 +234,7 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 			}
 		}
 
-
+		
 		if((psKick->ui32Flags & SGXMKIF_TQFLAGS_KEEPPENDING)== 0UL)
 		{
 			for (loop=0; loop<(psKick->ui32NumSrcSync); loop++)
@@ -224,16 +252,19 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 				psSyncInfo->psSyncData->ui32LastOpDumpVal++;
 			}
 		}
-	}
+	}		
 #endif
 
 	sCommand.ui32Data[1] = psKick->sHWTransferContextDevVAddr.uiAddr;
+	
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_TRANSFER, PVRSRV_TRACE_CLASS_CMD_END,
+			TRANSFER_TOKEN_SUBMIT);
 
-	eError = SGXScheduleCCBCommandKM(hDevHandle, SGXMKIF_CMD_TRANSFER, &sCommand, KERNEL_ID, psKick->ui32PDumpFlags, IMG_FALSE);
+	eError = SGXScheduleCCBCommandKM(hDevHandle, SGXMKIF_CMD_TRANSFER, &sCommand, KERNEL_ID, psKick->ui32PDumpFlags, hDevMemContext, IMG_FALSE);
 
 	if (eError == PVRSRV_ERROR_RETRY)
 	{
-
+		
 		if ((psKick->ui32Flags & SGXMKIF_TQFLAGS_KEEPPENDING) == 0UL)
 		{
 			if (psKick->ui32NumSrcSync > 0)
@@ -264,14 +295,14 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 #endif
 		}
 
-
+		
 		if (psKick->hTASyncInfo != IMG_NULL)
 		{
 			psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
 			psSyncInfo->psSyncData->ui32WriteOpsPending--;
 		}
 
-
+		
 		if (psKick->h3DSyncInfo != IMG_NULL)
 		{
 			psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
@@ -282,16 +313,18 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 	else if (PVRSRV_OK != eError)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "SGXSubmitTransferKM: SGXScheduleCCBCommandKM failed."));
+		PVR_TTRACE(PVRSRV_TRACE_GROUP_TRANSFER, PVRSRV_TRACE_CLASS_FUNCTION_EXIT,
+				TRANSFER_TOKEN_SUBMIT);
 		return eError;
 	}
-
+	
 
 #if defined(NO_HARDWARE)
 	if ((psKick->ui32Flags & SGXMKIF_TQFLAGS_NOSYNCUPDATE) == 0)
 	{
 		IMG_UINT32 i;
 
-
+		
 		for(i = 0; i < psKick->ui32NumSrcSync; i++)
 		{
 			psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[i];
@@ -320,13 +353,18 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 		}
 	}
 #endif
-
+	PVR_TTRACE(PVRSRV_TRACE_GROUP_TRANSFER, PVRSRV_TRACE_CLASS_FUNCTION_EXIT,
+			TRANSFER_TOKEN_SUBMIT);
 	return eError;
 }
 
 #if defined(SGX_FEATURE_2D_HARDWARE)
+#if defined (SUPPORT_SID_INTERFACE)
+IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK_KM *psKick)
+#else
 IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK *psKick)
-
+#endif
+					    
 {
 	PVRSRV_KERNEL_MEM_INFO  *psCCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psKick->hCCBMemInfo;
 	SGXMKIF_COMMAND sCommand = {0};
@@ -334,9 +372,10 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 	PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
 	PVRSRV_ERROR eError;
 	IMG_UINT32 i;
+	IMG_HANDLE hDevMemContext = IMG_NULL;
 #if defined(PDUMP)
 	IMG_BOOL bPersistentProcess = IMG_FALSE;
-
+	
 	{
 		PVRSRV_PER_PROCESS_DATA* psPerProc = PVRSRVFindPerProcessData();
 		if(psPerProc != IMG_NULL)
@@ -344,6 +383,9 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 			bPersistentProcess = psPerProc->bPDumpPersistent;
 		}
 	}
+#endif 
+#if defined(FIX_HW_BRN_31620)
+	hDevMemContext = psKick->hDevMemContext;
 #endif
 
 	if (!CCB_OFFSET_IS_VALID(SGXMKIF_2DCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset))
@@ -351,13 +393,13 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 		PVR_DPF((PVR_DBG_ERROR, "SGXSubmit2DKM: Invalid CCB offset"));
 		return PVRSRV_ERROR_INVALID_PARAMS;
 	}
-
-
+	
+	
 	ps2DCmd =  CCB_DATA_FROM_OFFSET(SGXMKIF_2DCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset);
 
 	OSMemSet(ps2DCmd, 0, sizeof(*ps2DCmd));
 
-
+	
 	if (psKick->hTASyncInfo != IMG_NULL)
 	{
 		psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
@@ -365,11 +407,11 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 		ps2DCmd->sTASyncData.ui32WriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
 		ps2DCmd->sTASyncData.ui32ReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
 
-		ps2DCmd->sTASyncData.sWriteOpsCompleteDevVAddr	= psSyncInfo->sWriteOpsCompleteDevVAddr;
-		ps2DCmd->sTASyncData.sReadOpsCompleteDevVAddr	= psSyncInfo->sReadOpsCompleteDevVAddr;
+		ps2DCmd->sTASyncData.sWriteOpsCompleteDevVAddr 	= psSyncInfo->sWriteOpsCompleteDevVAddr;
+		ps2DCmd->sTASyncData.sReadOpsCompleteDevVAddr 	= psSyncInfo->sReadOpsCompleteDevVAddr;
 	}
 
-
+	
 	if (psKick->h3DSyncInfo != IMG_NULL)
 	{
 		psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
@@ -381,7 +423,7 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 		ps2DCmd->s3DSyncData.sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
 	}
 
-
+	
 	ps2DCmd->ui32NumSrcSync = psKick->ui32NumSrcSync;
 	for (i = 0; i < psKick->ui32NumSrcSync; i++)
 	{
@@ -405,7 +447,7 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 		ps2DCmd->sDstSyncData.sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
 	}
 
-
+	
 	for (i = 0; i < psKick->ui32NumSrcSync; i++)
 	{
 		psSyncInfo = psKick->ahSrcSyncInfo[i];
@@ -423,7 +465,7 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 	|| ((psKick->ui32PDumpFlags & PDUMP_FLAGS_CONTINUOUS) != 0))
 	&&  (bPersistentProcess == IMG_FALSE) )
 	{
-
+		
 		PDUMPCOMMENT("Shared part of 2D command\r\n");
 		PDUMPMEM(ps2DCmd,
 				psCCBMemInfo,
@@ -439,7 +481,7 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 			PDUMPCOMMENT("Hack src surface write op in 2D cmd\r\n");
 			PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
 					psCCBMemInfo,
-					psKick->ui32CCBDumpWOff + offsetof(SGXMKIF_2DCMD_SHARED, sSrcSyncData[i].ui32WriteOpsPendingVal),
+					psKick->ui32CCBDumpWOff + (IMG_UINT32)offsetof(SGXMKIF_2DCMD_SHARED, sSrcSyncData[i].ui32WriteOpsPendingVal),
 					sizeof(psSyncInfo->psSyncData->ui32LastOpDumpVal),
 					psKick->ui32PDumpFlags,
 					MAKEUNIQUETAG(psCCBMemInfo));
@@ -447,7 +489,7 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 			PDUMPCOMMENT("Hack src surface read op in 2D cmd\r\n");
 			PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
 					psCCBMemInfo,
-					psKick->ui32CCBDumpWOff + offsetof(SGXMKIF_2DCMD_SHARED, sSrcSyncData[i].ui32ReadOpsPendingVal),
+					psKick->ui32CCBDumpWOff + (IMG_UINT32)offsetof(SGXMKIF_2DCMD_SHARED, sSrcSyncData[i].ui32ReadOpsPendingVal),
 					sizeof(psSyncInfo->psSyncData->ui32LastReadOpDumpVal),
 					psKick->ui32PDumpFlags,
 					MAKEUNIQUETAG(psCCBMemInfo));
@@ -460,7 +502,7 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 			PDUMPCOMMENT("Hack dest surface write op in 2D cmd\r\n");
 			PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
 					psCCBMemInfo,
-					psKick->ui32CCBDumpWOff + offsetof(SGXMKIF_2DCMD_SHARED, sDstSyncData.ui32WriteOpsPendingVal),
+					psKick->ui32CCBDumpWOff + (IMG_UINT32)offsetof(SGXMKIF_2DCMD_SHARED, sDstSyncData.ui32WriteOpsPendingVal),
 					sizeof(psSyncInfo->psSyncData->ui32LastOpDumpVal),
 					psKick->ui32PDumpFlags,
 					MAKEUNIQUETAG(psCCBMemInfo));
@@ -468,13 +510,13 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 			PDUMPCOMMENT("Hack dest surface read op in 2D cmd\r\n");
 			PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
 					psCCBMemInfo,
-					psKick->ui32CCBDumpWOff + offsetof(SGXMKIF_2DCMD_SHARED, sDstSyncData.ui32ReadOpsPendingVal),
+					psKick->ui32CCBDumpWOff + (IMG_UINT32)offsetof(SGXMKIF_2DCMD_SHARED, sDstSyncData.ui32ReadOpsPendingVal),
 					sizeof(psSyncInfo->psSyncData->ui32LastReadOpDumpVal),
 					psKick->ui32PDumpFlags,
 					MAKEUNIQUETAG(psCCBMemInfo));
 		}
 
-
+		
 		for (i = 0; i < psKick->ui32NumSrcSync; i++)
 		{
 			psSyncInfo = psKick->ahSrcSyncInfo[i];
@@ -486,16 +528,16 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK
 			psSyncInfo = psKick->hDstSyncInfo;
 			psSyncInfo->psSyncData->ui32LastOpDumpVal++;
 		}
-	}
+	}		
 #endif
 
 	sCommand.ui32Data[1] = psKick->sHW2DContextDevVAddr.uiAddr;
-
-	eError = SGXScheduleCCBCommandKM(hDevHandle, SGXMKIF_CMD_2D, &sCommand, KERNEL_ID, psKick->ui32PDumpFlags, IMG_FALSE);
+	
+	eError = SGXScheduleCCBCommandKM(hDevHandle, SGXMKIF_CMD_2D, &sCommand, KERNEL_ID, psKick->ui32PDumpFlags, hDevMemContext, IMG_FALSE);	
 
 	if (eError == PVRSRV_ERROR_RETRY)
 	{
-
+		
 
 #if defined(PDUMP)
 		if (PDumpIsCaptureFrameKM())
diff --git a/drivers/gpu/pvr/sgx/sgxutils.c b/drivers/gpu/pvr/sgx/sgxutils.c
index 7f640885b7f..0b205c5029f 100644
--- a/drivers/gpu/pvr/sgx/sgxutils.c
+++ b/drivers/gpu/pvr/sgx/sgxutils.c
@@ -40,6 +40,7 @@
 #include "osfunc.h"
 #include "pvr_debug.h"
 #include "sgxutils.h"
+#include "ttrace.h"
 
 #ifdef __linux__
 #include <linux/kernel.h>	
@@ -149,16 +150,23 @@ static INLINE SGXMKIF_COMMAND * SGXAcquireKernelCCBSlot(PVRSRV_SGX_CCB_INFO *psC
 	return IMG_NULL;
 }
 
-PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
+PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_DEVICE_NODE	*psDeviceNode,
 								   SGXMKIF_CMD_TYPE		eCmdType,
 								   SGXMKIF_COMMAND		*psCommandData,
 								   IMG_UINT32			ui32CallerID,
 								   IMG_UINT32			ui32PDumpFlags,
-								   IMG_BOOL			bLastInScene)
+								   IMG_HANDLE			hDevMemContext,
+								   IMG_BOOL				bLastInScene)
 {
 	PVRSRV_SGX_CCB_INFO *psKernelCCB;
 	PVRSRV_ERROR eError = PVRSRV_OK;
 	SGXMKIF_COMMAND *psSGXCommand;
+	PVRSRV_SGXDEV_INFO 	*psDevInfo = psDeviceNode->pvDevice;
+#if defined(FIX_HW_BRN_31620)
+	IMG_UINT32 ui32CacheMasks[4];
+	IMG_UINT32 i;
+	MMU_CONTEXT		*psMMUContext;
+#endif
 #if defined(PDUMP)
 	IMG_VOID *pvDumpCommand;
 	IMG_BOOL bPDumpIsSuspended = PDumpIsSuspended();
@@ -168,12 +176,37 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
 	PVR_UNREFERENCED_PARAMETER(ui32PDumpFlags);
 #endif
 
-#if defined(FIX_HW_BRN_28889)
+#if defined(FIX_HW_BRN_31620)
+	for(i=0;i<4;i++)
+	{
+		ui32CacheMasks[i] = 0;
+	}
 
+	psMMUContext = psDevInfo->hKernelMMUContext;
+	psDeviceNode->pfnMMUGetCacheFlushRange(psMMUContext, &ui32CacheMasks[0]);
 
+	
+	if (hDevMemContext)
+	{
+		BM_CONTEXT *psBMContext = (BM_CONTEXT *) hDevMemContext;
 
+		psMMUContext = psBMContext->psMMUContext;
+		psDeviceNode->pfnMMUGetCacheFlushRange(psMMUContext, &ui32CacheMasks[2]);
+	}
 
-	if ( (eCmdType != SGXMKIF_CMD_PROCESS_QUEUES) &&
+	
+	if (ui32CacheMasks[0] || ui32CacheMasks[1] || ui32CacheMasks[2] || ui32CacheMasks[3])
+	{
+		psDevInfo->ui32CacheControl |= SGXMKIF_CC_INVAL_BIF_PD;
+	}
+#endif
+
+#if defined(FIX_HW_BRN_28889)
+	
+
+
+
+	if ( (eCmdType != SGXMKIF_CMD_PROCESS_QUEUES) && 
 		 ((psDevInfo->ui32CacheControl & SGXMKIF_CC_INVAL_DATA) != 0) &&
 		 ((psDevInfo->ui32CacheControl & (SGXMKIF_CC_INVAL_BIF_PT | SGXMKIF_CC_INVAL_BIF_PD)) != 0))
 	{
@@ -183,18 +216,19 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
 		SGXMKIF_HOST_CTL	*psSGXHostCtl = psDevInfo->psSGXHostCtl;
 		SGXMKIF_COMMAND		sCacheCommand = {0};
 
-		eError = SGXScheduleCCBCommand(psDevInfo,
+		eError = SGXScheduleCCBCommand(psDeviceNode,
 									   SGXMKIF_CMD_PROCESS_QUEUES,
 									   &sCacheCommand,
 									   ui32CallerID,
 									   ui32PDumpFlags,
+									   hDevMemContext,
 									   bLastInScene);
 		if (eError != PVRSRV_OK)
 		{
 			goto Exit;
 		}
-
-
+		
+		
 		#if !defined(NO_HARDWARE)
 		if(PollForValueKM(&psSGXHostCtl->ui32InvalStatus,
 						  PVRSRV_USSE_EDM_BIF_INVAL_COMPLETE,
@@ -207,9 +241,9 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
 			PVR_DBG_BREAK;
 		}
 		#endif
-
+	
 		#if defined(PDUMP)
-
+		
 		PDUMPCOMMENTWITHFLAGS(0, "Host Control - Poll for BIF cache invalidate request to complete");
 		PDUMPMEMPOL(psSGXHostCtlMemInfo,
 					offsetof(SGXMKIF_HOST_CTL, ui32InvalStatus),
@@ -218,15 +252,63 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
 					PDUMP_POLL_OPERATOR_EQUAL,
 					0,
 					MAKEUNIQUETAG(psSGXHostCtlMemInfo));
-		#endif
-
+		#endif 
+	
 		psSGXHostCtl->ui32InvalStatus &= ~(PVRSRV_USSE_EDM_BIF_INVAL_COMPLETE);
 		PDUMPMEM(IMG_NULL, psSGXHostCtlMemInfo, offsetof(SGXMKIF_HOST_CTL, ui32CleanupStatus), sizeof(IMG_UINT32), 0, MAKEUNIQUETAG(psSGXHostCtlMemInfo));
 	}
+#else 
+	PVR_UNREFERENCED_PARAMETER(hDevMemContext);
 #endif
+	
+#if defined(FIX_HW_BRN_31620)
+	if ((eCmdType != SGXMKIF_CMD_FLUSHPDCACHE) && (psDevInfo->ui32CacheControl & SGXMKIF_CC_INVAL_BIF_PD))
+	{
+		SGXMKIF_COMMAND		sPDECacheCommand = {0};
+		IMG_DEV_PHYADDR		sDevPAddr;
 
-#if defined(PDUMP)
+		
+		psMMUContext = psDevInfo->hKernelMMUContext;
+
+		psDeviceNode->pfnMMUGetPDPhysAddr(psMMUContext, &sDevPAddr);
+		sPDECacheCommand.ui32Data[0] = sDevPAddr.uiAddr | 1;
+		sPDECacheCommand.ui32Data[1] = ui32CacheMasks[0];
+		sPDECacheCommand.ui32Data[2] = ui32CacheMasks[1];
+
+		
+		if (hDevMemContext)
+		{
+			BM_CONTEXT *psBMContext = (BM_CONTEXT *) hDevMemContext;
 
+			psMMUContext = psBMContext->psMMUContext;
+
+			psDeviceNode->pfnMMUGetPDPhysAddr(psMMUContext, &sDevPAddr);
+			
+			sPDECacheCommand.ui32Data[3] = sDevPAddr.uiAddr | 1;
+			sPDECacheCommand.ui32Data[4] = ui32CacheMasks[2];
+			sPDECacheCommand.ui32Data[5] = ui32CacheMasks[3];
+		}
+
+		
+		if (sPDECacheCommand.ui32Data[1] | sPDECacheCommand.ui32Data[2] | sPDECacheCommand.ui32Data[4] |
+			sPDECacheCommand.ui32Data[5])
+		{
+			eError = SGXScheduleCCBCommand(psDeviceNode,
+										   SGXMKIF_CMD_FLUSHPDCACHE,
+										   &sPDECacheCommand,
+										   ui32CallerID,
+										   ui32PDumpFlags,
+										   hDevMemContext,
+										   bLastInScene);
+			if (eError != PVRSRV_OK)
+			{
+				goto Exit;
+			}
+		}
+	}
+#endif
+#if defined(PDUMP)
+	
 	{
 		PVRSRV_PER_PROCESS_DATA* psPerProc = PVRSRVFindPerProcessData();
 		if(psPerProc != IMG_NULL)
@@ -234,44 +316,45 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
 			bPersistentProcess = psPerProc->bPDumpPersistent;
 		}
 	}
-#endif
+#endif 
 	psKernelCCB = psDevInfo->psKernelCCBInfo;
 
 	psSGXCommand = SGXAcquireKernelCCBSlot(psKernelCCB);
 
-
+	
 	if(!psSGXCommand)
 	{
+		PVR_DPF((PVR_DBG_ERROR, "SGXScheduleCCBCommand: Wait for CCB space timed out")) ;
 		eError = PVRSRV_ERROR_TIMEOUT;
 		goto Exit;
 	}
 
-
+	
 	psCommandData->ui32CacheControl = psDevInfo->ui32CacheControl;
 
 #if defined(PDUMP)
-
+	
 	psDevInfo->sPDContext.ui32CacheControl |= psDevInfo->ui32CacheControl;
 #endif
 
-
+	
 	psDevInfo->ui32CacheControl = 0;
 
-
+	
 	*psSGXCommand = *psCommandData;
 
 	if (eCmdType >= SGXMKIF_CMD_MAX)
 	{
-		PVR_DPF((PVR_DBG_ERROR,"SGXScheduleCCBCommandKM: Unknown command type: %d", eCmdType)) ;
+		PVR_DPF((PVR_DBG_ERROR, "SGXScheduleCCBCommand: Unknown command type: %d", eCmdType)) ;
 		eError = PVRSRV_ERROR_INVALID_CCB_COMMAND;
 		goto Exit;
 	}
 
-	if((eCmdType == SGXMKIF_CMD_TA) && bLastInScene)
+	if ((eCmdType == SGXMKIF_CMD_TA) && bLastInScene)
 	{
 		SYS_DATA *psSysData;
 
-
+		
 		SysAcquireData(&psSysData);
 
 		if(psSysData->ePendingCacheOpType == PVRSRV_MISC_INFO_CPUCACHEOP_FLUSH)
@@ -283,18 +366,18 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
 			OSCleanCPUCacheKM();
 		}
 
-
+		
 		psSysData->ePendingCacheOpType = PVRSRV_MISC_INFO_CPUCACHEOP_NONE;
 	}
 
 	PVR_ASSERT(eCmdType < SGXMKIF_CMD_MAX);
-	psSGXCommand->ui32ServiceAddress = psDevInfo->aui32HostKickAddr[eCmdType];
+	psSGXCommand->ui32ServiceAddress = psDevInfo->aui32HostKickAddr[eCmdType];	 
 
 #if defined(PDUMP)
 	if ((ui32CallerID != ISR_ID) && (bPDumpIsSuspended == IMG_FALSE) &&
 		(bPersistentProcess == IMG_FALSE) )
 	{
-
+		
 		PDUMPCOMMENTWITHFLAGS(ui32PDumpFlags, "Poll for space in the Kernel CCB\r\n");
 		PDUMPMEMPOL(psKernelCCB->psCCBCtlMemInfo,
 					offsetof(PVRSRV_SGX_CCB_CTL, ui32ReadOffset),
@@ -314,7 +397,7 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
 					ui32PDumpFlags,
 					MAKEUNIQUETAG(psKernelCCB->psCCBMemInfo));
 
-
+		
 		PDUMPMEM(&psDevInfo->sPDContext.ui32CacheControl,
 					psKernelCCB->psCCBMemInfo,
 					psKernelCCB->ui32CCBDumpWOff * sizeof(SGXMKIF_COMMAND) +
@@ -326,14 +409,14 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
 		if (PDumpIsCaptureFrameKM()
 		|| ((ui32PDumpFlags & PDUMP_FLAGS_CONTINUOUS) != 0))
 		{
-
+			
 			psDevInfo->sPDContext.ui32CacheControl = 0;
 		}
 	}
 #endif
 
 #if defined(FIX_HW_BRN_26620) && defined(SGX_FEATURE_SYSTEM_CACHE) && !defined(SGX_BYPASS_SYSTEM_CACHE)
-
+	
 	eError = PollForValueKM (psKernelCCB->pui32ReadOffset,
 								*psKernelCCB->pui32WriteOffset,
 								0xFF,
@@ -342,12 +425,13 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
 								IMG_FALSE);
 	if (eError != PVRSRV_OK)
 	{
+		PVR_DPF((PVR_DBG_ERROR, "SGXScheduleCCBCommand: Timeout waiting for previous command to be read")) ;
 		eError = PVRSRV_ERROR_TIMEOUT;
 		goto Exit;
 	}
 #endif
 
-
+	
 
 	*psKernelCCB->pui32WriteOffset = (*psKernelCCB->pui32WriteOffset + 1) & 255;
 
@@ -400,6 +484,15 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
 
 	OSWriteMemoryBarrier();
 
+	
+	PVR_TTRACE_UI32(PVRSRV_TRACE_GROUP_MKSYNC, PVRSRV_TRACE_CLASS_NONE,
+			MKSYNC_TOKEN_KERNEL_CCB_OFFSET, *psKernelCCB->pui32WriteOffset);
+	PVR_TTRACE_UI32(PVRSRV_TRACE_GROUP_MKSYNC, PVRSRV_TRACE_CLASS_NONE,
+			MKSYNC_TOKEN_CORE_CLK, psDevInfo->ui32CoreClockSpeed);
+	PVR_TTRACE_UI32(PVRSRV_TRACE_GROUP_MKSYNC, PVRSRV_TRACE_CLASS_NONE,
+			MKSYNC_TOKEN_UKERNEL_CLK, psDevInfo->ui32uKernelTimerClock);
+
+
 #if defined(FIX_HW_BRN_26620) && defined(SGX_FEATURE_SYSTEM_CACHE) && !defined(SGX_BYPASS_SYSTEM_CACHE)
 	OSWriteHWReg(psDevInfo->pvRegsBaseKM,
 				SGX_MP_CORE_SELECT(EUR_CR_EVENT_KICK2, 0),
@@ -413,7 +506,7 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO 	*psDevInfo,
 	OSMemoryBarrier();
 
 #if defined(NO_HARDWARE)
-
+	
 	*psKernelCCB->pui32ReadOffset = (*psKernelCCB->pui32ReadOffset + 1) & 255;
 #endif
 
@@ -427,10 +520,10 @@ PVRSRV_ERROR SGXScheduleCCBCommandKM(PVRSRV_DEVICE_NODE		*psDeviceNode,
 									 SGXMKIF_COMMAND		*psCommandData,
 									 IMG_UINT32				ui32CallerID,
 									 IMG_UINT32				ui32PDumpFlags,
+									 IMG_HANDLE				hDevMemContext,
 									 IMG_BOOL				bLastInScene)
 {
 	PVRSRV_ERROR		eError;
-	PVRSRV_SGXDEV_INFO 	*psDevInfo = psDeviceNode->pvDevice;
 
 	
 	PDUMPSUSPEND();
@@ -474,7 +567,7 @@ PVRSRV_ERROR SGXScheduleCCBCommandKM(PVRSRV_DEVICE_NODE		*psDeviceNode,
 		return eError;
 	}
 
-	eError = SGXScheduleCCBCommand(psDevInfo, eCmdType, psCommandData, ui32CallerID, ui32PDumpFlags, bLastInScene);
+	eError = SGXScheduleCCBCommand(psDeviceNode, eCmdType, psCommandData, ui32CallerID, ui32PDumpFlags, hDevMemContext, bLastInScene);
 
 	PVRSRVPowerUnlock(ui32CallerID);
 
@@ -496,7 +589,7 @@ PVRSRV_ERROR SGXScheduleProcessQueuesKM(PVRSRV_DEVICE_NODE *psDeviceNode)
 	PVRSRV_ERROR 		eError;
 	PVRSRV_SGXDEV_INFO 	*psDevInfo = psDeviceNode->pvDevice;
 	SGXMKIF_HOST_CTL	*psHostCtl = psDevInfo->psKernelSGXHostCtlMemInfo->pvLinAddrKM;
-	IMG_UINT32		ui32PowerStatus;
+	IMG_UINT32			ui32PowerStatus;
 	SGXMKIF_COMMAND		sCommand = {0};
 
 	ui32PowerStatus = psHostCtl->ui32PowerStatus;
@@ -506,7 +599,7 @@ PVRSRV_ERROR SGXScheduleProcessQueuesKM(PVRSRV_DEVICE_NODE *psDeviceNode)
 		return PVRSRV_OK;
 	}
 
-	eError = SGXScheduleCCBCommandKM(psDeviceNode, SGXMKIF_CMD_PROCESS_QUEUES, &sCommand, ISR_ID, 0, IMG_FALSE);
+	eError = SGXScheduleCCBCommandKM(psDeviceNode, SGXMKIF_CMD_PROCESS_QUEUES, &sCommand, ISR_ID, 0, IMG_NULL, IMG_FALSE);
 	if (eError != PVRSRV_OK)
 	{
 		PVR_DPF((PVR_DBG_ERROR,"SGXScheduleProcessQueuesKM failed to schedule CCB command: %u", eError));
@@ -524,7 +617,11 @@ IMG_BOOL SGXIsDevicePowered(PVRSRV_DEVICE_NODE *psDeviceNode)
 
 IMG_EXPORT
 PVRSRV_ERROR SGXGetInternalDevInfoKM(IMG_HANDLE hDevCookie,
+#if defined (SUPPORT_SID_INTERFACE)
+									SGX_INTERNAL_DEVINFO_KM *psSGXInternalDevInfo)
+#else
 									SGX_INTERNAL_DEVINFO *psSGXInternalDevInfo)
+#endif
 {
 	PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookie)->pvDevice;
 
@@ -544,65 +641,58 @@ IMG_VOID SGXCleanupRequest(PVRSRV_DEVICE_NODE	*psDeviceNode,
 						   IMG_UINT32			ui32CleanupType)
 {
 	PVRSRV_ERROR			eError;
-	PVRSRV_SGXDEV_INFO		*psSGXDevInfo = psDeviceNode->pvDevice;
-	PVRSRV_KERNEL_MEM_INFO	*psSGXHostCtlMemInfo = psSGXDevInfo->psKernelSGXHostCtlMemInfo;
-	SGXMKIF_HOST_CTL		*psSGXHostCtl = psSGXHostCtlMemInfo->pvLinAddrKM;
+	PVRSRV_SGXDEV_INFO		*psDevInfo = psDeviceNode->pvDevice;
+	PVRSRV_KERNEL_MEM_INFO	*psHostCtlMemInfo = psDevInfo->psKernelSGXHostCtlMemInfo;
+	SGXMKIF_HOST_CTL		*psHostCtl = psHostCtlMemInfo->pvLinAddrKM;
 
-	if ((psSGXHostCtl->ui32PowerStatus & PVRSRV_USSE_EDM_POWMAN_NO_WORK) != 0)
-	{
-		
-	}
-	else
-	{
-		SGXMKIF_COMMAND		sCommand = {0};
-
-		PDUMPCOMMENTWITHFLAGS(0, "Request ukernel resouce clean-up");
-		sCommand.ui32Data[0] = ui32CleanupType;
-		sCommand.ui32Data[1] = (psHWDataDevVAddr == IMG_NULL) ? 0 : psHWDataDevVAddr->uiAddr;
-
-		eError = SGXScheduleCCBCommandKM(psDeviceNode, SGXMKIF_CMD_CLEANUP, &sCommand, KERNEL_ID, 0, IMG_FALSE);
-		if (eError != PVRSRV_OK)
-		{
-			PVR_DPF((PVR_DBG_ERROR,"SGXCleanupRequest: Failed to submit clean-up command"));
-			PVR_DBG_BREAK;
-		}
+	SGXMKIF_COMMAND		sCommand = {0};
 
-		
-		#if !defined(NO_HARDWARE)
-		if(PollForValueKM(&psSGXHostCtl->ui32CleanupStatus,
-						  PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE,
-						  PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE,
-						  10 * MAX_HW_TIME_US,
-						  1000,
-						  IMG_TRUE) != PVRSRV_OK)
-		{
-			PVR_DPF((PVR_DBG_ERROR,"SGXCleanupRequest: Wait for uKernel to clean up (%u) failed", ui32CleanupType));
-			PVR_DBG_BREAK;
-		}
-		#endif
+	sCommand.ui32Data[0] = ui32CleanupType;
+	sCommand.ui32Data[1] = (psHWDataDevVAddr == IMG_NULL) ? 0 : psHWDataDevVAddr->uiAddr;
+	PDUMPCOMMENTWITHFLAGS(0, "Request ukernel resource clean-up, Type %u, Data 0x%X", sCommand.ui32Data[0], sCommand.ui32Data[1]);
 
-		#if defined(PDUMP)
-		
-		PDUMPCOMMENTWITHFLAGS(0, "Host Control - Poll for clean-up request to complete");
-		PDUMPMEMPOL(psSGXHostCtlMemInfo,
-					offsetof(SGXMKIF_HOST_CTL, ui32CleanupStatus),
-					PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE,
-					PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE,
-					PDUMP_POLL_OPERATOR_EQUAL,
-					0,
-					MAKEUNIQUETAG(psSGXHostCtlMemInfo));
-		#endif 
+	eError = SGXScheduleCCBCommandKM(psDeviceNode, SGXMKIF_CMD_CLEANUP, &sCommand, KERNEL_ID, 0, IMG_NULL, IMG_FALSE);
+	if (eError != PVRSRV_OK)
+	{
+		PVR_DPF((PVR_DBG_ERROR,"SGXCleanupRequest: Failed to submit clean-up command"));
+		PVR_DBG_BREAK;
+	}
 
-		psSGXHostCtl->ui32CleanupStatus &= ~(PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE);
-		PDUMPMEM(IMG_NULL, psSGXHostCtlMemInfo, offsetof(SGXMKIF_HOST_CTL, ui32CleanupStatus), sizeof(IMG_UINT32), 0, MAKEUNIQUETAG(psSGXHostCtlMemInfo));
-		
-		
-	#if defined(SGX_FEATURE_SYSTEM_CACHE)
-		psSGXDevInfo->ui32CacheControl |= (SGXMKIF_CC_INVAL_BIF_SL | SGXMKIF_CC_INVAL_DATA);
-	#else
-		psSGXDevInfo->ui32CacheControl |= SGXMKIF_CC_INVAL_DATA;
-	#endif
+	
+	#if !defined(NO_HARDWARE)
+	if(PollForValueKM(&psHostCtl->ui32CleanupStatus,
+					  PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE,
+					  PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE,
+					  10 * MAX_HW_TIME_US,
+					  1000,
+					  IMG_TRUE) != PVRSRV_OK)
+	{
+		PVR_DPF((PVR_DBG_ERROR,"SGXCleanupRequest: Wait for uKernel to clean up (%u) failed", ui32CleanupType));
+		PVR_DBG_BREAK;
 	}
+	#endif
+
+	#if defined(PDUMP)
+	
+	PDUMPCOMMENTWITHFLAGS(0, "Host Control - Poll for clean-up request to complete");
+	PDUMPMEMPOL(psHostCtlMemInfo,
+				offsetof(SGXMKIF_HOST_CTL, ui32CleanupStatus),
+				PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE,
+				PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE,
+				PDUMP_POLL_OPERATOR_EQUAL,
+				0,
+				MAKEUNIQUETAG(psHostCtlMemInfo));
+	#endif 
+
+	psHostCtl->ui32CleanupStatus &= ~(PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE);
+	PDUMPMEM(IMG_NULL, psHostCtlMemInfo, offsetof(SGXMKIF_HOST_CTL, ui32CleanupStatus), sizeof(IMG_UINT32), 0, MAKEUNIQUETAG(psHostCtlMemInfo));
+	
+	
+#if defined(SGX_FEATURE_SYSTEM_CACHE)
+	psDevInfo->ui32CacheControl |= (SGXMKIF_CC_INVAL_BIF_SL | SGXMKIF_CC_INVAL_DATA);
+#else
+	psDevInfo->ui32CacheControl |= SGXMKIF_CC_INVAL_DATA;
+#endif
 }
 
 
@@ -1018,3 +1108,40 @@ IMG_UINT32 SGXConvertTimeStamp(PVRSRV_SGXDEV_INFO	*psDevInfo,
 
 
 
+IMG_EXPORT
+PVRSRV_ERROR PVRSRVGetSGXRevDataKM(PVRSRV_DEVICE_NODE* psDeviceNode, IMG_UINT32 *pui32SGXCoreRev,
+				IMG_UINT32 *pui32SGXCoreID)
+{
+	PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO *)psDeviceNode->pvDevice;
+	SGX_MISC_INFO sMiscInfo;
+	PVRSRV_ERROR eError;
+
+	sMiscInfo.eRequest = SGX_MISC_INFO_REQUEST_SGXREV;
+	eError = SGXGetMiscInfoKM(psDevInfo, &sMiscInfo, psDeviceNode, NULL);
+
+	*pui32SGXCoreRev = sMiscInfo.uData.sSGXFeatures.ui32CoreRev;
+	*pui32SGXCoreID = sMiscInfo.uData.sSGXFeatures.ui32CoreID;
+	return eError;
+}
+
+
+PVRSRV_ERROR SGXContextSuspend(PVRSRV_DEVICE_NODE	*psDeviceNode,
+							   IMG_DEV_VIRTADDR		*psHWContextDevVAddr,
+							   IMG_BOOL				bResume)
+{
+	PVRSRV_ERROR		eError;
+	SGXMKIF_COMMAND		sCommand = {0};
+
+	sCommand.ui32Data[0] = psHWContextDevVAddr->uiAddr;
+	sCommand.ui32Data[1] = bResume ? PVRSRV_CTXSUSPCMD_RESUME : PVRSRV_CTXSUSPCMD_SUSPEND;
+
+	eError = SGXScheduleCCBCommandKM(psDeviceNode, SGXMKIF_CMD_CONTEXTSUSPEND, &sCommand, KERNEL_ID, 0, IMG_NULL, IMG_FALSE);
+	if (eError != PVRSRV_OK)
+	{
+		PVR_DPF((PVR_DBG_ERROR,"SGXContextSuspend: Failed to submit context suspend command"));
+		return eError;
+	}
+	
+	return eError;
+}
+
diff --git a/drivers/gpu/pvr/sgx/sgxutils.h b/drivers/gpu/pvr/sgx/sgxutils.h
index ef03e4f3454..51e8696547f 100644
--- a/drivers/gpu/pvr/sgx/sgxutils.h
+++ b/drivers/gpu/pvr/sgx/sgxutils.h
@@ -27,10 +27,10 @@
 #include "perproc.h"
 #include "sgxinfokm.h"
 
-
+ 
 #define CCB_OFFSET_IS_VALID(type, psCCBMemInfo, psCCBKick, offset) \
-	((sizeof(type) <= (psCCBMemInfo)->ui32AllocSize) && \
-	((psCCBKick)->offset <= (psCCBMemInfo)->ui32AllocSize - sizeof(type)))
+	((sizeof(type) <= (psCCBMemInfo)->uAllocSize) && \
+	((psCCBKick)->offset <= (psCCBMemInfo)->uAllocSize - sizeof(type)))
 
 #define	CCB_DATA_FROM_OFFSET(type, psCCBMemInfo, psCCBKick, offset) \
 	((type *)(((IMG_CHAR *)(psCCBMemInfo)->pvLinAddrKM) + \
@@ -42,18 +42,20 @@ IMG_VOID SGXTestActivePowerEvent(PVRSRV_DEVICE_NODE	*psDeviceNode,
 								 IMG_UINT32			ui32CallerID);
 
 IMG_IMPORT
-PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO	*psDevInfo,
+PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_DEVICE_NODE	*psDeviceNode,
 								   SGXMKIF_CMD_TYPE		eCommandType,
 								   SGXMKIF_COMMAND		*psCommandData,
 								   IMG_UINT32			ui32CallerID,
 								   IMG_UINT32			ui32PDumpFlags,
-								   IMG_BOOL			bLastInScene);
+								   IMG_HANDLE			hDevMemContext,
+								   IMG_BOOL				bLastInScene);
 IMG_IMPORT
 PVRSRV_ERROR SGXScheduleCCBCommandKM(PVRSRV_DEVICE_NODE		*psDeviceNode,
 									 SGXMKIF_CMD_TYPE		eCommandType,
 									 SGXMKIF_COMMAND		*psCommandData,
 									 IMG_UINT32				ui32CallerID,
 									 IMG_UINT32				ui32PDumpFlags,
+									 IMG_HANDLE				hDevMemContext,
 									 IMG_BOOL				bLastInScene);
 
 IMG_IMPORT
@@ -99,4 +101,11 @@ IMG_VOID SGXCleanupRequest(PVRSRV_DEVICE_NODE	*psDeviceNode,
 							IMG_DEV_VIRTADDR	*psHWDataDevVAddr,
 							IMG_UINT32			ui32CleanupType);
 
+IMG_IMPORT
+PVRSRV_ERROR PVRSRVGetSGXRevDataKM(PVRSRV_DEVICE_NODE* psDeviceNode, IMG_UINT32 *pui32SGXCoreRev,
+				IMG_UINT32 *pui32SGXCoreID);
+
+PVRSRV_ERROR SGXContextSuspend(PVRSRV_DEVICE_NODE	*psDeviceNode,
+							   IMG_DEV_VIRTADDR		*psHWContextDevVAddr,
+							   IMG_BOOL				bResume);
 
diff --git a/drivers/gpu/pvr/sgx531defs.h b/drivers/gpu/pvr/sgx531defs.h
new file mode 100644
index 00000000000..b0c663c2be7
--- /dev/null
+++ b/drivers/gpu/pvr/sgx531defs.h
@@ -0,0 +1,544 @@
+/**********************************************************************
+ *
+ * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
+ * See the GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ * 
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Contact Information:
+ * Imagination Technologies Ltd. <gpl-support@imgtec.com>
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
+ *
+ ******************************************************************************/
+
+#ifndef _SGX531DEFS_KM_H_
+#define _SGX531DEFS_KM_H_
+
+#define EUR_CR_CLKGATECTL                   0x0000
+#define EUR_CR_CLKGATECTL_ISP_CLKG_MASK     0x00000003U
+#define EUR_CR_CLKGATECTL_ISP_CLKG_SHIFT    0
+#define EUR_CR_CLKGATECTL_ISP2_CLKG_MASK    0x0000000CU
+#define EUR_CR_CLKGATECTL_ISP2_CLKG_SHIFT   2
+#define EUR_CR_CLKGATECTL_TSP_CLKG_MASK     0x00000030U
+#define EUR_CR_CLKGATECTL_TSP_CLKG_SHIFT    4
+#define EUR_CR_CLKGATECTL_TE_CLKG_MASK      0x000000C0U
+#define EUR_CR_CLKGATECTL_TE_CLKG_SHIFT     6
+#define EUR_CR_CLKGATECTL_MTE_CLKG_MASK     0x00000300U
+#define EUR_CR_CLKGATECTL_MTE_CLKG_SHIFT    8
+#define EUR_CR_CLKGATECTL_DPM_CLKG_MASK     0x00000C00U
+#define EUR_CR_CLKGATECTL_DPM_CLKG_SHIFT    10
+#define EUR_CR_CLKGATECTL_VDM_CLKG_MASK     0x00003000U
+#define EUR_CR_CLKGATECTL_VDM_CLKG_SHIFT    12
+#define EUR_CR_CLKGATECTL_PDS_CLKG_MASK     0x0000C000U
+#define EUR_CR_CLKGATECTL_PDS_CLKG_SHIFT    14
+#define EUR_CR_CLKGATECTL_IDXFIFO_CLKG_MASK 0x00030000U
+#define EUR_CR_CLKGATECTL_IDXFIFO_CLKG_SHIFT 16
+#define EUR_CR_CLKGATECTL_TA_CLKG_MASK      0x000C0000U
+#define EUR_CR_CLKGATECTL_TA_CLKG_SHIFT     18
+#define EUR_CR_CLKGATECTL_AUTO_MAN_REG_MASK 0x01000000U
+#define EUR_CR_CLKGATECTL_AUTO_MAN_REG_SHIFT 24
+#define EUR_CR_CLKGATECTL_SYSTEM_CLKG_MASK  0x10000000U
+#define EUR_CR_CLKGATECTL_SYSTEM_CLKG_SHIFT 28
+#define EUR_CR_CLKGATECTL2                  0x0004
+#define EUR_CR_CLKGATECTL2_PBE_CLKG_MASK    0x00000003U
+#define EUR_CR_CLKGATECTL2_PBE_CLKG_SHIFT   0
+#define EUR_CR_CLKGATECTL2_CACHEL2_CLKG_MASK 0x0000000CU
+#define EUR_CR_CLKGATECTL2_CACHEL2_CLKG_SHIFT 2
+#define EUR_CR_CLKGATECTL2_UCACHEL2_CLKG_MASK 0x00000030U
+#define EUR_CR_CLKGATECTL2_UCACHEL2_CLKG_SHIFT 4
+#define EUR_CR_CLKGATECTL2_USE0_CLKG_MASK   0x000000C0U
+#define EUR_CR_CLKGATECTL2_USE0_CLKG_SHIFT  6
+#define EUR_CR_CLKGATECTL2_ITR0_CLKG_MASK   0x00000300U
+#define EUR_CR_CLKGATECTL2_ITR0_CLKG_SHIFT  8
+#define EUR_CR_CLKGATECTL2_TEX0_CLKG_MASK   0x00000C00U
+#define EUR_CR_CLKGATECTL2_TEX0_CLKG_SHIFT  10
+#define EUR_CR_CLKGATECTL2_MADD0_CLKG_MASK  0x00003000U
+#define EUR_CR_CLKGATECTL2_MADD0_CLKG_SHIFT 12
+#define EUR_CR_CLKGATECTL2_USE1_CLKG_MASK   0x0000C000U
+#define EUR_CR_CLKGATECTL2_USE1_CLKG_SHIFT  14
+#define EUR_CR_CLKGATECTL2_ITR1_CLKG_MASK   0x00030000U
+#define EUR_CR_CLKGATECTL2_ITR1_CLKG_SHIFT  16
+#define EUR_CR_CLKGATECTL2_TEX1_CLKG_MASK   0x000C0000U
+#define EUR_CR_CLKGATECTL2_TEX1_CLKG_SHIFT  18
+#define EUR_CR_CLKGATECTL2_MADD1_CLKG_MASK  0x00300000U
+#define EUR_CR_CLKGATECTL2_MADD1_CLKG_SHIFT 20
+#define EUR_CR_CLKGATESTATUS                0x0008
+#define EUR_CR_CLKGATESTATUS_ISP_CLKS_MASK  0x00000001U
+#define EUR_CR_CLKGATESTATUS_ISP_CLKS_SHIFT 0
+#define EUR_CR_CLKGATESTATUS_ISP2_CLKS_MASK 0x00000002U
+#define EUR_CR_CLKGATESTATUS_ISP2_CLKS_SHIFT 1
+#define EUR_CR_CLKGATESTATUS_TSP_CLKS_MASK  0x00000004U
+#define EUR_CR_CLKGATESTATUS_TSP_CLKS_SHIFT 2
+#define EUR_CR_CLKGATESTATUS_TE_CLKS_MASK   0x00000008U
+#define EUR_CR_CLKGATESTATUS_TE_CLKS_SHIFT  3
+#define EUR_CR_CLKGATESTATUS_MTE_CLKS_MASK  0x00000010U
+#define EUR_CR_CLKGATESTATUS_MTE_CLKS_SHIFT 4
+#define EUR_CR_CLKGATESTATUS_DPM_CLKS_MASK  0x00000020U
+#define EUR_CR_CLKGATESTATUS_DPM_CLKS_SHIFT 5
+#define EUR_CR_CLKGATESTATUS_VDM_CLKS_MASK  0x00000040U
+#define EUR_CR_CLKGATESTATUS_VDM_CLKS_SHIFT 6
+#define EUR_CR_CLKGATESTATUS_PDS_CLKS_MASK  0x00000080U
+#define EUR_CR_CLKGATESTATUS_PDS_CLKS_SHIFT 7
+#define EUR_CR_CLKGATESTATUS_PBE_CLKS_MASK  0x00000100U
+#define EUR_CR_CLKGATESTATUS_PBE_CLKS_SHIFT 8
+#define EUR_CR_CLKGATESTATUS_CACHEL2_CLKS_MASK 0x00000200U
+#define EUR_CR_CLKGATESTATUS_CACHEL2_CLKS_SHIFT 9
+#define EUR_CR_CLKGATESTATUS_UCACHEL2_CLKS_MASK 0x00000400U
+#define EUR_CR_CLKGATESTATUS_UCACHEL2_CLKS_SHIFT 10
+#define EUR_CR_CLKGATESTATUS_USE0_CLKS_MASK 0x00000800U
+#define EUR_CR_CLKGATESTATUS_USE0_CLKS_SHIFT 11
+#define EUR_CR_CLKGATESTATUS_ITR0_CLKS_MASK 0x00001000U
+#define EUR_CR_CLKGATESTATUS_ITR0_CLKS_SHIFT 12
+#define EUR_CR_CLKGATESTATUS_TEX0_CLKS_MASK 0x00002000U
+#define EUR_CR_CLKGATESTATUS_TEX0_CLKS_SHIFT 13
+#define EUR_CR_CLKGATESTATUS_MADD0_CLKS_MASK 0x00004000U
+#define EUR_CR_CLKGATESTATUS_MADD0_CLKS_SHIFT 14
+#define EUR_CR_CLKGATESTATUS_USE1_CLKS_MASK 0x00008000U
+#define EUR_CR_CLKGATESTATUS_USE1_CLKS_SHIFT 15
+#define EUR_CR_CLKGATESTATUS_ITR1_CLKS_MASK 0x00010000U
+#define EUR_CR_CLKGATESTATUS_ITR1_CLKS_SHIFT 16
+#define EUR_CR_CLKGATESTATUS_TEX1_CLKS_MASK 0x00020000U
+#define EUR_CR_CLKGATESTATUS_TEX1_CLKS_SHIFT 17
+#define EUR_CR_CLKGATESTATUS_MADD1_CLKS_MASK 0x00040000U
+#define EUR_CR_CLKGATESTATUS_MADD1_CLKS_SHIFT 18
+#define EUR_CR_CLKGATESTATUS_IDXFIFO_CLKS_MASK 0x00080000U
+#define EUR_CR_CLKGATESTATUS_IDXFIFO_CLKS_SHIFT 19
+#define EUR_CR_CLKGATESTATUS_TA_CLKS_MASK   0x00100000U
+#define EUR_CR_CLKGATESTATUS_TA_CLKS_SHIFT  20
+#define EUR_CR_CLKGATECTLOVR                0x000C
+#define EUR_CR_CLKGATECTLOVR_ISP_CLKO_MASK  0x00000003U
+#define EUR_CR_CLKGATECTLOVR_ISP_CLKO_SHIFT 0
+#define EUR_CR_CLKGATECTLOVR_ISP2_CLKO_MASK 0x0000000CU
+#define EUR_CR_CLKGATECTLOVR_ISP2_CLKO_SHIFT 2
+#define EUR_CR_CLKGATECTLOVR_TSP_CLKO_MASK  0x00000030U
+#define EUR_CR_CLKGATECTLOVR_TSP_CLKO_SHIFT 4
+#define EUR_CR_CLKGATECTLOVR_TE_CLKO_MASK   0x000000C0U
+#define EUR_CR_CLKGATECTLOVR_TE_CLKO_SHIFT  6
+#define EUR_CR_CLKGATECTLOVR_MTE_CLKO_MASK  0x00000300U
+#define EUR_CR_CLKGATECTLOVR_MTE_CLKO_SHIFT 8
+#define EUR_CR_CLKGATECTLOVR_DPM_CLKO_MASK  0x00000C00U
+#define EUR_CR_CLKGATECTLOVR_DPM_CLKO_SHIFT 10
+#define EUR_CR_CLKGATECTLOVR_VDM_CLKO_MASK  0x00003000U
+#define EUR_CR_CLKGATECTLOVR_VDM_CLKO_SHIFT 12
+#define EUR_CR_CLKGATECTLOVR_PDS_CLKO_MASK  0x0000C000U
+#define EUR_CR_CLKGATECTLOVR_PDS_CLKO_SHIFT 14
+#define EUR_CR_CLKGATECTLOVR_IDXFIFO_CLKO_MASK 0x00030000U
+#define EUR_CR_CLKGATECTLOVR_IDXFIFO_CLKO_SHIFT 16
+#define EUR_CR_CLKGATECTLOVR_TA_CLKO_MASK   0x000C0000U
+#define EUR_CR_CLKGATECTLOVR_TA_CLKO_SHIFT  18
+#define EUR_CR_CORE_ID                      0x0020
+#define EUR_CR_CORE_ID_CONFIG_MASK          0x0000FFFFU
+#define EUR_CR_CORE_ID_CONFIG_SHIFT         0
+#define EUR_CR_CORE_ID_ID_MASK              0xFFFF0000U
+#define EUR_CR_CORE_ID_ID_SHIFT             16
+#define EUR_CR_CORE_REVISION                0x0024
+#define EUR_CR_CORE_REVISION_MAINTENANCE_MASK 0x000000FFU
+#define EUR_CR_CORE_REVISION_MAINTENANCE_SHIFT 0
+#define EUR_CR_CORE_REVISION_MINOR_MASK     0x0000FF00U
+#define EUR_CR_CORE_REVISION_MINOR_SHIFT    8
+#define EUR_CR_CORE_REVISION_MAJOR_MASK     0x00FF0000U
+#define EUR_CR_CORE_REVISION_MAJOR_SHIFT    16
+#define EUR_CR_CORE_REVISION_DESIGNER_MASK  0xFF000000U
+#define EUR_CR_CORE_REVISION_DESIGNER_SHIFT 24
+#define EUR_CR_DESIGNER_REV_FIELD1          0x0028
+#define EUR_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_MASK 0xFFFFFFFFU
+#define EUR_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_SHIFT 0
+#define EUR_CR_DESIGNER_REV_FIELD2          0x002C
+#define EUR_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_MASK 0xFFFFFFFFU
+#define EUR_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_SHIFT 0
+#define EUR_CR_SOFT_RESET                   0x0080
+#define EUR_CR_SOFT_RESET_BIF_RESET_MASK    0x00000001U
+#define EUR_CR_SOFT_RESET_BIF_RESET_SHIFT   0
+#define EUR_CR_SOFT_RESET_VDM_RESET_MASK    0x00000002U
+#define EUR_CR_SOFT_RESET_VDM_RESET_SHIFT   1
+#define EUR_CR_SOFT_RESET_DPM_RESET_MASK    0x00000004U
+#define EUR_CR_SOFT_RESET_DPM_RESET_SHIFT   2
+#define EUR_CR_SOFT_RESET_TE_RESET_MASK     0x00000008U
+#define EUR_CR_SOFT_RESET_TE_RESET_SHIFT    3
+#define EUR_CR_SOFT_RESET_MTE_RESET_MASK    0x00000010U
+#define EUR_CR_SOFT_RESET_MTE_RESET_SHIFT   4
+#define EUR_CR_SOFT_RESET_ISP_RESET_MASK    0x00000020U
+#define EUR_CR_SOFT_RESET_ISP_RESET_SHIFT   5
+#define EUR_CR_SOFT_RESET_ISP2_RESET_MASK   0x00000040U
+#define EUR_CR_SOFT_RESET_ISP2_RESET_SHIFT  6
+#define EUR_CR_SOFT_RESET_TSP_RESET_MASK    0x00000080U
+#define EUR_CR_SOFT_RESET_TSP_RESET_SHIFT   7
+#define EUR_CR_SOFT_RESET_PDS_RESET_MASK    0x00000100U
+#define EUR_CR_SOFT_RESET_PDS_RESET_SHIFT   8
+#define EUR_CR_SOFT_RESET_PBE_RESET_MASK    0x00000200U
+#define EUR_CR_SOFT_RESET_PBE_RESET_SHIFT   9
+#define EUR_CR_SOFT_RESET_CACHEL2_RESET_MASK 0x00000400U
+#define EUR_CR_SOFT_RESET_CACHEL2_RESET_SHIFT 10
+#define EUR_CR_SOFT_RESET_UCACHEL2_RESET_MASK 0x00000800U
+#define EUR_CR_SOFT_RESET_UCACHEL2_RESET_SHIFT 11
+#define EUR_CR_SOFT_RESET_MADD_RESET_MASK   0x00001000U
+#define EUR_CR_SOFT_RESET_MADD_RESET_SHIFT  12
+#define EUR_CR_SOFT_RESET_ITR_RESET_MASK    0x00002000U
+#define EUR_CR_SOFT_RESET_ITR_RESET_SHIFT   13
+#define EUR_CR_SOFT_RESET_TEX_RESET_MASK    0x00004000U
+#define EUR_CR_SOFT_RESET_TEX_RESET_SHIFT   14
+#define EUR_CR_SOFT_RESET_USE_RESET_MASK    0x00008000U
+#define EUR_CR_SOFT_RESET_USE_RESET_SHIFT   15
+#define EUR_CR_SOFT_RESET_IDXFIFO_RESET_MASK 0x00010000U
+#define EUR_CR_SOFT_RESET_IDXFIFO_RESET_SHIFT 16
+#define EUR_CR_SOFT_RESET_TA_RESET_MASK     0x00020000U
+#define EUR_CR_SOFT_RESET_TA_RESET_SHIFT    17
+#define EUR_CR_EVENT_HOST_ENABLE2           0x0110
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_TA_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_TA_SHIFT 4
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_3D_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_3D_SHIFT 3
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_DL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_DL_SHIFT 2
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_HOST_CLEAR2            0x0114
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_TA_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_TA_SHIFT 4
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_3D_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_3D_SHIFT 3
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_DL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_DL_SHIFT 2
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_STATUS2                0x0118
+#define EUR_CR_EVENT_STATUS2_TRIG_TA_MASK   0x00000010U
+#define EUR_CR_EVENT_STATUS2_TRIG_TA_SHIFT  4
+#define EUR_CR_EVENT_STATUS2_TRIG_3D_MASK   0x00000008U
+#define EUR_CR_EVENT_STATUS2_TRIG_3D_SHIFT  3
+#define EUR_CR_EVENT_STATUS2_TRIG_DL_MASK   0x00000004U
+#define EUR_CR_EVENT_STATUS2_TRIG_DL_SHIFT  2
+#define EUR_CR_EVENT_STATUS2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_STATUS2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_STATUS                 0x012CU
+#define EUR_CR_EVENT_STATUS_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_STATUS_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_STATUS_TIMER_MASK      0x20000000U
+#define EUR_CR_EVENT_STATUS_TIMER_SHIFT     29
+#define EUR_CR_EVENT_STATUS_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_STATUS_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_STATUS_TWOD_COMPLETE_MASK 0x08000000U
+#define EUR_CR_EVENT_STATUS_TWOD_COMPLETE_SHIFT 27
+#define EUR_CR_EVENT_STATUS_MADD_CACHE_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_STATUS_MADD_CACHE_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_STATUS_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_STATUS_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_STATUS_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_STATUS_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_STATUS_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_STATUS_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_STATUS_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_STATUS_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_STATUS_OTPM_INV_MASK   0x00100000U
+#define EUR_CR_EVENT_STATUS_OTPM_INV_SHIFT  20
+#define EUR_CR_EVENT_STATUS_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_STATUS_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_STATUS_ISP_HALT_MASK   0x00020000U
+#define EUR_CR_EVENT_STATUS_ISP_HALT_SHIFT  17
+#define EUR_CR_EVENT_STATUS_ISP_VISIBILITY_FAIL_MASK 0x00010000U
+#define EUR_CR_EVENT_STATUS_ISP_VISIBILITY_FAIL_SHIFT 16
+#define EUR_CR_EVENT_STATUS_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_STATUS_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_STATUS_SW_EVENT_MASK   0x00004000U
+#define EUR_CR_EVENT_STATUS_SW_EVENT_SHIFT  14
+#define EUR_CR_EVENT_STATUS_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_STATUS_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_STATUS_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_STATUS_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_STATUS_TPC_CLEAR_MASK  0x00000800U
+#define EUR_CR_EVENT_STATUS_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_STATUS_TPC_FLUSH_MASK  0x00000400U
+#define EUR_CR_EVENT_STATUS_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_STATUS_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_STATUS_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_STATUS_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_STATUS_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_STATUS_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_STATUS_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_EVENT_HOST_ENABLE            0x0130
+#define EUR_CR_EVENT_HOST_ENABLE_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_HOST_ENABLE_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_HOST_ENABLE_TIMER_MASK 0x20000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TIMER_SHIFT 29
+#define EUR_CR_EVENT_HOST_ENABLE_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_HOST_ENABLE_TWOD_COMPLETE_MASK 0x08000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TWOD_COMPLETE_SHIFT 27
+#define EUR_CR_EVENT_HOST_ENABLE_MADD_CACHE_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_HOST_ENABLE_MADD_CACHE_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_INV_MASK 0x00100000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_INV_SHIFT 20
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_HOST_ENABLE_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_HOST_ENABLE_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_HALT_MASK 0x00020000U
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_HALT_SHIFT 17
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_VISIBILITY_FAIL_MASK 0x00010000U
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_VISIBILITY_FAIL_SHIFT 16
+#define EUR_CR_EVENT_HOST_ENABLE_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_HOST_ENABLE_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_HOST_ENABLE_SW_EVENT_MASK 0x00004000U
+#define EUR_CR_EVENT_HOST_ENABLE_SW_EVENT_SHIFT 14
+#define EUR_CR_EVENT_HOST_ENABLE_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_HOST_ENABLE_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_CLEAR_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_FLUSH_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_EVENT_HOST_CLEAR             0x0134
+#define EUR_CR_EVENT_HOST_CLEAR_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_HOST_CLEAR_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_HOST_CLEAR_TIMER_MASK  0x20000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TIMER_SHIFT 29
+#define EUR_CR_EVENT_HOST_CLEAR_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_HOST_CLEAR_TWOD_COMPLETE_MASK 0x08000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TWOD_COMPLETE_SHIFT 27
+#define EUR_CR_EVENT_HOST_CLEAR_MADD_CACHE_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_HOST_CLEAR_MADD_CACHE_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_INV_MASK 0x00100000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_INV_SHIFT 20
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_HALT_MASK 0x00020000U
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_HALT_SHIFT 17
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_VISIBILITY_FAIL_MASK 0x00010000U
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_VISIBILITY_FAIL_SHIFT 16
+#define EUR_CR_EVENT_HOST_CLEAR_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_HOST_CLEAR_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_MASK 0x00004000U
+#define EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_SHIFT 14
+#define EUR_CR_EVENT_HOST_CLEAR_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_HOST_CLEAR_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_CLEAR_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_TIMER                        0x0144
+#define EUR_CR_TIMER_VALUE_MASK             0xFFFFFFFFU
+#define EUR_CR_TIMER_VALUE_SHIFT            0
+#define EUR_CR_EVENT_KICK1                  0x0AB0
+#define EUR_CR_EVENT_KICK1_NOW_MASK         0x000000FFU
+#define EUR_CR_EVENT_KICK1_NOW_SHIFT        0
+#define EUR_CR_PDS_EXEC_BASE                0x0AB8
+#define EUR_CR_PDS_EXEC_BASE_ADDR_MASK      0x0FF00000U
+#define EUR_CR_PDS_EXEC_BASE_ADDR_SHIFT     20
+#define EUR_CR_EVENT_KICK2                  0x0AC0
+#define EUR_CR_EVENT_KICK2_NOW_MASK         0x00000001U
+#define EUR_CR_EVENT_KICK2_NOW_SHIFT        0
+#define EUR_CR_EVENT_KICKER                 0x0AC4
+#define EUR_CR_EVENT_KICKER_ADDRESS_MASK    0x0FFFFFF0U
+#define EUR_CR_EVENT_KICKER_ADDRESS_SHIFT   4
+#define EUR_CR_EVENT_KICK                   0x0AC8
+#define EUR_CR_EVENT_KICK_NOW_MASK          0x00000001U
+#define EUR_CR_EVENT_KICK_NOW_SHIFT         0
+#define EUR_CR_EVENT_TIMER                  0x0ACC
+#define EUR_CR_EVENT_TIMER_ENABLE_MASK      0x01000000U
+#define EUR_CR_EVENT_TIMER_ENABLE_SHIFT     24
+#define EUR_CR_EVENT_TIMER_VALUE_MASK       0x00FFFFFFU
+#define EUR_CR_EVENT_TIMER_VALUE_SHIFT      0
+#define EUR_CR_PDS_INV0                     0x0AD0
+#define EUR_CR_PDS_INV0_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV0_DSC_SHIFT           0
+#define EUR_CR_PDS_INV1                     0x0AD4
+#define EUR_CR_PDS_INV1_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV1_DSC_SHIFT           0
+#define EUR_CR_EVENT_KICK3                  0x0AD8
+#define EUR_CR_EVENT_KICK3_NOW_MASK         0x00000001U
+#define EUR_CR_EVENT_KICK3_NOW_SHIFT        0
+#define EUR_CR_PDS_INV3                     0x0ADC
+#define EUR_CR_PDS_INV3_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV3_DSC_SHIFT           0
+#define EUR_CR_PDS_INV_CSC                  0x0AE0
+#define EUR_CR_PDS_INV_CSC_KICK_MASK        0x00000001U
+#define EUR_CR_PDS_INV_CSC_KICK_SHIFT       0
+#define EUR_CR_PDS_PC_BASE                  0x0B2C
+#define EUR_CR_PDS_PC_BASE_ADDRESS_MASK     0x00FFFFFFU
+#define EUR_CR_PDS_PC_BASE_ADDRESS_SHIFT    0
+#define EUR_CR_BIF_CTRL                     0x0C00
+#define EUR_CR_BIF_CTRL_NOREORDER_MASK      0x00000001U
+#define EUR_CR_BIF_CTRL_NOREORDER_SHIFT     0
+#define EUR_CR_BIF_CTRL_PAUSE_MASK          0x00000002U
+#define EUR_CR_BIF_CTRL_PAUSE_SHIFT         1
+#define EUR_CR_BIF_CTRL_FLUSH_MASK          0x00000004U
+#define EUR_CR_BIF_CTRL_FLUSH_SHIFT         2
+#define EUR_CR_BIF_CTRL_INVALDC_MASK        0x00000008U
+#define EUR_CR_BIF_CTRL_INVALDC_SHIFT       3
+#define EUR_CR_BIF_CTRL_CLEAR_FAULT_MASK    0x00000010U
+#define EUR_CR_BIF_CTRL_CLEAR_FAULT_SHIFT   4
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_CACHE_MASK 0x00000100U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_CACHE_SHIFT 8
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_VDM_MASK 0x00000200U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_VDM_SHIFT 9
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TE_MASK  0x00000400U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TE_SHIFT 10
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PBE_MASK 0x00001000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PBE_SHIFT 12
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TSPP_MASK 0x00002000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TSPP_SHIFT 13
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_ISP_MASK 0x00004000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_ISP_SHIFT 14
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_USE_MASK 0x00008000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_USE_SHIFT 15
+#define EUR_CR_BIF_INT_STAT                 0x0C04
+#define EUR_CR_BIF_INT_STAT_FAULT_MASK      0x00003FFFU
+#define EUR_CR_BIF_INT_STAT_FAULT_SHIFT     0
+#define EUR_CR_BIF_INT_STAT_PF_N_RW_MASK    0x00004000U
+#define EUR_CR_BIF_INT_STAT_PF_N_RW_SHIFT   14
+#define EUR_CR_BIF_INT_STAT_FLUSH_COMPLETE_MASK 0x00008000U
+#define EUR_CR_BIF_INT_STAT_FLUSH_COMPLETE_SHIFT 15
+#define EUR_CR_BIF_FAULT                    0x0C08
+#define EUR_CR_BIF_FAULT_SB_MASK            0x000001F0U
+#define EUR_CR_BIF_FAULT_SB_SHIFT           4
+#define EUR_CR_BIF_FAULT_ADDR_MASK          0x0FFFF000U
+#define EUR_CR_BIF_FAULT_ADDR_SHIFT         12
+#define EUR_CR_BIF_DIR_LIST_BASE0           0x0C84
+#define EUR_CR_BIF_DIR_LIST_BASE0_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE0_ADDR_SHIFT 12
+#define EUR_CR_BIF_TA_REQ_BASE              0x0C90
+#define EUR_CR_BIF_TA_REQ_BASE_ADDR_MASK    0x0FF00000U
+#define EUR_CR_BIF_TA_REQ_BASE_ADDR_SHIFT   20
+#define EUR_CR_BIF_MEM_REQ_STAT             0x0CA8
+#define EUR_CR_BIF_MEM_REQ_STAT_READS_MASK  0x000000FFU
+#define EUR_CR_BIF_MEM_REQ_STAT_READS_SHIFT 0
+#define EUR_CR_BIF_3D_REQ_BASE              0x0CAC
+#define EUR_CR_BIF_3D_REQ_BASE_ADDR_MASK    0x0FF00000U
+#define EUR_CR_BIF_3D_REQ_BASE_ADDR_SHIFT   20
+#define EUR_CR_BIF_ZLS_REQ_BASE             0x0CB0
+#define EUR_CR_BIF_ZLS_REQ_BASE_ADDR_MASK   0x0FF00000U
+#define EUR_CR_BIF_ZLS_REQ_BASE_ADDR_SHIFT  20
+#define EUR_CR_2D_BLIT_STATUS               0x0E04
+#define EUR_CR_2D_BLIT_STATUS_COMPLETE_MASK 0x00FFFFFFU
+#define EUR_CR_2D_BLIT_STATUS_COMPLETE_SHIFT 0
+#define EUR_CR_2D_BLIT_STATUS_BUSY_MASK     0x01000000U
+#define EUR_CR_2D_BLIT_STATUS_BUSY_SHIFT    24
+#define EUR_CR_2D_VIRTUAL_FIFO_0            0x0E10
+#define EUR_CR_2D_VIRTUAL_FIFO_0_ENABLE_MASK 0x00000001U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_ENABLE_SHIFT 0
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MASK 0x0000000EU
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_SHIFT 1
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_DIV_MASK 0x00000FF0U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_DIV_SHIFT 4
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MUL_MASK 0x0000F000U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MUL_SHIFT 12
+#define EUR_CR_2D_VIRTUAL_FIFO_1            0x0E14
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_ACC_MASK 0x00000FFFU
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_ACC_SHIFT 0
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MAX_ACC_MASK 0x00FFF000U
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MAX_ACC_SHIFT 12
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_METRIC_MASK 0xFF000000U
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_METRIC_SHIFT 24
+#define EUR_CR_USE_CODE_BASE(X)     (0x0A0C + (4 * (X)))
+#define EUR_CR_USE_CODE_BASE_ADDR_MASK      0x00FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_SHIFT     0
+#define EUR_CR_USE_CODE_BASE_DM_MASK        0x03000000U
+#define EUR_CR_USE_CODE_BASE_DM_SHIFT       24
+#define EUR_CR_USE_CODE_BASE_SIZE_UINT32 16
+#define EUR_CR_USE_CODE_BASE_NUM_ENTRIES 16
+
+#endif 
+
diff --git a/drivers/gpu/pvr/sgx535defs.h b/drivers/gpu/pvr/sgx535defs.h
new file mode 100644
index 00000000000..04f43be12b1
--- /dev/null
+++ b/drivers/gpu/pvr/sgx535defs.h
@@ -0,0 +1,650 @@
+/**********************************************************************
+ *
+ * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
+ * See the GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ * 
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Contact Information:
+ * Imagination Technologies Ltd. <gpl-support@imgtec.com>
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
+ *
+ ******************************************************************************/
+
+#ifndef _SGX535DEFS_KM_H_
+#define _SGX535DEFS_KM_H_
+
+#define EUR_CR_CLKGATECTL                   0x0000
+#define EUR_CR_CLKGATECTL_2D_CLKG_MASK      0x00000003U
+#define EUR_CR_CLKGATECTL_2D_CLKG_SHIFT     0
+#define EUR_CR_CLKGATECTL_ISP_CLKG_MASK     0x00000030U
+#define EUR_CR_CLKGATECTL_ISP_CLKG_SHIFT    4
+#define EUR_CR_CLKGATECTL_TSP_CLKG_MASK     0x00000300U
+#define EUR_CR_CLKGATECTL_TSP_CLKG_SHIFT    8
+#define EUR_CR_CLKGATECTL_TA_CLKG_MASK      0x00003000U
+#define EUR_CR_CLKGATECTL_TA_CLKG_SHIFT     12
+#define EUR_CR_CLKGATECTL_DPM_CLKG_MASK     0x00030000U
+#define EUR_CR_CLKGATECTL_DPM_CLKG_SHIFT    16
+#define EUR_CR_CLKGATECTL_USE_CLKG_MASK     0x00300000U
+#define EUR_CR_CLKGATECTL_USE_CLKG_SHIFT    20
+#define EUR_CR_CLKGATECTL_AUTO_MAN_REG_MASK 0x01000000U
+#define EUR_CR_CLKGATECTL_AUTO_MAN_REG_SHIFT 24
+#define EUR_CR_CLKGATESTATUS                0x0004
+#define EUR_CR_CLKGATESTATUS_2D_CLKS_MASK   0x00000001
+#define EUR_CR_CLKGATESTATUS_2D_CLKS_SHIFT  0
+#define EUR_CR_CLKGATESTATUS_ISP_CLKS_MASK  0x00000010U
+#define EUR_CR_CLKGATESTATUS_ISP_CLKS_SHIFT 4
+#define EUR_CR_CLKGATESTATUS_TSP_CLKS_MASK  0x00000100U
+#define EUR_CR_CLKGATESTATUS_TSP_CLKS_SHIFT 8
+#define EUR_CR_CLKGATESTATUS_TA_CLKS_MASK   0x00001000U
+#define EUR_CR_CLKGATESTATUS_TA_CLKS_SHIFT  12
+#define EUR_CR_CLKGATESTATUS_DPM_CLKS_MASK  0x00010000U
+#define EUR_CR_CLKGATESTATUS_DPM_CLKS_SHIFT 16
+#define EUR_CR_CLKGATESTATUS_USE_CLKS_MASK  0x00100000U
+#define EUR_CR_CLKGATESTATUS_USE_CLKS_SHIFT 20
+#define EUR_CR_CLKGATECTLOVR                0x0008
+#define EUR_CR_CLKGATECTLOVR_2D_CLKO_MASK   0x00000003U
+#define EUR_CR_CLKGATECTLOVR_2D_CLKO_SHIFT  0
+#define EUR_CR_CLKGATECTLOVR_ISP_CLKO_MASK  0x00000030U
+#define EUR_CR_CLKGATECTLOVR_ISP_CLKO_SHIFT 4
+#define EUR_CR_CLKGATECTLOVR_TSP_CLKO_MASK  0x00000300U
+#define EUR_CR_CLKGATECTLOVR_TSP_CLKO_SHIFT 8
+#define EUR_CR_CLKGATECTLOVR_TA_CLKO_MASK   0x00003000U
+#define EUR_CR_CLKGATECTLOVR_TA_CLKO_SHIFT  12
+#define EUR_CR_CLKGATECTLOVR_DPM_CLKO_MASK  0x00030000U
+#define EUR_CR_CLKGATECTLOVR_DPM_CLKO_SHIFT 16
+#define EUR_CR_CLKGATECTLOVR_USE_CLKO_MASK  0x00300000U
+#define EUR_CR_CLKGATECTLOVR_USE_CLKO_SHIFT 20
+#define EUR_CR_CORE_ID                      0x0010
+#define EUR_CR_CORE_ID_CONFIG_MASK          0x0000FFFFU
+#define EUR_CR_CORE_ID_CONFIG_SHIFT         0
+#define EUR_CR_CORE_ID_ID_MASK              0xFFFF0000U
+#define EUR_CR_CORE_ID_ID_SHIFT             16
+#define EUR_CR_CORE_REVISION                0x0014
+#define EUR_CR_CORE_REVISION_MAINTENANCE_MASK 0x000000FFU
+#define EUR_CR_CORE_REVISION_MAINTENANCE_SHIFT 0
+#define EUR_CR_CORE_REVISION_MINOR_MASK     0x0000FF00U
+#define EUR_CR_CORE_REVISION_MINOR_SHIFT    8
+#define EUR_CR_CORE_REVISION_MAJOR_MASK     0x00FF0000U
+#define EUR_CR_CORE_REVISION_MAJOR_SHIFT    16
+#define EUR_CR_CORE_REVISION_DESIGNER_MASK  0xFF000000U
+#define EUR_CR_CORE_REVISION_DESIGNER_SHIFT 24
+#define EUR_CR_DESIGNER_REV_FIELD1          0x0018
+#define EUR_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_MASK 0xFFFFFFFFU
+#define EUR_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_SHIFT 0
+#define EUR_CR_DESIGNER_REV_FIELD2          0x001C
+#define EUR_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_MASK 0xFFFFFFFFU
+#define EUR_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_SHIFT 0
+#define EUR_CR_SOFT_RESET                   0x0080
+#define EUR_CR_SOFT_RESET_BIF_RESET_MASK    0x00000001U
+#define EUR_CR_SOFT_RESET_BIF_RESET_SHIFT   0
+#define EUR_CR_SOFT_RESET_TWOD_RESET_MASK   0x00000002U
+#define EUR_CR_SOFT_RESET_TWOD_RESET_SHIFT  1
+#define EUR_CR_SOFT_RESET_DPM_RESET_MASK    0x00000004U
+#define EUR_CR_SOFT_RESET_DPM_RESET_SHIFT   2
+#define EUR_CR_SOFT_RESET_TA_RESET_MASK     0x00000008U
+#define EUR_CR_SOFT_RESET_TA_RESET_SHIFT    3
+#define EUR_CR_SOFT_RESET_USE_RESET_MASK    0x00000010U
+#define EUR_CR_SOFT_RESET_USE_RESET_SHIFT   4
+#define EUR_CR_SOFT_RESET_ISP_RESET_MASK    0x00000020U
+#define EUR_CR_SOFT_RESET_ISP_RESET_SHIFT   5
+#define EUR_CR_SOFT_RESET_TSP_RESET_MASK    0x00000040U
+#define EUR_CR_SOFT_RESET_TSP_RESET_SHIFT   6
+#define EUR_CR_EVENT_HOST_ENABLE2           0x0110
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_TA_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_TA_SHIFT 7
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_3D_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_3D_SHIFT 6
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_DL_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_DL_SHIFT 5
+#define EUR_CR_EVENT_HOST_ENABLE2_BIF_REQUESTER_FAULT_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_ENABLE2_BIF_REQUESTER_FAULT_SHIFT 4
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_DHOST_FREE_LOAD_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_DHOST_FREE_LOAD_SHIFT 3
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_HOST_FREE_LOAD_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_HOST_FREE_LOAD_SHIFT 2
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_HOST_CLEAR2            0x0114
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_TA_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_TA_SHIFT 7
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_3D_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_3D_SHIFT 6
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_DL_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_DL_SHIFT 5
+#define EUR_CR_EVENT_HOST_CLEAR2_BIF_REQUESTER_FAULT_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_CLEAR2_BIF_REQUESTER_FAULT_SHIFT 4
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_DHOST_FREE_LOAD_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_DHOST_FREE_LOAD_SHIFT 3
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_HOST_FREE_LOAD_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_HOST_FREE_LOAD_SHIFT 2
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_STATUS2                0x0118U
+#define EUR_CR_EVENT_STATUS2_TRIG_TA_MASK   0x00000080U
+#define EUR_CR_EVENT_STATUS2_TRIG_TA_SHIFT  7
+#define EUR_CR_EVENT_STATUS2_TRIG_3D_MASK   0x00000040U
+#define EUR_CR_EVENT_STATUS2_TRIG_3D_SHIFT  6
+#define EUR_CR_EVENT_STATUS2_TRIG_DL_MASK   0x00000020U
+#define EUR_CR_EVENT_STATUS2_TRIG_DL_SHIFT  5
+#define EUR_CR_EVENT_STATUS2_BIF_REQUESTER_FAULT_MASK 0x00000010U
+#define EUR_CR_EVENT_STATUS2_BIF_REQUESTER_FAULT_SHIFT 4
+#define EUR_CR_EVENT_STATUS2_DPM_DHOST_FREE_LOAD_MASK 0x00000008U
+#define EUR_CR_EVENT_STATUS2_DPM_DHOST_FREE_LOAD_SHIFT 3
+#define EUR_CR_EVENT_STATUS2_DPM_HOST_FREE_LOAD_MASK 0x00000004U
+#define EUR_CR_EVENT_STATUS2_DPM_HOST_FREE_LOAD_SHIFT 2
+#define EUR_CR_EVENT_STATUS2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_STATUS2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_STATUS                 0x012CU
+#define EUR_CR_EVENT_STATUS_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_STATUS_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_STATUS_TIMER_MASK      0x20000000U
+#define EUR_CR_EVENT_STATUS_TIMER_SHIFT     29
+#define EUR_CR_EVENT_STATUS_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_STATUS_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_STATUS_TWOD_COMPLETE_MASK 0x08000000U
+#define EUR_CR_EVENT_STATUS_TWOD_COMPLETE_SHIFT 27
+#define EUR_CR_EVENT_STATUS_MADD_CACHE_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_STATUS_MADD_CACHE_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_STATUS_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_STATUS_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_STATUS_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_STATUS_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_STATUS_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_STATUS_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_STATUS_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_STATUS_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_STATUS_OTPM_INV_MASK   0x00100000U
+#define EUR_CR_EVENT_STATUS_OTPM_INV_SHIFT  20
+#define EUR_CR_EVENT_STATUS_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_STATUS_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_STATUS_ISP_HALT_MASK   0x00020000U
+#define EUR_CR_EVENT_STATUS_ISP_HALT_SHIFT  17
+#define EUR_CR_EVENT_STATUS_ISP_VISIBILITY_FAIL_MASK 0x00010000U
+#define EUR_CR_EVENT_STATUS_ISP_VISIBILITY_FAIL_SHIFT 16
+#define EUR_CR_EVENT_STATUS_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_STATUS_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_STATUS_SW_EVENT_MASK   0x00004000U
+#define EUR_CR_EVENT_STATUS_SW_EVENT_SHIFT  14
+#define EUR_CR_EVENT_STATUS_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_STATUS_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_STATUS_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_STATUS_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_STATUS_TPC_CLEAR_MASK  0x00000800U
+#define EUR_CR_EVENT_STATUS_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_STATUS_TPC_FLUSH_MASK  0x00000400U
+#define EUR_CR_EVENT_STATUS_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_STATUS_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_STATUS_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_STATUS_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_STATUS_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_STATUS_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_STATUS_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_EVENT_HOST_ENABLE            0x0130
+#define EUR_CR_EVENT_HOST_ENABLE_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_HOST_ENABLE_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_HOST_ENABLE_TIMER_MASK 0x20000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TIMER_SHIFT 29
+#define EUR_CR_EVENT_HOST_ENABLE_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_HOST_ENABLE_TWOD_COMPLETE_MASK 0x08000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TWOD_COMPLETE_SHIFT 27
+#define EUR_CR_EVENT_HOST_ENABLE_MADD_CACHE_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_HOST_ENABLE_MADD_CACHE_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_INV_MASK 0x00100000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_INV_SHIFT 20
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_HOST_ENABLE_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_HOST_ENABLE_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_HALT_MASK 0x00020000U
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_HALT_SHIFT 17
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_VISIBILITY_FAIL_MASK 0x00010000U
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_VISIBILITY_FAIL_SHIFT 16
+#define EUR_CR_EVENT_HOST_ENABLE_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_HOST_ENABLE_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_HOST_ENABLE_SW_EVENT_MASK 0x00004000U
+#define EUR_CR_EVENT_HOST_ENABLE_SW_EVENT_SHIFT 14
+#define EUR_CR_EVENT_HOST_ENABLE_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_HOST_ENABLE_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_CLEAR_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_FLUSH_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_EVENT_HOST_CLEAR             0x0134
+#define EUR_CR_EVENT_HOST_CLEAR_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_HOST_CLEAR_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_HOST_CLEAR_TIMER_MASK  0x20000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TIMER_SHIFT 29
+#define EUR_CR_EVENT_HOST_CLEAR_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_HOST_CLEAR_TWOD_COMPLETE_MASK 0x08000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TWOD_COMPLETE_SHIFT 27
+#define EUR_CR_EVENT_HOST_CLEAR_MADD_CACHE_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_HOST_CLEAR_MADD_CACHE_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_INV_MASK 0x00100000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_INV_SHIFT 20
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_HALT_MASK 0x00020000U
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_HALT_SHIFT 17
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_VISIBILITY_FAIL_MASK 0x00010000U
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_VISIBILITY_FAIL_SHIFT 16
+#define EUR_CR_EVENT_HOST_CLEAR_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_HOST_CLEAR_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_MASK 0x00004000U
+#define EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_SHIFT 14
+#define EUR_CR_EVENT_HOST_CLEAR_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_HOST_CLEAR_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_CLEAR_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_PDS_EXEC_BASE                0x0AB8
+#define EUR_CR_PDS_EXEC_BASE_ADDR_MASK      0xFFF00000U
+#define EUR_CR_PDS_EXEC_BASE_ADDR_SHIFT     20
+#define EUR_CR_EVENT_KICKER                 0x0AC4
+#define EUR_CR_EVENT_KICKER_ADDRESS_MASK    0xFFFFFFF0U
+#define EUR_CR_EVENT_KICKER_ADDRESS_SHIFT   4
+#define EUR_CR_EVENT_KICK                   0x0AC8
+#define EUR_CR_EVENT_KICK_NOW_MASK          0x00000001U
+#define EUR_CR_EVENT_KICK_NOW_SHIFT         0
+#define EUR_CR_EVENT_TIMER                  0x0ACC
+#define EUR_CR_EVENT_TIMER_ENABLE_MASK      0x01000000U
+#define EUR_CR_EVENT_TIMER_ENABLE_SHIFT     24
+#define EUR_CR_EVENT_TIMER_VALUE_MASK       0x00FFFFFFU
+#define EUR_CR_EVENT_TIMER_VALUE_SHIFT      0
+#define EUR_CR_PDS_INV0                     0x0AD0
+#define EUR_CR_PDS_INV0_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV0_DSC_SHIFT           0
+#define EUR_CR_PDS_INV1                     0x0AD4
+#define EUR_CR_PDS_INV1_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV1_DSC_SHIFT           0
+#define EUR_CR_PDS_INV2                     0x0AD8
+#define EUR_CR_PDS_INV2_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV2_DSC_SHIFT           0
+#define EUR_CR_PDS_INV3                     0x0ADC
+#define EUR_CR_PDS_INV3_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV3_DSC_SHIFT           0
+#define EUR_CR_PDS_INV_CSC                  0x0AE0
+#define EUR_CR_PDS_INV_CSC_KICK_MASK        0x00000001U
+#define EUR_CR_PDS_INV_CSC_KICK_SHIFT       0
+#define EUR_CR_PDS_PC_BASE                  0x0B2C
+#define EUR_CR_PDS_PC_BASE_ADDRESS_MASK     0x3FFFFFFFU
+#define EUR_CR_PDS_PC_BASE_ADDRESS_SHIFT    0
+#define EUR_CR_BIF_CTRL                     0x0C00
+#define EUR_CR_BIF_CTRL_NOREORDER_MASK      0x00000001U
+#define EUR_CR_BIF_CTRL_NOREORDER_SHIFT     0
+#define EUR_CR_BIF_CTRL_PAUSE_MASK          0x00000002U
+#define EUR_CR_BIF_CTRL_PAUSE_SHIFT         1
+#define EUR_CR_BIF_CTRL_FLUSH_MASK          0x00000004U
+#define EUR_CR_BIF_CTRL_FLUSH_SHIFT         2
+#define EUR_CR_BIF_CTRL_INVALDC_MASK        0x00000008U
+#define EUR_CR_BIF_CTRL_INVALDC_SHIFT       3
+#define EUR_CR_BIF_CTRL_CLEAR_FAULT_MASK    0x00000010U
+#define EUR_CR_BIF_CTRL_CLEAR_FAULT_SHIFT   4
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_CACHE_MASK 0x00000100U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_CACHE_SHIFT 8
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_VDM_MASK 0x00000200U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_VDM_SHIFT 9
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TE_MASK  0x00000400U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TE_SHIFT 10
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TWOD_MASK 0x00000800U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TWOD_SHIFT 11
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PBE_MASK 0x00001000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PBE_SHIFT 12
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TSPP_MASK 0x00002000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TSPP_SHIFT 13
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_ISP_MASK 0x00004000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_ISP_SHIFT 14
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_USE_MASK 0x00008000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_USE_SHIFT 15
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_HOST_MASK 0x00010000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_HOST_SHIFT 16
+#define EUR_CR_BIF_INT_STAT                 0x0C04
+#define EUR_CR_BIF_INT_STAT_FAULT_MASK      0x00003FFFU
+#define EUR_CR_BIF_INT_STAT_FAULT_SHIFT     0
+#define EUR_CR_BIF_INT_STAT_PF_N_RW_MASK    0x00004000U
+#define EUR_CR_BIF_INT_STAT_PF_N_RW_SHIFT   14
+#define EUR_CR_BIF_INT_STAT_FLUSH_COMPLETE_MASK 0x00008000U
+#define EUR_CR_BIF_INT_STAT_FLUSH_COMPLETE_SHIFT 15
+#define EUR_CR_BIF_FAULT                    0x0C08
+#define EUR_CR_BIF_FAULT_ADDR_MASK          0xFFFFF000U
+#define EUR_CR_BIF_FAULT_ADDR_SHIFT         12
+#define EUR_CR_BIF_TILE0                    0x0C0C
+#define EUR_CR_BIF_TILE0_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE0_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE0_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE0_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE0_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE0_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE1                    0x0C10
+#define EUR_CR_BIF_TILE1_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE1_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE1_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE1_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE1_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE1_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE2                    0x0C14
+#define EUR_CR_BIF_TILE2_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE2_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE2_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE2_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE2_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE2_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE3                    0x0C18
+#define EUR_CR_BIF_TILE3_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE3_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE3_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE3_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE3_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE3_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE4                    0x0C1C
+#define EUR_CR_BIF_TILE4_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE4_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE4_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE4_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE4_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE4_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE5                    0x0C20
+#define EUR_CR_BIF_TILE5_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE5_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE5_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE5_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE5_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE5_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE6                    0x0C24
+#define EUR_CR_BIF_TILE6_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE6_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE6_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE6_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE6_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE6_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE7                    0x0C28
+#define EUR_CR_BIF_TILE7_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE7_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE7_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE7_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE7_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE7_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE8                    0x0C2C
+#define EUR_CR_BIF_TILE8_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE8_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE8_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE8_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE8_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE8_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE9                    0x0C30
+#define EUR_CR_BIF_TILE9_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE9_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE9_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE9_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE9_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE9_CFG_SHIFT          24
+#define EUR_CR_BIF_DIR_LIST_BASE1           0x0C38
+#define EUR_CR_BIF_DIR_LIST_BASE1_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE1_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE2           0x0C3C
+#define EUR_CR_BIF_DIR_LIST_BASE2_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE2_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE3           0x0C40
+#define EUR_CR_BIF_DIR_LIST_BASE3_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE3_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE4           0x0C44
+#define EUR_CR_BIF_DIR_LIST_BASE4_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE4_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE5           0x0C48
+#define EUR_CR_BIF_DIR_LIST_BASE5_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE5_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE6           0x0C4C
+#define EUR_CR_BIF_DIR_LIST_BASE6_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE6_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE7           0x0C50
+#define EUR_CR_BIF_DIR_LIST_BASE7_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE7_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE8           0x0C54
+#define EUR_CR_BIF_DIR_LIST_BASE8_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE8_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE9           0x0C58
+#define EUR_CR_BIF_DIR_LIST_BASE9_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE9_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE10          0x0C5C
+#define EUR_CR_BIF_DIR_LIST_BASE10_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE10_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE11          0x0C60
+#define EUR_CR_BIF_DIR_LIST_BASE11_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE11_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE12          0x0C64
+#define EUR_CR_BIF_DIR_LIST_BASE12_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE12_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE13          0x0C68
+#define EUR_CR_BIF_DIR_LIST_BASE13_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE13_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE14          0x0C6C
+#define EUR_CR_BIF_DIR_LIST_BASE14_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE14_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE15          0x0C70
+#define EUR_CR_BIF_DIR_LIST_BASE15_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE15_ADDR_SHIFT 12
+#define EUR_CR_BIF_BANK_SET                 0x0C74
+#define EUR_CR_BIF_BANK_SET_SELECT_MASK     0x000003FFU
+#define EUR_CR_BIF_BANK_SET_SELECT_SHIFT    0
+#define EUR_CR_BIF_BANK0                    0x0C78
+#define EUR_CR_BIF_BANK0_INDEX_EDM_MASK     0x0000000FU
+#define EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT    0
+#define EUR_CR_BIF_BANK0_INDEX_TA_MASK      0x000000F0U
+#define EUR_CR_BIF_BANK0_INDEX_TA_SHIFT     4
+#define EUR_CR_BIF_BANK0_INDEX_HOST_MASK    0x00000F00U
+#define EUR_CR_BIF_BANK0_INDEX_HOST_SHIFT   8
+#define EUR_CR_BIF_BANK0_INDEX_3D_MASK      0x0000F000U
+#define EUR_CR_BIF_BANK0_INDEX_3D_SHIFT     12
+#define EUR_CR_BIF_BANK0_INDEX_2D_MASK      0x000F0000U
+#define EUR_CR_BIF_BANK0_INDEX_2D_SHIFT     16
+#define EUR_CR_BIF_BANK1                    0x0C7C
+#define EUR_CR_BIF_BANK1_INDEX_EDM_MASK     0x0000000FU
+#define EUR_CR_BIF_BANK1_INDEX_EDM_SHIFT    0
+#define EUR_CR_BIF_BANK1_INDEX_TA_MASK      0x000000F0U
+#define EUR_CR_BIF_BANK1_INDEX_TA_SHIFT     4
+#define EUR_CR_BIF_BANK1_INDEX_HOST_MASK    0x00000F00U
+#define EUR_CR_BIF_BANK1_INDEX_HOST_SHIFT   8
+#define EUR_CR_BIF_BANK1_INDEX_3D_MASK      0x0000F000U
+#define EUR_CR_BIF_BANK1_INDEX_3D_SHIFT     12
+#define EUR_CR_BIF_BANK1_INDEX_2D_MASK      0x000F0000U
+#define EUR_CR_BIF_BANK1_INDEX_2D_SHIFT     16
+#define EUR_CR_BIF_ADT_TTE                  0x0C80
+#define EUR_CR_BIF_ADT_TTE_VALUE_MASK       0x000000FFU
+#define EUR_CR_BIF_ADT_TTE_VALUE_SHIFT      0
+#define EUR_CR_BIF_DIR_LIST_BASE0           0x0C84
+#define EUR_CR_BIF_DIR_LIST_BASE0_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE0_ADDR_SHIFT 12
+#define EUR_CR_BIF_TWOD_REQ_BASE            0x0C88
+#define EUR_CR_BIF_TWOD_REQ_BASE_ADDR_MASK  0xFFF00000U
+#define EUR_CR_BIF_TWOD_REQ_BASE_ADDR_SHIFT 20
+#define EUR_CR_BIF_TA_REQ_BASE              0x0C90
+#define EUR_CR_BIF_TA_REQ_BASE_ADDR_MASK    0xFFF00000U
+#define EUR_CR_BIF_TA_REQ_BASE_ADDR_SHIFT   20
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1      0x0C94
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_MMU_MASK 0x00000007U
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_MMU_SHIFT 0
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_CACHE_MASK 0x00000038U
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_CACHE_SHIFT 3
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_VDM_MASK 0x000001C0U
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_VDM_SHIFT 6
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_TE_MASK 0x00000E00U
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_TE_SHIFT 9
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_TWOD_MASK 0x00007000U
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_TWOD_SHIFT 12
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_PBE_MASK 0x00038000U
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_1_PBE_SHIFT 15
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_2      0x0C98
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_2_HOST_MASK 0x00000007U
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_2_HOST_SHIFT 0
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_2_USE_MASK 0x00000038U
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_2_USE_SHIFT 3
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_2_ISP_MASK 0x000001C0U
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_2_ISP_SHIFT 6
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_2_TSPP_MASK 0x00000E00U
+#define EUR_CR_BIF_MEM_ARB_FLOWRATES_2_TSPP_SHIFT 9
+#define EUR_CR_BIF_MEM_ARB_CONFIG           0x0CA0
+#define EUR_CR_BIF_MEM_ARB_CONFIG_PAGE_SIZE_MASK 0x0000000FU
+#define EUR_CR_BIF_MEM_ARB_CONFIG_PAGE_SIZE_SHIFT 0
+#define EUR_CR_BIF_MEM_ARB_CONFIG_BEST_CNT_MASK 0x00000FF0U
+#define EUR_CR_BIF_MEM_ARB_CONFIG_BEST_CNT_SHIFT 4
+#define EUR_CR_BIF_MEM_ARB_CONFIG_TTE_THRESH_MASK 0x00FFF000U
+#define EUR_CR_BIF_MEM_ARB_CONFIG_TTE_THRESH_SHIFT 12
+#define EUR_CR_BIF_MEM_REQ_STAT             0x0CA8
+#define EUR_CR_BIF_MEM_REQ_STAT_READS_MASK  0x000000FFU
+#define EUR_CR_BIF_MEM_REQ_STAT_READS_SHIFT 0
+#define EUR_CR_BIF_3D_REQ_BASE              0x0CAC
+#define EUR_CR_BIF_3D_REQ_BASE_ADDR_MASK    0xFFF00000U
+#define EUR_CR_BIF_3D_REQ_BASE_ADDR_SHIFT   20
+#define EUR_CR_BIF_ZLS_REQ_BASE             0x0CB0
+#define EUR_CR_BIF_ZLS_REQ_BASE_ADDR_MASK   0xFFF00000U
+#define EUR_CR_BIF_ZLS_REQ_BASE_ADDR_SHIFT  20
+#define EUR_CR_BIF_BANK_STATUS              0x0CB4
+#define EUR_CR_BIF_BANK_STATUS_3D_CURRENT_BANK_MASK 0x00000001U
+#define EUR_CR_BIF_BANK_STATUS_3D_CURRENT_BANK_SHIFT 0
+#define EUR_CR_BIF_BANK_STATUS_TA_CURRENT_BANK_MASK 0x00000002U
+#define EUR_CR_BIF_BANK_STATUS_TA_CURRENT_BANK_SHIFT 1
+#define EUR_CR_2D_BLIT_STATUS               0x0E04
+#define EUR_CR_2D_BLIT_STATUS_COMPLETE_MASK 0x00FFFFFFU
+#define EUR_CR_2D_BLIT_STATUS_COMPLETE_SHIFT 0
+#define EUR_CR_2D_BLIT_STATUS_BUSY_MASK     0x01000000U
+#define EUR_CR_2D_BLIT_STATUS_BUSY_SHIFT    24
+#define EUR_CR_2D_VIRTUAL_FIFO_0            0x0E10
+#define EUR_CR_2D_VIRTUAL_FIFO_0_ENABLE_MASK 0x00000001U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_ENABLE_SHIFT 0
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MASK 0x0000000EU
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_SHIFT 1
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_DIV_MASK 0x00000FF0U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_DIV_SHIFT 4
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MUL_MASK 0x0000F000U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MUL_SHIFT 12
+#define EUR_CR_2D_VIRTUAL_FIFO_1            0x0E14
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_ACC_MASK 0x00000FFFU
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_ACC_SHIFT 0
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MAX_ACC_MASK 0x00FFF000U
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MAX_ACC_SHIFT 12
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_METRIC_MASK 0xFF000000U
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_METRIC_SHIFT 24
+#define EUR_CR_2D_SOCIF                     0x0E18
+#define EUR_CR_2D_SOCIF_FREESPACE_MASK      0x000000FFU
+#define EUR_CR_2D_SOCIF_FREESPACE_SHIFT     0
+#define EUR_CR_2D_ALPHA                     0x0E1C
+#define EUR_CR_2D_ALPHA_COMPONENT_ONE_MASK  0x0000FF00U
+#define EUR_CR_2D_ALPHA_COMPONENT_ONE_SHIFT 8
+#define EUR_CR_2D_ALPHA_COMPONENT_ZERO_MASK 0x000000FFU
+#define EUR_CR_2D_ALPHA_COMPONENT_ZERO_SHIFT 0
+#define EUR_CR_USE_CODE_BASE(X)     (0x0A0C + (4 * (X)))
+#define EUR_CR_USE_CODE_BASE_ADDR_MASK      0x01FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_SHIFT     0
+#define EUR_CR_USE_CODE_BASE_DM_MASK        0x06000000U
+#define EUR_CR_USE_CODE_BASE_DM_SHIFT       25
+#define EUR_CR_USE_CODE_BASE_SIZE_UINT32 16
+#define EUR_CR_USE_CODE_BASE_NUM_ENTRIES 16
+
+#endif 
+
diff --git a/drivers/gpu/pvr/sgx543_v1.164defs.h b/drivers/gpu/pvr/sgx543_v1.164defs.h
new file mode 100644
index 00000000000..e25cc5cc42c
--- /dev/null
+++ b/drivers/gpu/pvr/sgx543_v1.164defs.h
@@ -0,0 +1,1284 @@
+/**********************************************************************
+ *
+ * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
+ * See the GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ * 
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Contact Information:
+ * Imagination Technologies Ltd. <gpl-support@imgtec.com>
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
+ *
+ ******************************************************************************/
+
+#ifndef _SGX543DEFS_KM_H_
+#define _SGX543DEFS_KM_H_
+
+#define EUR_CR_CLKGATECTL                   0x0000
+#define EUR_CR_CLKGATECTL_ISP_CLKG_MASK     0x00000003U
+#define EUR_CR_CLKGATECTL_ISP_CLKG_SHIFT    0
+#define EUR_CR_CLKGATECTL_ISP_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_ISP2_CLKG_MASK    0x0000000CU
+#define EUR_CR_CLKGATECTL_ISP2_CLKG_SHIFT   2
+#define EUR_CR_CLKGATECTL_ISP2_CLKG_SIGNED  0
+#define EUR_CR_CLKGATECTL_TSP_CLKG_MASK     0x00000030U
+#define EUR_CR_CLKGATECTL_TSP_CLKG_SHIFT    4
+#define EUR_CR_CLKGATECTL_TSP_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_TE_CLKG_MASK      0x000000C0U
+#define EUR_CR_CLKGATECTL_TE_CLKG_SHIFT     6
+#define EUR_CR_CLKGATECTL_TE_CLKG_SIGNED    0
+#define EUR_CR_CLKGATECTL_MTE_CLKG_MASK     0x00000300U
+#define EUR_CR_CLKGATECTL_MTE_CLKG_SHIFT    8
+#define EUR_CR_CLKGATECTL_MTE_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_DPM_CLKG_MASK     0x00000C00U
+#define EUR_CR_CLKGATECTL_DPM_CLKG_SHIFT    10
+#define EUR_CR_CLKGATECTL_DPM_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_VDM_CLKG_MASK     0x00003000U
+#define EUR_CR_CLKGATECTL_VDM_CLKG_SHIFT    12
+#define EUR_CR_CLKGATECTL_VDM_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_PDS_CLKG_MASK     0x0000C000U
+#define EUR_CR_CLKGATECTL_PDS_CLKG_SHIFT    14
+#define EUR_CR_CLKGATECTL_PDS_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_IDXFIFO_CLKG_MASK 0x00030000U
+#define EUR_CR_CLKGATECTL_IDXFIFO_CLKG_SHIFT 16
+#define EUR_CR_CLKGATECTL_IDXFIFO_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL_TA_CLKG_MASK      0x000C0000U
+#define EUR_CR_CLKGATECTL_TA_CLKG_SHIFT     18
+#define EUR_CR_CLKGATECTL_TA_CLKG_SIGNED    0
+#define EUR_CR_CLKGATECTL_BIF_CORE_CLKG_MASK 0x00300000U
+#define EUR_CR_CLKGATECTL_BIF_CORE_CLKG_SHIFT 20
+#define EUR_CR_CLKGATECTL_BIF_CORE_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL_AUTO_MAN_REG_MASK 0x01000000U
+#define EUR_CR_CLKGATECTL_AUTO_MAN_REG_SHIFT 24
+#define EUR_CR_CLKGATECTL_AUTO_MAN_REG_SIGNED 0
+#define EUR_CR_CLKGATECTL_SYSTEM_CLKG_MASK  0x10000000U
+#define EUR_CR_CLKGATECTL_SYSTEM_CLKG_SHIFT 28
+#define EUR_CR_CLKGATECTL_SYSTEM_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2                  0x0004
+#define EUR_CR_CLKGATECTL2_PBE_CLKG_MASK    0x00000003U
+#define EUR_CR_CLKGATECTL2_PBE_CLKG_SHIFT   0
+#define EUR_CR_CLKGATECTL2_PBE_CLKG_SIGNED  0
+#define EUR_CR_CLKGATECTL2_TCU_L2_CLKG_MASK 0x0000000CU
+#define EUR_CR_CLKGATECTL2_TCU_L2_CLKG_SHIFT 2
+#define EUR_CR_CLKGATECTL2_TCU_L2_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_UCACHEL2_CLKG_MASK 0x00000030U
+#define EUR_CR_CLKGATECTL2_UCACHEL2_CLKG_SHIFT 4
+#define EUR_CR_CLKGATECTL2_UCACHEL2_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_USE0_CLKG_MASK   0x000000C0U
+#define EUR_CR_CLKGATECTL2_USE0_CLKG_SHIFT  6
+#define EUR_CR_CLKGATECTL2_USE0_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_ITR0_CLKG_MASK   0x00000300U
+#define EUR_CR_CLKGATECTL2_ITR0_CLKG_SHIFT  8
+#define EUR_CR_CLKGATECTL2_ITR0_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_TEX0_CLKG_MASK   0x00000C00U
+#define EUR_CR_CLKGATECTL2_TEX0_CLKG_SHIFT  10
+#define EUR_CR_CLKGATECTL2_TEX0_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_USE1_CLKG_MASK   0x0000C000U
+#define EUR_CR_CLKGATECTL2_USE1_CLKG_SHIFT  14
+#define EUR_CR_CLKGATECTL2_USE1_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_ITR1_CLKG_MASK   0x00030000U
+#define EUR_CR_CLKGATECTL2_ITR1_CLKG_SHIFT  16
+#define EUR_CR_CLKGATECTL2_ITR1_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_TEX1_CLKG_MASK   0x000C0000U
+#define EUR_CR_CLKGATECTL2_TEX1_CLKG_SHIFT  18
+#define EUR_CR_CLKGATECTL2_TEX1_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_DCU_L2_CLKG_MASK 0x00C00000U
+#define EUR_CR_CLKGATECTL2_DCU_L2_CLKG_SHIFT 22
+#define EUR_CR_CLKGATECTL2_DCU_L2_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_DCU1_L0L1_CLKG_MASK 0x03000000U
+#define EUR_CR_CLKGATECTL2_DCU1_L0L1_CLKG_SHIFT 24
+#define EUR_CR_CLKGATECTL2_DCU1_L0L1_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_DCU0_L0L1_CLKG_MASK 0x0C000000U
+#define EUR_CR_CLKGATECTL2_DCU0_L0L1_CLKG_SHIFT 26
+#define EUR_CR_CLKGATECTL2_DCU0_L0L1_CLKG_SIGNED 0
+#define EUR_CR_CLKGATESTATUS                0x0008
+#define EUR_CR_CLKGATESTATUS_ISP_CLKS_MASK  0x00000001U
+#define EUR_CR_CLKGATESTATUS_ISP_CLKS_SHIFT 0
+#define EUR_CR_CLKGATESTATUS_ISP_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_ISP2_CLKS_MASK 0x00000002U
+#define EUR_CR_CLKGATESTATUS_ISP2_CLKS_SHIFT 1
+#define EUR_CR_CLKGATESTATUS_ISP2_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TSP_CLKS_MASK  0x00000004U
+#define EUR_CR_CLKGATESTATUS_TSP_CLKS_SHIFT 2
+#define EUR_CR_CLKGATESTATUS_TSP_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TE_CLKS_MASK   0x00000008U
+#define EUR_CR_CLKGATESTATUS_TE_CLKS_SHIFT  3
+#define EUR_CR_CLKGATESTATUS_TE_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_MTE_CLKS_MASK  0x00000010U
+#define EUR_CR_CLKGATESTATUS_MTE_CLKS_SHIFT 4
+#define EUR_CR_CLKGATESTATUS_MTE_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_DPM_CLKS_MASK  0x00000020U
+#define EUR_CR_CLKGATESTATUS_DPM_CLKS_SHIFT 5
+#define EUR_CR_CLKGATESTATUS_DPM_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_VDM_CLKS_MASK  0x00000040U
+#define EUR_CR_CLKGATESTATUS_VDM_CLKS_SHIFT 6
+#define EUR_CR_CLKGATESTATUS_VDM_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_PDS_CLKS_MASK  0x00000080U
+#define EUR_CR_CLKGATESTATUS_PDS_CLKS_SHIFT 7
+#define EUR_CR_CLKGATESTATUS_PDS_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_PBE_CLKS_MASK  0x00000100U
+#define EUR_CR_CLKGATESTATUS_PBE_CLKS_SHIFT 8
+#define EUR_CR_CLKGATESTATUS_PBE_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TCU_L2_CLKS_MASK 0x00000200U
+#define EUR_CR_CLKGATESTATUS_TCU_L2_CLKS_SHIFT 9
+#define EUR_CR_CLKGATESTATUS_TCU_L2_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_UCACHEL2_CLKS_MASK 0x00000400U
+#define EUR_CR_CLKGATESTATUS_UCACHEL2_CLKS_SHIFT 10
+#define EUR_CR_CLKGATESTATUS_UCACHEL2_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_USE0_CLKS_MASK 0x00000800U
+#define EUR_CR_CLKGATESTATUS_USE0_CLKS_SHIFT 11
+#define EUR_CR_CLKGATESTATUS_USE0_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_ITR0_CLKS_MASK 0x00001000U
+#define EUR_CR_CLKGATESTATUS_ITR0_CLKS_SHIFT 12
+#define EUR_CR_CLKGATESTATUS_ITR0_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TEX0_CLKS_MASK 0x00002000U
+#define EUR_CR_CLKGATESTATUS_TEX0_CLKS_SHIFT 13
+#define EUR_CR_CLKGATESTATUS_TEX0_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_USE1_CLKS_MASK 0x00008000U
+#define EUR_CR_CLKGATESTATUS_USE1_CLKS_SHIFT 15
+#define EUR_CR_CLKGATESTATUS_USE1_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_ITR1_CLKS_MASK 0x00010000U
+#define EUR_CR_CLKGATESTATUS_ITR1_CLKS_SHIFT 16
+#define EUR_CR_CLKGATESTATUS_ITR1_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TEX1_CLKS_MASK 0x00020000U
+#define EUR_CR_CLKGATESTATUS_TEX1_CLKS_SHIFT 17
+#define EUR_CR_CLKGATESTATUS_TEX1_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_IDXFIFO_CLKS_MASK 0x00080000U
+#define EUR_CR_CLKGATESTATUS_IDXFIFO_CLKS_SHIFT 19
+#define EUR_CR_CLKGATESTATUS_IDXFIFO_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TA_CLKS_MASK   0x00100000U
+#define EUR_CR_CLKGATESTATUS_TA_CLKS_SHIFT  20
+#define EUR_CR_CLKGATESTATUS_TA_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_DCU_L2_CLKS_MASK 0x00200000U
+#define EUR_CR_CLKGATESTATUS_DCU_L2_CLKS_SHIFT 21
+#define EUR_CR_CLKGATESTATUS_DCU_L2_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_DCU0_L0L1_CLKS_MASK 0x00400000U
+#define EUR_CR_CLKGATESTATUS_DCU0_L0L1_CLKS_SHIFT 22
+#define EUR_CR_CLKGATESTATUS_DCU0_L0L1_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_DCU1_L0L1_CLKS_MASK 0x00800000U
+#define EUR_CR_CLKGATESTATUS_DCU1_L0L1_CLKS_SHIFT 23
+#define EUR_CR_CLKGATESTATUS_DCU1_L0L1_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_BIF_CORE_CLKS_MASK 0x01000000U
+#define EUR_CR_CLKGATESTATUS_BIF_CORE_CLKS_SHIFT 24
+#define EUR_CR_CLKGATESTATUS_BIF_CORE_CLKS_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR                0x000C
+#define EUR_CR_CLKGATECTLOVR_ISP_CLKO_MASK  0x00000003U
+#define EUR_CR_CLKGATECTLOVR_ISP_CLKO_SHIFT 0
+#define EUR_CR_CLKGATECTLOVR_ISP_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_ISP2_CLKO_MASK 0x0000000CU
+#define EUR_CR_CLKGATECTLOVR_ISP2_CLKO_SHIFT 2
+#define EUR_CR_CLKGATECTLOVR_ISP2_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_TSP_CLKO_MASK  0x00000030U
+#define EUR_CR_CLKGATECTLOVR_TSP_CLKO_SHIFT 4
+#define EUR_CR_CLKGATECTLOVR_TSP_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_TE_CLKO_MASK   0x000000C0U
+#define EUR_CR_CLKGATECTLOVR_TE_CLKO_SHIFT  6
+#define EUR_CR_CLKGATECTLOVR_TE_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_MTE_CLKO_MASK  0x00000300U
+#define EUR_CR_CLKGATECTLOVR_MTE_CLKO_SHIFT 8
+#define EUR_CR_CLKGATECTLOVR_MTE_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_DPM_CLKO_MASK  0x00000C00U
+#define EUR_CR_CLKGATECTLOVR_DPM_CLKO_SHIFT 10
+#define EUR_CR_CLKGATECTLOVR_DPM_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_VDM_CLKO_MASK  0x00003000U
+#define EUR_CR_CLKGATECTLOVR_VDM_CLKO_SHIFT 12
+#define EUR_CR_CLKGATECTLOVR_VDM_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_PDS_CLKO_MASK  0x0000C000U
+#define EUR_CR_CLKGATECTLOVR_PDS_CLKO_SHIFT 14
+#define EUR_CR_CLKGATECTLOVR_PDS_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_IDXFIFO_CLKO_MASK 0x00030000U
+#define EUR_CR_CLKGATECTLOVR_IDXFIFO_CLKO_SHIFT 16
+#define EUR_CR_CLKGATECTLOVR_IDXFIFO_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_TA_CLKO_MASK   0x000C0000U
+#define EUR_CR_CLKGATECTLOVR_TA_CLKO_SHIFT  18
+#define EUR_CR_CLKGATECTLOVR_TA_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_BIF_CORE_CLKO_MASK 0x00300000U
+#define EUR_CR_CLKGATECTLOVR_BIF_CORE_CLKO_SHIFT 20
+#define EUR_CR_CLKGATECTLOVR_BIF_CORE_CLKO_SIGNED 0
+#define EUR_CR_POWER                        0x001C
+#define EUR_CR_POWER_PIPE_DISABLE_MASK      0x00000001U
+#define EUR_CR_POWER_PIPE_DISABLE_SHIFT     0
+#define EUR_CR_POWER_PIPE_DISABLE_SIGNED    0
+#define EUR_CR_CORE_ID                      0x0020
+#define EUR_CR_CORE_ID_CONFIG_MULTI_MASK    0x00000001U
+#define EUR_CR_CORE_ID_CONFIG_MULTI_SHIFT   0
+#define EUR_CR_CORE_ID_CONFIG_MULTI_SIGNED  0
+#define EUR_CR_CORE_ID_CONFIG_BASE_MASK     0x00000002U
+#define EUR_CR_CORE_ID_CONFIG_BASE_SHIFT    1
+#define EUR_CR_CORE_ID_CONFIG_BASE_SIGNED   0
+#define EUR_CR_CORE_ID_CONFIG_MASK          0x000000FCU
+#define EUR_CR_CORE_ID_CONFIG_SHIFT         2
+#define EUR_CR_CORE_ID_CONFIG_SIGNED        0
+#define EUR_CR_CORE_ID_CONFIG_CORES_MASK    0x00000F00U
+#define EUR_CR_CORE_ID_CONFIG_CORES_SHIFT   8
+#define EUR_CR_CORE_ID_CONFIG_CORES_SIGNED  0
+#define EUR_CR_CORE_ID_CONFIG_SLC_MASK      0x0000F000U
+#define EUR_CR_CORE_ID_CONFIG_SLC_SHIFT     12
+#define EUR_CR_CORE_ID_CONFIG_SLC_SIGNED    0
+#define EUR_CR_CORE_ID_ID_MASK              0xFFFF0000U
+#define EUR_CR_CORE_ID_ID_SHIFT             16
+#define EUR_CR_CORE_ID_ID_SIGNED            0
+#define EUR_CR_CORE_REVISION                0x0024
+#define EUR_CR_CORE_REVISION_MAINTENANCE_MASK 0x000000FFU
+#define EUR_CR_CORE_REVISION_MAINTENANCE_SHIFT 0
+#define EUR_CR_CORE_REVISION_MAINTENANCE_SIGNED 0
+#define EUR_CR_CORE_REVISION_MINOR_MASK     0x0000FF00U
+#define EUR_CR_CORE_REVISION_MINOR_SHIFT    8
+#define EUR_CR_CORE_REVISION_MINOR_SIGNED   0
+#define EUR_CR_CORE_REVISION_MAJOR_MASK     0x00FF0000U
+#define EUR_CR_CORE_REVISION_MAJOR_SHIFT    16
+#define EUR_CR_CORE_REVISION_MAJOR_SIGNED   0
+#define EUR_CR_CORE_REVISION_DESIGNER_MASK  0xFF000000U
+#define EUR_CR_CORE_REVISION_DESIGNER_SHIFT 24
+#define EUR_CR_CORE_REVISION_DESIGNER_SIGNED 0
+#define EUR_CR_DESIGNER_REV_FIELD1          0x0028
+#define EUR_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_MASK 0xFFFFFFFFU
+#define EUR_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_SHIFT 0
+#define EUR_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_SIGNED 0
+#define EUR_CR_DESIGNER_REV_FIELD2          0x002C
+#define EUR_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_MASK 0xFFFFFFFFU
+#define EUR_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_SHIFT 0
+#define EUR_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_SIGNED 0
+#define EUR_CR_SOFT_RESET                   0x0080
+#define EUR_CR_SOFT_RESET_BIF_RESET_MASK    0x00000001U
+#define EUR_CR_SOFT_RESET_BIF_RESET_SHIFT   0
+#define EUR_CR_SOFT_RESET_BIF_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_VDM_RESET_MASK    0x00000002U
+#define EUR_CR_SOFT_RESET_VDM_RESET_SHIFT   1
+#define EUR_CR_SOFT_RESET_VDM_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_DPM_RESET_MASK    0x00000004U
+#define EUR_CR_SOFT_RESET_DPM_RESET_SHIFT   2
+#define EUR_CR_SOFT_RESET_DPM_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_TE_RESET_MASK     0x00000008U
+#define EUR_CR_SOFT_RESET_TE_RESET_SHIFT    3
+#define EUR_CR_SOFT_RESET_TE_RESET_SIGNED   0
+#define EUR_CR_SOFT_RESET_MTE_RESET_MASK    0x00000010U
+#define EUR_CR_SOFT_RESET_MTE_RESET_SHIFT   4
+#define EUR_CR_SOFT_RESET_MTE_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_ISP_RESET_MASK    0x00000020U
+#define EUR_CR_SOFT_RESET_ISP_RESET_SHIFT   5
+#define EUR_CR_SOFT_RESET_ISP_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_ISP2_RESET_MASK   0x00000040U
+#define EUR_CR_SOFT_RESET_ISP2_RESET_SHIFT  6
+#define EUR_CR_SOFT_RESET_ISP2_RESET_SIGNED 0
+#define EUR_CR_SOFT_RESET_TSP_RESET_MASK    0x00000080U
+#define EUR_CR_SOFT_RESET_TSP_RESET_SHIFT   7
+#define EUR_CR_SOFT_RESET_TSP_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_PDS_RESET_MASK    0x00000100U
+#define EUR_CR_SOFT_RESET_PDS_RESET_SHIFT   8
+#define EUR_CR_SOFT_RESET_PDS_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_PBE_RESET_MASK    0x00000200U
+#define EUR_CR_SOFT_RESET_PBE_RESET_SHIFT   9
+#define EUR_CR_SOFT_RESET_PBE_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_TCU_L2_RESET_MASK 0x00000400U
+#define EUR_CR_SOFT_RESET_TCU_L2_RESET_SHIFT 10
+#define EUR_CR_SOFT_RESET_TCU_L2_RESET_SIGNED 0
+#define EUR_CR_SOFT_RESET_UCACHEL2_RESET_MASK 0x00000800U
+#define EUR_CR_SOFT_RESET_UCACHEL2_RESET_SHIFT 11
+#define EUR_CR_SOFT_RESET_UCACHEL2_RESET_SIGNED 0
+#define EUR_CR_SOFT_RESET_ITR_RESET_MASK    0x00002000U
+#define EUR_CR_SOFT_RESET_ITR_RESET_SHIFT   13
+#define EUR_CR_SOFT_RESET_ITR_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_TEX_RESET_MASK    0x00004000U
+#define EUR_CR_SOFT_RESET_TEX_RESET_SHIFT   14
+#define EUR_CR_SOFT_RESET_TEX_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_USE_RESET_MASK    0x00008000U
+#define EUR_CR_SOFT_RESET_USE_RESET_SHIFT   15
+#define EUR_CR_SOFT_RESET_USE_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_IDXFIFO_RESET_MASK 0x00010000U
+#define EUR_CR_SOFT_RESET_IDXFIFO_RESET_SHIFT 16
+#define EUR_CR_SOFT_RESET_IDXFIFO_RESET_SIGNED 0
+#define EUR_CR_SOFT_RESET_TA_RESET_MASK     0x00020000U
+#define EUR_CR_SOFT_RESET_TA_RESET_SHIFT    17
+#define EUR_CR_SOFT_RESET_TA_RESET_SIGNED   0
+#define EUR_CR_SOFT_RESET_DCU_L2_RESET_MASK 0x00040000U
+#define EUR_CR_SOFT_RESET_DCU_L2_RESET_SHIFT 18
+#define EUR_CR_SOFT_RESET_DCU_L2_RESET_SIGNED 0
+#define EUR_CR_SOFT_RESET_DCU_L0L1_RESET_MASK 0x00080000U
+#define EUR_CR_SOFT_RESET_DCU_L0L1_RESET_SHIFT 19
+#define EUR_CR_SOFT_RESET_DCU_L0L1_RESET_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2           0x0110
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_UNTRAPPED_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_UNTRAPPED_SHIFT 11
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_TRAPPED_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_TRAPPED_SHIFT 10
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_CONTEXT_DRAINED_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_CONTEXT_DRAINED_SHIFT 9
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_CONTEXT_DRAINED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_ISP2_ZLS_CSW_FINISHED_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_ENABLE2_ISP2_ZLS_CSW_FINISHED_SHIFT 8
+#define EUR_CR_EVENT_HOST_ENABLE2_ISP2_ZLS_CSW_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_DCU_INVALCOMPLETE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_ENABLE2_DCU_INVALCOMPLETE_SHIFT 7
+#define EUR_CR_EVENT_HOST_ENABLE2_DCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_STATE_FLUSHED_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_STATE_FLUSHED_SHIFT 6
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_STATE_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_TE_RGNHDR_INIT_COMPLETE_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_ENABLE2_TE_RGNHDR_INIT_COMPLETE_SHIFT 5
+#define EUR_CR_EVENT_HOST_ENABLE2_TE_RGNHDR_INIT_COMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_TA_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_TA_SHIFT 4
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_TA_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_3D_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_3D_SHIFT 3
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_3D_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_DL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_DL_SHIFT 2
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_DL_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_3D_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_TA_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2            0x0114
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_UNTRAPPED_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_UNTRAPPED_SHIFT 11
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_TRAPPED_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_TRAPPED_SHIFT 10
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_CONTEXT_DRAINED_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_CONTEXT_DRAINED_SHIFT 9
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_CONTEXT_DRAINED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_ISP2_ZLS_CSW_FINISHED_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_CLEAR2_ISP2_ZLS_CSW_FINISHED_SHIFT 8
+#define EUR_CR_EVENT_HOST_CLEAR2_ISP2_ZLS_CSW_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_DCU_INVALCOMPLETE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_CLEAR2_DCU_INVALCOMPLETE_SHIFT 7
+#define EUR_CR_EVENT_HOST_CLEAR2_DCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_STATE_FLUSHED_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_STATE_FLUSHED_SHIFT 6
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_STATE_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_TE_RGNHDR_INIT_COMPLETE_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_CLEAR2_TE_RGNHDR_INIT_COMPLETE_SHIFT 5
+#define EUR_CR_EVENT_HOST_CLEAR2_TE_RGNHDR_INIT_COMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_TA_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_TA_SHIFT 4
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_TA_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_3D_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_3D_SHIFT 3
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_3D_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_DL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_DL_SHIFT 2
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_DL_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_3D_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_STATUS2                0x0118
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_UNTRAPPED_MASK 0x00000800U
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_UNTRAPPED_SHIFT 11
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_TRAPPED_MASK 0x00000400U
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_TRAPPED_SHIFT 10
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_MTE_CONTEXT_DRAINED_MASK 0x00000200U
+#define EUR_CR_EVENT_STATUS2_MTE_CONTEXT_DRAINED_SHIFT 9
+#define EUR_CR_EVENT_STATUS2_MTE_CONTEXT_DRAINED_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_ISP2_ZLS_CSW_FINISHED_MASK 0x00000100U
+#define EUR_CR_EVENT_STATUS2_ISP2_ZLS_CSW_FINISHED_SHIFT 8
+#define EUR_CR_EVENT_STATUS2_ISP2_ZLS_CSW_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_DCU_INVALCOMPLETE_MASK 0x00000080U
+#define EUR_CR_EVENT_STATUS2_DCU_INVALCOMPLETE_SHIFT 7
+#define EUR_CR_EVENT_STATUS2_DCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_MTE_STATE_FLUSHED_MASK 0x00000040U
+#define EUR_CR_EVENT_STATUS2_MTE_STATE_FLUSHED_SHIFT 6
+#define EUR_CR_EVENT_STATUS2_MTE_STATE_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_TE_RGNHDR_INIT_COMPLETE_MASK 0x00000020U
+#define EUR_CR_EVENT_STATUS2_TE_RGNHDR_INIT_COMPLETE_SHIFT 5
+#define EUR_CR_EVENT_STATUS2_TE_RGNHDR_INIT_COMPLETE_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_TRIG_TA_MASK   0x00000010U
+#define EUR_CR_EVENT_STATUS2_TRIG_TA_SHIFT  4
+#define EUR_CR_EVENT_STATUS2_TRIG_TA_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_TRIG_3D_MASK   0x00000008U
+#define EUR_CR_EVENT_STATUS2_TRIG_3D_SHIFT  3
+#define EUR_CR_EVENT_STATUS2_TRIG_3D_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_TRIG_DL_MASK   0x00000004U
+#define EUR_CR_EVENT_STATUS2_TRIG_DL_SHIFT  2
+#define EUR_CR_EVENT_STATUS2_TRIG_DL_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_STATUS2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_STATUS2_DPM_3D_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_STATUS                 0x012C
+#define EUR_CR_EVENT_STATUS_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_STATUS_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_STATUS_MASTER_INTERRUPT_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TIMER_MASK      0x20000000U
+#define EUR_CR_EVENT_STATUS_TIMER_SHIFT     29
+#define EUR_CR_EVENT_STATUS_TIMER_SIGNED    0
+#define EUR_CR_EVENT_STATUS_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_STATUS_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_STATUS_TA_DPM_FAULT_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TCU_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_STATUS_TCU_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_STATUS_TCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_ZLS_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_STATUS_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_STATUS_DPM_TA_MEM_FREE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_STATUS_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_STATUS_ISP_END_TILE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_STATUS_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_STATUS_DPM_INITEND_SIGNED 0
+#define EUR_CR_EVENT_STATUS_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_STATUS_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_STATUS_OTPM_LOADED_SIGNED 0
+#define EUR_CR_EVENT_STATUS_OTPM_INV_MASK   0x00100000U
+#define EUR_CR_EVENT_STATUS_OTPM_INV_SHIFT  20
+#define EUR_CR_EVENT_STATUS_OTPM_INV_SIGNED 0
+#define EUR_CR_EVENT_STATUS_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_STATUS_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_STATUS_OTPM_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_SIGNED 0
+#define EUR_CR_EVENT_STATUS_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_STATUS_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_STATUS_BREAKPOINT_SIGNED 0
+#define EUR_CR_EVENT_STATUS_SW_EVENT_MASK   0x00004000U
+#define EUR_CR_EVENT_STATUS_SW_EVENT_SHIFT  14
+#define EUR_CR_EVENT_STATUS_SW_EVENT_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_STATUS_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_STATUS_TA_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_STATUS_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_STATUS_TA_TERMINATE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TPC_CLEAR_MASK  0x00000800U
+#define EUR_CR_EVENT_STATUS_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_STATUS_TPC_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TPC_FLUSH_MASK  0x00000400U
+#define EUR_CR_EVENT_STATUS_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_STATUS_TPC_FLUSH_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_STATUS_DPM_STATE_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_STATUS_DPM_STATE_STORE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_STATUS_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_STATUS_DPM_REACHED_MEM_THRESH_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_GBL_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_MT_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_STATUS_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_EVENT_STATUS_DPM_3D_MEM_FREE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE            0x0130
+#define EUR_CR_EVENT_HOST_ENABLE_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_HOST_ENABLE_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_HOST_ENABLE_MASTER_INTERRUPT_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TIMER_MASK 0x20000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TIMER_SHIFT 29
+#define EUR_CR_EVENT_HOST_ENABLE_TIMER_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_HOST_ENABLE_TA_DPM_FAULT_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TCU_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TCU_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_HOST_ENABLE_TCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_ZLS_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_TA_MEM_FREE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_END_TILE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_INITEND_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_LOADED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_INV_MASK 0x00100000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_INV_SHIFT 20
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_INV_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_HOST_ENABLE_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_HOST_ENABLE_PIXELBE_END_RENDER_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_HOST_ENABLE_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_HOST_ENABLE_BREAKPOINT_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_SW_EVENT_MASK 0x00004000U
+#define EUR_CR_EVENT_HOST_ENABLE_SW_EVENT_SHIFT 14
+#define EUR_CR_EVENT_HOST_ENABLE_SW_EVENT_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_HOST_ENABLE_TA_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_HOST_ENABLE_TA_TERMINATE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_CLEAR_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_FLUSH_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_FLUSH_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_STORE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_STORE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_REACHED_MEM_THRESH_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_GBL_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_MT_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_3D_MEM_FREE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR             0x0134
+#define EUR_CR_EVENT_HOST_CLEAR_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_HOST_CLEAR_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_HOST_CLEAR_MASTER_INTERRUPT_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TIMER_MASK  0x20000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TIMER_SHIFT 29
+#define EUR_CR_EVENT_HOST_CLEAR_TIMER_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_HOST_CLEAR_TA_DPM_FAULT_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TCU_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TCU_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_HOST_CLEAR_TCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_ZLS_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_TA_MEM_FREE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_END_TILE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_INITEND_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_INV_MASK 0x00100000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_INV_SHIFT 20
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_INV_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_HOST_CLEAR_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_HOST_CLEAR_BREAKPOINT_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_MASK 0x00004000U
+#define EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_SHIFT 14
+#define EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_HOST_CLEAR_TA_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_HOST_CLEAR_TA_TERMINATE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_CLEAR_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_REACHED_MEM_THRESH_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_GBL_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_MT_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_3D_MEM_FREE_SIGNED 0
+#define EUR_CR_TIMER                        0x0144
+#define EUR_CR_TIMER_VALUE_MASK             0xFFFFFFFFU
+#define EUR_CR_TIMER_VALUE_SHIFT            0
+#define EUR_CR_TIMER_VALUE_SIGNED           0
+#define EUR_CR_EVENT_KICK1                  0x0AB0
+#define EUR_CR_EVENT_KICK1_NOW_MASK         0x000000FFU
+#define EUR_CR_EVENT_KICK1_NOW_SHIFT        0
+#define EUR_CR_EVENT_KICK1_NOW_SIGNED       0
+#define EUR_CR_EVENT_KICK2                  0x0AC0
+#define EUR_CR_EVENT_KICK2_NOW_MASK         0x00000001U
+#define EUR_CR_EVENT_KICK2_NOW_SHIFT        0
+#define EUR_CR_EVENT_KICK2_NOW_SIGNED       0
+#define EUR_CR_EVENT_KICKER                 0x0AC4
+#define EUR_CR_EVENT_KICKER_ADDRESS_MASK    0xFFFFFFF0U
+#define EUR_CR_EVENT_KICKER_ADDRESS_SHIFT   4
+#define EUR_CR_EVENT_KICKER_ADDRESS_SIGNED  0
+#define EUR_CR_EVENT_KICK                   0x0AC8
+#define EUR_CR_EVENT_KICK_NOW_MASK          0x00000001U
+#define EUR_CR_EVENT_KICK_NOW_SHIFT         0
+#define EUR_CR_EVENT_KICK_NOW_SIGNED        0
+#define EUR_CR_EVENT_TIMER                  0x0ACC
+#define EUR_CR_EVENT_TIMER_ENABLE_MASK      0x01000000U
+#define EUR_CR_EVENT_TIMER_ENABLE_SHIFT     24
+#define EUR_CR_EVENT_TIMER_ENABLE_SIGNED    0
+#define EUR_CR_EVENT_TIMER_VALUE_MASK       0x00FFFFFFU
+#define EUR_CR_EVENT_TIMER_VALUE_SHIFT      0
+#define EUR_CR_EVENT_TIMER_VALUE_SIGNED     0
+#define EUR_CR_PDS_INV0                     0x0AD0
+#define EUR_CR_PDS_INV0_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV0_DSC_SHIFT           0
+#define EUR_CR_PDS_INV0_DSC_SIGNED          0
+#define EUR_CR_PDS_INV1                     0x0AD4
+#define EUR_CR_PDS_INV1_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV1_DSC_SHIFT           0
+#define EUR_CR_PDS_INV1_DSC_SIGNED          0
+#define EUR_CR_EVENT_KICK3                  0x0AD8
+#define EUR_CR_EVENT_KICK3_NOW_MASK         0x00000001U
+#define EUR_CR_EVENT_KICK3_NOW_SHIFT        0
+#define EUR_CR_EVENT_KICK3_NOW_SIGNED       0
+#define EUR_CR_PDS_INV3                     0x0ADC
+#define EUR_CR_PDS_INV3_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV3_DSC_SHIFT           0
+#define EUR_CR_PDS_INV3_DSC_SIGNED          0
+#define EUR_CR_PDS_INV_CSC                  0x0AE0
+#define EUR_CR_PDS_INV_CSC_KICK_MASK        0x00000001U
+#define EUR_CR_PDS_INV_CSC_KICK_SHIFT       0
+#define EUR_CR_PDS_INV_CSC_KICK_SIGNED      0
+#define EUR_CR_BIF_CTRL                     0x0C00
+#define EUR_CR_BIF_CTRL_NOREORDER_MASK      0x00000001U
+#define EUR_CR_BIF_CTRL_NOREORDER_SHIFT     0
+#define EUR_CR_BIF_CTRL_NOREORDER_SIGNED    0
+#define EUR_CR_BIF_CTRL_PAUSE_MASK          0x00000002U
+#define EUR_CR_BIF_CTRL_PAUSE_SHIFT         1
+#define EUR_CR_BIF_CTRL_PAUSE_SIGNED        0
+#define EUR_CR_BIF_CTRL_CLEAR_FAULT_MASK    0x00000010U
+#define EUR_CR_BIF_CTRL_CLEAR_FAULT_SHIFT   4
+#define EUR_CR_BIF_CTRL_CLEAR_FAULT_SIGNED  0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_VDM_MASK 0x00000200U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_VDM_SHIFT 9
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_VDM_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TA_MASK  0x00000400U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TA_SHIFT 10
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TA_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PBE_MASK 0x00001000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PBE_SHIFT 12
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PBE_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TSPP_MASK 0x00002000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TSPP_SHIFT 13
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TSPP_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_ISP_MASK 0x00004000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_ISP_SHIFT 14
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_ISP_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_USE_MASK 0x00008000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_USE_SHIFT 15
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_USE_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PTLA_MASK 0x00010000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PTLA_SHIFT 16
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PTLA_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_VDM_MASK 0x00020000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_VDM_SHIFT 17
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_VDM_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_IPF_MASK 0x00040000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_IPF_SHIFT 18
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_IPF_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_DPM_MASK 0x00080000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_DPM_SHIFT 19
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_DPM_SIGNED 0
+#define EUR_CR_BIF_INT_STAT                 0x0C04
+#define EUR_CR_BIF_INT_STAT_FAULT_REQ_MASK  0x00003FFFU
+#define EUR_CR_BIF_INT_STAT_FAULT_REQ_SHIFT 0
+#define EUR_CR_BIF_INT_STAT_FAULT_REQ_SIGNED 0
+#define EUR_CR_BIF_INT_STAT_FAULT_TYPE_MASK 0x00070000U
+#define EUR_CR_BIF_INT_STAT_FAULT_TYPE_SHIFT 16
+#define EUR_CR_BIF_INT_STAT_FAULT_TYPE_SIGNED 0
+#define EUR_CR_BIF_INT_STAT_FLUSH_COMPLETE_MASK 0x00080000U
+#define EUR_CR_BIF_INT_STAT_FLUSH_COMPLETE_SHIFT 19
+#define EUR_CR_BIF_INT_STAT_FLUSH_COMPLETE_SIGNED 0
+#define EUR_CR_BIF_FAULT                    0x0C08
+#define EUR_CR_BIF_FAULT_CID_MASK           0x0000000FU
+#define EUR_CR_BIF_FAULT_CID_SHIFT          0
+#define EUR_CR_BIF_FAULT_CID_SIGNED         0
+#define EUR_CR_BIF_FAULT_SB_MASK            0x000001F0U
+#define EUR_CR_BIF_FAULT_SB_SHIFT           4
+#define EUR_CR_BIF_FAULT_SB_SIGNED          0
+#define EUR_CR_BIF_FAULT_ADDR_MASK          0xFFFFF000U
+#define EUR_CR_BIF_FAULT_ADDR_SHIFT         12
+#define EUR_CR_BIF_FAULT_ADDR_SIGNED        0
+#define EUR_CR_BIF_TILE0                    0x0C0C
+#define EUR_CR_BIF_TILE0_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE0_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE0_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE0_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE0_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE0_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE0_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE0_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE0_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE1                    0x0C10
+#define EUR_CR_BIF_TILE1_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE1_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE1_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE1_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE1_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE1_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE1_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE1_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE1_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE2                    0x0C14
+#define EUR_CR_BIF_TILE2_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE2_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE2_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE2_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE2_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE2_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE2_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE2_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE2_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE3                    0x0C18
+#define EUR_CR_BIF_TILE3_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE3_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE3_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE3_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE3_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE3_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE3_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE3_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE3_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE4                    0x0C1C
+#define EUR_CR_BIF_TILE4_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE4_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE4_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE4_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE4_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE4_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE4_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE4_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE4_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE5                    0x0C20
+#define EUR_CR_BIF_TILE5_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE5_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE5_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE5_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE5_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE5_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE5_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE5_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE5_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE6                    0x0C24
+#define EUR_CR_BIF_TILE6_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE6_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE6_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE6_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE6_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE6_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE6_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE6_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE6_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE7                    0x0C28
+#define EUR_CR_BIF_TILE7_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE7_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE7_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE7_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE7_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE7_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE7_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE7_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE7_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE8                    0x0C2C
+#define EUR_CR_BIF_TILE8_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE8_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE8_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE8_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE8_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE8_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE8_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE8_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE8_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE9                    0x0C30
+#define EUR_CR_BIF_TILE9_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE9_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE9_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE9_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE9_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE9_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE9_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE9_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE9_CFG_SIGNED         0
+#define EUR_CR_BIF_CTRL_INVAL               0x0C34
+#define EUR_CR_BIF_CTRL_INVAL_PTE_MASK      0x00000004U
+#define EUR_CR_BIF_CTRL_INVAL_PTE_SHIFT     2
+#define EUR_CR_BIF_CTRL_INVAL_PTE_SIGNED    0
+#define EUR_CR_BIF_CTRL_INVAL_ALL_MASK      0x00000008U
+#define EUR_CR_BIF_CTRL_INVAL_ALL_SHIFT     3
+#define EUR_CR_BIF_CTRL_INVAL_ALL_SIGNED    0
+#define EUR_CR_BIF_DIR_LIST_BASE1           0x0C38
+#define EUR_CR_BIF_DIR_LIST_BASE1_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE1_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE1_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE2           0x0C3C
+#define EUR_CR_BIF_DIR_LIST_BASE2_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE2_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE2_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE3           0x0C40
+#define EUR_CR_BIF_DIR_LIST_BASE3_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE3_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE3_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE4           0x0C44
+#define EUR_CR_BIF_DIR_LIST_BASE4_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE4_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE4_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE5           0x0C48
+#define EUR_CR_BIF_DIR_LIST_BASE5_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE5_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE5_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE6           0x0C4C
+#define EUR_CR_BIF_DIR_LIST_BASE6_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE6_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE6_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE7           0x0C50
+#define EUR_CR_BIF_DIR_LIST_BASE7_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE7_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE7_ADDR_SIGNED 0
+#define EUR_CR_BIF_BANK_SET                 0x0C74
+#define EUR_CR_BIF_BANK_SET_SELECT_2D_MASK  0x00000001U
+#define EUR_CR_BIF_BANK_SET_SELECT_2D_SHIFT 0
+#define EUR_CR_BIF_BANK_SET_SELECT_2D_SIGNED 0
+#define EUR_CR_BIF_BANK_SET_SELECT_3D_MASK  0x0000000CU
+#define EUR_CR_BIF_BANK_SET_SELECT_3D_SHIFT 2
+#define EUR_CR_BIF_BANK_SET_SELECT_3D_SIGNED 0
+#define EUR_CR_BIF_BANK_SET_SELECT_HOST_MASK 0x00000010U
+#define EUR_CR_BIF_BANK_SET_SELECT_HOST_SHIFT 4
+#define EUR_CR_BIF_BANK_SET_SELECT_HOST_SIGNED 0
+#define EUR_CR_BIF_BANK_SET_SELECT_TA_MASK  0x000000C0U
+#define EUR_CR_BIF_BANK_SET_SELECT_TA_SHIFT 6
+#define EUR_CR_BIF_BANK_SET_SELECT_TA_SIGNED 0
+#define EUR_CR_BIF_BANK_SET_SELECT_EDM_MASK 0x00000100U
+#define EUR_CR_BIF_BANK_SET_SELECT_EDM_SHIFT 8
+#define EUR_CR_BIF_BANK_SET_SELECT_EDM_SIGNED 0
+#define EUR_CR_BIF_BANK_SET_SELECT_DPM_LSS_MASK 0x00000200U
+#define EUR_CR_BIF_BANK_SET_SELECT_DPM_LSS_SHIFT 9
+#define EUR_CR_BIF_BANK_SET_SELECT_DPM_LSS_SIGNED 0
+#define EUR_CR_BIF_BANK0                    0x0C78
+#define EUR_CR_BIF_BANK0_INDEX_EDM_MASK     0x0000000FU
+#define EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT    0
+#define EUR_CR_BIF_BANK0_INDEX_EDM_SIGNED   0
+#define EUR_CR_BIF_BANK0_INDEX_TA_MASK      0x000000F0U
+#define EUR_CR_BIF_BANK0_INDEX_TA_SHIFT     4
+#define EUR_CR_BIF_BANK0_INDEX_TA_SIGNED    0
+#define EUR_CR_BIF_BANK0_INDEX_3D_MASK      0x0000F000U
+#define EUR_CR_BIF_BANK0_INDEX_3D_SHIFT     12
+#define EUR_CR_BIF_BANK0_INDEX_3D_SIGNED    0
+#define EUR_CR_BIF_BANK0_INDEX_PTLA_MASK    0x000F0000U
+#define EUR_CR_BIF_BANK0_INDEX_PTLA_SHIFT   16
+#define EUR_CR_BIF_BANK0_INDEX_PTLA_SIGNED  0
+#define EUR_CR_BIF_BANK1                    0x0C7C
+#define EUR_CR_BIF_BANK1_INDEX_EDM_MASK     0x0000000FU
+#define EUR_CR_BIF_BANK1_INDEX_EDM_SHIFT    0
+#define EUR_CR_BIF_BANK1_INDEX_EDM_SIGNED   0
+#define EUR_CR_BIF_BANK1_INDEX_TA_MASK      0x000000F0U
+#define EUR_CR_BIF_BANK1_INDEX_TA_SHIFT     4
+#define EUR_CR_BIF_BANK1_INDEX_TA_SIGNED    0
+#define EUR_CR_BIF_BANK1_INDEX_3D_MASK      0x0000F000U
+#define EUR_CR_BIF_BANK1_INDEX_3D_SHIFT     12
+#define EUR_CR_BIF_BANK1_INDEX_3D_SIGNED    0
+#define EUR_CR_BIF_DIR_LIST_BASE0           0x0C84
+#define EUR_CR_BIF_DIR_LIST_BASE0_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE0_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE0_ADDR_SIGNED 0
+#define EUR_CR_BIF_TA_REQ_BASE              0x0C90
+#define EUR_CR_BIF_TA_REQ_BASE_ADDR_MASK    0xFFF00000U
+#define EUR_CR_BIF_TA_REQ_BASE_ADDR_SHIFT   20
+#define EUR_CR_BIF_TA_REQ_BASE_ADDR_SIGNED  0
+#define EUR_CR_BIF_MEM_REQ_STAT             0x0CA8
+#define EUR_CR_BIF_MEM_REQ_STAT_READS_MASK  0x000000FFU
+#define EUR_CR_BIF_MEM_REQ_STAT_READS_SHIFT 0
+#define EUR_CR_BIF_MEM_REQ_STAT_READS_SIGNED 0
+#define EUR_CR_BIF_3D_REQ_BASE              0x0CAC
+#define EUR_CR_BIF_3D_REQ_BASE_ADDR_MASK    0xFFF00000U
+#define EUR_CR_BIF_3D_REQ_BASE_ADDR_SHIFT   20
+#define EUR_CR_BIF_3D_REQ_BASE_ADDR_SIGNED  0
+#define EUR_CR_BIF_ZLS_REQ_BASE             0x0CB0
+#define EUR_CR_BIF_ZLS_REQ_BASE_ADDR_MASK   0xFFF00000U
+#define EUR_CR_BIF_ZLS_REQ_BASE_ADDR_SHIFT  20
+#define EUR_CR_BIF_ZLS_REQ_BASE_ADDR_SIGNED 0
+#define EUR_CR_BIF_BANK_STATUS              0x0CB4
+#define EUR_CR_BIF_BANK_STATUS_3D_CURRENT_BANK_MASK 0x00000001U
+#define EUR_CR_BIF_BANK_STATUS_3D_CURRENT_BANK_SHIFT 0
+#define EUR_CR_BIF_BANK_STATUS_3D_CURRENT_BANK_SIGNED 0
+#define EUR_CR_BIF_BANK_STATUS_TA_CURRENT_BANK_MASK 0x00000002U
+#define EUR_CR_BIF_BANK_STATUS_TA_CURRENT_BANK_SHIFT 1
+#define EUR_CR_BIF_BANK_STATUS_TA_CURRENT_BANK_SIGNED 0
+#define EUR_CR_BIF_MMU_CTRL                 0x0CD0
+#define EUR_CR_BIF_MMU_CTRL_PREFETCHING_ON_MASK 0x00000001U
+#define EUR_CR_BIF_MMU_CTRL_PREFETCHING_ON_SHIFT 0
+#define EUR_CR_BIF_MMU_CTRL_PREFETCHING_ON_SIGNED 0
+#define EUR_CR_BIF_MMU_CTRL_ADDR_HASH_MODE_MASK 0x00000006U
+#define EUR_CR_BIF_MMU_CTRL_ADDR_HASH_MODE_SHIFT 1
+#define EUR_CR_BIF_MMU_CTRL_ADDR_HASH_MODE_SIGNED 0
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_WRITE_BURST_COLLATE_MASK 0x00000008U
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_WRITE_BURST_COLLATE_SHIFT 3
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_WRITE_BURST_COLLATE_SIGNED 0
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_DC_TLB_MASK 0x00000010U
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_DC_TLB_SHIFT 4
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_DC_TLB_SIGNED 0
+#define EUR_CR_2D_BLIT_STATUS               0x0E04
+#define EUR_CR_2D_BLIT_STATUS_COMPLETE_MASK 0x00FFFFFFU
+#define EUR_CR_2D_BLIT_STATUS_COMPLETE_SHIFT 0
+#define EUR_CR_2D_BLIT_STATUS_COMPLETE_SIGNED 0
+#define EUR_CR_2D_BLIT_STATUS_BUSY_MASK     0x01000000U
+#define EUR_CR_2D_BLIT_STATUS_BUSY_SHIFT    24
+#define EUR_CR_2D_BLIT_STATUS_BUSY_SIGNED   0
+#define EUR_CR_2D_VIRTUAL_FIFO_0            0x0E10
+#define EUR_CR_2D_VIRTUAL_FIFO_0_ENABLE_MASK 0x00000001U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_ENABLE_SHIFT 0
+#define EUR_CR_2D_VIRTUAL_FIFO_0_ENABLE_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MASK 0x0000000EU
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_SHIFT 1
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_DIV_MASK 0x00000FF0U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_DIV_SHIFT 4
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_DIV_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MUL_MASK 0x0000F000U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MUL_SHIFT 12
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MUL_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_1            0x0E14
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_ACC_MASK 0x00000FFFU
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_ACC_SHIFT 0
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_ACC_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MAX_ACC_MASK 0x00FFF000U
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MAX_ACC_SHIFT 12
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MAX_ACC_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_METRIC_MASK 0xFF000000U
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_METRIC_SHIFT 24
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_METRIC_SIGNED 0
+#define EUR_CR_BREAKPOINT0_START            0x0F44
+#define EUR_CR_BREAKPOINT0_START_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT0_START_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT0_START_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT0_END              0x0F48
+#define EUR_CR_BREAKPOINT0_END_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT0_END_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT0_END_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT0                  0x0F4C
+#define EUR_CR_BREAKPOINT0_MASK_DM_MASK     0x00000038U
+#define EUR_CR_BREAKPOINT0_MASK_DM_SHIFT    3
+#define EUR_CR_BREAKPOINT0_MASK_DM_SIGNED   0
+#define EUR_CR_BREAKPOINT0_CTRL_TRAPENABLE_MASK 0x00000004U
+#define EUR_CR_BREAKPOINT0_CTRL_TRAPENABLE_SHIFT 2
+#define EUR_CR_BREAKPOINT0_CTRL_TRAPENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT0_CTRL_WENABLE_MASK 0x00000002U
+#define EUR_CR_BREAKPOINT0_CTRL_WENABLE_SHIFT 1
+#define EUR_CR_BREAKPOINT0_CTRL_WENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT0_CTRL_RENABLE_MASK 0x00000001U
+#define EUR_CR_BREAKPOINT0_CTRL_RENABLE_SHIFT 0
+#define EUR_CR_BREAKPOINT0_CTRL_RENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT1_START            0x0F50
+#define EUR_CR_BREAKPOINT1_START_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT1_START_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT1_START_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT1_END              0x0F54
+#define EUR_CR_BREAKPOINT1_END_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT1_END_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT1_END_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT1                  0x0F58
+#define EUR_CR_BREAKPOINT1_MASK_DM_MASK     0x00000038U
+#define EUR_CR_BREAKPOINT1_MASK_DM_SHIFT    3
+#define EUR_CR_BREAKPOINT1_MASK_DM_SIGNED   0
+#define EUR_CR_BREAKPOINT1_CTRL_TRAPENABLE_MASK 0x00000004U
+#define EUR_CR_BREAKPOINT1_CTRL_TRAPENABLE_SHIFT 2
+#define EUR_CR_BREAKPOINT1_CTRL_TRAPENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT1_CTRL_WENABLE_MASK 0x00000002U
+#define EUR_CR_BREAKPOINT1_CTRL_WENABLE_SHIFT 1
+#define EUR_CR_BREAKPOINT1_CTRL_WENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT1_CTRL_RENABLE_MASK 0x00000001U
+#define EUR_CR_BREAKPOINT1_CTRL_RENABLE_SHIFT 0
+#define EUR_CR_BREAKPOINT1_CTRL_RENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT2_START            0x0F5C
+#define EUR_CR_BREAKPOINT2_START_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT2_START_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT2_START_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT2_END              0x0F60
+#define EUR_CR_BREAKPOINT2_END_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT2_END_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT2_END_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT2                  0x0F64
+#define EUR_CR_BREAKPOINT2_MASK_DM_MASK     0x00000038U
+#define EUR_CR_BREAKPOINT2_MASK_DM_SHIFT    3
+#define EUR_CR_BREAKPOINT2_MASK_DM_SIGNED   0
+#define EUR_CR_BREAKPOINT2_CTRL_TRAPENABLE_MASK 0x00000004U
+#define EUR_CR_BREAKPOINT2_CTRL_TRAPENABLE_SHIFT 2
+#define EUR_CR_BREAKPOINT2_CTRL_TRAPENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT2_CTRL_WENABLE_MASK 0x00000002U
+#define EUR_CR_BREAKPOINT2_CTRL_WENABLE_SHIFT 1
+#define EUR_CR_BREAKPOINT2_CTRL_WENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT2_CTRL_RENABLE_MASK 0x00000001U
+#define EUR_CR_BREAKPOINT2_CTRL_RENABLE_SHIFT 0
+#define EUR_CR_BREAKPOINT2_CTRL_RENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT3_START            0x0F68
+#define EUR_CR_BREAKPOINT3_START_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT3_START_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT3_START_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT3_END              0x0F6C
+#define EUR_CR_BREAKPOINT3_END_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT3_END_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT3_END_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT3                  0x0F70
+#define EUR_CR_BREAKPOINT3_MASK_DM_MASK     0x00000038U
+#define EUR_CR_BREAKPOINT3_MASK_DM_SHIFT    3
+#define EUR_CR_BREAKPOINT3_MASK_DM_SIGNED   0
+#define EUR_CR_BREAKPOINT3_CTRL_TRAPENABLE_MASK 0x00000004U
+#define EUR_CR_BREAKPOINT3_CTRL_TRAPENABLE_SHIFT 2
+#define EUR_CR_BREAKPOINT3_CTRL_TRAPENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT3_CTRL_WENABLE_MASK 0x00000002U
+#define EUR_CR_BREAKPOINT3_CTRL_WENABLE_SHIFT 1
+#define EUR_CR_BREAKPOINT3_CTRL_WENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT3_CTRL_RENABLE_MASK 0x00000001U
+#define EUR_CR_BREAKPOINT3_CTRL_RENABLE_SHIFT 0
+#define EUR_CR_BREAKPOINT3_CTRL_RENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT_READ              0x0F74
+#define EUR_CR_BREAKPOINT_READ_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT_READ_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT_READ_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT_TRAP              0x0F78
+#define EUR_CR_BREAKPOINT_TRAP_CONTINUE_MASK 0x00000002U
+#define EUR_CR_BREAKPOINT_TRAP_CONTINUE_SHIFT 1
+#define EUR_CR_BREAKPOINT_TRAP_CONTINUE_SIGNED 0
+#define EUR_CR_BREAKPOINT_TRAP_WRNOTIFY_MASK 0x00000001U
+#define EUR_CR_BREAKPOINT_TRAP_WRNOTIFY_SHIFT 0
+#define EUR_CR_BREAKPOINT_TRAP_WRNOTIFY_SIGNED 0
+#define EUR_CR_BREAKPOINT                   0x0F7C
+#define EUR_CR_BREAKPOINT_MODULE_ID_MASK    0x000003C0U
+#define EUR_CR_BREAKPOINT_MODULE_ID_SHIFT   6
+#define EUR_CR_BREAKPOINT_MODULE_ID_SIGNED  0
+#define EUR_CR_BREAKPOINT_ID_MASK           0x00000030U
+#define EUR_CR_BREAKPOINT_ID_SHIFT          4
+#define EUR_CR_BREAKPOINT_ID_SIGNED         0
+#define EUR_CR_BREAKPOINT_UNTRAPPED_MASK    0x00000008U
+#define EUR_CR_BREAKPOINT_UNTRAPPED_SHIFT   3
+#define EUR_CR_BREAKPOINT_UNTRAPPED_SIGNED  0
+#define EUR_CR_BREAKPOINT_TRAPPED_MASK      0x00000004U
+#define EUR_CR_BREAKPOINT_TRAPPED_SHIFT     2
+#define EUR_CR_BREAKPOINT_TRAPPED_SIGNED    0
+#define EUR_CR_BREAKPOINT_TRAP_INFO0        0x0F80
+#define EUR_CR_BREAKPOINT_TRAP_INFO0_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT_TRAP_INFO0_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT_TRAP_INFO0_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT_TRAP_INFO1        0x0F84
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_SIZE_MASK 0x00007C00U
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_SIZE_SHIFT 10
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_SIZE_SIGNED 0
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_NUMBER_MASK 0x00000300U
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_NUMBER_SHIFT 8
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_NUMBER_SIGNED 0
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_TAG_MASK 0x000000F8U
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_TAG_SHIFT 3
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_TAG_SIGNED 0
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_DATA_MASTER_MASK 0x00000006U
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SHIFT 1
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SIGNED 0
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_RNW_MASK 0x00000001U
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_RNW_SHIFT 0
+#define EUR_CR_BREAKPOINT_TRAP_INFO1_RNW_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_0              0x0A0C
+#define EUR_CR_USE_CODE_BASE_ADDR_00_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_00_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_00_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_00_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_00_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_00_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_1              0x0A10
+#define EUR_CR_USE_CODE_BASE_ADDR_01_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_01_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_01_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_01_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_01_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_01_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_2              0x0A14
+#define EUR_CR_USE_CODE_BASE_ADDR_02_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_02_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_02_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_02_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_02_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_02_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_3              0x0A18
+#define EUR_CR_USE_CODE_BASE_ADDR_03_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_03_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_03_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_03_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_03_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_03_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_4              0x0A1C
+#define EUR_CR_USE_CODE_BASE_ADDR_04_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_04_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_04_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_04_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_04_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_04_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_5              0x0A20
+#define EUR_CR_USE_CODE_BASE_ADDR_05_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_05_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_05_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_05_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_05_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_05_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_6              0x0A24
+#define EUR_CR_USE_CODE_BASE_ADDR_06_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_06_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_06_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_06_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_06_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_06_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_7              0x0A28
+#define EUR_CR_USE_CODE_BASE_ADDR_07_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_07_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_07_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_07_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_07_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_07_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_8              0x0A2C
+#define EUR_CR_USE_CODE_BASE_ADDR_08_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_08_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_08_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_08_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_08_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_08_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_9              0x0A30
+#define EUR_CR_USE_CODE_BASE_ADDR_09_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_09_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_09_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_09_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_09_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_09_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_10             0x0A34
+#define EUR_CR_USE_CODE_BASE_ADDR_10_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_10_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_10_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_10_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_10_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_10_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_11             0x0A38
+#define EUR_CR_USE_CODE_BASE_ADDR_11_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_11_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_11_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_11_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_11_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_11_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_12             0x0A3C
+#define EUR_CR_USE_CODE_BASE_ADDR_12_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_12_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_12_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_12_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_12_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_12_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_13             0x0A40
+#define EUR_CR_USE_CODE_BASE_ADDR_13_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_13_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_13_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_13_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_13_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_13_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_14             0x0A44
+#define EUR_CR_USE_CODE_BASE_ADDR_14_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_14_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_14_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_14_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_14_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_14_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_15             0x0A48
+#define EUR_CR_USE_CODE_BASE_ADDR_15_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_15_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_15_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_15_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_15_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_15_SIGNED   0
+#define EUR_CR_USE_CODE_BASE(X)     (0x0A0C + (4 * (X)))
+#define EUR_CR_USE_CODE_BASE_ADDR_MASK      0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_SHIFT     0
+#define EUR_CR_USE_CODE_BASE_ADDR_SIGNED    0
+#define EUR_CR_USE_CODE_BASE_DM_MASK        0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_SHIFT       26
+#define EUR_CR_USE_CODE_BASE_DM_SIGNED      0
+#define EUR_CR_USE_CODE_BASE_SIZE_UINT32 16
+#define EUR_CR_USE_CODE_BASE_NUM_ENTRIES 16
+
+#endif 
+
diff --git a/drivers/gpu/pvr/sgx543defs.h b/drivers/gpu/pvr/sgx543defs.h
index ef8a06e5c2b..939a70ce8ba 100644
--- a/drivers/gpu/pvr/sgx543defs.h
+++ b/drivers/gpu/pvr/sgx543defs.h
@@ -58,6 +58,9 @@
 #define EUR_CR_CLKGATECTL_TA_CLKG_MASK      0x000C0000U
 #define EUR_CR_CLKGATECTL_TA_CLKG_SHIFT     18
 #define EUR_CR_CLKGATECTL_TA_CLKG_SIGNED    0
+#define EUR_CR_CLKGATECTL_BIF_CORE_CLKG_MASK 0x00300000U
+#define EUR_CR_CLKGATECTL_BIF_CORE_CLKG_SHIFT 20
+#define EUR_CR_CLKGATECTL_BIF_CORE_CLKG_SIGNED 0
 #define EUR_CR_CLKGATECTL_AUTO_MAN_REG_MASK 0x01000000U
 #define EUR_CR_CLKGATECTL_AUTO_MAN_REG_SHIFT 24
 #define EUR_CR_CLKGATECTL_AUTO_MAN_REG_SIGNED 0
@@ -168,6 +171,9 @@
 #define EUR_CR_CLKGATESTATUS_DCU1_L0L1_CLKS_MASK 0x00800000U
 #define EUR_CR_CLKGATESTATUS_DCU1_L0L1_CLKS_SHIFT 23
 #define EUR_CR_CLKGATESTATUS_DCU1_L0L1_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_BIF_CORE_CLKS_MASK 0x01000000U
+#define EUR_CR_CLKGATESTATUS_BIF_CORE_CLKS_SHIFT 24
+#define EUR_CR_CLKGATESTATUS_BIF_CORE_CLKS_SIGNED 0
 #define EUR_CR_CLKGATECTLOVR                0x000C
 #define EUR_CR_CLKGATECTLOVR_ISP_CLKO_MASK  0x00000003U
 #define EUR_CR_CLKGATECTLOVR_ISP_CLKO_SHIFT 0
@@ -199,6 +205,9 @@
 #define EUR_CR_CLKGATECTLOVR_TA_CLKO_MASK   0x000C0000U
 #define EUR_CR_CLKGATECTLOVR_TA_CLKO_SHIFT  18
 #define EUR_CR_CLKGATECTLOVR_TA_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_BIF_CORE_CLKO_MASK 0x00300000U
+#define EUR_CR_CLKGATECTLOVR_BIF_CORE_CLKO_SHIFT 20
+#define EUR_CR_CLKGATECTLOVR_BIF_CORE_CLKO_SIGNED 0
 #define EUR_CR_POWER                        0x001C
 #define EUR_CR_POWER_PIPE_DISABLE_MASK      0x00000001U
 #define EUR_CR_POWER_PIPE_DISABLE_SHIFT     0
@@ -671,118 +680,6 @@
 #define EUR_CR_TIMER_VALUE_MASK             0xFFFFFFFFU
 #define EUR_CR_TIMER_VALUE_SHIFT            0
 #define EUR_CR_TIMER_VALUE_SIGNED           0
-#define EUR_CR_USE_CODE_BASE_0              0x0A0C
-#define EUR_CR_USE_CODE_BASE_ADDR_00_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_00_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_00_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_00_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_00_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_00_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_1              0x0A10
-#define EUR_CR_USE_CODE_BASE_ADDR_01_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_01_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_01_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_01_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_01_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_01_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_2              0x0A14
-#define EUR_CR_USE_CODE_BASE_ADDR_02_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_02_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_02_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_02_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_02_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_02_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_3              0x0A18
-#define EUR_CR_USE_CODE_BASE_ADDR_03_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_03_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_03_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_03_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_03_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_03_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_4              0x0A1C
-#define EUR_CR_USE_CODE_BASE_ADDR_04_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_04_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_04_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_04_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_04_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_04_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_5              0x0A20
-#define EUR_CR_USE_CODE_BASE_ADDR_05_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_05_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_05_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_05_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_05_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_05_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_6              0x0A24
-#define EUR_CR_USE_CODE_BASE_ADDR_06_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_06_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_06_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_06_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_06_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_06_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_7              0x0A28
-#define EUR_CR_USE_CODE_BASE_ADDR_07_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_07_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_07_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_07_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_07_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_07_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_8              0x0A2C
-#define EUR_CR_USE_CODE_BASE_ADDR_08_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_08_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_08_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_08_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_08_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_08_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_9              0x0A30
-#define EUR_CR_USE_CODE_BASE_ADDR_09_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_09_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_09_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_09_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_09_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_09_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_10             0x0A34
-#define EUR_CR_USE_CODE_BASE_ADDR_10_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_10_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_10_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_10_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_10_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_10_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_11             0x0A38
-#define EUR_CR_USE_CODE_BASE_ADDR_11_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_11_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_11_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_11_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_11_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_11_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_12             0x0A3C
-#define EUR_CR_USE_CODE_BASE_ADDR_12_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_12_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_12_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_12_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_12_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_12_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_13             0x0A40
-#define EUR_CR_USE_CODE_BASE_ADDR_13_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_13_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_13_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_13_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_13_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_13_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_14             0x0A44
-#define EUR_CR_USE_CODE_BASE_ADDR_14_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_14_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_14_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_14_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_14_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_14_SIGNED   0
-#define EUR_CR_USE_CODE_BASE_15             0x0A48
-#define EUR_CR_USE_CODE_BASE_ADDR_15_MASK   0x03FFFFFFU
-#define EUR_CR_USE_CODE_BASE_ADDR_15_SHIFT  0
-#define EUR_CR_USE_CODE_BASE_ADDR_15_SIGNED 0
-#define EUR_CR_USE_CODE_BASE_DM_15_MASK     0x0C000000U
-#define EUR_CR_USE_CODE_BASE_DM_15_SHIFT    26
-#define EUR_CR_USE_CODE_BASE_DM_15_SIGNED   0
 #define EUR_CR_EVENT_KICK1                  0x0AB0
 #define EUR_CR_EVENT_KICK1_NOW_MASK         0x000000FFU
 #define EUR_CR_EVENT_KICK1_NOW_SHIFT        0
@@ -1090,6 +987,19 @@
 #define EUR_CR_BIF_BANK_STATUS_TA_CURRENT_BANK_MASK 0x00000002U
 #define EUR_CR_BIF_BANK_STATUS_TA_CURRENT_BANK_SHIFT 1
 #define EUR_CR_BIF_BANK_STATUS_TA_CURRENT_BANK_SIGNED 0
+#define EUR_CR_BIF_MMU_CTRL                 0x0CD0
+#define EUR_CR_BIF_MMU_CTRL_PREFETCHING_ON_MASK 0x00000001U
+#define EUR_CR_BIF_MMU_CTRL_PREFETCHING_ON_SHIFT 0
+#define EUR_CR_BIF_MMU_CTRL_PREFETCHING_ON_SIGNED 0
+#define EUR_CR_BIF_MMU_CTRL_ADDR_HASH_MODE_MASK 0x00000006U
+#define EUR_CR_BIF_MMU_CTRL_ADDR_HASH_MODE_SHIFT 1
+#define EUR_CR_BIF_MMU_CTRL_ADDR_HASH_MODE_SIGNED 0
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_WRITE_BURST_COLLATE_MASK 0x00000008U
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_WRITE_BURST_COLLATE_SHIFT 3
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_WRITE_BURST_COLLATE_SIGNED 0
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_DC_TLB_MASK 0x00000010U
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_DC_TLB_SHIFT 4
+#define EUR_CR_BIF_MMU_CTRL_ENABLE_DC_TLB_SIGNED 0
 #define EUR_CR_2D_BLIT_STATUS               0x0E04
 #define EUR_CR_2D_BLIT_STATUS_COMPLETE_MASK 0x00FFFFFFU
 #define EUR_CR_2D_BLIT_STATUS_COMPLETE_SHIFT 0
@@ -1208,40 +1118,238 @@
 #define EUR_CR_BREAKPOINT_READ_ADDRESS_MASK 0xFFFFFFF0U
 #define EUR_CR_BREAKPOINT_READ_ADDRESS_SHIFT 4
 #define EUR_CR_BREAKPOINT_READ_ADDRESS_SIGNED 0
-#define EUR_CR_BREAKPOINT_TRAP              0x0F78
-#define EUR_CR_BREAKPOINT_TRAP_CONTINUE_MASK 0x00000002U
-#define EUR_CR_BREAKPOINT_TRAP_CONTINUE_SHIFT 1
-#define EUR_CR_BREAKPOINT_TRAP_CONTINUE_SIGNED 0
-#define EUR_CR_BREAKPOINT_TRAP_WRNOTIFY_MASK 0x00000001U
-#define EUR_CR_BREAKPOINT_TRAP_WRNOTIFY_SHIFT 0
-#define EUR_CR_BREAKPOINT_TRAP_WRNOTIFY_SIGNED 0
-#define EUR_CR_BREAKPOINT                   0x0F7C
-#define EUR_CR_BREAKPOINT_UNTRAPPED_MASK    0x00000008U
-#define EUR_CR_BREAKPOINT_UNTRAPPED_SHIFT   3
-#define EUR_CR_BREAKPOINT_UNTRAPPED_SIGNED  0
-#define EUR_CR_BREAKPOINT_TRAPPED_MASK      0x00000004U
-#define EUR_CR_BREAKPOINT_TRAPPED_SHIFT     2
-#define EUR_CR_BREAKPOINT_TRAPPED_SIGNED    0
-#define EUR_CR_BREAKPOINT_TRAP_INFO0        0x0F80
-#define EUR_CR_BREAKPOINT_TRAP_INFO0_ADDRESS_MASK 0xFFFFFFF0U
-#define EUR_CR_BREAKPOINT_TRAP_INFO0_ADDRESS_SHIFT 4
-#define EUR_CR_BREAKPOINT_TRAP_INFO0_ADDRESS_SIGNED 0
-#define EUR_CR_BREAKPOINT_TRAP_INFO1        0x0F84
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_SIZE_MASK 0x00007C00U
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_SIZE_SHIFT 10
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_SIZE_SIGNED 0
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_NUMBER_MASK 0x00000300U
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_NUMBER_SHIFT 8
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_NUMBER_SIGNED 0
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_TAG_MASK 0x000000F8U
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_TAG_SHIFT 3
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_TAG_SIGNED 0
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_DATA_MASTER_MASK 0x00000006U
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SHIFT 1
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SIGNED 0
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_RNW_MASK 0x00000001U
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_RNW_SHIFT 0
-#define EUR_CR_BREAKPOINT_TRAP_INFO1_RNW_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP    0x0F78
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_CONTINUE_MASK 0x00000002U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_CONTINUE_SHIFT 1
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_CONTINUE_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_WRNOTIFY_MASK 0x00000001U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_WRNOTIFY_SHIFT 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_WRNOTIFY_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT         0x0F7C
+#define EUR_CR_PARTITION_BREAKPOINT_MODULE_ID_MASK 0x000003C0U
+#define EUR_CR_PARTITION_BREAKPOINT_MODULE_ID_SHIFT 6
+#define EUR_CR_PARTITION_BREAKPOINT_MODULE_ID_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_ID_MASK 0x00000030U
+#define EUR_CR_PARTITION_BREAKPOINT_ID_SHIFT 4
+#define EUR_CR_PARTITION_BREAKPOINT_ID_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_UNTRAPPED_MASK 0x00000008U
+#define EUR_CR_PARTITION_BREAKPOINT_UNTRAPPED_SHIFT 3
+#define EUR_CR_PARTITION_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAPPED_MASK 0x00000004U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAPPED_SHIFT 2
+#define EUR_CR_PARTITION_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO0 0x0F80
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO0_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO0_ADDRESS_SHIFT 4
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO0_ADDRESS_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1 0x0F84
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_SIZE_MASK 0x00007C00U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_SIZE_SHIFT 10
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_SIZE_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_NUMBER_MASK 0x00000300U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_NUMBER_SHIFT 8
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_NUMBER_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_TAG_MASK 0x000000F8U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_TAG_SHIFT 3
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_TAG_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_DATA_MASTER_MASK 0x00000006U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SHIFT 1
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_RNW_MASK 0x00000001U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_RNW_SHIFT 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_RNW_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_0              0x0A0C
+#define EUR_CR_USE_CODE_BASE_ADDR_00_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_00_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_00_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_00_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_00_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_00_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_1              0x0A10
+#define EUR_CR_USE_CODE_BASE_ADDR_01_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_01_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_01_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_01_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_01_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_01_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_2              0x0A14
+#define EUR_CR_USE_CODE_BASE_ADDR_02_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_02_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_02_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_02_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_02_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_02_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_3              0x0A18
+#define EUR_CR_USE_CODE_BASE_ADDR_03_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_03_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_03_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_03_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_03_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_03_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_4              0x0A1C
+#define EUR_CR_USE_CODE_BASE_ADDR_04_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_04_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_04_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_04_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_04_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_04_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_5              0x0A20
+#define EUR_CR_USE_CODE_BASE_ADDR_05_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_05_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_05_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_05_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_05_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_05_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_6              0x0A24
+#define EUR_CR_USE_CODE_BASE_ADDR_06_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_06_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_06_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_06_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_06_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_06_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_7              0x0A28
+#define EUR_CR_USE_CODE_BASE_ADDR_07_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_07_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_07_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_07_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_07_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_07_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_8              0x0A2C
+#define EUR_CR_USE_CODE_BASE_ADDR_08_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_08_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_08_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_08_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_08_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_08_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_9              0x0A30
+#define EUR_CR_USE_CODE_BASE_ADDR_09_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_09_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_09_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_09_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_09_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_09_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_10             0x0A34
+#define EUR_CR_USE_CODE_BASE_ADDR_10_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_10_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_10_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_10_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_10_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_10_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_11             0x0A38
+#define EUR_CR_USE_CODE_BASE_ADDR_11_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_11_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_11_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_11_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_11_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_11_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_12             0x0A3C
+#define EUR_CR_USE_CODE_BASE_ADDR_12_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_12_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_12_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_12_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_12_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_12_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_13             0x0A40
+#define EUR_CR_USE_CODE_BASE_ADDR_13_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_13_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_13_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_13_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_13_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_13_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_14             0x0A44
+#define EUR_CR_USE_CODE_BASE_ADDR_14_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_14_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_14_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_14_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_14_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_14_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_15             0x0A48
+#define EUR_CR_USE_CODE_BASE_ADDR_15_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_15_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_15_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_15_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_15_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_15_SIGNED   0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP        0x0F88
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_CONTINUE_MASK 0x00000002U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_CONTINUE_SHIFT 1
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_CONTINUE_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_WRNOTIFY_MASK 0x00000001U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_WRNOTIFY_SHIFT 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_WRNOTIFY_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT             0x0F8C
+#define EUR_CR_PIPE0_BREAKPOINT_MODULE_ID_MASK 0x000003C0U
+#define EUR_CR_PIPE0_BREAKPOINT_MODULE_ID_SHIFT 6
+#define EUR_CR_PIPE0_BREAKPOINT_MODULE_ID_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_ID_MASK     0x00000030U
+#define EUR_CR_PIPE0_BREAKPOINT_ID_SHIFT    4
+#define EUR_CR_PIPE0_BREAKPOINT_ID_SIGNED   0
+#define EUR_CR_PIPE0_BREAKPOINT_UNTRAPPED_MASK 0x00000008U
+#define EUR_CR_PIPE0_BREAKPOINT_UNTRAPPED_SHIFT 3
+#define EUR_CR_PIPE0_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAPPED_MASK 0x00000004U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAPPED_SHIFT 2
+#define EUR_CR_PIPE0_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO0  0x0F90
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO0_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO0_ADDRESS_SHIFT 4
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO0_ADDRESS_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1  0x0F94
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_SIZE_MASK 0x00007C00U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_SIZE_SHIFT 10
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_SIZE_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_NUMBER_MASK 0x00000300U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_NUMBER_SHIFT 8
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_NUMBER_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_TAG_MASK 0x000000F8U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_TAG_SHIFT 3
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_TAG_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_DATA_MASTER_MASK 0x00000006U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SHIFT 1
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_RNW_MASK 0x00000001U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_RNW_SHIFT 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_RNW_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP        0x0F98
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_CONTINUE_MASK 0x00000002U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_CONTINUE_SHIFT 1
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_CONTINUE_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_WRNOTIFY_MASK 0x00000001U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_WRNOTIFY_SHIFT 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_WRNOTIFY_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT             0x0F9C
+#define EUR_CR_PIPE1_BREAKPOINT_MODULE_ID_MASK 0x000003C0U
+#define EUR_CR_PIPE1_BREAKPOINT_MODULE_ID_SHIFT 6
+#define EUR_CR_PIPE1_BREAKPOINT_MODULE_ID_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_ID_MASK     0x00000030U
+#define EUR_CR_PIPE1_BREAKPOINT_ID_SHIFT    4
+#define EUR_CR_PIPE1_BREAKPOINT_ID_SIGNED   0
+#define EUR_CR_PIPE1_BREAKPOINT_UNTRAPPED_MASK 0x00000008U
+#define EUR_CR_PIPE1_BREAKPOINT_UNTRAPPED_SHIFT 3
+#define EUR_CR_PIPE1_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAPPED_MASK 0x00000004U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAPPED_SHIFT 2
+#define EUR_CR_PIPE1_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO0  0x0FA0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO0_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO0_ADDRESS_SHIFT 4
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO0_ADDRESS_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1  0x0FA4
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_SIZE_MASK 0x00007C00U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_SIZE_SHIFT 10
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_SIZE_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_NUMBER_MASK 0x00000300U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_NUMBER_SHIFT 8
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_NUMBER_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_TAG_MASK 0x000000F8U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_TAG_SHIFT 3
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_TAG_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_DATA_MASTER_MASK 0x00000006U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SHIFT 1
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_RNW_MASK 0x00000001U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_RNW_SHIFT 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_RNW_SIGNED 0
 #define EUR_CR_USE_CODE_BASE(X)     (0x0A0C + (4 * (X)))
 #define EUR_CR_USE_CODE_BASE_ADDR_MASK      0x03FFFFFFU
 #define EUR_CR_USE_CODE_BASE_ADDR_SHIFT     0
diff --git a/drivers/gpu/pvr/sgx544defs.h b/drivers/gpu/pvr/sgx544defs.h
new file mode 100644
index 00000000000..eb9268d4ecc
--- /dev/null
+++ b/drivers/gpu/pvr/sgx544defs.h
@@ -0,0 +1,1351 @@
+/**********************************************************************
+ *
+ * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
+ * See the GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ * 
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Contact Information:
+ * Imagination Technologies Ltd. <gpl-support@imgtec.com>
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
+ *
+ ******************************************************************************/
+
+#ifndef _SGX544DEFS_KM_H_
+#define _SGX544DEFS_KM_H_
+
+#define EUR_CR_CLKGATECTL                   0x0000
+#define EUR_CR_CLKGATECTL_ISP_CLKG_MASK     0x00000003U
+#define EUR_CR_CLKGATECTL_ISP_CLKG_SHIFT    0
+#define EUR_CR_CLKGATECTL_ISP_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_ISP2_CLKG_MASK    0x0000000CU
+#define EUR_CR_CLKGATECTL_ISP2_CLKG_SHIFT   2
+#define EUR_CR_CLKGATECTL_ISP2_CLKG_SIGNED  0
+#define EUR_CR_CLKGATECTL_TSP_CLKG_MASK     0x00000030U
+#define EUR_CR_CLKGATECTL_TSP_CLKG_SHIFT    4
+#define EUR_CR_CLKGATECTL_TSP_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_TE_CLKG_MASK      0x000000C0U
+#define EUR_CR_CLKGATECTL_TE_CLKG_SHIFT     6
+#define EUR_CR_CLKGATECTL_TE_CLKG_SIGNED    0
+#define EUR_CR_CLKGATECTL_MTE_CLKG_MASK     0x00000300U
+#define EUR_CR_CLKGATECTL_MTE_CLKG_SHIFT    8
+#define EUR_CR_CLKGATECTL_MTE_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_DPM_CLKG_MASK     0x00000C00U
+#define EUR_CR_CLKGATECTL_DPM_CLKG_SHIFT    10
+#define EUR_CR_CLKGATECTL_DPM_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_VDM_CLKG_MASK     0x00003000U
+#define EUR_CR_CLKGATECTL_VDM_CLKG_SHIFT    12
+#define EUR_CR_CLKGATECTL_VDM_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_PDS_CLKG_MASK     0x0000C000U
+#define EUR_CR_CLKGATECTL_PDS_CLKG_SHIFT    14
+#define EUR_CR_CLKGATECTL_PDS_CLKG_SIGNED   0
+#define EUR_CR_CLKGATECTL_IDXFIFO_CLKG_MASK 0x00030000U
+#define EUR_CR_CLKGATECTL_IDXFIFO_CLKG_SHIFT 16
+#define EUR_CR_CLKGATECTL_IDXFIFO_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL_TA_CLKG_MASK      0x000C0000U
+#define EUR_CR_CLKGATECTL_TA_CLKG_SHIFT     18
+#define EUR_CR_CLKGATECTL_TA_CLKG_SIGNED    0
+#define EUR_CR_CLKGATECTL_BIF_CORE_CLKG_MASK 0x00300000U
+#define EUR_CR_CLKGATECTL_BIF_CORE_CLKG_SHIFT 20
+#define EUR_CR_CLKGATECTL_BIF_CORE_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL_AUTO_MAN_REG_MASK 0x01000000U
+#define EUR_CR_CLKGATECTL_AUTO_MAN_REG_SHIFT 24
+#define EUR_CR_CLKGATECTL_AUTO_MAN_REG_SIGNED 0
+#define EUR_CR_CLKGATECTL_SYSTEM_CLKG_MASK  0x10000000U
+#define EUR_CR_CLKGATECTL_SYSTEM_CLKG_SHIFT 28
+#define EUR_CR_CLKGATECTL_SYSTEM_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2                  0x0004
+#define EUR_CR_CLKGATECTL2_PBE_CLKG_MASK    0x00000003U
+#define EUR_CR_CLKGATECTL2_PBE_CLKG_SHIFT   0
+#define EUR_CR_CLKGATECTL2_PBE_CLKG_SIGNED  0
+#define EUR_CR_CLKGATECTL2_TCU_L2_CLKG_MASK 0x0000000CU
+#define EUR_CR_CLKGATECTL2_TCU_L2_CLKG_SHIFT 2
+#define EUR_CR_CLKGATECTL2_TCU_L2_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_UCACHEL2_CLKG_MASK 0x00000030U
+#define EUR_CR_CLKGATECTL2_UCACHEL2_CLKG_SHIFT 4
+#define EUR_CR_CLKGATECTL2_UCACHEL2_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_USE0_CLKG_MASK   0x000000C0U
+#define EUR_CR_CLKGATECTL2_USE0_CLKG_SHIFT  6
+#define EUR_CR_CLKGATECTL2_USE0_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_ITR0_CLKG_MASK   0x00000300U
+#define EUR_CR_CLKGATECTL2_ITR0_CLKG_SHIFT  8
+#define EUR_CR_CLKGATECTL2_ITR0_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_TEX0_CLKG_MASK   0x00000C00U
+#define EUR_CR_CLKGATECTL2_TEX0_CLKG_SHIFT  10
+#define EUR_CR_CLKGATECTL2_TEX0_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_USE1_CLKG_MASK   0x0000C000U
+#define EUR_CR_CLKGATECTL2_USE1_CLKG_SHIFT  14
+#define EUR_CR_CLKGATECTL2_USE1_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_ITR1_CLKG_MASK   0x00030000U
+#define EUR_CR_CLKGATECTL2_ITR1_CLKG_SHIFT  16
+#define EUR_CR_CLKGATECTL2_ITR1_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_TEX1_CLKG_MASK   0x000C0000U
+#define EUR_CR_CLKGATECTL2_TEX1_CLKG_SHIFT  18
+#define EUR_CR_CLKGATECTL2_TEX1_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_DCU_L2_CLKG_MASK 0x00C00000U
+#define EUR_CR_CLKGATECTL2_DCU_L2_CLKG_SHIFT 22
+#define EUR_CR_CLKGATECTL2_DCU_L2_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_DCU1_L0L1_CLKG_MASK 0x03000000U
+#define EUR_CR_CLKGATECTL2_DCU1_L0L1_CLKG_SHIFT 24
+#define EUR_CR_CLKGATECTL2_DCU1_L0L1_CLKG_SIGNED 0
+#define EUR_CR_CLKGATECTL2_DCU0_L0L1_CLKG_MASK 0x0C000000U
+#define EUR_CR_CLKGATECTL2_DCU0_L0L1_CLKG_SHIFT 26
+#define EUR_CR_CLKGATECTL2_DCU0_L0L1_CLKG_SIGNED 0
+#define EUR_CR_CLKGATESTATUS                0x0008
+#define EUR_CR_CLKGATESTATUS_ISP_CLKS_MASK  0x00000001U
+#define EUR_CR_CLKGATESTATUS_ISP_CLKS_SHIFT 0
+#define EUR_CR_CLKGATESTATUS_ISP_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_ISP2_CLKS_MASK 0x00000002U
+#define EUR_CR_CLKGATESTATUS_ISP2_CLKS_SHIFT 1
+#define EUR_CR_CLKGATESTATUS_ISP2_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TSP_CLKS_MASK  0x00000004U
+#define EUR_CR_CLKGATESTATUS_TSP_CLKS_SHIFT 2
+#define EUR_CR_CLKGATESTATUS_TSP_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TE_CLKS_MASK   0x00000008U
+#define EUR_CR_CLKGATESTATUS_TE_CLKS_SHIFT  3
+#define EUR_CR_CLKGATESTATUS_TE_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_MTE_CLKS_MASK  0x00000010U
+#define EUR_CR_CLKGATESTATUS_MTE_CLKS_SHIFT 4
+#define EUR_CR_CLKGATESTATUS_MTE_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_DPM_CLKS_MASK  0x00000020U
+#define EUR_CR_CLKGATESTATUS_DPM_CLKS_SHIFT 5
+#define EUR_CR_CLKGATESTATUS_DPM_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_VDM_CLKS_MASK  0x00000040U
+#define EUR_CR_CLKGATESTATUS_VDM_CLKS_SHIFT 6
+#define EUR_CR_CLKGATESTATUS_VDM_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_PDS_CLKS_MASK  0x00000080U
+#define EUR_CR_CLKGATESTATUS_PDS_CLKS_SHIFT 7
+#define EUR_CR_CLKGATESTATUS_PDS_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_PBE_CLKS_MASK  0x00000100U
+#define EUR_CR_CLKGATESTATUS_PBE_CLKS_SHIFT 8
+#define EUR_CR_CLKGATESTATUS_PBE_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TCU_L2_CLKS_MASK 0x00000200U
+#define EUR_CR_CLKGATESTATUS_TCU_L2_CLKS_SHIFT 9
+#define EUR_CR_CLKGATESTATUS_TCU_L2_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_UCACHEL2_CLKS_MASK 0x00000400U
+#define EUR_CR_CLKGATESTATUS_UCACHEL2_CLKS_SHIFT 10
+#define EUR_CR_CLKGATESTATUS_UCACHEL2_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_USE0_CLKS_MASK 0x00000800U
+#define EUR_CR_CLKGATESTATUS_USE0_CLKS_SHIFT 11
+#define EUR_CR_CLKGATESTATUS_USE0_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_ITR0_CLKS_MASK 0x00001000U
+#define EUR_CR_CLKGATESTATUS_ITR0_CLKS_SHIFT 12
+#define EUR_CR_CLKGATESTATUS_ITR0_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TEX0_CLKS_MASK 0x00002000U
+#define EUR_CR_CLKGATESTATUS_TEX0_CLKS_SHIFT 13
+#define EUR_CR_CLKGATESTATUS_TEX0_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_USE1_CLKS_MASK 0x00008000U
+#define EUR_CR_CLKGATESTATUS_USE1_CLKS_SHIFT 15
+#define EUR_CR_CLKGATESTATUS_USE1_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_ITR1_CLKS_MASK 0x00010000U
+#define EUR_CR_CLKGATESTATUS_ITR1_CLKS_SHIFT 16
+#define EUR_CR_CLKGATESTATUS_ITR1_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TEX1_CLKS_MASK 0x00020000U
+#define EUR_CR_CLKGATESTATUS_TEX1_CLKS_SHIFT 17
+#define EUR_CR_CLKGATESTATUS_TEX1_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_IDXFIFO_CLKS_MASK 0x00080000U
+#define EUR_CR_CLKGATESTATUS_IDXFIFO_CLKS_SHIFT 19
+#define EUR_CR_CLKGATESTATUS_IDXFIFO_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_TA_CLKS_MASK   0x00100000U
+#define EUR_CR_CLKGATESTATUS_TA_CLKS_SHIFT  20
+#define EUR_CR_CLKGATESTATUS_TA_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_DCU_L2_CLKS_MASK 0x00200000U
+#define EUR_CR_CLKGATESTATUS_DCU_L2_CLKS_SHIFT 21
+#define EUR_CR_CLKGATESTATUS_DCU_L2_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_DCU0_L0L1_CLKS_MASK 0x00400000U
+#define EUR_CR_CLKGATESTATUS_DCU0_L0L1_CLKS_SHIFT 22
+#define EUR_CR_CLKGATESTATUS_DCU0_L0L1_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_DCU1_L0L1_CLKS_MASK 0x00800000U
+#define EUR_CR_CLKGATESTATUS_DCU1_L0L1_CLKS_SHIFT 23
+#define EUR_CR_CLKGATESTATUS_DCU1_L0L1_CLKS_SIGNED 0
+#define EUR_CR_CLKGATESTATUS_BIF_CORE_CLKS_MASK 0x01000000U
+#define EUR_CR_CLKGATESTATUS_BIF_CORE_CLKS_SHIFT 24
+#define EUR_CR_CLKGATESTATUS_BIF_CORE_CLKS_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR                0x000C
+#define EUR_CR_CLKGATECTLOVR_ISP_CLKO_MASK  0x00000003U
+#define EUR_CR_CLKGATECTLOVR_ISP_CLKO_SHIFT 0
+#define EUR_CR_CLKGATECTLOVR_ISP_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_ISP2_CLKO_MASK 0x0000000CU
+#define EUR_CR_CLKGATECTLOVR_ISP2_CLKO_SHIFT 2
+#define EUR_CR_CLKGATECTLOVR_ISP2_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_TSP_CLKO_MASK  0x00000030U
+#define EUR_CR_CLKGATECTLOVR_TSP_CLKO_SHIFT 4
+#define EUR_CR_CLKGATECTLOVR_TSP_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_TE_CLKO_MASK   0x000000C0U
+#define EUR_CR_CLKGATECTLOVR_TE_CLKO_SHIFT  6
+#define EUR_CR_CLKGATECTLOVR_TE_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_MTE_CLKO_MASK  0x00000300U
+#define EUR_CR_CLKGATECTLOVR_MTE_CLKO_SHIFT 8
+#define EUR_CR_CLKGATECTLOVR_MTE_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_DPM_CLKO_MASK  0x00000C00U
+#define EUR_CR_CLKGATECTLOVR_DPM_CLKO_SHIFT 10
+#define EUR_CR_CLKGATECTLOVR_DPM_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_VDM_CLKO_MASK  0x00003000U
+#define EUR_CR_CLKGATECTLOVR_VDM_CLKO_SHIFT 12
+#define EUR_CR_CLKGATECTLOVR_VDM_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_PDS_CLKO_MASK  0x0000C000U
+#define EUR_CR_CLKGATECTLOVR_PDS_CLKO_SHIFT 14
+#define EUR_CR_CLKGATECTLOVR_PDS_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_IDXFIFO_CLKO_MASK 0x00030000U
+#define EUR_CR_CLKGATECTLOVR_IDXFIFO_CLKO_SHIFT 16
+#define EUR_CR_CLKGATECTLOVR_IDXFIFO_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_TA_CLKO_MASK   0x000C0000U
+#define EUR_CR_CLKGATECTLOVR_TA_CLKO_SHIFT  18
+#define EUR_CR_CLKGATECTLOVR_TA_CLKO_SIGNED 0
+#define EUR_CR_CLKGATECTLOVR_BIF_CORE_CLKO_MASK 0x00300000U
+#define EUR_CR_CLKGATECTLOVR_BIF_CORE_CLKO_SHIFT 20
+#define EUR_CR_CLKGATECTLOVR_BIF_CORE_CLKO_SIGNED 0
+#define EUR_CR_POWER                        0x001C
+#define EUR_CR_POWER_PIPE_DISABLE_MASK      0x00000001U
+#define EUR_CR_POWER_PIPE_DISABLE_SHIFT     0
+#define EUR_CR_POWER_PIPE_DISABLE_SIGNED    0
+#define EUR_CR_CORE_ID                      0x0020
+#define EUR_CR_CORE_ID_CONFIG_MULTI_MASK    0x00000001U
+#define EUR_CR_CORE_ID_CONFIG_MULTI_SHIFT   0
+#define EUR_CR_CORE_ID_CONFIG_MULTI_SIGNED  0
+#define EUR_CR_CORE_ID_CONFIG_BASE_MASK     0x00000002U
+#define EUR_CR_CORE_ID_CONFIG_BASE_SHIFT    1
+#define EUR_CR_CORE_ID_CONFIG_BASE_SIGNED   0
+#define EUR_CR_CORE_ID_CONFIG_MASK          0x000000FCU
+#define EUR_CR_CORE_ID_CONFIG_SHIFT         2
+#define EUR_CR_CORE_ID_CONFIG_SIGNED        0
+#define EUR_CR_CORE_ID_CONFIG_CORES_MASK    0x00000F00U
+#define EUR_CR_CORE_ID_CONFIG_CORES_SHIFT   8
+#define EUR_CR_CORE_ID_CONFIG_CORES_SIGNED  0
+#define EUR_CR_CORE_ID_CONFIG_SLC_MASK      0x0000F000U
+#define EUR_CR_CORE_ID_CONFIG_SLC_SHIFT     12
+#define EUR_CR_CORE_ID_CONFIG_SLC_SIGNED    0
+#define EUR_CR_CORE_ID_ID_MASK              0xFFFF0000U
+#define EUR_CR_CORE_ID_ID_SHIFT             16
+#define EUR_CR_CORE_ID_ID_SIGNED            0
+#define EUR_CR_CORE_REVISION                0x0024
+#define EUR_CR_CORE_REVISION_MAINTENANCE_MASK 0x000000FFU
+#define EUR_CR_CORE_REVISION_MAINTENANCE_SHIFT 0
+#define EUR_CR_CORE_REVISION_MAINTENANCE_SIGNED 0
+#define EUR_CR_CORE_REVISION_MINOR_MASK     0x0000FF00U
+#define EUR_CR_CORE_REVISION_MINOR_SHIFT    8
+#define EUR_CR_CORE_REVISION_MINOR_SIGNED   0
+#define EUR_CR_CORE_REVISION_MAJOR_MASK     0x00FF0000U
+#define EUR_CR_CORE_REVISION_MAJOR_SHIFT    16
+#define EUR_CR_CORE_REVISION_MAJOR_SIGNED   0
+#define EUR_CR_CORE_REVISION_DESIGNER_MASK  0xFF000000U
+#define EUR_CR_CORE_REVISION_DESIGNER_SHIFT 24
+#define EUR_CR_CORE_REVISION_DESIGNER_SIGNED 0
+#define EUR_CR_DESIGNER_REV_FIELD1          0x0028
+#define EUR_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_MASK 0xFFFFFFFFU
+#define EUR_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_SHIFT 0
+#define EUR_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_SIGNED 0
+#define EUR_CR_DESIGNER_REV_FIELD2          0x002C
+#define EUR_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_MASK 0xFFFFFFFFU
+#define EUR_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_SHIFT 0
+#define EUR_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_SIGNED 0
+#define EUR_CR_SOFT_RESET                   0x0080
+#define EUR_CR_SOFT_RESET_BIF_RESET_MASK    0x00000001U
+#define EUR_CR_SOFT_RESET_BIF_RESET_SHIFT   0
+#define EUR_CR_SOFT_RESET_BIF_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_VDM_RESET_MASK    0x00000002U
+#define EUR_CR_SOFT_RESET_VDM_RESET_SHIFT   1
+#define EUR_CR_SOFT_RESET_VDM_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_DPM_RESET_MASK    0x00000004U
+#define EUR_CR_SOFT_RESET_DPM_RESET_SHIFT   2
+#define EUR_CR_SOFT_RESET_DPM_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_TE_RESET_MASK     0x00000008U
+#define EUR_CR_SOFT_RESET_TE_RESET_SHIFT    3
+#define EUR_CR_SOFT_RESET_TE_RESET_SIGNED   0
+#define EUR_CR_SOFT_RESET_MTE_RESET_MASK    0x00000010U
+#define EUR_CR_SOFT_RESET_MTE_RESET_SHIFT   4
+#define EUR_CR_SOFT_RESET_MTE_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_ISP_RESET_MASK    0x00000020U
+#define EUR_CR_SOFT_RESET_ISP_RESET_SHIFT   5
+#define EUR_CR_SOFT_RESET_ISP_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_ISP2_RESET_MASK   0x00000040U
+#define EUR_CR_SOFT_RESET_ISP2_RESET_SHIFT  6
+#define EUR_CR_SOFT_RESET_ISP2_RESET_SIGNED 0
+#define EUR_CR_SOFT_RESET_TSP_RESET_MASK    0x00000080U
+#define EUR_CR_SOFT_RESET_TSP_RESET_SHIFT   7
+#define EUR_CR_SOFT_RESET_TSP_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_PDS_RESET_MASK    0x00000100U
+#define EUR_CR_SOFT_RESET_PDS_RESET_SHIFT   8
+#define EUR_CR_SOFT_RESET_PDS_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_PBE_RESET_MASK    0x00000200U
+#define EUR_CR_SOFT_RESET_PBE_RESET_SHIFT   9
+#define EUR_CR_SOFT_RESET_PBE_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_TCU_L2_RESET_MASK 0x00000400U
+#define EUR_CR_SOFT_RESET_TCU_L2_RESET_SHIFT 10
+#define EUR_CR_SOFT_RESET_TCU_L2_RESET_SIGNED 0
+#define EUR_CR_SOFT_RESET_UCACHEL2_RESET_MASK 0x00000800U
+#define EUR_CR_SOFT_RESET_UCACHEL2_RESET_SHIFT 11
+#define EUR_CR_SOFT_RESET_UCACHEL2_RESET_SIGNED 0
+#define EUR_CR_SOFT_RESET_ITR_RESET_MASK    0x00002000U
+#define EUR_CR_SOFT_RESET_ITR_RESET_SHIFT   13
+#define EUR_CR_SOFT_RESET_ITR_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_TEX_RESET_MASK    0x00004000U
+#define EUR_CR_SOFT_RESET_TEX_RESET_SHIFT   14
+#define EUR_CR_SOFT_RESET_TEX_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_USE_RESET_MASK    0x00008000U
+#define EUR_CR_SOFT_RESET_USE_RESET_SHIFT   15
+#define EUR_CR_SOFT_RESET_USE_RESET_SIGNED  0
+#define EUR_CR_SOFT_RESET_IDXFIFO_RESET_MASK 0x00010000U
+#define EUR_CR_SOFT_RESET_IDXFIFO_RESET_SHIFT 16
+#define EUR_CR_SOFT_RESET_IDXFIFO_RESET_SIGNED 0
+#define EUR_CR_SOFT_RESET_TA_RESET_MASK     0x00020000U
+#define EUR_CR_SOFT_RESET_TA_RESET_SHIFT    17
+#define EUR_CR_SOFT_RESET_TA_RESET_SIGNED   0
+#define EUR_CR_SOFT_RESET_DCU_L2_RESET_MASK 0x00040000U
+#define EUR_CR_SOFT_RESET_DCU_L2_RESET_SHIFT 18
+#define EUR_CR_SOFT_RESET_DCU_L2_RESET_SIGNED 0
+#define EUR_CR_SOFT_RESET_DCU_L0L1_RESET_MASK 0x00080000U
+#define EUR_CR_SOFT_RESET_DCU_L0L1_RESET_SHIFT 19
+#define EUR_CR_SOFT_RESET_DCU_L0L1_RESET_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2           0x0110
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_UNTRAPPED_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_UNTRAPPED_SHIFT 11
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_TRAPPED_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_TRAPPED_SHIFT 10
+#define EUR_CR_EVENT_HOST_ENABLE2_DATA_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_CONTEXT_DRAINED_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_CONTEXT_DRAINED_SHIFT 9
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_CONTEXT_DRAINED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_ISP2_ZLS_CSW_FINISHED_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_ENABLE2_ISP2_ZLS_CSW_FINISHED_SHIFT 8
+#define EUR_CR_EVENT_HOST_ENABLE2_ISP2_ZLS_CSW_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_DCU_INVALCOMPLETE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_ENABLE2_DCU_INVALCOMPLETE_SHIFT 7
+#define EUR_CR_EVENT_HOST_ENABLE2_DCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_STATE_FLUSHED_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_STATE_FLUSHED_SHIFT 6
+#define EUR_CR_EVENT_HOST_ENABLE2_MTE_STATE_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_TE_RGNHDR_INIT_COMPLETE_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_ENABLE2_TE_RGNHDR_INIT_COMPLETE_SHIFT 5
+#define EUR_CR_EVENT_HOST_ENABLE2_TE_RGNHDR_INIT_COMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_TA_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_TA_SHIFT 4
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_TA_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_3D_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_3D_SHIFT 3
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_3D_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_DL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_DL_SHIFT 2
+#define EUR_CR_EVENT_HOST_ENABLE2_TRIG_DL_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_3D_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_HOST_ENABLE2_DPM_TA_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2            0x0114
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_UNTRAPPED_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_UNTRAPPED_SHIFT 11
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_TRAPPED_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_TRAPPED_SHIFT 10
+#define EUR_CR_EVENT_HOST_CLEAR2_DATA_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_CONTEXT_DRAINED_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_CONTEXT_DRAINED_SHIFT 9
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_CONTEXT_DRAINED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_ISP2_ZLS_CSW_FINISHED_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_CLEAR2_ISP2_ZLS_CSW_FINISHED_SHIFT 8
+#define EUR_CR_EVENT_HOST_CLEAR2_ISP2_ZLS_CSW_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_DCU_INVALCOMPLETE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_CLEAR2_DCU_INVALCOMPLETE_SHIFT 7
+#define EUR_CR_EVENT_HOST_CLEAR2_DCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_STATE_FLUSHED_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_STATE_FLUSHED_SHIFT 6
+#define EUR_CR_EVENT_HOST_CLEAR2_MTE_STATE_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_TE_RGNHDR_INIT_COMPLETE_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_CLEAR2_TE_RGNHDR_INIT_COMPLETE_SHIFT 5
+#define EUR_CR_EVENT_HOST_CLEAR2_TE_RGNHDR_INIT_COMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_TA_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_TA_SHIFT 4
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_TA_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_3D_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_3D_SHIFT 3
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_3D_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_DL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_DL_SHIFT 2
+#define EUR_CR_EVENT_HOST_CLEAR2_TRIG_DL_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_3D_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_STATUS2                0x0118
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_UNTRAPPED_MASK 0x00000800U
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_UNTRAPPED_SHIFT 11
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_TRAPPED_MASK 0x00000400U
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_TRAPPED_SHIFT 10
+#define EUR_CR_EVENT_STATUS2_DATA_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_MTE_CONTEXT_DRAINED_MASK 0x00000200U
+#define EUR_CR_EVENT_STATUS2_MTE_CONTEXT_DRAINED_SHIFT 9
+#define EUR_CR_EVENT_STATUS2_MTE_CONTEXT_DRAINED_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_ISP2_ZLS_CSW_FINISHED_MASK 0x00000100U
+#define EUR_CR_EVENT_STATUS2_ISP2_ZLS_CSW_FINISHED_SHIFT 8
+#define EUR_CR_EVENT_STATUS2_ISP2_ZLS_CSW_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_DCU_INVALCOMPLETE_MASK 0x00000080U
+#define EUR_CR_EVENT_STATUS2_DCU_INVALCOMPLETE_SHIFT 7
+#define EUR_CR_EVENT_STATUS2_DCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_MTE_STATE_FLUSHED_MASK 0x00000040U
+#define EUR_CR_EVENT_STATUS2_MTE_STATE_FLUSHED_SHIFT 6
+#define EUR_CR_EVENT_STATUS2_MTE_STATE_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_TE_RGNHDR_INIT_COMPLETE_MASK 0x00000020U
+#define EUR_CR_EVENT_STATUS2_TE_RGNHDR_INIT_COMPLETE_SHIFT 5
+#define EUR_CR_EVENT_STATUS2_TE_RGNHDR_INIT_COMPLETE_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_TRIG_TA_MASK   0x00000010U
+#define EUR_CR_EVENT_STATUS2_TRIG_TA_SHIFT  4
+#define EUR_CR_EVENT_STATUS2_TRIG_TA_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_TRIG_3D_MASK   0x00000008U
+#define EUR_CR_EVENT_STATUS2_TRIG_3D_SHIFT  3
+#define EUR_CR_EVENT_STATUS2_TRIG_3D_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_TRIG_DL_MASK   0x00000004U
+#define EUR_CR_EVENT_STATUS2_TRIG_DL_SHIFT  2
+#define EUR_CR_EVENT_STATUS2_TRIG_DL_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_DPM_3D_FREE_LOAD_MASK 0x00000002U
+#define EUR_CR_EVENT_STATUS2_DPM_3D_FREE_LOAD_SHIFT 1
+#define EUR_CR_EVENT_STATUS2_DPM_3D_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_MASK 0x00000001U
+#define EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_SHIFT 0
+#define EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_STATUS                 0x012C
+#define EUR_CR_EVENT_STATUS_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_STATUS_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_STATUS_MASTER_INTERRUPT_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TIMER_MASK      0x20000000U
+#define EUR_CR_EVENT_STATUS_TIMER_SHIFT     29
+#define EUR_CR_EVENT_STATUS_TIMER_SIGNED    0
+#define EUR_CR_EVENT_STATUS_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_STATUS_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_STATUS_TA_DPM_FAULT_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TCU_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_STATUS_TCU_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_STATUS_TCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_ZLS_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_STATUS_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_STATUS_DPM_TA_MEM_FREE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_STATUS_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_STATUS_ISP_END_TILE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_STATUS_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_STATUS_DPM_INITEND_SIGNED 0
+#define EUR_CR_EVENT_STATUS_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_STATUS_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_STATUS_OTPM_LOADED_SIGNED 0
+#define EUR_CR_EVENT_STATUS_OTPM_INV_MASK   0x00100000U
+#define EUR_CR_EVENT_STATUS_OTPM_INV_SHIFT  20
+#define EUR_CR_EVENT_STATUS_OTPM_INV_SIGNED 0
+#define EUR_CR_EVENT_STATUS_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_STATUS_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_STATUS_OTPM_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_SIGNED 0
+#define EUR_CR_EVENT_STATUS_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_STATUS_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_STATUS_BREAKPOINT_SIGNED 0
+#define EUR_CR_EVENT_STATUS_SW_EVENT_MASK   0x00004000U
+#define EUR_CR_EVENT_STATUS_SW_EVENT_SHIFT  14
+#define EUR_CR_EVENT_STATUS_SW_EVENT_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_STATUS_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_STATUS_TA_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_STATUS_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_STATUS_TA_TERMINATE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TPC_CLEAR_MASK  0x00000800U
+#define EUR_CR_EVENT_STATUS_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_STATUS_TPC_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_STATUS_TPC_FLUSH_MASK  0x00000400U
+#define EUR_CR_EVENT_STATUS_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_STATUS_TPC_FLUSH_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_STATUS_DPM_STATE_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_STATUS_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_STATUS_DPM_STATE_STORE_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_STATUS_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_STATUS_DPM_REACHED_MEM_THRESH_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_GBL_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_STATUS_DPM_OUT_OF_MEMORY_MT_SIGNED 0
+#define EUR_CR_EVENT_STATUS_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_STATUS_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_EVENT_STATUS_DPM_3D_MEM_FREE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE            0x0130
+#define EUR_CR_EVENT_HOST_ENABLE_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_HOST_ENABLE_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_HOST_ENABLE_MASTER_INTERRUPT_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TIMER_MASK 0x20000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TIMER_SHIFT 29
+#define EUR_CR_EVENT_HOST_ENABLE_TIMER_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_HOST_ENABLE_TA_DPM_FAULT_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TCU_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_HOST_ENABLE_TCU_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_HOST_ENABLE_TCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_ZLS_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_TA_MEM_FREE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_HOST_ENABLE_ISP_END_TILE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_INITEND_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_LOADED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_INV_MASK 0x00100000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_INV_SHIFT 20
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_INV_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_HOST_ENABLE_OTPM_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_HOST_ENABLE_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_HOST_ENABLE_PIXELBE_END_RENDER_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_HOST_ENABLE_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_HOST_ENABLE_BREAKPOINT_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_SW_EVENT_MASK 0x00004000U
+#define EUR_CR_EVENT_HOST_ENABLE_SW_EVENT_SHIFT 14
+#define EUR_CR_EVENT_HOST_ENABLE_SW_EVENT_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_HOST_ENABLE_TA_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_HOST_ENABLE_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_HOST_ENABLE_TA_TERMINATE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_CLEAR_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_FLUSH_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_HOST_ENABLE_TPC_FLUSH_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_CONTROL_STORE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_STATE_STORE_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_REACHED_MEM_THRESH_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_GBL_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_OUT_OF_MEMORY_MT_SIGNED 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_EVENT_HOST_ENABLE_DPM_3D_MEM_FREE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR             0x0134
+#define EUR_CR_EVENT_HOST_CLEAR_MASTER_INTERRUPT_MASK 0x80000000U
+#define EUR_CR_EVENT_HOST_CLEAR_MASTER_INTERRUPT_SHIFT 31
+#define EUR_CR_EVENT_HOST_CLEAR_MASTER_INTERRUPT_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TIMER_MASK  0x20000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TIMER_SHIFT 29
+#define EUR_CR_EVENT_HOST_CLEAR_TIMER_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TA_DPM_FAULT_MASK 0x10000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_DPM_FAULT_SHIFT 28
+#define EUR_CR_EVENT_HOST_CLEAR_TA_DPM_FAULT_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TCU_INVALCOMPLETE_MASK 0x04000000U
+#define EUR_CR_EVENT_HOST_CLEAR_TCU_INVALCOMPLETE_SHIFT 26
+#define EUR_CR_EVENT_HOST_CLEAR_TCU_INVALCOMPLETE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_ZLS_MASK 0x02000000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_ZLS_SHIFT 25
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_ZLS_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_TA_MEM_FREE_MASK 0x01000000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_TA_MEM_FREE_SHIFT 24
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_TA_MEM_FREE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_END_TILE_MASK 0x00800000U
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_END_TILE_SHIFT 23
+#define EUR_CR_EVENT_HOST_CLEAR_ISP_END_TILE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_INITEND_MASK 0x00400000U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_INITEND_SHIFT 22
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_INITEND_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_MASK 0x00200000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_SHIFT 21
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_INV_MASK 0x00100000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_INV_SHIFT 20
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_INV_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_FLUSHED_MASK 0x00080000U
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_FLUSHED_SHIFT 19
+#define EUR_CR_EVENT_HOST_CLEAR_OTPM_FLUSHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_MASK 0x00040000U
+#define EUR_CR_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_SHIFT 18
+#define EUR_CR_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_BREAKPOINT_MASK 0x00008000U
+#define EUR_CR_EVENT_HOST_CLEAR_BREAKPOINT_SHIFT 15
+#define EUR_CR_EVENT_HOST_CLEAR_BREAKPOINT_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_MASK 0x00004000U
+#define EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_SHIFT 14
+#define EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TA_FINISHED_MASK 0x00002000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_FINISHED_SHIFT 13
+#define EUR_CR_EVENT_HOST_CLEAR_TA_FINISHED_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TA_TERMINATE_MASK 0x00001000U
+#define EUR_CR_EVENT_HOST_CLEAR_TA_TERMINATE_SHIFT 12
+#define EUR_CR_EVENT_HOST_CLEAR_TA_TERMINATE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_CLEAR_MASK 0x00000800U
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_CLEAR_SHIFT 11
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_MASK 0x00000400U
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_SHIFT 10
+#define EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_CLEAR_MASK 0x00000200U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_CLEAR_SHIFT 9
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_MASK 0x00000100U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_SHIFT 8
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_MASK 0x00000080U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_SHIFT 7
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_CLEAR_MASK 0x00000040U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_CLEAR_SHIFT 6
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_CLEAR_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_MASK 0x00000020U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_SHIFT 5
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_MASK 0x00000010U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_SHIFT 4
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_REACHED_MEM_THRESH_MASK 0x00000008U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_REACHED_MEM_THRESH_SHIFT 3
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_REACHED_MEM_THRESH_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_GBL_MASK 0x00000004U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_GBL_SHIFT 2
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_GBL_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_MT_MASK 0x00000002U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_MT_SHIFT 1
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_OUT_OF_MEMORY_MT_SIGNED 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_3D_MEM_FREE_MASK 0x00000001U
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_3D_MEM_FREE_SHIFT 0
+#define EUR_CR_EVENT_HOST_CLEAR_DPM_3D_MEM_FREE_SIGNED 0
+#define EUR_CR_TIMER                        0x0144
+#define EUR_CR_TIMER_VALUE_MASK             0xFFFFFFFFU
+#define EUR_CR_TIMER_VALUE_SHIFT            0
+#define EUR_CR_TIMER_VALUE_SIGNED           0
+#define EUR_CR_EVENT_KICK1                  0x0AB0
+#define EUR_CR_EVENT_KICK1_NOW_MASK         0x000000FFU
+#define EUR_CR_EVENT_KICK1_NOW_SHIFT        0
+#define EUR_CR_EVENT_KICK1_NOW_SIGNED       0
+#define EUR_CR_EVENT_KICK2                  0x0AC0
+#define EUR_CR_EVENT_KICK2_NOW_MASK         0x00000001U
+#define EUR_CR_EVENT_KICK2_NOW_SHIFT        0
+#define EUR_CR_EVENT_KICK2_NOW_SIGNED       0
+#define EUR_CR_EVENT_KICKER                 0x0AC4
+#define EUR_CR_EVENT_KICKER_ADDRESS_MASK    0xFFFFFFF0U
+#define EUR_CR_EVENT_KICKER_ADDRESS_SHIFT   4
+#define EUR_CR_EVENT_KICKER_ADDRESS_SIGNED  0
+#define EUR_CR_EVENT_KICK                   0x0AC8
+#define EUR_CR_EVENT_KICK_NOW_MASK          0x00000001U
+#define EUR_CR_EVENT_KICK_NOW_SHIFT         0
+#define EUR_CR_EVENT_KICK_NOW_SIGNED        0
+#define EUR_CR_EVENT_TIMER                  0x0ACC
+#define EUR_CR_EVENT_TIMER_ENABLE_MASK      0x01000000U
+#define EUR_CR_EVENT_TIMER_ENABLE_SHIFT     24
+#define EUR_CR_EVENT_TIMER_ENABLE_SIGNED    0
+#define EUR_CR_EVENT_TIMER_VALUE_MASK       0x00FFFFFFU
+#define EUR_CR_EVENT_TIMER_VALUE_SHIFT      0
+#define EUR_CR_EVENT_TIMER_VALUE_SIGNED     0
+#define EUR_CR_PDS_INV0                     0x0AD0
+#define EUR_CR_PDS_INV0_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV0_DSC_SHIFT           0
+#define EUR_CR_PDS_INV0_DSC_SIGNED          0
+#define EUR_CR_PDS_INV1                     0x0AD4
+#define EUR_CR_PDS_INV1_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV1_DSC_SHIFT           0
+#define EUR_CR_PDS_INV1_DSC_SIGNED          0
+#define EUR_CR_EVENT_KICK3                  0x0AD8
+#define EUR_CR_EVENT_KICK3_NOW_MASK         0x00000001U
+#define EUR_CR_EVENT_KICK3_NOW_SHIFT        0
+#define EUR_CR_EVENT_KICK3_NOW_SIGNED       0
+#define EUR_CR_PDS_INV3                     0x0ADC
+#define EUR_CR_PDS_INV3_DSC_MASK            0x00000001U
+#define EUR_CR_PDS_INV3_DSC_SHIFT           0
+#define EUR_CR_PDS_INV3_DSC_SIGNED          0
+#define EUR_CR_PDS_INV_CSC                  0x0AE0
+#define EUR_CR_PDS_INV_CSC_KICK_MASK        0x00000001U
+#define EUR_CR_PDS_INV_CSC_KICK_SHIFT       0
+#define EUR_CR_PDS_INV_CSC_KICK_SIGNED      0
+#define EUR_CR_BIF_CTRL                     0x0C00
+#define EUR_CR_BIF_CTRL_NOREORDER_MASK      0x00000001U
+#define EUR_CR_BIF_CTRL_NOREORDER_SHIFT     0
+#define EUR_CR_BIF_CTRL_NOREORDER_SIGNED    0
+#define EUR_CR_BIF_CTRL_PAUSE_MASK          0x00000002U
+#define EUR_CR_BIF_CTRL_PAUSE_SHIFT         1
+#define EUR_CR_BIF_CTRL_PAUSE_SIGNED        0
+#define EUR_CR_BIF_CTRL_CLEAR_FAULT_MASK    0x00000010U
+#define EUR_CR_BIF_CTRL_CLEAR_FAULT_SHIFT   4
+#define EUR_CR_BIF_CTRL_CLEAR_FAULT_SIGNED  0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_VDM_MASK 0x00000200U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_VDM_SHIFT 9
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_VDM_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TA_MASK  0x00000400U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TA_SHIFT 10
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TA_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PBE_MASK 0x00001000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PBE_SHIFT 12
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PBE_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TSPP_MASK 0x00002000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TSPP_SHIFT 13
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_TSPP_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_ISP_MASK 0x00004000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_ISP_SHIFT 14
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_ISP_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_USE_MASK 0x00008000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_USE_SHIFT 15
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_USE_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PTLA_MASK 0x00010000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PTLA_SHIFT 16
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_PTLA_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_VDM_MASK 0x00020000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_VDM_SHIFT 17
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_VDM_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_IPF_MASK 0x00040000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_IPF_SHIFT 18
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_IPF_SIGNED 0
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_DPM_MASK 0x00080000U
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_DPM_SHIFT 19
+#define EUR_CR_BIF_CTRL_MMU_BYPASS_MASTER_DPM_SIGNED 0
+#define EUR_CR_BIF_INT_STAT                 0x0C04
+#define EUR_CR_BIF_INT_STAT_FAULT_REQ_MASK  0x00003FFFU
+#define EUR_CR_BIF_INT_STAT_FAULT_REQ_SHIFT 0
+#define EUR_CR_BIF_INT_STAT_FAULT_REQ_SIGNED 0
+#define EUR_CR_BIF_INT_STAT_FAULT_TYPE_MASK 0x00070000U
+#define EUR_CR_BIF_INT_STAT_FAULT_TYPE_SHIFT 16
+#define EUR_CR_BIF_INT_STAT_FAULT_TYPE_SIGNED 0
+#define EUR_CR_BIF_INT_STAT_FLUSH_COMPLETE_MASK 0x00080000U
+#define EUR_CR_BIF_INT_STAT_FLUSH_COMPLETE_SHIFT 19
+#define EUR_CR_BIF_INT_STAT_FLUSH_COMPLETE_SIGNED 0
+#define EUR_CR_BIF_FAULT                    0x0C08
+#define EUR_CR_BIF_FAULT_CID_MASK           0x0000000FU
+#define EUR_CR_BIF_FAULT_CID_SHIFT          0
+#define EUR_CR_BIF_FAULT_CID_SIGNED         0
+#define EUR_CR_BIF_FAULT_SB_MASK            0x000001F0U
+#define EUR_CR_BIF_FAULT_SB_SHIFT           4
+#define EUR_CR_BIF_FAULT_SB_SIGNED          0
+#define EUR_CR_BIF_FAULT_ADDR_MASK          0xFFFFF000U
+#define EUR_CR_BIF_FAULT_ADDR_SHIFT         12
+#define EUR_CR_BIF_FAULT_ADDR_SIGNED        0
+#define EUR_CR_BIF_TILE0                    0x0C0C
+#define EUR_CR_BIF_TILE0_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE0_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE0_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE0_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE0_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE0_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE0_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE0_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE0_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE1                    0x0C10
+#define EUR_CR_BIF_TILE1_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE1_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE1_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE1_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE1_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE1_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE1_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE1_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE1_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE2                    0x0C14
+#define EUR_CR_BIF_TILE2_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE2_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE2_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE2_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE2_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE2_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE2_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE2_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE2_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE3                    0x0C18
+#define EUR_CR_BIF_TILE3_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE3_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE3_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE3_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE3_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE3_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE3_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE3_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE3_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE4                    0x0C1C
+#define EUR_CR_BIF_TILE4_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE4_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE4_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE4_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE4_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE4_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE4_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE4_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE4_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE5                    0x0C20
+#define EUR_CR_BIF_TILE5_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE5_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE5_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE5_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE5_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE5_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE5_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE5_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE5_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE6                    0x0C24
+#define EUR_CR_BIF_TILE6_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE6_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE6_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE6_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE6_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE6_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE6_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE6_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE6_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE7                    0x0C28
+#define EUR_CR_BIF_TILE7_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE7_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE7_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE7_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE7_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE7_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE7_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE7_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE7_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE8                    0x0C2C
+#define EUR_CR_BIF_TILE8_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE8_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE8_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE8_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE8_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE8_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE8_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE8_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE8_CFG_SIGNED         0
+#define EUR_CR_BIF_TILE9                    0x0C30
+#define EUR_CR_BIF_TILE9_MIN_ADDRESS_MASK   0x00000FFFU
+#define EUR_CR_BIF_TILE9_MIN_ADDRESS_SHIFT  0
+#define EUR_CR_BIF_TILE9_MIN_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE9_MAX_ADDRESS_MASK   0x00FFF000U
+#define EUR_CR_BIF_TILE9_MAX_ADDRESS_SHIFT  12
+#define EUR_CR_BIF_TILE9_MAX_ADDRESS_SIGNED 0
+#define EUR_CR_BIF_TILE9_CFG_MASK           0x0F000000U
+#define EUR_CR_BIF_TILE9_CFG_SHIFT          24
+#define EUR_CR_BIF_TILE9_CFG_SIGNED         0
+#define EUR_CR_BIF_CTRL_INVAL               0x0C34
+#define EUR_CR_BIF_CTRL_INVAL_PTE_MASK      0x00000004U
+#define EUR_CR_BIF_CTRL_INVAL_PTE_SHIFT     2
+#define EUR_CR_BIF_CTRL_INVAL_PTE_SIGNED    0
+#define EUR_CR_BIF_CTRL_INVAL_ALL_MASK      0x00000008U
+#define EUR_CR_BIF_CTRL_INVAL_ALL_SHIFT     3
+#define EUR_CR_BIF_CTRL_INVAL_ALL_SIGNED    0
+#define EUR_CR_BIF_DIR_LIST_BASE1           0x0C38
+#define EUR_CR_BIF_DIR_LIST_BASE1_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE1_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE1_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE2           0x0C3C
+#define EUR_CR_BIF_DIR_LIST_BASE2_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE2_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE2_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE3           0x0C40
+#define EUR_CR_BIF_DIR_LIST_BASE3_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE3_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE3_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE4           0x0C44
+#define EUR_CR_BIF_DIR_LIST_BASE4_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE4_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE4_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE5           0x0C48
+#define EUR_CR_BIF_DIR_LIST_BASE5_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE5_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE5_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE6           0x0C4C
+#define EUR_CR_BIF_DIR_LIST_BASE6_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE6_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE6_ADDR_SIGNED 0
+#define EUR_CR_BIF_DIR_LIST_BASE7           0x0C50
+#define EUR_CR_BIF_DIR_LIST_BASE7_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE7_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE7_ADDR_SIGNED 0
+#define EUR_CR_BIF_BANK_SET                 0x0C74
+#define EUR_CR_BIF_BANK_SET_SELECT_2D_MASK  0x00000001U
+#define EUR_CR_BIF_BANK_SET_SELECT_2D_SHIFT 0
+#define EUR_CR_BIF_BANK_SET_SELECT_2D_SIGNED 0
+#define EUR_CR_BIF_BANK_SET_SELECT_3D_MASK  0x0000000CU
+#define EUR_CR_BIF_BANK_SET_SELECT_3D_SHIFT 2
+#define EUR_CR_BIF_BANK_SET_SELECT_3D_SIGNED 0
+#define EUR_CR_BIF_BANK_SET_SELECT_HOST_MASK 0x00000010U
+#define EUR_CR_BIF_BANK_SET_SELECT_HOST_SHIFT 4
+#define EUR_CR_BIF_BANK_SET_SELECT_HOST_SIGNED 0
+#define EUR_CR_BIF_BANK_SET_SELECT_TA_MASK  0x000000C0U
+#define EUR_CR_BIF_BANK_SET_SELECT_TA_SHIFT 6
+#define EUR_CR_BIF_BANK_SET_SELECT_TA_SIGNED 0
+#define EUR_CR_BIF_BANK_SET_SELECT_EDM_MASK 0x00000100U
+#define EUR_CR_BIF_BANK_SET_SELECT_EDM_SHIFT 8
+#define EUR_CR_BIF_BANK_SET_SELECT_EDM_SIGNED 0
+#define EUR_CR_BIF_BANK_SET_SELECT_DPM_LSS_MASK 0x00000200U
+#define EUR_CR_BIF_BANK_SET_SELECT_DPM_LSS_SHIFT 9
+#define EUR_CR_BIF_BANK_SET_SELECT_DPM_LSS_SIGNED 0
+#define EUR_CR_BIF_BANK0                    0x0C78
+#define EUR_CR_BIF_BANK0_INDEX_EDM_MASK     0x0000000FU
+#define EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT    0
+#define EUR_CR_BIF_BANK0_INDEX_EDM_SIGNED   0
+#define EUR_CR_BIF_BANK0_INDEX_TA_MASK      0x000000F0U
+#define EUR_CR_BIF_BANK0_INDEX_TA_SHIFT     4
+#define EUR_CR_BIF_BANK0_INDEX_TA_SIGNED    0
+#define EUR_CR_BIF_BANK0_INDEX_3D_MASK      0x0000F000U
+#define EUR_CR_BIF_BANK0_INDEX_3D_SHIFT     12
+#define EUR_CR_BIF_BANK0_INDEX_3D_SIGNED    0
+#define EUR_CR_BIF_BANK0_INDEX_PTLA_MASK    0x000F0000U
+#define EUR_CR_BIF_BANK0_INDEX_PTLA_SHIFT   16
+#define EUR_CR_BIF_BANK0_INDEX_PTLA_SIGNED  0
+#define EUR_CR_BIF_BANK1                    0x0C7C
+#define EUR_CR_BIF_BANK1_INDEX_EDM_MASK     0x0000000FU
+#define EUR_CR_BIF_BANK1_INDEX_EDM_SHIFT    0
+#define EUR_CR_BIF_BANK1_INDEX_EDM_SIGNED   0
+#define EUR_CR_BIF_BANK1_INDEX_TA_MASK      0x000000F0U
+#define EUR_CR_BIF_BANK1_INDEX_TA_SHIFT     4
+#define EUR_CR_BIF_BANK1_INDEX_TA_SIGNED    0
+#define EUR_CR_BIF_BANK1_INDEX_3D_MASK      0x0000F000U
+#define EUR_CR_BIF_BANK1_INDEX_3D_SHIFT     12
+#define EUR_CR_BIF_BANK1_INDEX_3D_SIGNED    0
+#define EUR_CR_BIF_DIR_LIST_BASE0           0x0C84
+#define EUR_CR_BIF_DIR_LIST_BASE0_ADDR_MASK 0xFFFFF000U
+#define EUR_CR_BIF_DIR_LIST_BASE0_ADDR_SHIFT 12
+#define EUR_CR_BIF_DIR_LIST_BASE0_ADDR_SIGNED 0
+#define EUR_CR_BIF_TA_REQ_BASE              0x0C90
+#define EUR_CR_BIF_TA_REQ_BASE_ADDR_MASK    0xFFF00000U
+#define EUR_CR_BIF_TA_REQ_BASE_ADDR_SHIFT   20
+#define EUR_CR_BIF_TA_REQ_BASE_ADDR_SIGNED  0
+#define EUR_CR_BIF_MEM_REQ_STAT             0x0CA8
+#define EUR_CR_BIF_MEM_REQ_STAT_READS_MASK  0x000000FFU
+#define EUR_CR_BIF_MEM_REQ_STAT_READS_SHIFT 0
+#define EUR_CR_BIF_MEM_REQ_STAT_READS_SIGNED 0
+#define EUR_CR_BIF_3D_REQ_BASE              0x0CAC
+#define EUR_CR_BIF_3D_REQ_BASE_ADDR_MASK    0xFFF00000U
+#define EUR_CR_BIF_3D_REQ_BASE_ADDR_SHIFT   20
+#define EUR_CR_BIF_3D_REQ_BASE_ADDR_SIGNED  0
+#define EUR_CR_BIF_ZLS_REQ_BASE             0x0CB0
+#define EUR_CR_BIF_ZLS_REQ_BASE_ADDR_MASK   0xFFF00000U
+#define EUR_CR_BIF_ZLS_REQ_BASE_ADDR_SHIFT  20
+#define EUR_CR_BIF_ZLS_REQ_BASE_ADDR_SIGNED 0
+#define EUR_CR_BIF_BANK_STATUS              0x0CB4
+#define EUR_CR_BIF_BANK_STATUS_3D_CURRENT_BANK_MASK 0x00000001U
+#define EUR_CR_BIF_BANK_STATUS_3D_CURRENT_BANK_SHIFT 0
+#define EUR_CR_BIF_BANK_STATUS_3D_CURRENT_BANK_SIGNED 0
+#define EUR_CR_BIF_BANK_STATUS_TA_CURRENT_BANK_MASK 0x00000002U
+#define EUR_CR_BIF_BANK_STATUS_TA_CURRENT_BANK_SHIFT 1
+#define EUR_CR_BIF_BANK_STATUS_TA_CURRENT_BANK_SIGNED 0
+#define EUR_CR_2D_BLIT_STATUS               0x0E04
+#define EUR_CR_2D_BLIT_STATUS_COMPLETE_MASK 0x00FFFFFFU
+#define EUR_CR_2D_BLIT_STATUS_COMPLETE_SHIFT 0
+#define EUR_CR_2D_BLIT_STATUS_COMPLETE_SIGNED 0
+#define EUR_CR_2D_BLIT_STATUS_BUSY_MASK     0x01000000U
+#define EUR_CR_2D_BLIT_STATUS_BUSY_SHIFT    24
+#define EUR_CR_2D_BLIT_STATUS_BUSY_SIGNED   0
+#define EUR_CR_2D_VIRTUAL_FIFO_0            0x0E10
+#define EUR_CR_2D_VIRTUAL_FIFO_0_ENABLE_MASK 0x00000001U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_ENABLE_SHIFT 0
+#define EUR_CR_2D_VIRTUAL_FIFO_0_ENABLE_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MASK 0x0000000EU
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_SHIFT 1
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_DIV_MASK 0x00000FF0U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_DIV_SHIFT 4
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_DIV_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MUL_MASK 0x0000F000U
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MUL_SHIFT 12
+#define EUR_CR_2D_VIRTUAL_FIFO_0_FLOWRATE_MUL_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_1            0x0E14
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_ACC_MASK 0x00000FFFU
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_ACC_SHIFT 0
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_ACC_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MAX_ACC_MASK 0x00FFF000U
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MAX_ACC_SHIFT 12
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MAX_ACC_SIGNED 0
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_METRIC_MASK 0xFF000000U
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_METRIC_SHIFT 24
+#define EUR_CR_2D_VIRTUAL_FIFO_1_MIN_METRIC_SIGNED 0
+#define EUR_CR_BREAKPOINT0_START            0x0F44
+#define EUR_CR_BREAKPOINT0_START_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT0_START_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT0_START_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT0_END              0x0F48
+#define EUR_CR_BREAKPOINT0_END_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT0_END_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT0_END_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT0                  0x0F4C
+#define EUR_CR_BREAKPOINT0_MASK_DM_MASK     0x00000038U
+#define EUR_CR_BREAKPOINT0_MASK_DM_SHIFT    3
+#define EUR_CR_BREAKPOINT0_MASK_DM_SIGNED   0
+#define EUR_CR_BREAKPOINT0_CTRL_TRAPENABLE_MASK 0x00000004U
+#define EUR_CR_BREAKPOINT0_CTRL_TRAPENABLE_SHIFT 2
+#define EUR_CR_BREAKPOINT0_CTRL_TRAPENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT0_CTRL_WENABLE_MASK 0x00000002U
+#define EUR_CR_BREAKPOINT0_CTRL_WENABLE_SHIFT 1
+#define EUR_CR_BREAKPOINT0_CTRL_WENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT0_CTRL_RENABLE_MASK 0x00000001U
+#define EUR_CR_BREAKPOINT0_CTRL_RENABLE_SHIFT 0
+#define EUR_CR_BREAKPOINT0_CTRL_RENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT1_START            0x0F50
+#define EUR_CR_BREAKPOINT1_START_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT1_START_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT1_START_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT1_END              0x0F54
+#define EUR_CR_BREAKPOINT1_END_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT1_END_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT1_END_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT1                  0x0F58
+#define EUR_CR_BREAKPOINT1_MASK_DM_MASK     0x00000038U
+#define EUR_CR_BREAKPOINT1_MASK_DM_SHIFT    3
+#define EUR_CR_BREAKPOINT1_MASK_DM_SIGNED   0
+#define EUR_CR_BREAKPOINT1_CTRL_TRAPENABLE_MASK 0x00000004U
+#define EUR_CR_BREAKPOINT1_CTRL_TRAPENABLE_SHIFT 2
+#define EUR_CR_BREAKPOINT1_CTRL_TRAPENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT1_CTRL_WENABLE_MASK 0x00000002U
+#define EUR_CR_BREAKPOINT1_CTRL_WENABLE_SHIFT 1
+#define EUR_CR_BREAKPOINT1_CTRL_WENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT1_CTRL_RENABLE_MASK 0x00000001U
+#define EUR_CR_BREAKPOINT1_CTRL_RENABLE_SHIFT 0
+#define EUR_CR_BREAKPOINT1_CTRL_RENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT2_START            0x0F5C
+#define EUR_CR_BREAKPOINT2_START_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT2_START_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT2_START_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT2_END              0x0F60
+#define EUR_CR_BREAKPOINT2_END_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT2_END_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT2_END_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT2                  0x0F64
+#define EUR_CR_BREAKPOINT2_MASK_DM_MASK     0x00000038U
+#define EUR_CR_BREAKPOINT2_MASK_DM_SHIFT    3
+#define EUR_CR_BREAKPOINT2_MASK_DM_SIGNED   0
+#define EUR_CR_BREAKPOINT2_CTRL_TRAPENABLE_MASK 0x00000004U
+#define EUR_CR_BREAKPOINT2_CTRL_TRAPENABLE_SHIFT 2
+#define EUR_CR_BREAKPOINT2_CTRL_TRAPENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT2_CTRL_WENABLE_MASK 0x00000002U
+#define EUR_CR_BREAKPOINT2_CTRL_WENABLE_SHIFT 1
+#define EUR_CR_BREAKPOINT2_CTRL_WENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT2_CTRL_RENABLE_MASK 0x00000001U
+#define EUR_CR_BREAKPOINT2_CTRL_RENABLE_SHIFT 0
+#define EUR_CR_BREAKPOINT2_CTRL_RENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT3_START            0x0F68
+#define EUR_CR_BREAKPOINT3_START_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT3_START_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT3_START_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT3_END              0x0F6C
+#define EUR_CR_BREAKPOINT3_END_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT3_END_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT3_END_ADDRESS_SIGNED 0
+#define EUR_CR_BREAKPOINT3                  0x0F70
+#define EUR_CR_BREAKPOINT3_MASK_DM_MASK     0x00000038U
+#define EUR_CR_BREAKPOINT3_MASK_DM_SHIFT    3
+#define EUR_CR_BREAKPOINT3_MASK_DM_SIGNED   0
+#define EUR_CR_BREAKPOINT3_CTRL_TRAPENABLE_MASK 0x00000004U
+#define EUR_CR_BREAKPOINT3_CTRL_TRAPENABLE_SHIFT 2
+#define EUR_CR_BREAKPOINT3_CTRL_TRAPENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT3_CTRL_WENABLE_MASK 0x00000002U
+#define EUR_CR_BREAKPOINT3_CTRL_WENABLE_SHIFT 1
+#define EUR_CR_BREAKPOINT3_CTRL_WENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT3_CTRL_RENABLE_MASK 0x00000001U
+#define EUR_CR_BREAKPOINT3_CTRL_RENABLE_SHIFT 0
+#define EUR_CR_BREAKPOINT3_CTRL_RENABLE_SIGNED 0
+#define EUR_CR_BREAKPOINT_READ              0x0F74
+#define EUR_CR_BREAKPOINT_READ_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_BREAKPOINT_READ_ADDRESS_SHIFT 4
+#define EUR_CR_BREAKPOINT_READ_ADDRESS_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP    0x0F78
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_CONTINUE_MASK 0x00000002U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_CONTINUE_SHIFT 1
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_CONTINUE_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_WRNOTIFY_MASK 0x00000001U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_WRNOTIFY_SHIFT 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_WRNOTIFY_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT         0x0F7C
+#define EUR_CR_PARTITION_BREAKPOINT_MODULE_ID_MASK 0x000003C0U
+#define EUR_CR_PARTITION_BREAKPOINT_MODULE_ID_SHIFT 6
+#define EUR_CR_PARTITION_BREAKPOINT_MODULE_ID_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_ID_MASK 0x00000030U
+#define EUR_CR_PARTITION_BREAKPOINT_ID_SHIFT 4
+#define EUR_CR_PARTITION_BREAKPOINT_ID_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_UNTRAPPED_MASK 0x00000008U
+#define EUR_CR_PARTITION_BREAKPOINT_UNTRAPPED_SHIFT 3
+#define EUR_CR_PARTITION_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAPPED_MASK 0x00000004U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAPPED_SHIFT 2
+#define EUR_CR_PARTITION_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO0 0x0F80
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO0_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO0_ADDRESS_SHIFT 4
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO0_ADDRESS_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1 0x0F84
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_SIZE_MASK 0x00007C00U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_SIZE_SHIFT 10
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_SIZE_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_NUMBER_MASK 0x00000300U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_NUMBER_SHIFT 8
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_NUMBER_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_TAG_MASK 0x000000F8U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_TAG_SHIFT 3
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_TAG_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_DATA_MASTER_MASK 0x00000006U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SHIFT 1
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SIGNED 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_RNW_MASK 0x00000001U
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_RNW_SHIFT 0
+#define EUR_CR_PARTITION_BREAKPOINT_TRAP_INFO1_RNW_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_0              0x0A0C
+#define EUR_CR_USE_CODE_BASE_ADDR_00_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_00_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_00_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_00_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_00_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_00_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_1              0x0A10
+#define EUR_CR_USE_CODE_BASE_ADDR_01_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_01_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_01_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_01_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_01_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_01_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_2              0x0A14
+#define EUR_CR_USE_CODE_BASE_ADDR_02_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_02_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_02_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_02_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_02_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_02_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_3              0x0A18
+#define EUR_CR_USE_CODE_BASE_ADDR_03_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_03_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_03_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_03_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_03_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_03_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_4              0x0A1C
+#define EUR_CR_USE_CODE_BASE_ADDR_04_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_04_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_04_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_04_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_04_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_04_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_5              0x0A20
+#define EUR_CR_USE_CODE_BASE_ADDR_05_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_05_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_05_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_05_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_05_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_05_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_6              0x0A24
+#define EUR_CR_USE_CODE_BASE_ADDR_06_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_06_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_06_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_06_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_06_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_06_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_7              0x0A28
+#define EUR_CR_USE_CODE_BASE_ADDR_07_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_07_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_07_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_07_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_07_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_07_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_8              0x0A2C
+#define EUR_CR_USE_CODE_BASE_ADDR_08_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_08_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_08_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_08_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_08_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_08_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_9              0x0A30
+#define EUR_CR_USE_CODE_BASE_ADDR_09_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_09_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_09_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_09_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_09_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_09_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_10             0x0A34
+#define EUR_CR_USE_CODE_BASE_ADDR_10_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_10_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_10_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_10_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_10_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_10_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_11             0x0A38
+#define EUR_CR_USE_CODE_BASE_ADDR_11_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_11_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_11_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_11_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_11_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_11_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_12             0x0A3C
+#define EUR_CR_USE_CODE_BASE_ADDR_12_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_12_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_12_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_12_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_12_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_12_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_13             0x0A40
+#define EUR_CR_USE_CODE_BASE_ADDR_13_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_13_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_13_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_13_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_13_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_13_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_14             0x0A44
+#define EUR_CR_USE_CODE_BASE_ADDR_14_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_14_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_14_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_14_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_14_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_14_SIGNED   0
+#define EUR_CR_USE_CODE_BASE_15             0x0A48
+#define EUR_CR_USE_CODE_BASE_ADDR_15_MASK   0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_15_SHIFT  0
+#define EUR_CR_USE_CODE_BASE_ADDR_15_SIGNED 0
+#define EUR_CR_USE_CODE_BASE_DM_15_MASK     0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_15_SHIFT    26
+#define EUR_CR_USE_CODE_BASE_DM_15_SIGNED   0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP        0x0F88
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_CONTINUE_MASK 0x00000002U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_CONTINUE_SHIFT 1
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_CONTINUE_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_WRNOTIFY_MASK 0x00000001U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_WRNOTIFY_SHIFT 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_WRNOTIFY_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT             0x0F8C
+#define EUR_CR_PIPE0_BREAKPOINT_MODULE_ID_MASK 0x000003C0U
+#define EUR_CR_PIPE0_BREAKPOINT_MODULE_ID_SHIFT 6
+#define EUR_CR_PIPE0_BREAKPOINT_MODULE_ID_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_ID_MASK     0x00000030U
+#define EUR_CR_PIPE0_BREAKPOINT_ID_SHIFT    4
+#define EUR_CR_PIPE0_BREAKPOINT_ID_SIGNED   0
+#define EUR_CR_PIPE0_BREAKPOINT_UNTRAPPED_MASK 0x00000008U
+#define EUR_CR_PIPE0_BREAKPOINT_UNTRAPPED_SHIFT 3
+#define EUR_CR_PIPE0_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAPPED_MASK 0x00000004U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAPPED_SHIFT 2
+#define EUR_CR_PIPE0_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO0  0x0F90
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO0_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO0_ADDRESS_SHIFT 4
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO0_ADDRESS_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1  0x0F94
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_SIZE_MASK 0x00007C00U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_SIZE_SHIFT 10
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_SIZE_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_NUMBER_MASK 0x00000300U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_NUMBER_SHIFT 8
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_NUMBER_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_TAG_MASK 0x000000F8U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_TAG_SHIFT 3
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_TAG_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_DATA_MASTER_MASK 0x00000006U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SHIFT 1
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SIGNED 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_RNW_MASK 0x00000001U
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_RNW_SHIFT 0
+#define EUR_CR_PIPE0_BREAKPOINT_TRAP_INFO1_RNW_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP        0x0F98
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_CONTINUE_MASK 0x00000002U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_CONTINUE_SHIFT 1
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_CONTINUE_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_WRNOTIFY_MASK 0x00000001U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_WRNOTIFY_SHIFT 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_WRNOTIFY_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT             0x0F9C
+#define EUR_CR_PIPE1_BREAKPOINT_MODULE_ID_MASK 0x000003C0U
+#define EUR_CR_PIPE1_BREAKPOINT_MODULE_ID_SHIFT 6
+#define EUR_CR_PIPE1_BREAKPOINT_MODULE_ID_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_ID_MASK     0x00000030U
+#define EUR_CR_PIPE1_BREAKPOINT_ID_SHIFT    4
+#define EUR_CR_PIPE1_BREAKPOINT_ID_SIGNED   0
+#define EUR_CR_PIPE1_BREAKPOINT_UNTRAPPED_MASK 0x00000008U
+#define EUR_CR_PIPE1_BREAKPOINT_UNTRAPPED_SHIFT 3
+#define EUR_CR_PIPE1_BREAKPOINT_UNTRAPPED_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAPPED_MASK 0x00000004U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAPPED_SHIFT 2
+#define EUR_CR_PIPE1_BREAKPOINT_TRAPPED_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO0  0x0FA0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO0_ADDRESS_MASK 0xFFFFFFF0U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO0_ADDRESS_SHIFT 4
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO0_ADDRESS_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1  0x0FA4
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_SIZE_MASK 0x00007C00U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_SIZE_SHIFT 10
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_SIZE_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_NUMBER_MASK 0x00000300U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_NUMBER_SHIFT 8
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_NUMBER_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_TAG_MASK 0x000000F8U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_TAG_SHIFT 3
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_TAG_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_DATA_MASTER_MASK 0x00000006U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SHIFT 1
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_DATA_MASTER_SIGNED 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_RNW_MASK 0x00000001U
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_RNW_SHIFT 0
+#define EUR_CR_PIPE1_BREAKPOINT_TRAP_INFO1_RNW_SIGNED 0
+#define EUR_CR_USE_CODE_BASE(X)     (0x0A0C + (4 * (X)))
+#define EUR_CR_USE_CODE_BASE_ADDR_MASK      0x03FFFFFFU
+#define EUR_CR_USE_CODE_BASE_ADDR_SHIFT     0
+#define EUR_CR_USE_CODE_BASE_ADDR_SIGNED    0
+#define EUR_CR_USE_CODE_BASE_DM_MASK        0x0C000000U
+#define EUR_CR_USE_CODE_BASE_DM_SHIFT       26
+#define EUR_CR_USE_CODE_BASE_DM_SIGNED      0
+#define EUR_CR_USE_CODE_BASE_SIZE_UINT32 16
+#define EUR_CR_USE_CODE_BASE_NUM_ENTRIES 16
+
+#endif 
+
diff --git a/drivers/gpu/pvr/sgx_bridge.h b/drivers/gpu/pvr/sgx_bridge.h
index 10e59196ef9..3f43f76971e 100644
--- a/drivers/gpu/pvr/sgx_bridge.h
+++ b/drivers/gpu/pvr/sgx_bridge.h
@@ -27,7 +27,11 @@
 #if !defined(__SGX_BRIDGE_H__)
 #define __SGX_BRIDGE_H__
 
+#if defined (SUPPORT_SID_INTERFACE)
+#include "sgxapi.h"
+#else
 #include "sgxapi_km.h"
+#endif
 #include "sgxinfo.h"
 #include "pvr_bridge.h"
 
@@ -106,8 +110,13 @@ typedef struct PVRSRV_BRIDGE_OUT_GETPHYSPAGEADDR
 typedef struct PVRSRV_BRIDGE_IN_SGX_GETMMU_PDADDR_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hDevCookie;
+	IMG_SID					hDevMemContext;
+#else
 	IMG_HANDLE				hDevCookie;
 	IMG_HANDLE				hDevMemContext;
+#endif
 }PVRSRV_BRIDGE_IN_SGX_GETMMU_PDADDR;
 
  
@@ -121,7 +130,11 @@ typedef struct PVRSRV_BRIDGE_OUT_SGX_GETMMU_PDADDR_TAG
 typedef struct PVRSRV_BRIDGE_IN_GETCLIENTINFO_TAG
 {
 	IMG_UINT32					ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID						hDevCookie;
+#else
 	IMG_HANDLE					hDevCookie;
+#endif
 }PVRSRV_BRIDGE_IN_GETCLIENTINFO;
 
  
@@ -135,7 +148,11 @@ typedef struct PVRSRV_BRIDGE_OUT_GETINTERNALDEVINFO_TAG
 typedef struct PVRSRV_BRIDGE_IN_GETINTERNALDEVINFO_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hDevCookie;
+#else
 	IMG_HANDLE				hDevCookie;
+#endif
 }PVRSRV_BRIDGE_IN_GETINTERNALDEVINFO;
 
  
@@ -148,8 +165,12 @@ typedef struct PVRSRV_BRIDGE_OUT_GETCLIENTINFO_TAG
  
 typedef struct PVRSRV_BRIDGE_IN_RELEASECLIENTINFO_TAG
 {
-	IMG_UINT32				ui32BridgeFlags; 
-	IMG_HANDLE				hDevCookie;
+	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+#else
+	IMG_HANDLE			hDevCookie;
+#endif
 	SGX_CLIENT_INFO  	sClientInfo;
 }PVRSRV_BRIDGE_IN_RELEASECLIENTINFO;
 
@@ -157,14 +178,22 @@ typedef struct PVRSRV_BRIDGE_IN_RELEASECLIENTINFO_TAG
 typedef struct PVRSRV_BRIDGE_IN_ISPBREAKPOLL_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hDevCookie;
+#else
 	IMG_HANDLE				hDevCookie;
+#endif
 }PVRSRV_BRIDGE_IN_ISPBREAKPOLL;
 
  
 typedef struct PVRSRV_BRIDGE_IN_DOKICK_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hDevCookie;
+#else
 	IMG_HANDLE				hDevCookie;
+#endif
 	SGX_CCB_KICK			sCCBKick;
 }PVRSRV_BRIDGE_IN_DOKICK;
 
@@ -172,7 +201,11 @@ typedef struct PVRSRV_BRIDGE_IN_DOKICK_TAG
 typedef struct PVRSRV_BRIDGE_IN_SGX_SCHEDULE_PROCESS_QUEUES_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hDevCookie;
+#else
 	IMG_HANDLE				hDevCookie;
+#endif
 }PVRSRV_BRIDGE_IN_SGX_SCHEDULE_PROCESS_QUEUES;
 
 
@@ -181,7 +214,11 @@ typedef struct PVRSRV_BRIDGE_IN_SGX_SCHEDULE_PROCESS_QUEUES_TAG
 typedef struct PVRSRV_BRIDGE_IN_SUBMITTRANSFER_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hDevCookie;
+#else
 	IMG_HANDLE				hDevCookie;
+#endif
 	PVRSRV_TRANSFER_SGX_KICK 			sKick;
 }PVRSRV_BRIDGE_IN_SUBMITTRANSFER;
 
@@ -190,8 +227,12 @@ typedef struct PVRSRV_BRIDGE_IN_SUBMITTRANSFER_TAG
 typedef struct PVRSRV_BRIDGE_IN_SUBMIT2D_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hDevCookie;
+#else
 	IMG_HANDLE				hDevCookie;
-	PVRSRV_2D_SGX_KICK 				sKick;
+#endif
+	PVRSRV_2D_SGX_KICK 		sKick;
 } PVRSRV_BRIDGE_IN_SUBMIT2D;
 #endif
 #endif
@@ -200,7 +241,11 @@ typedef struct PVRSRV_BRIDGE_IN_SUBMIT2D_TAG
 typedef struct PVRSRV_BRIDGE_IN_READREGDWORD_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hDevCookie;
+#else
 	IMG_HANDLE				hDevCookie;
+#endif
     IMG_PCHAR				pszKey;
     IMG_PCHAR				pszValue;
 }PVRSRV_BRIDGE_IN_READREGDWORD;
@@ -216,14 +261,22 @@ typedef struct PVRSRV_BRIDGE_OUT_READREGDWORD_TAG
 typedef struct PVRSRV_BRIDGE_IN_SGXGETMISCINFO_TAG
 {
 	IMG_UINT32		ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hDevCookie;
+#else
 	IMG_HANDLE		hDevCookie;
+#endif
 	SGX_MISC_INFO	*psMiscInfo;
 }PVRSRV_BRIDGE_IN_SGXGETMISCINFO;
 
 typedef struct PVRSRV_BRIDGE_IN_SGXINFO_FOR_SRVINIT_TAG
 {
 	IMG_UINT32		ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hDevCookie;
+#else
 	IMG_HANDLE		hDevCookie;
+#endif
 }PVRSRV_BRIDGE_IN_SGXINFO_FOR_SRVINIT;
 
 typedef struct PVRSRV_BRIDGE_OUT_SGXINFO_FOR_SRVINIT_TAG
@@ -235,16 +288,32 @@ typedef struct PVRSRV_BRIDGE_OUT_SGXINFO_FOR_SRVINIT_TAG
 typedef struct PVRSRV_BRIDGE_IN_SGXDEVINITPART2_TAG
 {
 	IMG_UINT32		ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hDevCookie;
+#else
 	IMG_HANDLE		hDevCookie;
+#endif
 	SGX_BRIDGE_INIT_INFO	sInitInfo;
 }PVRSRV_BRIDGE_IN_SGXDEVINITPART2;
 
+typedef struct PVRSRV_BRIDGE_OUT_SGXDEVINITPART2_TAG
+{
+	PVRSRV_ERROR 	eError;
+	IMG_UINT32 		ui32KMBuildOptions;
+
+}PVRSRV_BRIDGE_OUT_SGXDEVINITPART2;
+
  
 typedef struct PVRSRV_BRIDGE_IN_2DQUERYBLTSCOMPLETE_TAG
 {
 	IMG_UINT32				ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hDevCookie;
+	IMG_SID					hKernSyncInfo;
+#else
 	IMG_HANDLE				hDevCookie;
 	IMG_HANDLE				hKernSyncInfo;
+#endif
 	IMG_BOOL				bWaitForComplete;
 }PVRSRV_BRIDGE_IN_2DQUERYBLTSCOMPLETE;
 
@@ -254,13 +323,26 @@ typedef struct PVRSRV_BRIDGE_IN_2DQUERYBLTSCOMPLETE_TAG
 typedef struct PVRSRV_BRIDGE_IN_SGXFINDSHAREDPBDESC_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
-	IMG_BOOL bLockOnFailure;
+#endif
+	IMG_BOOL   bLockOnFailure;
 	IMG_UINT32 ui32TotalPBSize;
 }PVRSRV_BRIDGE_IN_SGXFINDSHAREDPBDESC;
 
 typedef struct PVRSRV_BRIDGE_OUT_SGXFINDSHAREDPBDESC_TAG
 {
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID hKernelMemInfo;
+	IMG_SID hSharedPBDesc;
+	IMG_SID hSharedPBDescKernelMemInfoHandle;
+	IMG_SID hHWPBDescKernelMemInfoHandle;
+	IMG_SID hBlockKernelMemInfoHandle;
+	IMG_SID hHWBlockKernelMemInfoHandle;
+	IMG_SID ahSharedPBDescSubKernelMemInfoHandles[PVRSRV_BRIDGE_SGX_SHAREDPBDESC_MAX_SUBMEMINFOS];
+#else
 	IMG_HANDLE hKernelMemInfo;
 	IMG_HANDLE hSharedPBDesc;
 	IMG_HANDLE hSharedPBDescKernelMemInfoHandle;
@@ -268,6 +350,7 @@ typedef struct PVRSRV_BRIDGE_OUT_SGXFINDSHAREDPBDESC_TAG
 	IMG_HANDLE hBlockKernelMemInfoHandle;
 	IMG_HANDLE hHWBlockKernelMemInfoHandle;
 	IMG_HANDLE ahSharedPBDescSubKernelMemInfoHandles[PVRSRV_BRIDGE_SGX_SHAREDPBDESC_MAX_SUBMEMINFOS];
+#endif
 	IMG_UINT32 ui32SharedPBDescSubKernelMemInfoHandlesCount;
 	PVRSRV_ERROR eError;
 }PVRSRV_BRIDGE_OUT_SGXFINDSHAREDPBDESC;
@@ -275,7 +358,11 @@ typedef struct PVRSRV_BRIDGE_OUT_SGXFINDSHAREDPBDESC_TAG
 typedef struct PVRSRV_BRIDGE_IN_SGXUNREFSHAREDPBDESC_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hSharedPBDesc;
+#else
 	IMG_HANDLE hSharedPBDesc;
+#endif
 }PVRSRV_BRIDGE_IN_SGXUNREFSHAREDPBDESC;
 
 typedef struct PVRSRV_BRIDGE_OUT_SGXUNREFSHAREDPBDESC_TAG
@@ -287,20 +374,34 @@ typedef struct PVRSRV_BRIDGE_OUT_SGXUNREFSHAREDPBDESC_TAG
 typedef struct PVRSRV_BRIDGE_IN_SGXADDSHAREDPBDESC_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+	IMG_UINT32 ui32TotalPBSize;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+	IMG_SID    hSharedPBDescKernelMemInfo;
+	IMG_SID    hHWPBDescKernelMemInfo;
+	IMG_SID    hBlockKernelMemInfo;
+	IMG_SID    hHWBlockKernelMemInfo;
+	IMG_SID    *phKernelMemInfoHandles;
+#else
 	IMG_HANDLE hDevCookie;
 	IMG_HANDLE hSharedPBDescKernelMemInfo;
 	IMG_HANDLE hHWPBDescKernelMemInfo;
 	IMG_HANDLE hBlockKernelMemInfo;
 	IMG_HANDLE hHWBlockKernelMemInfo;
-	IMG_UINT32 ui32TotalPBSize;
 	IMG_HANDLE *phKernelMemInfoHandles;
+#endif
 	IMG_UINT32 ui32KernelMemInfoHandlesCount;
+	IMG_DEV_VIRTADDR sHWPBDescDevVAddr;
 }PVRSRV_BRIDGE_IN_SGXADDSHAREDPBDESC;
 
 typedef struct PVRSRV_BRIDGE_OUT_SGXADDSHAREDPBDESC_TAG
 {
 	PVRSRV_ERROR eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID      hSharedPBDesc;
+#else
 	IMG_HANDLE hSharedPBDesc;
+#endif
 }PVRSRV_BRIDGE_OUT_SGXADDSHAREDPBDESC;
 
 
@@ -316,9 +417,15 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_BUFFER_ARRAY_TAG
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_3D_SIGNATURE_REGISTERS_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+	IMG_SID    hDevMemContext;
+#else
 	IMG_HANDLE hDevCookie;
+	IMG_HANDLE hDevMemContext;
+#endif
 	IMG_UINT32 ui32DumpFrameNum;
-	IMG_BOOL bLastFrame;
+	IMG_BOOL   bLastFrame;
 	IMG_UINT32 *pui32Registers;
 	IMG_UINT32 ui32NumRegisters;
 }PVRSRV_BRIDGE_IN_PDUMP_3D_SIGNATURE_REGISTERS;
@@ -326,7 +433,11 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_3D_SIGNATURE_REGISTERS_TAG
 typedef struct PVRSRV_BRIDGE_IN_PDUMPCOUNTER_REGISTERS_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
+#endif
 	IMG_UINT32 ui32DumpFrameNum;
 	IMG_BOOL bLastFrame;
 	IMG_UINT32 *pui32Registers;
@@ -336,7 +447,11 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMPCOUNTER_REGISTERS_TAG
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_TA_SIGNATURE_REGISTERS_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
+#endif
 	IMG_UINT32 ui32DumpFrameNum;
 	IMG_UINT32 ui32TAKickCount;
 	IMG_BOOL bLastFrame;
@@ -347,7 +462,13 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_TA_SIGNATURE_REGISTERS_TAG
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_HWPERFCB_TAG
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+	IMG_SID				hDevMemContext;
+#else
 	IMG_HANDLE			hDevCookie;
+	IMG_HANDLE			hDevMemContext;
+#endif
 	IMG_CHAR			szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
 	IMG_UINT32			ui32FileOffset;
 	IMG_UINT32			ui32PDumpFlags;
@@ -357,12 +478,19 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_HWPERFCB_TAG
 typedef struct PVRSRV_BRIDGE_IN_PDUMP_SAVEMEM
 {
 	IMG_UINT32			ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hDevCookie;
+	IMG_SID				hDevMemContext;
+#else
 	IMG_HANDLE			hDevCookie;
+#endif
 	IMG_CHAR			szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
 	IMG_UINT32			ui32FileOffset;
 	IMG_DEV_VIRTADDR 	sDevVAddr;
 	IMG_UINT32			ui32Size;
-	IMG_UINT32			ui32DataMaster;
+#if !defined (SUPPORT_SID_INTERFACE)
+	IMG_HANDLE			hDevMemContext;
+#endif
 	IMG_UINT32			ui32PDumpFlags;
 
 }PVRSRV_BRIDGE_IN_PDUMP_SAVEMEM;
@@ -372,47 +500,77 @@ typedef struct PVRSRV_BRIDGE_IN_PDUMP_SAVEMEM
 typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_RENDER_CONTEXT_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
+#endif
 	IMG_DEV_VIRTADDR sHWRenderContextDevVAddr;
 }PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_RENDER_CONTEXT;
 
 typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_RENDER_CONTEXT_TAG
 {
 	PVRSRV_ERROR eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hHWRenderContext;
+#else
 	IMG_HANDLE hHWRenderContext;
+#endif
 }PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_RENDER_CONTEXT;
 
 typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+	IMG_SID    hHWRenderContext;
+#else
 	IMG_HANDLE hDevCookie;
 	IMG_HANDLE hHWRenderContext;
+#endif
 }PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT;
 
 typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
+#endif
 	IMG_DEV_VIRTADDR sHWTransferContextDevVAddr;
 }PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT;
 
 typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT_TAG
 {
 	PVRSRV_ERROR eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID      hHWTransferContext;
+#else
 	IMG_HANDLE hHWTransferContext;
+#endif
 }PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT;
 
 typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+	IMG_SID    hHWTransferContext;
+#else
 	IMG_HANDLE hDevCookie;
 	IMG_HANDLE hHWTransferContext;
+#endif
 }PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT;
 
 typedef struct PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
+#endif
 	IMG_DEV_VIRTADDR sHWRTDataSetDevVAddr;
 }PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET;
 
@@ -421,21 +579,34 @@ typedef struct PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET_TAG
 typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_2D_CONTEXT_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+#else
 	IMG_HANDLE hDevCookie;
+#endif
 	IMG_DEV_VIRTADDR sHW2DContextDevVAddr;
 }PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_2D_CONTEXT;
 
 typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT_TAG
 {
 	PVRSRV_ERROR eError;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hHW2DContext;
+#else
 	IMG_HANDLE hHW2DContext;
+#endif
 }PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT;
 
 typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_2D_CONTEXT_TAG
 {
 	IMG_UINT32 ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID    hDevCookie;
+	IMG_SID    hHW2DContext;
+#else
 	IMG_HANDLE hDevCookie;
 	IMG_HANDLE hHW2DContext;
+#endif
 }PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_2D_CONTEXT;
 
 #define	SGX2D_MAX_BLT_CMD_SIZ		256	
@@ -445,7 +616,11 @@ typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_2D_CONTEXT_TAG
 typedef struct PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_CB_TAG
 {
 	IMG_UINT32					ui32BridgeFlags; 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID						hDevCookie;
+#else
 	IMG_HANDLE					hDevCookie;
+#endif
 	IMG_UINT32					ui32ArraySize;
 	PVRSRV_SGX_HWPERF_CB_ENTRY	*psHWPerfCBData;
 } PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_CB;
diff --git a/drivers/gpu/pvr/sgx_mkif_km.h b/drivers/gpu/pvr/sgx_mkif_km.h
index bd8f58b02a2..839cb87bd66 100644
--- a/drivers/gpu/pvr/sgx_mkif_km.h
+++ b/drivers/gpu/pvr/sgx_mkif_km.h
@@ -32,29 +32,25 @@
 #include "sgxapi_km.h"
 
 
+#if !defined (SGX_MP_CORE_SELECT)
 #if defined(SGX_FEATURE_MP)
-	#define SGX_REG_BANK_SHIFT 			(12)
-	#define SGX_REG_BANK_SIZE 			(0x4000)
-	#if defined(SGX541)
-		#define SGX_REG_BANK_BASE_INDEX		(1)
-		#define	SGX_REG_BANK_MASTER_INDEX	(SGX_REG_BANK_BASE_INDEX + SGX_FEATURE_MP_CORE_COUNT)
-	#else
-		#define SGX_REG_BANK_BASE_INDEX		(2)
-		#define	SGX_REG_BANK_MASTER_INDEX	(1)
-	#endif 
+	#define SGX_REG_BANK_SHIFT 			(14)
+	#define SGX_REG_BANK_SIZE 			(1 << SGX_REG_BANK_SHIFT)
+	#define SGX_REG_BANK_BASE_INDEX		(2)
+	#define	SGX_REG_BANK_MASTER_INDEX	(1)
 	#define SGX_MP_CORE_SELECT(x,i) 	(x + ((i + SGX_REG_BANK_BASE_INDEX) * SGX_REG_BANK_SIZE))
 	#define SGX_MP_MASTER_SELECT(x) 	(x + (SGX_REG_BANK_MASTER_INDEX * SGX_REG_BANK_SIZE))
 #else
 	#define SGX_MP_CORE_SELECT(x,i) 	(x)
 #endif 
+#endif
 
 
 typedef struct _SGXMKIF_COMMAND_
 {
 	IMG_UINT32				ui32ServiceAddress;		
 	IMG_UINT32				ui32CacheControl;		
-	IMG_UINT32				ui32Data[4];			
-	IMG_UINT32				ui32Padding[2];			
+	IMG_UINT32				ui32Data[6];			
 } SGXMKIF_COMMAND;
 
 
@@ -82,7 +78,7 @@ typedef struct _SGXMKIF_HOST_CTL_
 	volatile IMG_UINT32		ui32PowerStatus;			
 	volatile IMG_UINT32		ui32CleanupStatus;			
 #if defined(FIX_HW_BRN_28889)
-	volatile IMG_UINT32		ui32InvalStatus;
+	volatile IMG_UINT32		ui32InvalStatus;			
 #endif
 #if defined(SUPPORT_HW_RECOVERY)
 	IMG_UINT32				ui32uKernelDetectedLockups;	
@@ -99,6 +95,7 @@ typedef struct _SGXMKIF_HOST_CTL_
 
 	IMG_UINT32				ui32TimeWraps;				
 	IMG_UINT32				ui32HostClock;				
+	IMG_UINT32				ui32AssertFail;				
 
 #if defined(SGX_FEATURE_EXTENDED_PERF_COUNTERS)
 	IMG_UINT32				aui32PerfGroup[PVRSRV_SGX_HWPERF_NUM_COUNTERS];	
@@ -106,6 +103,10 @@ typedef struct _SGXMKIF_HOST_CTL_
 #else
 	IMG_UINT32				ui32PerfGroup;									
 #endif 
+
+#if defined(FIX_HW_BRN_31939)
+	IMG_UINT32				ui32BRN31939Mem;
+#endif
 } SGXMKIF_HOST_CTL;
 
 #define	SGXMKIF_CMDTA_CTRLFLAGS_READY			0x00000001
@@ -171,14 +172,7 @@ typedef struct _SGXMKIF_TRANSFERCMD_SHARED_
 	
 
  	IMG_UINT32			ui32NumDstSyncs;
- 	PVRSRV_DEVICE_SYNC_OBJECT	asDstSyncs[SGX_MAX_DST_SYNCS];
-	
-	IMG_UINT32		ui32DstReadOpPendingVal;
-	IMG_DEV_VIRTADDR	sDstReadOpsCompleteDevAddr;
-	
-	IMG_UINT32		ui32DstWriteOpPendingVal;
-	IMG_DEV_VIRTADDR	sDstWriteOpsCompleteDevAddr;
-
+ 	PVRSRV_DEVICE_SYNC_OBJECT	asDstSyncs[SGX_MAX_DST_SYNCS];	
 	
 	IMG_UINT32		ui32TASyncWriteOpsPendingVal;
 	IMG_DEV_VIRTADDR	sTASyncWriteOpsCompleteDevVAddr;
@@ -236,7 +230,7 @@ typedef struct _SGXMKIF_HWDEVICE_SYNC_LIST_
 #define PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE 	(1UL << 0)	
 
 #if defined(FIX_HW_BRN_28889)
-#define PVRSRV_USSE_EDM_BIF_INVAL_COMPLETE 		(1UL << 0)
+#define PVRSRV_USSE_EDM_BIF_INVAL_COMPLETE 		(1UL << 0)	
 #endif
 
 #define PVRSRV_USSE_MISCINFO_READY		0x1UL
@@ -250,18 +244,21 @@ typedef struct _SGXMKIF_HWDEVICE_SYNC_LIST_
 #endif
 
 
-#define	PVRSRV_CLEANUPCMD_RT		0x1
-#define	PVRSRV_CLEANUPCMD_RC		0x2
-#define	PVRSRV_CLEANUPCMD_TC		0x3
-#define	PVRSRV_CLEANUPCMD_2DC		0x4
-#define	PVRSRV_CLEANUPCMD_PB		0x5
+#define	PVRSRV_CLEANUPCMD_RT		0x1U
+#define	PVRSRV_CLEANUPCMD_RC		0x2U
+#define	PVRSRV_CLEANUPCMD_TC		0x3U
+#define	PVRSRV_CLEANUPCMD_2DC		0x4U
+#define	PVRSRV_CLEANUPCMD_PB		0x5U
 
-#define PVRSRV_POWERCMD_POWEROFF	0x1
-#define PVRSRV_POWERCMD_IDLE		0x2
-#define PVRSRV_POWERCMD_RESUME		0x3
+#define PVRSRV_POWERCMD_POWEROFF	0x1U
+#define PVRSRV_POWERCMD_IDLE		0x2U
+#define PVRSRV_POWERCMD_RESUME		0x3U
 
+#define PVRSRV_CTXSUSPCMD_SUSPEND	0x1U
+#define PVRSRV_CTXSUSPCMD_RESUME	0x2U
 
-#if defined(SGX_FEATURE_BIF_NUM_DIRLISTS)
+
+#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
 #define SGX_BIF_DIR_LIST_INDEX_EDM	(SGX_FEATURE_BIF_NUM_DIRLISTS - 1)
 #else
 #define SGX_BIF_DIR_LIST_INDEX_EDM	(0)
@@ -323,12 +320,16 @@ typedef struct _PVRSRV_SGX_MISCINFO_INFO
 typedef struct _SGXMKIF_HWPERF_CB_ENTRY_
 {
 	IMG_UINT32	ui32FrameNo;
+	IMG_UINT32	ui32PID;
+	IMG_UINT32	ui32RTData;
 	IMG_UINT32	ui32Type;
 	IMG_UINT32	ui32Ordinal;
 	IMG_UINT32	ui32Info;
 	IMG_UINT32	ui32TimeWraps;
 	IMG_UINT32	ui32Time;
-	IMG_UINT32	ui32Counters[SGX_FEATURE_MP_CORE_COUNT][PVRSRV_SGX_HWPERF_NUM_COUNTERS];
+	
+	IMG_UINT32	ui32Counters[SGX_FEATURE_MP_CORE_COUNT_3D][PVRSRV_SGX_HWPERF_NUM_COUNTERS];
+	IMG_UINT32	ui32MiscCounters[SGX_FEATURE_MP_CORE_COUNT_3D][PVRSRV_SGX_HWPERF_NUM_MISC_COUNTERS];
 } SGXMKIF_HWPERF_CB_ENTRY;
 
 typedef struct _SGXMKIF_HWPERF_CB_
diff --git a/drivers/gpu/pvr/sgx_options.h b/drivers/gpu/pvr/sgx_options.h
index 6f918947d8d..e81f3bf1d25 100644
--- a/drivers/gpu/pvr/sgx_options.h
+++ b/drivers/gpu/pvr/sgx_options.h
@@ -26,79 +26,84 @@
 
 #if defined(DEBUG) || defined (INTERNAL_TEST)
 #define DEBUG_SET_OFFSET	OPTIONS_BIT0
-#define OPTIONS_BIT0		0x1
+#define OPTIONS_BIT0		0x1U
 #else
 #define OPTIONS_BIT0		0x0
 #endif 
 
 #if defined(PDUMP) || defined (INTERNAL_TEST)
 #define PDUMP_SET_OFFSET	OPTIONS_BIT1
-#define OPTIONS_BIT1		(0x1 << 1)
+#define OPTIONS_BIT1		(0x1U << 1)
 #else
 #define OPTIONS_BIT1		0x0
 #endif 
 
 #if defined(PVRSRV_USSE_EDM_STATUS_DEBUG) || defined (INTERNAL_TEST)
 #define PVRSRV_USSE_EDM_STATUS_DEBUG_SET_OFFSET		OPTIONS_BIT2
-#define OPTIONS_BIT2		(0x1 << 2)
+#define OPTIONS_BIT2		(0x1U << 2)
 #else
 #define OPTIONS_BIT2		0x0
 #endif 
 
 #if defined(SUPPORT_HW_RECOVERY) || defined (INTERNAL_TEST)
 #define SUPPORT_HW_RECOVERY_SET_OFFSET	OPTIONS_BIT3
-#define OPTIONS_BIT3		(0x1 << 3)
+#define OPTIONS_BIT3		(0x1U << 3)
 #else
 #define OPTIONS_BIT3		0x0
 #endif 
 
 
 
+#if defined (SUPPORT_SID_INTERFACE)
+#define PVR_SECURE_HANDLES_SET_OFFSET	OPTIONS_BIT4
+#define OPTIONS_BIT4		(0x1U << 4)
+#else
 #if defined(PVR_SECURE_HANDLES) || defined (INTERNAL_TEST)
 #define PVR_SECURE_HANDLES_SET_OFFSET	OPTIONS_BIT4
-#define OPTIONS_BIT4		(0x1 << 4)
+#define OPTIONS_BIT4		(0x1U << 4)
 #else
 #define OPTIONS_BIT4		0x0
 #endif 
+#endif
 
 #if defined(SGX_BYPASS_SYSTEM_CACHE) || defined (INTERNAL_TEST)
 #define SGX_BYPASS_SYSTEM_CACHE_SET_OFFSET	OPTIONS_BIT5
-#define OPTIONS_BIT5		(0x1 << 5)
+#define OPTIONS_BIT5		(0x1U << 5)
 #else
 #define OPTIONS_BIT5		0x0
 #endif 
 
 #if defined(SGX_DMS_AGE_ENABLE) || defined (INTERNAL_TEST)
 #define SGX_DMS_AGE_ENABLE_SET_OFFSET	OPTIONS_BIT6
-#define OPTIONS_BIT6		(0x1 << 6)
+#define OPTIONS_BIT6		(0x1U << 6)
 #else
 #define OPTIONS_BIT6		0x0
 #endif 
 
 #if defined(SGX_FAST_DPM_INIT) || defined (INTERNAL_TEST)
 #define SGX_FAST_DPM_INIT_SET_OFFSET	OPTIONS_BIT8
-#define OPTIONS_BIT8		(0x1 << 8)
+#define OPTIONS_BIT8		(0x1U << 8)
 #else
 #define OPTIONS_BIT8		0x0
 #endif 
 
 #if defined(SGX_FEATURE_WRITEBACK_DCU) || defined (INTERNAL_TEST)
 #define SGX_FEATURE_DCU_SET_OFFSET	OPTIONS_BIT9
-#define OPTIONS_BIT9		(0x1 << 9)
+#define OPTIONS_BIT9		(0x1U << 9)
 #else
 #define OPTIONS_BIT9		0x0
 #endif 
 
 #if defined(SGX_FEATURE_MP) || defined (INTERNAL_TEST)
 #define SGX_FEATURE_MP_SET_OFFSET	OPTIONS_BIT10
-#define OPTIONS_BIT10		(0x1 << 10)
+#define OPTIONS_BIT10		(0x1U << 10)
 #else
 #define OPTIONS_BIT10		0x0
 #endif 
 
 #if defined(SGX_FEATURE_MULTITHREADED_UKERNEL) || defined (INTERNAL_TEST)
 #define SGX_FEATURE_MULTITHREADED_UKERNEL_SET_OFFSET	OPTIONS_BIT11
-#define OPTIONS_BIT11		(0x1 << 11)
+#define OPTIONS_BIT11		(0x1U << 11)
 #else
 #define OPTIONS_BIT11		0x0
 #endif 
@@ -107,7 +112,7 @@
 
 #if defined(SGX_FEATURE_OVERLAPPED_SPM) || defined (INTERNAL_TEST)
 #define SGX_FEATURE_OVERLAPPED_SPM_SET_OFFSET	OPTIONS_BIT12
-#define OPTIONS_BIT12		(0x1 << 12)
+#define OPTIONS_BIT12		(0x1U << 12)
 #else
 #define OPTIONS_BIT12		0x0
 #endif 
@@ -115,14 +120,14 @@
 
 #if defined(SGX_FEATURE_SYSTEM_CACHE) || defined (INTERNAL_TEST)
 #define SGX_FEATURE_SYSTEM_CACHE_SET_OFFSET	OPTIONS_BIT13
-#define OPTIONS_BIT13		(0x1 << 13)
+#define OPTIONS_BIT13		(0x1U << 13)
 #else
 #define OPTIONS_BIT13		0x0
 #endif 
 
 #if defined(SGX_SUPPORT_HWPROFILING) || defined (INTERNAL_TEST)
 #define SGX_SUPPORT_HWPROFILING_SET_OFFSET	OPTIONS_BIT14
-#define OPTIONS_BIT14		(0x1 << 14)
+#define OPTIONS_BIT14		(0x1U << 14)
 #else
 #define OPTIONS_BIT14		0x0
 #endif 
@@ -131,28 +136,28 @@
 
 #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) || defined (INTERNAL_TEST)
 #define SUPPORT_ACTIVE_POWER_MANAGEMENT_SET_OFFSET	OPTIONS_BIT15
-#define OPTIONS_BIT15		(0x1 << 15)
+#define OPTIONS_BIT15		(0x1U << 15)
 #else
 #define OPTIONS_BIT15		0x0
 #endif 
 
 #if defined(SUPPORT_DISPLAYCONTROLLER_TILING) || defined (INTERNAL_TEST)
 #define SUPPORT_DISPLAYCONTROLLER_TILING_SET_OFFSET	OPTIONS_BIT16
-#define OPTIONS_BIT16		(0x1 << 16)
+#define OPTIONS_BIT16		(0x1U << 16)
 #else
 #define OPTIONS_BIT16		0x0
 #endif 
 
 #if defined(SUPPORT_PERCONTEXT_PB) || defined (INTERNAL_TEST)
 #define SUPPORT_PERCONTEXT_PB_SET_OFFSET	OPTIONS_BIT17
-#define OPTIONS_BIT17		(0x1 << 17)
+#define OPTIONS_BIT17		(0x1U << 17)
 #else
 #define OPTIONS_BIT17		0x0
 #endif 
 
 #if defined(SUPPORT_SGX_HWPERF) || defined (INTERNAL_TEST)
 #define SUPPORT_SGX_HWPERF_SET_OFFSET	OPTIONS_BIT18
-#define OPTIONS_BIT18		(0x1 << 18)
+#define OPTIONS_BIT18		(0x1U << 18)
 #else
 #define OPTIONS_BIT18		0x0
 #endif 
@@ -161,38 +166,45 @@
 
 #if defined(SUPPORT_SGX_MMU_DUMMY_PAGE) || defined (INTERNAL_TEST)
 #define SUPPORT_SGX_MMU_DUMMY_PAGE_SET_OFFSET	OPTIONS_BIT19
-#define OPTIONS_BIT19		(0x1 << 19)
+#define OPTIONS_BIT19		(0x1U << 19)
 #else
 #define OPTIONS_BIT19		0x0
 #endif 
 
 #if defined(SUPPORT_SGX_PRIORITY_SCHEDULING) || defined (INTERNAL_TEST)
 #define SUPPORT_SGX_PRIORITY_SCHEDULING_SET_OFFSET	OPTIONS_BIT20
-#define OPTIONS_BIT20		(0x1 << 20)
+#define OPTIONS_BIT20		(0x1U << 20)
 #else
 #define OPTIONS_BIT20		0x0
 #endif 
 
 #if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING) || defined (INTERNAL_TEST)
 #define SUPPORT_SGX_LOW_LATENCY_SCHEDULING_SET_OFFSET	OPTIONS_BIT21
-#define OPTIONS_BIT21		(0x1 << 21)
+#define OPTIONS_BIT21		(0x1U << 21)
 #else
 #define OPTIONS_BIT21		0x0
 #endif 
 
 #if defined(USE_SUPPORT_NO_TA3D_OVERLAP) || defined (INTERNAL_TEST)
 #define USE_SUPPORT_NO_TA3D_OVERLAP_SET_OFFSET	OPTIONS_BIT22
-#define OPTIONS_BIT22		(0x1 << 22)
+#define OPTIONS_BIT22		(0x1U << 22)
 #else
 #define OPTIONS_BIT22		0x0
 #endif 
 
-
 #if defined(SGX_FEATURE_MP) || defined (INTERNAL_TEST)
+#if defined(SGX_FEATURE_MP_CORE_COUNT)
 #define OPTIONS_HIGHBYTE ((SGX_FEATURE_MP_CORE_COUNT-1) << SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET)
 #define SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET	28UL
 #define SGX_FEATURE_MP_CORE_COUNT_SET_MASK		0xFF
 #else
+#define OPTIONS_HIGHBYTE (((SGX_FEATURE_MP_CORE_COUNT_TA-1) << SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET) |\
+		((SGX_FEATURE_MP_CORE_COUNT_3D-1) << SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET_3D))
+#define SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET	24UL
+#define SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET_3D	28UL
+#define SGX_FEATURE_MP_CORE_COUNT_SET_MASK		0xFF
+#endif
+#else 
 #define OPTIONS_HIGHBYTE	0x0
 #endif 
 
diff --git a/drivers/gpu/pvr/sgxapi_km.h b/drivers/gpu/pvr/sgxapi_km.h
index f38a85c0dcd..3e4b281b3f9 100644
--- a/drivers/gpu/pvr/sgxapi_km.h
+++ b/drivers/gpu/pvr/sgxapi_km.h
@@ -51,19 +51,25 @@ extern "C" {
 #define SGX_PDSPIXEL_CODEDATA_HEAP_ID			6
 #define SGX_PDSVERTEX_CODEDATA_HEAP_ID			7
 #define SGX_SYNCINFO_HEAP_ID					8
-#define SGX_3DPARAMETERS_HEAP_ID				9
+#define SGX_SHARED_3DPARAMETERS_HEAP_ID				9
+#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_ID			10
 #if defined(SUPPORT_SGX_GENERAL_MAPPING_HEAP)
-#define SGX_GENERAL_MAPPING_HEAP_ID				10
+#define SGX_GENERAL_MAPPING_HEAP_ID				11
 #endif
 #if defined(SGX_FEATURE_2D_HARDWARE)
-#define SGX_2D_HEAP_ID							11
+#define SGX_2D_HEAP_ID							12
 #else
 #if defined(FIX_HW_BRN_26915)
-#define SGX_CGBUFFER_HEAP_ID					12
+#define SGX_CGBUFFER_HEAP_ID					13
 #endif
 #endif
-#define SGX_MAX_HEAP_ID							13
+#define SGX_MAX_HEAP_ID							14
 
+#if (defined(SUPPORT_PERCONTEXT_PB) || defined(SUPPORT_HYBRID_PB))
+#define SGX_3DPARAMETERS_HEAP_ID			SGX_PERCONTEXT_3DPARAMETERS_HEAP_ID	
+#else
+#define SGX_3DPARAMETERS_HEAP_ID			SGX_SHARED_3DPARAMETERS_HEAP_ID
+#endif
 #if defined(SGX543) || defined(SGX544) || defined(SGX554)
 #define SGX_USE_CODE_SEGMENT_RANGE_BITS		23
 #else
@@ -78,20 +84,17 @@ extern "C" {
 #define SGX_MAX_TA_SRC_SYNCS			1
 #define SGX_MAX_3D_SRC_SYNCS			4
 #else
-#if defined(ANDROID)
 #define SGX_MAX_SRC_SYNCS				8
 #define SGX_MAX_DST_SYNCS				1
-#else
-#define SGX_MAX_SRC_SYNCS				4
-#define SGX_MAX_DST_SYNCS				1
-#endif
 #endif
 
 
 #if defined(SGX_FEATURE_EXTENDED_PERF_COUNTERS)
 #define	PVRSRV_SGX_HWPERF_NUM_COUNTERS	8
+#define	PVRSRV_SGX_HWPERF_NUM_MISC_COUNTERS 11
 #else
 #define	PVRSRV_SGX_HWPERF_NUM_COUNTERS	9
+#define	PVRSRV_SGX_HWPERF_NUM_MISC_COUNTERS 8
 #endif 
 
 #define PVRSRV_SGX_HWPERF_INVALID					0x1
@@ -102,11 +105,19 @@ extern "C" {
 #define PVRSRV_SGX_HWPERF_2D						0x5
 #define PVRSRV_SGX_HWPERF_POWER						0x6
 #define PVRSRV_SGX_HWPERF_PERIODIC					0x7
+#define PVRSRV_SGX_HWPERF_3DSPM						0x8
 
 #define PVRSRV_SGX_HWPERF_MK_EVENT					0x101
 #define PVRSRV_SGX_HWPERF_MK_TA						0x102
 #define PVRSRV_SGX_HWPERF_MK_3D						0x103
 #define PVRSRV_SGX_HWPERF_MK_2D						0x104
+#define PVRSRV_SGX_HWPERF_MK_TRANSFER_DUMMY				0x105
+#define PVRSRV_SGX_HWPERF_MK_TA_DUMMY					0x106
+#define PVRSRV_SGX_HWPERF_MK_3D_DUMMY					0x107
+#define PVRSRV_SGX_HWPERF_MK_2D_DUMMY					0x108
+#define PVRSRV_SGX_HWPERF_MK_TA_LOCKUP					0x109
+#define PVRSRV_SGX_HWPERF_MK_3D_LOCKUP					0x10A
+#define PVRSRV_SGX_HWPERF_MK_2D_LOCKUP					0x10B
 
 #define PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT			28
 #define PVRSRV_SGX_HWPERF_TYPE_OP_MASK				((1UL << PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT) - 1)
@@ -124,6 +135,19 @@ extern "C" {
 #define PVRSRV_SGX_HWPERF_TYPE_POWER_START			(PVRSRV_SGX_HWPERF_POWER | PVRSRV_SGX_HWPERF_TYPE_OP_START)
 #define PVRSRV_SGX_HWPERF_TYPE_POWER_END			(PVRSRV_SGX_HWPERF_POWER | PVRSRV_SGX_HWPERF_TYPE_OP_END)
 #define PVRSRV_SGX_HWPERF_TYPE_PERIODIC				(PVRSRV_SGX_HWPERF_PERIODIC)
+#define PVRSRV_SGX_HWPERF_TYPE_3DSPM_START			(PVRSRV_SGX_HWPERF_3DSPM | PVRSRV_SGX_HWPERF_TYPE_OP_START)
+#define PVRSRV_SGX_HWPERF_TYPE_3DSPM_END			(PVRSRV_SGX_HWPERF_3DSPM | PVRSRV_SGX_HWPERF_TYPE_OP_END)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_TRANSFER_DUMMY_START		(PVRSRV_SGX_HWPERF_MK_TRANSFER_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_START)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_TRANSFER_DUMMY_END		(PVRSRV_SGX_HWPERF_MK_TRANSFER_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_END)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_TA_DUMMY_START		(PVRSRV_SGX_HWPERF_MK_TA_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_START)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_TA_DUMMY_END			(PVRSRV_SGX_HWPERF_MK_TA_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_END)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_3D_DUMMY_START		(PVRSRV_SGX_HWPERF_MK_3D_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_START)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_3D_DUMMY_END			(PVRSRV_SGX_HWPERF_MK_3D_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_END)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_2D_DUMMY_START		(PVRSRV_SGX_HWPERF_MK_2D_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_START)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_2D_DUMMY_END			(PVRSRV_SGX_HWPERF_MK_2D_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_END)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_TA_LOCKUP			(PVRSRV_SGX_HWPERF_MK_TA_LOCKUP)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_3D_LOCKUP			(PVRSRV_SGX_HWPERF_MK_3D_LOCKUP)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_2D_LOCKUP			(PVRSRV_SGX_HWPERF_MK_2D_LOCKUP)
 
 #define PVRSRV_SGX_HWPERF_TYPE_MK_EVENT_START		(PVRSRV_SGX_HWPERF_MK_EVENT | PVRSRV_SGX_HWPERF_TYPE_OP_START)
 #define PVRSRV_SGX_HWPERF_TYPE_MK_EVENT_END			(PVRSRV_SGX_HWPERF_MK_EVENT | PVRSRV_SGX_HWPERF_TYPE_OP_END)
@@ -144,11 +168,15 @@ extern "C" {
 typedef struct _PVRSRV_SGX_HWPERF_CB_ENTRY_
 {
 	IMG_UINT32	ui32FrameNo;
+	IMG_UINT32	ui32PID;
+	IMG_UINT32	ui32RTData;
 	IMG_UINT32	ui32Type;
 	IMG_UINT32	ui32Ordinal;
 	IMG_UINT32	ui32Info;
 	IMG_UINT32	ui32Clocksx16;
-	IMG_UINT32	ui32Counters[SGX_FEATURE_MP_CORE_COUNT][PVRSRV_SGX_HWPERF_NUM_COUNTERS];
+		
+	IMG_UINT32	ui32Counters[SGX_FEATURE_MP_CORE_COUNT_3D][PVRSRV_SGX_HWPERF_NUM_COUNTERS];
+	IMG_UINT32	ui32MiscCounters[SGX_FEATURE_MP_CORE_COUNT_3D][PVRSRV_SGX_HWPERF_NUM_MISC_COUNTERS];
 } PVRSRV_SGX_HWPERF_CB_ENTRY;
 
 
@@ -171,7 +199,6 @@ typedef enum _SGX_MISC_INFO_REQUEST_
 	SGX_MISC_INFO_REQUEST_SET_HWPERF_STATUS,
 #if defined(SGX_FEATURE_DATA_BREAKPOINTS)
 	SGX_MISC_INFO_REQUEST_SET_BREAKPOINT,
-	SGX_MISC_INFO_REQUEST_WAIT_FOR_BREAKPOINT,
 	SGX_MISC_INFO_REQUEST_POLL_BREAKPOINT,
 	SGX_MISC_INFO_REQUEST_RESUME_BREAKPOINT,
 #endif 
@@ -274,6 +301,7 @@ typedef struct _PVRSRV_SGX_MISCINFO_SET_HWPERF_STATUS
 typedef struct _SGX_MISC_INFO_
 {
 	SGX_MISC_INFO_REQUEST	eRequest;	
+	IMG_UINT32				ui32Padding;
 #if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
 	IMG_DEV_VIRTADDR			sDevVAddrSrc;		
 	IMG_DEV_VIRTADDR			sDevVAddrDest;		
@@ -323,6 +351,7 @@ typedef struct _PVRSRV_SGX_PDUMP_CONTEXT_
 } PVRSRV_SGX_PDUMP_CONTEXT;
 
 
+#if !defined (SUPPORT_SID_INTERFACE)
 typedef struct _SGX_KICKTA_DUMP_ROFF_
 {
 	IMG_HANDLE			hKernelMemInfo;						
@@ -331,8 +360,13 @@ typedef struct _SGX_KICKTA_DUMP_ROFF_
 	IMG_UINT32			ui32Value;							
 	IMG_PCHAR			pszName;							
 } SGX_KICKTA_DUMP_ROFF, *PSGX_KICKTA_DUMP_ROFF;
+#endif
 
+#if defined (SUPPORT_SID_INTERFACE)
+typedef struct _SGX_KICKTA_DUMP_BUFFER_KM_
+#else
 typedef struct _SGX_KICKTA_DUMP_BUFFER_
+#endif
 {
 	IMG_UINT32			ui32SpaceUsed;
 	IMG_UINT32			ui32Start;							
@@ -347,8 +381,13 @@ typedef struct _SGX_KICKTA_DUMP_BUFFER_
 	IMG_DEV_VIRTADDR	sCtrlDevVAddr;						
 #endif
 	IMG_PCHAR			pszName;							
+#if defined (SUPPORT_SID_INTERFACE)
+} SGX_KICKTA_DUMP_BUFFER_KM, *PSGX_KICKTA_DUMP_BUFFER_KM;
+#else
 } SGX_KICKTA_DUMP_BUFFER, *PSGX_KICKTA_DUMP_BUFFER;
+#endif
 
+#if !defined (SUPPORT_SID_INTERFACE)
 #ifdef PDUMP
 typedef struct _SGX_KICKTA_PDUMP_
 {
@@ -365,6 +404,7 @@ typedef struct _SGX_KICKTA_PDUMP_
 	IMG_UINT32						ui32ROffArraySize;
 } SGX_KICKTA_PDUMP, *PSGX_KICKTA_PDUMP;
 #endif	
+#endif 
 
 #if defined(TRANSFER_QUEUE)
 #if defined(SGX_FEATURE_2D_HARDWARE)
diff --git a/drivers/gpu/pvr/sgxdefs.h b/drivers/gpu/pvr/sgxdefs.h
index 9e5effbc853..3b870596fb5 100644
--- a/drivers/gpu/pvr/sgxdefs.h
+++ b/drivers/gpu/pvr/sgxdefs.h
@@ -45,11 +45,12 @@
 #if defined(SGX540)
 #include "sgx540defs.h"
 #else
-#if defined(SGX541)
-#include "sgx541defs.h"
-#else
 #if defined(SGX543)
+#if SGX_CORE_REV == 113 || SGX_CORE_REV == 122 || SGX_CORE_REV == 1221 || SGX_CORE_REV == 140
+#include "sgx543_v1.164defs.h"
+#else
 #include "sgx543defs.h"
+#endif
 #else
 #if defined(SGX544)
 #include "sgx544defs.h"
@@ -72,15 +73,10 @@
 #endif
 #endif
 #endif
-#endif
 
 #if defined(SGX_FEATURE_MP)
-#if defined(SGX541)
-#if SGX_CORE_REV == 100
-#include "sgx541_100mpdefs.h"
-#else
-#include "sgx541mpdefs.h"
-#endif 
+#if defined(SGX554)
+#include "sgxmpplusdefs.h"
 #else
 #include "sgxmpdefs.h"
 #endif 
diff --git a/drivers/gpu/pvr/sgxerrata.h b/drivers/gpu/pvr/sgxerrata.h
index ded7a524283..8d76618accb 100644
--- a/drivers/gpu/pvr/sgxerrata.h
+++ b/drivers/gpu/pvr/sgxerrata.h
@@ -68,6 +68,10 @@
 		#define FIX_HW_BRN_22934	
 		#define FIX_HW_BRN_28889
 	#else
+	#if SGX_CORE_REV == 1111
+		#define FIX_HW_BRN_22934	
+		#define FIX_HW_BRN_28889
+	#else
 	#if SGX_CORE_REV == 120
 		#define FIX_HW_BRN_22934	
 		#define FIX_HW_BRN_28889
@@ -88,6 +92,7 @@
 	#endif
 	#endif
 	#endif
+	#endif
 #endif
         #endif
 	
@@ -240,15 +245,113 @@
 	#endif
 
 	#if SGX_CORE_REV == 113
+        #define FIX_HW_BRN_29954
+		#define FIX_HW_BRN_29997
 		#define FIX_HW_BRN_30954
+		#define FIX_HW_BRN_31093
+		#define FIX_HW_BRN_31195
+		#define FIX_HW_BRN_31278
+ 		#if defined(SGX_FEATURE_MP)
+			#define FIX_HW_BRN_31425
+		#endif
+		#define FIX_HW_BRN_31620
+		#define FIX_HW_BRN_31542
+		#define FIX_HW_BRN_32044 
 			
 	#else
 	#if SGX_CORE_REV == 122
-		 #define FIX_HW_BRN_30954
-
+        #define FIX_HW_BRN_29954
+		#define FIX_HW_BRN_29997
+		#define FIX_HW_BRN_30954
+		#define FIX_HW_BRN_31093
+		#define FIX_HW_BRN_31195
+		#define FIX_HW_BRN_31278
+ 		#if defined(SGX_FEATURE_MP)
+			#define FIX_HW_BRN_31425
+		#endif
+		#define FIX_HW_BRN_31620
+		#define FIX_HW_BRN_31542
+		#define FIX_HW_BRN_32044 
+			
+	#else
+	#if SGX_CORE_REV == 1221
+        #define FIX_HW_BRN_29954
+        #define FIX_HW_BRN_31195
+		#define FIX_HW_BRN_31278
+ 		#if defined(SGX_FEATURE_MP)
+			#define FIX_HW_BRN_31425
+		#endif
+		#define FIX_HW_BRN_31620
+		#define FIX_HW_BRN_31542
+		#define FIX_HW_BRN_32044 
+			
 	#else
 	#if SGX_CORE_REV == 140
-		 #define FIX_HW_BRN_30954
+        #define FIX_HW_BRN_29954
+		#define FIX_HW_BRN_30954
+		#define FIX_HW_BRN_31093
+		#define FIX_HW_BRN_31195
+		#define FIX_HW_BRN_31278
+ 		#if defined(SGX_FEATURE_MP)
+			#define FIX_HW_BRN_31425
+		#endif
+		#define FIX_HW_BRN_31620
+		#define FIX_HW_BRN_31542
+		#define FIX_HW_BRN_32044 
+			
+	#else
+	#if SGX_CORE_REV == 1401
+        #define FIX_HW_BRN_29954
+		#define FIX_HW_BRN_30954
+		#define FIX_HW_BRN_31195
+		#define FIX_HW_BRN_31278
+ 		#if defined(SGX_FEATURE_MP)
+			#define FIX_HW_BRN_31425
+		#endif
+		#define FIX_HW_BRN_31620
+		#define FIX_HW_BRN_31542
+		#define FIX_HW_BRN_32044 
+			
+	#else
+	#if SGX_CORE_REV == 141
+ 		#if defined(SGX_FEATURE_MP)
+			#define FIX_HW_BRN_31425
+		#endif
+		#define FIX_HW_BRN_32044 
+			
+	#else
+	#if SGX_CORE_REV == 211
+		#define FIX_HW_BRN_31093
+		#define FIX_HW_BRN_31195
+		#define FIX_HW_BRN_31278
+ 		#if defined(SGX_FEATURE_MP)
+			#define FIX_HW_BRN_31425
+		#endif
+		#define FIX_HW_BRN_31620
+		#define FIX_HW_BRN_31542
+		#define FIX_HW_BRN_32044 
+			
+	#else
+	#if SGX_CORE_REV == 2111
+		#define FIX_HW_BRN_31093
+		#define FIX_HW_BRN_31195
+		#define FIX_HW_BRN_31278
+ 		#if defined(SGX_FEATURE_MP)
+			#define FIX_HW_BRN_31425
+		#endif
+		#define FIX_HW_BRN_31620
+		#define FIX_HW_BRN_31542
+		#define FIX_HW_BRN_30970 
+		#define FIX_HW_BRN_32044 
+		#define FIX_HW_BRN_30982 
+			
+	#else
+	#if SGX_CORE_REV == 213
+		#if defined(SGX_FEATURE_MP)
+			#define FIX_HW_BRN_31425
+		#endif
+		#define FIX_HW_BRN_31542
+		#define FIX_HW_BRN_32044 
 			
 	#else
 	#if SGX_CORE_REV == SGX_CORE_REV_HEAD
@@ -259,6 +362,12 @@
 	#endif
 	#endif
 	#endif
+	#endif
+	#endif
+	#endif
+	#endif
+	#endif
+	#endif
 	
 	#define SGX_CORE_DEFINED
 #endif
@@ -272,7 +381,24 @@
 	#endif
 
 	#if SGX_CORE_REV == 100
-		
+ 		#if defined(SGX_FEATURE_MP)
+ 			#define FIX_HW_BRN_31425
+ 		#endif
+	#else
+	#if SGX_CORE_REV == 102
+ 		#if defined(SGX_FEATURE_MP)
+ 			#define FIX_HW_BRN_31425
+ 		#endif
+	#else
+	#if SGX_CORE_REV == 103
+ 		#if defined(SGX_FEATURE_MP)
+ 			#define FIX_HW_BRN_31425
+ 		#endif
+	#else
+	#if SGX_CORE_REV == 105
+ 		#if defined(SGX_FEATURE_MP)
+ 			#define FIX_HW_BRN_31425
+ 		#endif
 	#else
 	#if SGX_CORE_REV == SGX_CORE_REV_HEAD
 		
@@ -280,6 +406,9 @@
 		#error "sgxerrata.h: SGX544 Core Revision unspecified"
 	#endif
 	#endif
+	#endif
+	#endif
+	#endif
 	
 	#define SGX_CORE_DEFINED
 #endif
@@ -302,12 +431,13 @@
 	#if SGX_CORE_REV == 109
 		#define FIX_HW_BRN_29702
 		#define FIX_HW_BRN_29823
+		#define FIX_HW_BRN_31939
 	#else
 	#if SGX_CORE_REV == 1012
- 		#define FIX_HW_BRN_29823
+		#define FIX_HW_BRN_31939
 	#else
 	#if SGX_CORE_REV == 1013
- 		#define FIX_HW_BRN_29823
+		#define FIX_HW_BRN_31939
 	#else
 	#if SGX_CORE_REV == SGX_CORE_REV_HEAD
 		
@@ -331,6 +461,16 @@
 	#endif
 
 	#if SGX_CORE_REV == 100
+ 		#if defined(SGX_FEATURE_MP)
+ 			#define FIX_HW_BRN_31425
+ 		#endif
+	#else
+	#if SGX_CORE_REV == 101
+ 		#if defined(SGX_FEATURE_MP)
+ 			#define FIX_HW_BRN_31425
+ 		#endif
+	#else
+	#if SGX_CORE_REV == 123
 		
 	#else
 	#if SGX_CORE_REV == SGX_CORE_REV_HEAD
@@ -339,6 +479,8 @@
 		#error "sgxerrata.h: SGX554 Core Revision unspecified"
 	#endif
 	#endif
+	#endif
+	#endif
 	
 	#define SGX_CORE_DEFINED
 #endif
diff --git a/drivers/gpu/pvr/sgxfeaturedefs.h b/drivers/gpu/pvr/sgxfeaturedefs.h
index 714bea3027a..97da0078e3b 100644
--- a/drivers/gpu/pvr/sgxfeaturedefs.h
+++ b/drivers/gpu/pvr/sgxfeaturedefs.h
@@ -52,6 +52,7 @@
 	#define SGX_FEATURE_2D_HARDWARE
 	#define SGX_FEATURE_AUTOCLOCKGATING
 	#define SUPPORT_SGX_GENERAL_MAPPING_HEAP
+	#define SGX_FEATURE_EDM_VERTEX_PDSADDR_FULL_RANGE
 #else
 #if defined(SGX540)
 	#define SGX_CORE_FRIENDLY_NAME							"SGX540"
@@ -60,16 +61,6 @@
 	#define SGX_FEATURE_AUTOCLOCKGATING
 	#define SGX_FEATURE_MULTI_EVENT_KICK
 #else
-#if defined(SGX541)
-	#define SGX_CORE_FRIENDLY_NAME							"SGX541"
-	#define SGX_CORE_ID										SGX_CORE_ID_541
-	#define SGX_FEATURE_ADDRESS_SPACE_SIZE					(32)
-	#define SGX_FEATURE_MULTIPLE_MEM_CONTEXTS
-	#define SGX_FEATURE_BIF_NUM_DIRLISTS					(8)
-	#define SGX_FEATURE_AUTOCLOCKGATING
-    #define SGX_FEATURE_SPM_MODE_0
-	#define SGX_FEATURE_MULTI_EVENT_KICK
-#else
 #if defined(SGX543)
 	#define SGX_CORE_FRIENDLY_NAME							"SGX543"
 	#define SGX_CORE_ID										SGX_CORE_ID_543
@@ -83,9 +74,19 @@
     #define SGX_FEATURE_SPM_MODE_0
 	#define SGX_FEATURE_MULTI_EVENT_KICK
 	#define SGX_FEATURE_DATA_BREAKPOINTS
+    #define SGX_FEATURE_PERPIPE_BKPT_REGS
+    #define SGX_FEATURE_PERPIPE_BKPT_REGS_NUMPIPES          (2)
 	#define SGX_FEATURE_2D_HARDWARE
 	#define SGX_FEATURE_PTLA
 	#define SGX_FEATURE_EXTENDED_PERF_COUNTERS
+	#define SGX_FEATURE_EDM_VERTEX_PDSADDR_FULL_RANGE
+	#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING)
+		#if defined(SGX_FEATURE_MP)
+		#define SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH
+		#endif
+		#define SGX_FEATURE_SLAVE_VDM_CONTEXT_SWITCH
+		#define SGX_FEATURE_ISP_CONTEXT_SWITCH_REV_3
+	#endif
 #else
 #if defined(SGX544)
 	#define SGX_CORE_FRIENDLY_NAME							"SGX544"
@@ -99,8 +100,15 @@
 	#define SGX_FEATURE_MONOLITHIC_UKERNEL
     #define SGX_FEATURE_SPM_MODE_0
 	#define SGX_FEATURE_MULTI_EVENT_KICK
-	#define SGX_FEATURE_DATA_BREAKPOINTS
 	#define SGX_FEATURE_EXTENDED_PERF_COUNTERS
+	#define SGX_FEATURE_EDM_VERTEX_PDSADDR_FULL_RANGE
+	#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING)
+		#if defined(SGX_FEATURE_MP)
+		#define SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH
+		#endif
+		#define SGX_FEATURE_SLAVE_VDM_CONTEXT_SWITCH
+		#define SGX_FEATURE_ISP_CONTEXT_SWITCH_REV_3
+	#endif
 #else
 #if defined(SGX545)
 	#define SGX_CORE_FRIENDLY_NAME							"SGX545"
@@ -130,6 +138,14 @@
 	
 	#define SGX_FEATURE_BIF_WIDE_TILING_AND_4K_ADDRESS
 	#define SGX_FEATURE_MULTI_EVENT_KICK
+	#define SGX_FEATURE_EDM_VERTEX_PDSADDR_FULL_RANGE
+	#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING)
+		#if defined(USE_SGX_CORE_REV_HEAD)
+			#define SGX_FEATURE_FAST_RENDER_CONTEXT_SWITCH
+		#endif
+		#define SGX_FEATURE_SLAVE_VDM_CONTEXT_SWITCH
+		#define SGX_FEATURE_ISP_CONTEXT_SWITCH_REV_2
+	#endif
 #else
 #if defined(SGX554)
 	#define SGX_CORE_FRIENDLY_NAME							"SGX554"
@@ -143,8 +159,17 @@
 	#define SGX_FEATURE_MONOLITHIC_UKERNEL
     #define SGX_FEATURE_SPM_MODE_0
 	#define SGX_FEATURE_MULTI_EVENT_KICK
-	#define SGX_FEATURE_DATA_BREAKPOINTS
+	#define SGX_FEATURE_2D_HARDWARE
+	#define SGX_FEATURE_PTLA
 	#define SGX_FEATURE_EXTENDED_PERF_COUNTERS
+	#define SGX_FEATURE_EDM_VERTEX_PDSADDR_FULL_RANGE
+	#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING)
+		#if defined(SGX_FEATURE_MP)
+		#define SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH
+		#endif
+		#define SGX_FEATURE_SLAVE_VDM_CONTEXT_SWITCH
+		#define SGX_FEATURE_ISP_CONTEXT_SWITCH_REV_3
+	#endif
 #endif
 #endif
 #endif
@@ -154,6 +179,15 @@
 #endif
 #endif
 #endif
+
+#if defined(SGX_FEATURE_SLAVE_VDM_CONTEXT_SWITCH) \
+	|| defined(SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH)
+#define SGX_FEATURE_VDM_CONTEXT_SWITCH
+#endif
+
+#if defined(SGX_FEATURE_ISP_CONTEXT_SWITCH_REV_2) \
+	|| defined(SGX_FEATURE_ISP_CONTEXT_SWITCH_REV_3)
+#define SGX_FEATURE_ISP_CONTEXT_SWITCH
 #endif
 
 #if defined(FIX_HW_BRN_22693)
@@ -182,14 +216,36 @@
 	#endif
 #endif
 
-#if defined(SGX_FEATURE_MP)
-#if !defined(SGX_FEATURE_MP_CORE_COUNT)
-#error SGX_FEATURE_MP_CORE_COUNT must be defined when SGX_FEATURE_MP is defined
+#if defined(FIX_HW_BRN_29954)
+#undef SGX_FEATURE_PERPIPE_BKPT_REGS
 #endif
-#else
-#define SGX_FEATURE_MP_CORE_COUNT	(1)
+
+#if defined(FIX_HW_BRN_31620)
+#undef SGX_FEATURE_MULTIPLE_MEM_CONTEXTS
+#undef SGX_FEATURE_BIF_NUM_DIRLISTS
 #endif
 
+#if defined(SGX_FEATURE_MP)
+#if defined(SGX_FEATURE_MP_CORE_COUNT_TA) && defined(SGX_FEATURE_MP_CORE_COUNT_3D)
+#if (SGX_FEATURE_MP_CORE_COUNT_TA > SGX_FEATURE_MP_CORE_COUNT_3D)
+#error Number of TA cores larger than number of 3D cores not supported in current driver
+#endif 
+#else
+#if defined(SGX_FEATURE_MP_CORE_COUNT)
+#define SGX_FEATURE_MP_CORE_COUNT_TA		(SGX_FEATURE_MP_CORE_COUNT)
+#define SGX_FEATURE_MP_CORE_COUNT_3D		(SGX_FEATURE_MP_CORE_COUNT)
+#else
+#error Either SGX_FEATURE_MP_CORE_COUNT or \
+both SGX_FEATURE_MP_CORE_COUNT_TA and SGX_FEATURE_MP_CORE_COUNT_3D \
+must be defined when SGX_FEATURE_MP is defined
+#endif 
+#endif 
+#else
+#define SGX_FEATURE_MP_CORE_COUNT		(1)
+#define SGX_FEATURE_MP_CORE_COUNT_TA	(1)
+#define SGX_FEATURE_MP_CORE_COUNT_3D	(1)
+#endif 
+
 #if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING) && !defined(SUPPORT_SGX_PRIORITY_SCHEDULING)
 #define SUPPORT_SGX_PRIORITY_SCHEDULING
 #endif
diff --git a/drivers/gpu/pvr/sgxinfo.h b/drivers/gpu/pvr/sgxinfo.h
index 50f11134b43..51870873eec 100644
--- a/drivers/gpu/pvr/sgxinfo.h
+++ b/drivers/gpu/pvr/sgxinfo.h
@@ -30,12 +30,14 @@
 #include "sgxscript.h"
 #include "servicesint.h"
 #include "services.h"
+#if !defined (SUPPORT_SID_INTERFACE)
 #include "sgxapi_km.h"
+#endif
 #include "sgx_mkif_km.h"
 
 
 #define SGX_MAX_DEV_DATA			24
-#define	SGX_MAX_INIT_MEM_HANDLES	16
+#define	SGX_MAX_INIT_MEM_HANDLES	18
 
 
 typedef struct _SGX_BRIDGE_INFO_FOR_SRVINIT
@@ -51,12 +53,14 @@ typedef enum _SGXMKIF_CMD_TYPE_
 	SGXMKIF_CMD_TRANSFER		= 1,
 	SGXMKIF_CMD_2D				= 2,
 	SGXMKIF_CMD_POWER			= 3,
-	SGXMKIF_CMD_CLEANUP			= 4,
-	SGXMKIF_CMD_GETMISCINFO		= 5,
-	SGXMKIF_CMD_PROCESS_QUEUES	= 6,
-	SGXMKIF_CMD_DATABREAKPOINT	= 7,
-	SGXMKIF_CMD_SETHWPERFSTATUS	= 8,
-	SGXMKIF_CMD_MAX				= 9,
+	SGXMKIF_CMD_CONTEXTSUSPEND	= 4,
+	SGXMKIF_CMD_CLEANUP			= 5,
+	SGXMKIF_CMD_GETMISCINFO		= 6,
+	SGXMKIF_CMD_PROCESS_QUEUES	= 7,
+	SGXMKIF_CMD_DATABREAKPOINT	= 8,
+	SGXMKIF_CMD_SETHWPERFSTATUS	= 9,
+ 	SGXMKIF_CMD_FLUSHPDCACHE	= 10,
+ 	SGXMKIF_CMD_MAX				= 11,
 
 	SGXMKIF_CMD_FORCE_I32   	= -1,
 
@@ -65,12 +69,21 @@ typedef enum _SGXMKIF_CMD_TYPE_
 
 typedef struct _SGX_BRIDGE_INIT_INFO_
 {
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hKernelCCBMemInfo;
+	IMG_SID		hKernelCCBCtlMemInfo;
+	IMG_SID		hKernelCCBEventKickerMemInfo;
+	IMG_SID		hKernelSGXHostCtlMemInfo;
+	IMG_SID		hKernelSGXTA3DCtlMemInfo;
+	IMG_SID		hKernelSGXMiscMemInfo;
+#else
 	IMG_HANDLE	hKernelCCBMemInfo;
 	IMG_HANDLE	hKernelCCBCtlMemInfo;
 	IMG_HANDLE	hKernelCCBEventKickerMemInfo;
 	IMG_HANDLE	hKernelSGXHostCtlMemInfo;
 	IMG_HANDLE	hKernelSGXTA3DCtlMemInfo;
 	IMG_HANDLE	hKernelSGXMiscMemInfo;
+#endif
 
 	IMG_UINT32	aui32HostKickAddr[SGXMKIF_CMD_MAX];
 
@@ -80,33 +93,95 @@ typedef struct _SGX_BRIDGE_INIT_INFO_
 	SGX_MISCINFO_STRUCT_SIZES	sSGXStructSizes;
 
 #if defined(SGX_SUPPORT_HWPROFILING)
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hKernelHWProfilingMemInfo;
+#else
 	IMG_HANDLE	hKernelHWProfilingMemInfo;
 #endif
+#endif
 #if defined(SUPPORT_SGX_HWPERF)
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hKernelHWPerfCBMemInfo;
+#else
 	IMG_HANDLE	hKernelHWPerfCBMemInfo;
 #endif
+#endif
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hKernelTASigBufferMemInfo;
+	IMG_SID		hKernel3DSigBufferMemInfo;
+#else
 	IMG_HANDLE	hKernelTASigBufferMemInfo;
 	IMG_HANDLE	hKernel3DSigBufferMemInfo;
+#endif
 
 #if defined(FIX_HW_BRN_29702)
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hKernelCFIMemInfo;
+#else
 	IMG_HANDLE	hKernelCFIMemInfo;
 #endif
+#endif
 #if defined(FIX_HW_BRN_29823)
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hKernelDummyTermStreamMemInfo;
+#else
 	IMG_HANDLE	hKernelDummyTermStreamMemInfo;
 #endif
+#endif
+
+#if defined(FIX_HW_BRN_31542)
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID hKernelClearClipWAVDMStreamMemInfo;
+	IMG_SID hKernelClearClipWAIndexStreamMemInfo;
+	IMG_SID hKernelClearClipWAPDSMemInfo;
+	IMG_SID hKernelClearClipWAUSEMemInfo;
+	IMG_SID hKernelClearClipWAParamMemInfo;
+	IMG_SID hKernelClearClipWAPMPTMemInfo;
+	IMG_SID hKernelClearClipWATPCMemInfo;
+	IMG_SID hKernelClearClipWAPSGRgnHdrMemInfo;
+#else
+	IMG_HANDLE hKernelClearClipWAVDMStreamMemInfo;
+	IMG_HANDLE hKernelClearClipWAIndexStreamMemInfo;
+	IMG_HANDLE hKernelClearClipWAPDSMemInfo;
+	IMG_HANDLE hKernelClearClipWAUSEMemInfo;
+	IMG_HANDLE hKernelClearClipWAParamMemInfo;
+	IMG_HANDLE hKernelClearClipWAPMPTMemInfo;
+	IMG_HANDLE hKernelClearClipWATPCMemInfo;
+	IMG_HANDLE hKernelClearClipWAPSGRgnHdrMemInfo;
+#endif
+#endif
+
+#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31425)
+	IMG_HANDLE	hKernelVDMSnapShotBufferMemInfo;
+	IMG_HANDLE	hKernelVDMCtrlStreamBufferMemInfo;
+#endif
 #if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hKernelEDMStatusBufferMemInfo;
+#else
 	IMG_HANDLE	hKernelEDMStatusBufferMemInfo;
 #endif
+#endif
 #if defined(SGX_FEATURE_OVERLAPPED_SPM)
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hKernelTmpRgnHeaderMemInfo;
+#else
 	IMG_HANDLE hKernelTmpRgnHeaderMemInfo;
 #endif
+#endif
 #if defined(SGX_FEATURE_SPM_MODE_0)
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hKernelTmpDPMStateMemInfo;
+#else
 	IMG_HANDLE hKernelTmpDPMStateMemInfo;
 #endif
+#endif
 
 	IMG_UINT32 ui32EDMTaskReg0;
 	IMG_UINT32 ui32EDMTaskReg1;
 
+	IMG_UINT32 ui32ClkGateCtl;
+	IMG_UINT32 ui32ClkGateCtl2;
 	IMG_UINT32 ui32ClkGateStatusReg;
 	IMG_UINT32 ui32ClkGateStatusMask;
 #if defined(SGX_FEATURE_MP)
@@ -119,7 +194,11 @@ typedef struct _SGX_BRIDGE_INIT_INFO_
 	IMG_UINT32 ui32CacheControl;
 
 	IMG_UINT32	asInitDevData[SGX_MAX_DEV_DATA];
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		asInitMemHandles[SGX_MAX_INIT_MEM_HANDLES];
+#else
 	IMG_HANDLE	asInitMemHandles[SGX_MAX_INIT_MEM_HANDLES];
+#endif
 
 } SGX_BRIDGE_INIT_INFO;
 
@@ -128,7 +207,11 @@ typedef struct _SGX_DEVICE_SYNC_LIST_
 {
 	PSGXMKIF_HWDEVICE_SYNC_LIST	psHWDeviceSyncList;
 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hKernelHWSyncListMemInfo;
+#else
 	IMG_HANDLE				hKernelHWSyncListMemInfo;
+#endif
 	PVRSRV_CLIENT_MEM_INFO	*psHWDeviceSyncListClientMemInfo;
 	PVRSRV_CLIENT_MEM_INFO	*psAccessResourceClientMemInfo;
 
@@ -138,27 +221,47 @@ typedef struct _SGX_DEVICE_SYNC_LIST_
 
 	
 	IMG_UINT32			ui32NumSyncObjects;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				ahSyncHandles[1];
+#else
 	IMG_HANDLE			ahSyncHandles[1];
+#endif
 } SGX_DEVICE_SYNC_LIST, *PSGX_DEVICE_SYNC_LIST;
 
 
 typedef struct _SGX_INTERNEL_STATUS_UPDATE_
 {
 	CTL_STATUS				sCtlStatus;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID					hKernelMemInfo;
+#else
 	IMG_HANDLE				hKernelMemInfo;
+#endif
 } SGX_INTERNEL_STATUS_UPDATE;
 
 
 typedef struct _SGX_CCB_KICK_
 {
 	SGXMKIF_COMMAND		sCommand;
-	IMG_HANDLE			hCCBKernelMemInfo;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hCCBKernelMemInfo;
+#else
+	IMG_HANDLE	hCCBKernelMemInfo;
+#endif
 
 	IMG_UINT32	ui32NumDstSyncObjects;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hKernelHWSyncListMemInfo;
+#else
 	IMG_HANDLE	hKernelHWSyncListMemInfo;
+#endif
 
 	
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		*pahDstSyncHandles;
+#else
 	IMG_HANDLE	*pahDstSyncHandles;
+#endif
 
 	IMG_UINT32	ui32NumTAStatusVals;
 	IMG_UINT32	ui32Num3DStatusVals;
@@ -167,9 +270,14 @@ typedef struct _SGX_CCB_KICK_
 	SGX_INTERNEL_STATUS_UPDATE	asTAStatusUpdate[SGX_MAX_TA_STATUS_VALS];
 	SGX_INTERNEL_STATUS_UPDATE	as3DStatusUpdate[SGX_MAX_3D_STATUS_VALS];
 #else
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		ahTAStatusSyncInfo[SGX_MAX_TA_STATUS_VALS];
+	IMG_SID		ah3DStatusSyncInfo[SGX_MAX_3D_STATUS_VALS];
+#else
 	IMG_HANDLE	ahTAStatusSyncInfo[SGX_MAX_TA_STATUS_VALS];
 	IMG_HANDLE	ah3DStatusSyncInfo[SGX_MAX_3D_STATUS_VALS];
 #endif
+#endif
 
 	IMG_BOOL	bFirstKickOrResume;
 #if (defined(NO_HARDWARE) || defined(PDUMP))
@@ -183,29 +291,53 @@ typedef struct _SGX_CCB_KICK_
 #if defined(SUPPORT_SGX_GENERALISED_SYNCOBJECTS)
 	
 	IMG_UINT32	ui32NumTASrcSyncs;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		ahTASrcKernelSyncInfo[SGX_MAX_TA_SRC_SYNCS];
+#else
 	IMG_HANDLE	ahTASrcKernelSyncInfo[SGX_MAX_TA_SRC_SYNCS];
+#endif
 	IMG_UINT32	ui32NumTADstSyncs;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		ahTADstKernelSyncInfo[SGX_MAX_TA_DST_SYNCS];
+#else
 	IMG_HANDLE	ahTADstKernelSyncInfo[SGX_MAX_TA_DST_SYNCS];
+#endif
 	IMG_UINT32	ui32Num3DSrcSyncs;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		ah3DSrcKernelSyncInfo[SGX_MAX_3D_SRC_SYNCS];
+#else
 	IMG_HANDLE	ah3DSrcKernelSyncInfo[SGX_MAX_3D_SRC_SYNCS];
+#endif
 #else
 	
 	IMG_UINT32	ui32NumSrcSyncs;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS];
+#else
 	IMG_HANDLE	ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS];
 #endif
+#endif
 
 	
 	IMG_BOOL	bTADependency;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID		hTA3DSyncInfo;
+
+	IMG_SID		hTASyncInfo;
+	IMG_SID		h3DSyncInfo;
+#else
 	IMG_HANDLE	hTA3DSyncInfo;
 
 	IMG_HANDLE	hTASyncInfo;
 	IMG_HANDLE	h3DSyncInfo;
+#endif
 #if defined(PDUMP)
 	IMG_UINT32	ui32CCBDumpWOff;
 #endif
 #if defined(NO_HARDWARE)
 	IMG_UINT32	ui32WriteOpsPendingVal;
 #endif
+	IMG_HANDLE	hDevMemContext;
 } SGX_CCB_KICK;
 
 
@@ -225,27 +357,56 @@ typedef struct _SGX_CLIENT_INFO_
 typedef struct _SGX_INTERNAL_DEVINFO_
 {
 	IMG_UINT32			ui32Flags;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID				hHostCtlKernelMemInfoHandle;
+#else
 	IMG_HANDLE			hHostCtlKernelMemInfoHandle;
+#endif
 	IMG_BOOL			bForcePTOff;
 } SGX_INTERNAL_DEVINFO;
 
 
+typedef struct _SGX_INTERNAL_DEVINFO_KM_
+{
+	IMG_UINT32			ui32Flags;
+	IMG_HANDLE			hHostCtlKernelMemInfoHandle;
+	IMG_BOOL			bForcePTOff;
+} SGX_INTERNAL_DEVINFO_KM;
+
+
 #if defined(TRANSFER_QUEUE)
 typedef struct _PVRSRV_TRANSFER_SGX_KICK_
 {
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hCCBMemInfo;
+#else
 	IMG_HANDLE		hCCBMemInfo;
+#endif
 	IMG_UINT32		ui32SharedCmdCCBOffset;
 
 	IMG_DEV_VIRTADDR 	sHWTransferContextDevVAddr;
 
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hTASyncInfo;
+	IMG_SID			h3DSyncInfo;
+#else
 	IMG_HANDLE		hTASyncInfo;
 	IMG_HANDLE		h3DSyncInfo;
+#endif
 
 	IMG_UINT32		ui32NumSrcSync;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			ahSrcSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
+#else
 	IMG_HANDLE		ahSrcSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
+#endif
 
 	IMG_UINT32		ui32NumDstSync;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			ahDstSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
+#else
 	IMG_HANDLE		ahDstSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
+#endif
 
 	IMG_UINT32		ui32Flags;
 
@@ -253,17 +414,34 @@ typedef struct _PVRSRV_TRANSFER_SGX_KICK_
 #if defined(PDUMP)
 	IMG_UINT32		ui32CCBDumpWOff;
 #endif
+	IMG_HANDLE		hDevMemContext;
 } PVRSRV_TRANSFER_SGX_KICK, *PPVRSRV_TRANSFER_SGX_KICK;
 
 #if defined(SGX_FEATURE_2D_HARDWARE)
 typedef struct _PVRSRV_2D_SGX_KICK_
 {
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			hCCBMemInfo;
+#else
 	IMG_HANDLE		hCCBMemInfo;
+#endif
 	IMG_UINT32		ui32SharedCmdCCBOffset;
 
 	IMG_DEV_VIRTADDR 	sHW2DContextDevVAddr;
 
 	IMG_UINT32		ui32NumSrcSync;
+#if defined (SUPPORT_SID_INTERFACE)
+	IMG_SID			ahSrcSyncInfo[SGX_MAX_2D_SRC_SYNC_OPS];
+
+	
+	IMG_SID	 		hDstSyncInfo;
+
+	
+	IMG_SID			hTASyncInfo;
+
+	
+	IMG_SID			h3DSyncInfo;
+#else
 	IMG_HANDLE		ahSrcSyncInfo[SGX_MAX_2D_SRC_SYNC_OPS];
 
 	
@@ -274,11 +452,13 @@ typedef struct _PVRSRV_2D_SGX_KICK_
 
 	
 	IMG_HANDLE		h3DSyncInfo;
+#endif
 
 	IMG_UINT32		ui32PDumpFlags;
 #if defined(PDUMP)
 	IMG_UINT32		ui32CCBDumpWOff;
 #endif
+	IMG_HANDLE		hDevMemContext;
 } PVRSRV_2D_SGX_KICK, *PPVRSRV_2D_SGX_KICK;
 #endif	
 #endif	
diff --git a/drivers/gpu/pvr/sgxmmu.h b/drivers/gpu/pvr/sgxmmu.h
index 4df8003361c..ed74f532c62 100644
--- a/drivers/gpu/pvr/sgxmmu.h
+++ b/drivers/gpu/pvr/sgxmmu.h
@@ -44,19 +44,12 @@
 #endif
 #define SGX_MMU_PDE_VALID				(0x00000001U)
 #define SGX_MMU_PDE_PAGE_SIZE_4K		(0x00000000U)
-#if defined(SGX_FEATURE_VARIABLE_MMU_PAGE_SIZE)
-	#define SGX_MMU_PDE_PAGE_SIZE_16K		(0x00000002U)
-	#define SGX_MMU_PDE_PAGE_SIZE_64K		(0x00000004U)
-	#define SGX_MMU_PDE_PAGE_SIZE_256K		(0x00000006U)
-	#define SGX_MMU_PDE_PAGE_SIZE_1M		(0x00000008U)
-	#define SGX_MMU_PDE_PAGE_SIZE_4M		(0x0000000AU)
-	#define SGX_MMU_PDE_PAGE_SIZE_MASK		(0x0000000EU)
-#else
-	#define SGX_MMU_PDE_WRITEONLY			(0x00000002U)
-	#define SGX_MMU_PDE_READONLY			(0x00000004U)
-	#define SGX_MMU_PDE_CACHECONSISTENT		(0x00000008U)
-	#define SGX_MMU_PDE_EDMPROTECT			(0x00000010U)
-#endif
+#define SGX_MMU_PDE_PAGE_SIZE_16K		(0x00000002U)
+#define SGX_MMU_PDE_PAGE_SIZE_64K		(0x00000004U)
+#define SGX_MMU_PDE_PAGE_SIZE_256K		(0x00000006U)
+#define SGX_MMU_PDE_PAGE_SIZE_1M		(0x00000008U)
+#define SGX_MMU_PDE_PAGE_SIZE_4M		(0x0000000AU)
+#define SGX_MMU_PDE_PAGE_SIZE_MASK		(0x0000000EU)
 
 #define SGX_MMU_PT_SHIFT				(10)
 #define SGX_MMU_PT_SIZE					(1U<<SGX_MMU_PT_SHIFT)
diff --git a/drivers/gpu/pvr/sgxmpdefs.h b/drivers/gpu/pvr/sgxmpdefs.h
index b1b67bf784b..ace1d43ceb2 100644
--- a/drivers/gpu/pvr/sgxmpdefs.h
+++ b/drivers/gpu/pvr/sgxmpdefs.h
@@ -24,8 +24,8 @@
  *
  ******************************************************************************/
 
-#ifndef _SGXMPDEFS_KM_H_
-#define _SGXMPDEFS_KM_H_
+#ifndef _SGXMPDEFS_H_
+#define _SGXMPDEFS_H_
 
 #define EUR_CR_MASTER_BIF_CTRL              0x4C00
 #define EUR_CR_MASTER_BIF_CTRL_NOREORDER_MASK 0x00000001U
@@ -56,6 +56,16 @@
 #define EUR_CR_MASTER_BIF_CTRL_INVAL_ALL_MASK 0x00000008U
 #define EUR_CR_MASTER_BIF_CTRL_INVAL_ALL_SHIFT 3
 #define EUR_CR_MASTER_BIF_CTRL_INVAL_ALL_SIGNED 0
+#define EUR_CR_MASTER_BIF_MMU_CTRL          0x4CD0
+#define EUR_CR_MASTER_BIF_MMU_CTRL_PREFETCHING_ON_MASK 0x00000001U
+#define EUR_CR_MASTER_BIF_MMU_CTRL_PREFETCHING_ON_SHIFT 0
+#define EUR_CR_MASTER_BIF_MMU_CTRL_PREFETCHING_ON_SIGNED 0
+#define EUR_CR_MASTER_BIF_MMU_CTRL_ADDR_HASH_MODE_MASK 0x00000006U
+#define EUR_CR_MASTER_BIF_MMU_CTRL_ADDR_HASH_MODE_SHIFT 1
+#define EUR_CR_MASTER_BIF_MMU_CTRL_ADDR_HASH_MODE_SIGNED 0
+#define EUR_CR_MASTER_BIF_MMU_CTRL_ENABLE_DC_TLB_MASK 0x00000010U
+#define EUR_CR_MASTER_BIF_MMU_CTRL_ENABLE_DC_TLB_SHIFT 4
+#define EUR_CR_MASTER_BIF_MMU_CTRL_ENABLE_DC_TLB_SIGNED 0
 #define EUR_CR_MASTER_SLC_CTRL              0x4D00
 #define EUR_CR_MASTER_SLC_CTRL_DISABLE_REORDERING_MASK 0x00800000U
 #define EUR_CR_MASTER_SLC_CTRL_DISABLE_REORDERING_SHIFT 23
@@ -202,6 +212,19 @@
 #define EUR_CR_MASTER_SLC_CTRL_FLUSH_ALL_MASK 0x00000010U
 #define EUR_CR_MASTER_SLC_CTRL_FLUSH_ALL_SHIFT 4
 #define EUR_CR_MASTER_SLC_CTRL_FLUSH_ALL_SIGNED 0
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV    0x4D34
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_DM_EVENT_MASK 0x00000080U
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_DM_EVENT_SHIFT 7
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_DM_EVENT_SIGNED 0
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_DM_PIXEL_MASK 0x00000040U
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_DM_PIXEL_SHIFT 6
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_DM_PIXEL_SIGNED 0
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_DM_VERTEX_MASK 0x00000020U
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_DM_VERTEX_SHIFT 5
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_DM_VERTEX_SIGNED 0
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_ALL_MASK 0x00000010U
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_ALL_SHIFT 4
+#define EUR_CR_MASTER_SLC_CTRL_FLUSH_INV_ALL_SIGNED 0
 #define EUR_CR_MASTER_BREAKPOINT_READ       0x4F18
 #define EUR_CR_MASTER_BREAKPOINT_READ_ADDRESS_MASK 0xFFFFFFF0U
 #define EUR_CR_MASTER_BREAKPOINT_READ_ADDRESS_SHIFT 4
@@ -214,6 +237,9 @@
 #define EUR_CR_MASTER_BREAKPOINT_TRAP_WRNOTIFY_SHIFT 0
 #define EUR_CR_MASTER_BREAKPOINT_TRAP_WRNOTIFY_SIGNED 0
 #define EUR_CR_MASTER_BREAKPOINT            0x4F20
+#define EUR_CR_MASTER_BREAKPOINT_ID_MASK    0x00000030U
+#define EUR_CR_MASTER_BREAKPOINT_ID_SHIFT   4
+#define EUR_CR_MASTER_BREAKPOINT_ID_SIGNED  0
 #define EUR_CR_MASTER_BREAKPOINT_UNTRAPPED_MASK 0x00000008U
 #define EUR_CR_MASTER_BREAKPOINT_UNTRAPPED_SHIFT 3
 #define EUR_CR_MASTER_BREAKPOINT_UNTRAPPED_SIGNED 0
diff --git a/drivers/gpu/pvr/syscommon.h b/drivers/gpu/pvr/syscommon.h
index 38b610738dd..46ac17375d1 100644
--- a/drivers/gpu/pvr/syscommon.h
+++ b/drivers/gpu/pvr/syscommon.h
@@ -57,6 +57,9 @@ typedef struct _SYS_DEVICE_ID_TAG
 
 #define SYS_MAX_LOCAL_DEVMEM_ARENAS	4
 
+typedef IMG_HANDLE (*PFN_HTIMER_CREATE) (IMG_VOID);
+typedef IMG_UINT32 (*PFN_HTIMER_GETUS) (IMG_HANDLE);
+typedef IMG_VOID (*PFN_HTIMER_DESTROY) (IMG_HANDLE);
 typedef struct _SYS_DATA_TAG_
 {
     IMG_UINT32                  ui32NumDevices;      	   	
@@ -81,14 +84,20 @@ typedef struct _SYS_DATA_TAG_
 	struct _DEVICE_COMMAND_DATA_ *apsDeviceCommandData[SYS_DEVICE_COUNT];
 															
 
-	IMG_BOOL                    bReProcessQueues;    		
-
 	RA_ARENA					*apsLocalDevMemArena[SYS_MAX_LOCAL_DEVMEM_ARENAS]; 
 
     IMG_CHAR                    *pszVersionString;          
-	PVRSRV_EVENTOBJECT			*psGlobalEventObject;			
+#if defined (SUPPORT_SID_INTERFACE)
+	PVRSRV_EVENTOBJECT_KM		*psGlobalEventObject;		
+#else
+	PVRSRV_EVENTOBJECT			*psGlobalEventObject;		
+#endif
 
 	PVRSRV_MISC_INFO_CPUCACHEOP_TYPE ePendingCacheOpType;	
+
+	PFN_HTIMER_CREATE	pfnHighResTimerCreate;
+	PFN_HTIMER_GETUS	pfnHighResTimerGetus;
+	PFN_HTIMER_DESTROY	pfnHighResTimerDestroy;
 } SYS_DATA;
 
 
@@ -120,8 +129,8 @@ PVRSRV_ERROR SysDevicePostPowerState(IMG_UINT32 ui32DeviceIndex,
 									 PVRSRV_DEV_POWER_STATE eCurrentPowerState);
 
 #if defined(SYS_CUSTOM_POWERLOCK_WRAP)
-PVRSRV_ERROR SysPowerLockWrap(SYS_DATA *psSysData);
-IMG_VOID SysPowerLockUnwrap(SYS_DATA *psSysData);
+PVRSRV_ERROR SysPowerLockWrap(IMG_VOID);
+IMG_VOID SysPowerLockUnwrap(IMG_VOID);
 #endif
 
 PVRSRV_ERROR SysOEMFunction (	IMG_UINT32	ui32ID,
@@ -143,6 +152,7 @@ IMG_BOOL SysVerifySysPAddrToDevPAddr (PVRSRV_DEVICE_TYPE eDeviceType, IMG_SYS_PH
 
 extern SYS_DATA* gpsSysData;
 
+
 #if !defined(USE_CODE)
 
 #ifdef INLINE_IS_PRAGMA
@@ -216,5 +226,37 @@ static inline IMG_VOID SysWriteHWReg(IMG_PVOID pvLinRegBaseAddr, IMG_UINT32 ui32
 }
 #endif
 
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(SysHighResTimerCreate)
+#endif
+static INLINE IMG_HANDLE SysHighResTimerCreate(IMG_VOID)
+{
+	SYS_DATA *psSysData;
+
+	SysAcquireData(&psSysData);
+	return psSysData->pfnHighResTimerCreate();
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(SysHighResTimerGetus)
+#endif
+static INLINE IMG_UINT32 SysHighResTimerGetus(IMG_HANDLE hTimer)
+{
+	SYS_DATA *psSysData;
+
+	SysAcquireData(&psSysData);
+	return psSysData->pfnHighResTimerGetus(hTimer);
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(SysHighResTimerDestroy)
+#endif
+static INLINE IMG_VOID SysHighResTimerDestroy(IMG_HANDLE hTimer)
+{
+	SYS_DATA *psSysData;
+
+	SysAcquireData(&psSysData);
+	psSysData->pfnHighResTimerDestroy(hTimer);
+}
 #endif
 
diff --git a/drivers/gpu/pvr/ttrace.h b/drivers/gpu/pvr/ttrace.h
new file mode 100644
index 00000000000..159cbcaeb52
--- /dev/null
+++ b/drivers/gpu/pvr/ttrace.h
@@ -0,0 +1,184 @@
+/**********************************************************************
+ *
+ * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
+ * See the GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ * 
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Contact Information:
+ * Imagination Technologies Ltd. <gpl-support@imgtec.com>
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
+ *
+ ******************************************************************************/
+
+#include "services_headers.h"
+#include "ttrace_common.h"
+#include "ttrace_tokens.h"
+
+#ifndef __TTRACE_H__
+#define __TTRACE_H__
+
+#if defined(TTRACE)
+
+	#define PVR_TTRACE(group, class, token) \
+			PVRSRVTimeTrace(group, class, token)
+	#define PVR_TTRACE_UI8(group, class, token, val) \
+			PVRSRVTimeTraceUI8(group, class, token, val)
+	#define PVR_TTRACE_UI16(group, class, token, val) \
+			PVRSRVTimeTraceUI16(group, class, token, val)
+	#define PVR_TTRACE_UI32(group, class, token, val) \
+			PVRSRVTimeTraceUI32(group, class, token, val)
+	#define PVR_TTRACE_UI64(group, class, token, val) \
+			PVRSRVTimeTraceUI64(group, class, token, val)
+	#define PVR_TTRACE_DEV_VIRTADDR(group, class, token, val) \
+			PVRSRVTimeTraceDevVirtAddr(group, class, token, val)
+	#define PVR_TTRACE_CPU_PHYADDR(group, class, token, val) \
+			PVRSRVTimeTraceCpuPhyAddr(group, class, token, val)
+	#define PVR_TTRACE_DEV_PHYADDR(group, class, token, val) \
+			PVRSRVTimeTraceDevPhysAddr(group, class, token, val)
+	#define PVR_TTRACE_SYS_PHYADDR(group, class, token, val) \
+			PVRSRVTimeTraceSysPhysAddr(group, class, token, val)
+	#define PVR_TTRACE_SYNC_OBJECT(group, token, syncobj, op) \
+			PVRSRVTimeTraceSyncObject(group, token, syncobj, op)
+
+IMG_IMPORT IMG_VOID IMG_CALLCONV PVRSRVTimeTraceArray(IMG_UINT32 ui32Group, IMG_UINT32 ui32Class,
+							IMG_UINT32 ui32Token, IMG_UINT32 ui32TypeSize,
+							IMG_UINT32 ui32Count, IMG_UINT8 *ui8Data);
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(PVRSRVTimeTrace)
+#endif
+static INLINE IMG_VOID PVRSRVTimeTrace(IMG_UINT32 ui32Group, IMG_UINT32 ui32Class,
+						IMG_UINT32 ui32Token)
+{
+	PVRSRVTimeTraceArray(ui32Group, ui32Class, ui32Token, 0, 0, NULL);
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(PVRSRVTimeTraceUI8)
+#endif
+static INLINE IMG_VOID PVRSRVTimeTraceUI8(IMG_UINT32 ui32Group, IMG_UINT32 ui32Class,
+						IMG_UINT32 ui32Token, IMG_UINT8 ui8Value)
+{
+	PVRSRVTimeTraceArray(ui32Group, ui32Class, ui32Token, PVRSRV_TRACE_TYPE_UI8,
+				1, &ui8Value);
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(PVRSRVTimeTraceUI16)
+#endif
+static INLINE IMG_VOID PVRSRVTimeTraceUI16(IMG_UINT32 ui32Group, IMG_UINT32 ui32Class,
+						IMG_UINT32 ui32Token, IMG_UINT16 ui16Value)
+{
+	PVRSRVTimeTraceArray(ui32Group, ui32Class, ui32Token, PVRSRV_TRACE_TYPE_UI16,
+				1, (IMG_UINT8 *) &ui16Value);
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(PVRSRVTimeTraceUI32)
+#endif
+static INLINE IMG_VOID PVRSRVTimeTraceUI32(IMG_UINT32 ui32Group, IMG_UINT32 ui32Class,
+						IMG_UINT32 ui32Token, IMG_UINT32 ui32Value)
+{
+	PVRSRVTimeTraceArray(ui32Group, ui32Class, ui32Token, PVRSRV_TRACE_TYPE_UI32,
+				1, (IMG_UINT8 *) &ui32Value);
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(PVRSRVTimeTraceUI64)
+#endif
+static INLINE IMG_VOID PVRSRVTimeTraceUI64(IMG_UINT32 ui32Group, IMG_UINT32 ui32Class,
+						IMG_UINT32 ui32Token, IMG_UINT64 ui64Value)
+{
+	PVRSRVTimeTraceArray(ui32Group, ui32Class, ui32Token, PVRSRV_TRACE_TYPE_UI64,
+				1, (IMG_UINT8 *) &ui64Value);
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(PVRSRVTimeTraceDevVirtAddr)
+#endif
+static INLINE IMG_VOID PVRSRVTimeTraceDevVirtAddr(IMG_UINT32 ui32Group, IMG_UINT32 ui32Class,
+						IMG_UINT32 ui32Token, IMG_DEV_VIRTADDR psVAddr)
+{
+	PVRSRVTimeTraceArray(ui32Group, ui32Class, ui32Token, PVRSRV_TRACE_TYPE_UI32,
+				1, (IMG_UINT8 *) &psVAddr.uiAddr);
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(PVRSRVTimeTraceCpuPhyAddr)
+#endif
+static INLINE IMG_VOID PVRSRVTimeTraceCpuPhyAddr(IMG_UINT32 ui32Group, IMG_UINT32 ui32Class,
+						IMG_UINT32 ui32Token, IMG_CPU_PHYADDR psPAddr)
+{
+	PVRSRVTimeTraceArray(ui32Group, ui32Class, ui32Token, PVRSRV_TRACE_TYPE_UI32,
+				1, (IMG_UINT8 *) &psPAddr.uiAddr);
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(PVRSRVTimeTraceDevPhysAddr)
+#endif
+static INLINE IMG_VOID PVRSRVTimeTraceDevPhysAddr(IMG_UINT32 ui32Group, IMG_UINT32 ui32Class,
+						IMG_UINT32 ui32Token, IMG_DEV_PHYADDR psPAddr)
+{
+	PVRSRVTimeTraceArray(ui32Group, ui32Class, ui32Token, PVRSRV_TRACE_TYPE_UI32,
+				1, (IMG_UINT8 *) &psPAddr.uiAddr);
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(PVRSRVTimeTraceSysPhysAddr)
+#endif
+static INLINE IMG_VOID PVRSRVTimeTraceSysPhysAddr(IMG_UINT32 ui32Group, IMG_UINT32 ui32Class,
+						IMG_UINT32 ui32Token, IMG_SYS_PHYADDR psPAddr)
+{
+	PVRSRVTimeTraceArray(ui32Group, ui32Class, ui32Token, sizeof(psPAddr.uiAddr),
+				1, (IMG_UINT8 *) &psPAddr.uiAddr);
+}
+
+#else 
+
+	#define PVR_TTRACE(group, class, token) \
+			((void) 0)
+	#define PVR_TTRACE_UI8(group, class, token, val) \
+			((void) 0)
+	#define PVR_TTRACE_UI16(group, class, token, val) \
+			((void) 0)
+	#define PVR_TTRACE_UI32(group, class, token, val) \
+			((void) 0)
+	#define PVR_TTRACE_UI64(group, class, token, val) \
+			((void) 0)
+	#define PVR_TTRACE_DEV_VIRTADDR(group, class, token, val) \
+			((void) 0)
+	#define PVR_TTRACE_CPU_PHYADDR(group, class, token, val) \
+			((void) 0)
+	#define PVR_TTRACE_DEV_PHYADDR(group, class, token, val) \
+			((void) 0)
+	#define PVR_TTRACE_SYS_PHYADDR(group, class, token, val) \
+			((void) 0)
+	#define PVR_TTRACE_SYNC_OBJECT(group, token, syncobj, op) \
+			((void) 0)
+
+#endif 
+
+IMG_IMPORT PVRSRV_ERROR PVRSRVTimeTraceInit(IMG_VOID);
+IMG_IMPORT IMG_VOID PVRSRVTimeTraceDeinit(IMG_VOID);
+
+IMG_IMPORT IMG_VOID PVRSRVTimeTraceSyncObject(IMG_UINT32 ui32Group, IMG_UINT32 ui32Token,
+					      PVRSRV_KERNEL_SYNC_INFO *psSync, IMG_UINT8 ui8SyncOp);
+IMG_IMPORT PVRSRV_ERROR PVRSRVTimeTraceBufferCreate(IMG_UINT32 ui32PID);
+IMG_IMPORT PVRSRV_ERROR PVRSRVTimeTraceBufferDestroy(IMG_UINT32 ui32PID);
+
+IMG_IMPORT IMG_VOID PVRSRVDumpTimeTraceBuffers(IMG_VOID);
+#endif 
diff --git a/drivers/gpu/pvr/ttrace_common.h b/drivers/gpu/pvr/ttrace_common.h
new file mode 100644
index 00000000000..b7f884e0992
--- /dev/null
+++ b/drivers/gpu/pvr/ttrace_common.h
@@ -0,0 +1,81 @@
+/**********************************************************************
+ *
+ * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
+ * See the GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ * 
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Contact Information:
+ * Imagination Technologies Ltd. <gpl-support@imgtec.com>
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
+ *
+ ******************************************************************************/
+
+#include "img_types.h"
+
+#ifndef __TTRACE_COMMON_H__
+#define __TTRACE_COMMON_H__
+
+#define PVRSRV_TRACE_HEADER		0
+#define PVRSRV_TRACE_TIMESTAMP		1
+#define PVRSRV_TRACE_HOSTUID		2
+#define PVRSRV_TRACE_DATA_HEADER	3
+#define PVRSRV_TRACE_DATA_PAYLOAD	4
+
+#define PVRSRV_TRACE_ITEM_SIZE		16
+
+#define PVRSRV_TRACE_GROUP_MASK		0xff
+#define PVRSRV_TRACE_CLASS_MASK		0xff
+#define PVRSRV_TRACE_TOKEN_MASK		0xffff
+
+#define PVRSRV_TRACE_GROUP_SHIFT	24
+#define PVRSRV_TRACE_CLASS_SHIFT	16
+#define PVRSRV_TRACE_TOKEN_SHIFT	0
+
+#define PVRSRV_TRACE_SIZE_MASK		0xffff
+#define PVRSRV_TRACE_TYPE_MASK		0xf
+#define PVRSRV_TRACE_COUNT_MASK		0xfff
+
+#define PVRSRV_TRACE_SIZE_SHIFT		16
+#define PVRSRV_TRACE_TYPE_SHIFT		12
+#define PVRSRV_TRACE_COUNT_SHIFT	0
+
+
+#define WRITE_HEADER(n,m) \
+	((m & PVRSRV_TRACE_##n##_MASK) << PVRSRV_TRACE_##n##_SHIFT)
+
+#define READ_HEADER(n,m) \
+	((m & (PVRSRV_TRACE_##n##_MASK << PVRSRV_TRACE_##n##_SHIFT)) >> PVRSRV_TRACE_##n##_SHIFT)
+
+#define TIME_TRACE_BUFFER_SIZE		4096
+
+#define PVRSRV_TRACE_TYPE_UI8		0
+#define PVRSRV_TRACE_TYPE_UI16		1
+#define PVRSRV_TRACE_TYPE_UI32		2
+#define PVRSRV_TRACE_TYPE_UI64		3
+
+#define PVRSRV_TRACE_TYPE_SYNC		15
+ #define PVRSRV_TRACE_SYNC_UID		0
+ #define PVRSRV_TRACE_SYNC_WOP		1
+ #define PVRSRV_TRACE_SYNC_WOC		2
+ #define PVRSRV_TRACE_SYNC_ROP		3
+ #define PVRSRV_TRACE_SYNC_ROC		4
+ #define PVRSRV_TRACE_SYNC_WO_DEV_VADDR	5
+ #define PVRSRV_TRACE_SYNC_RO_DEV_VADDR	6
+ #define PVRSRV_TRACE_SYNC_OP		7
+#define PVRSRV_TRACE_TYPE_SYNC_SIZE	((PVRSRV_TRACE_SYNC_OP + 1) * sizeof(IMG_UINT32))
+
+#endif 
diff --git a/drivers/gpu/pvr/ttrace_tokens.h b/drivers/gpu/pvr/ttrace_tokens.h
new file mode 100644
index 00000000000..530ce3e380e
--- /dev/null
+++ b/drivers/gpu/pvr/ttrace_tokens.h
@@ -0,0 +1,84 @@
+/**********************************************************************
+ *
+ * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope it will be useful but, except 
+ * as otherwise stated in writing, without any warranty; without even the 
+ * implied warranty of merchantability or fitness for a particular purpose. 
+ * See the GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ * 
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Contact Information:
+ * Imagination Technologies Ltd. <gpl-support@imgtec.com>
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK 
+ *
+ ******************************************************************************/
+
+#ifndef __TTRACE_TOKENS_H__
+#define __TTRACE_TOKENS_H__
+
+#define PVRSRV_TRACE_GROUP_KICK		0
+#define PVRSRV_TRACE_GROUP_TRANSFER	1
+#define PVRSRV_TRACE_GROUP_QUEUE	2
+#define PVRSRV_TRACE_GROUP_POWER	3
+#define PVRSRV_TRACE_GROUP_MKSYNC	4
+
+#define PVRSRV_TRACE_GROUP_PADDING	255
+
+#define PVRSRV_TRACE_CLASS_FUNCTION_ENTER	0
+#define PVRSRV_TRACE_CLASS_FUNCTION_EXIT	1
+#define PVRSRV_TRACE_CLASS_SYNC			2
+#define PVRSRV_TRACE_CLASS_CCB			3
+#define PVRSRV_TRACE_CLASS_CMD_START		4
+#define PVRSRV_TRACE_CLASS_CMD_END		5
+#define PVRSRV_TRACE_CLASS_CMD_COMP_START	6
+#define PVRSRV_TRACE_CLASS_CMD_COMP_END		7
+
+#define PVRSRV_TRACE_CLASS_NONE			255
+
+#define PVRSRV_SYNCOP_SAMPLE		0
+#define PVRSRV_SYNCOP_COMPLETE		1
+#define PVRSRV_SYNCOP_DUMP		2
+
+#define KICK_TOKEN_DOKICK		0
+#define KICK_TOKEN_CCB_OFFSET		1
+#define KICK_TOKEN_TA3D_SYNC		2
+#define KICK_TOKEN_TA_SYNC		3
+#define KICK_TOKEN_3D_SYNC		4
+#define KICK_TOKEN_SRC_SYNC		5
+#define KICK_TOKEN_DST_SYNC		6
+
+#define TRANSFER_TOKEN_SUBMIT		0
+#define TRANSFER_TOKEN_TA_SYNC		1
+#define TRANSFER_TOKEN_3D_SYNC		2
+#define TRANSFER_TOKEN_SRC_SYNC		3
+#define TRANSFER_TOKEN_DST_SYNC		4
+#define TRANSFER_TOKEN_CCB_OFFSET	5
+
+#define QUEUE_TOKEN_GET_SPACE		0
+#define QUEUE_TOKEN_INSERTKM		1
+#define QUEUE_TOKEN_SUBMITKM		2
+#define QUEUE_TOKEN_PROCESS_COMMAND	3
+#define QUEUE_TOKEN_PROCESS_QUEUES	4
+#define QUEUE_TOKEN_COMMAND_COMPLETE	5
+#define QUEUE_TOKEN_UPDATE_DST		6
+#define QUEUE_TOKEN_UPDATE_SRC		7
+#define QUEUE_TOKEN_SRC_SYNC		8
+#define QUEUE_TOKEN_DST_SYNC		9
+#define QUEUE_TOKEN_COMMAND_TYPE	10
+
+#define MKSYNC_TOKEN_KERNEL_CCB_OFFSET	0
+#define MKSYNC_TOKEN_CORE_CLK		1
+#define MKSYNC_TOKEN_UKERNEL_CLK	2
+
+#endif