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authorVipin Bhandari <vipin.bhandari@ti.com>2009-07-30 04:19:17 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2009-09-17 09:46:54 +0200
commit89a99e76f6888166edb145f576cc4a761ee0e0a9 (patch)
tree8e18d832e704146cdbb3c3edb80f94511dd8d885
parent8d360d8c03e1e8514bbaf606b1cd3b818dfc445d (diff)
mfd: Correct ro and cd implemantion on DM355
This patch corrects the support for MMCSD card detection and read only feature for SoC DM355. EVMDM355_ECP_VA4.pdf, from Spectrum digital, suggests that Bit 2 and 4 should be checked for card detection. However on the EVM, bits 1 and 3 gives this status, for MMC/SD instance 0 and 1 respectively. The pdf also suggests that Bit 1 and 3 should be checked for write protection. However on the EVM bits 2 and 4 gives this status. This document can be downloaded from http://c6000.spectrumdigital.com/evmdm355/reve/files/EVMDM355_ECP_VA4.pdf Signed-off-by: Vipin Bhandari <vipin.bhandari@ti.com> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
-rw-r--r--drivers/mfd/dm355evm_msp.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/mfd/dm355evm_msp.c b/drivers/mfd/dm355evm_msp.c
index 5b6e58a3ba4..3d4a861976c 100644
--- a/drivers/mfd/dm355evm_msp.c
+++ b/drivers/mfd/dm355evm_msp.c
@@ -107,8 +107,16 @@ static const u8 msp_gpios[] = {
MSP_GPIO(2, SWITCH1), MSP_GPIO(3, SWITCH1),
MSP_GPIO(4, SWITCH1),
/* switches on MMC/SD sockets */
- MSP_GPIO(1, SDMMC), MSP_GPIO(2, SDMMC), /* mmc0 WP, nCD */
- MSP_GPIO(3, SDMMC), MSP_GPIO(4, SDMMC), /* mmc1 WP, nCD */
+ /*
+ * Note: EVMDM355_ECP_VA4.pdf suggests that Bit 2 and 4 should be
+ * checked for card detection. However on the EVM bit 1 and 3 gives
+ * this status, for 0 and 1 instance respectively. The pdf also
+ * suggests that Bit 1 and 3 should be checked for write protection.
+ * However on the EVM bit 2 and 4 gives this status,for 0 and 1
+ * instance respectively.
+ */
+ MSP_GPIO(2, SDMMC), MSP_GPIO(1, SDMMC), /* mmc0 WP, nCD */
+ MSP_GPIO(4, SDMMC), MSP_GPIO(3, SDMMC), /* mmc1 WP, nCD */
};
#define MSP_GPIO_REG(offset) (msp_gpios[(offset)] >> 3)