diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-06-10 12:42:12 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-06-10 12:42:12 +0100 |
| commit | 56f1319e877a969b814b3805c77ea9c31d849f54 (patch) | |
| tree | a7a03703cf04fae3db12b7b444ca9847f04618e3 | |
| parent | e2f04e18941dbd3826901540a0be03f1728f8822 (diff) | |
[ARM] Fix Integrator and Versatile interrupt initialisation
Both Integrator and Versatile were using set_irq_handler() and
enable_irq(), and working around the initialisation of the
chained interrupt, instead of the more correct
set_irq_chained_handler() function. Fix Integrator and
Versatile to use the right function, and remove these work-arounds.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/mach-integrator/integrator_cp.c | 5 | ||||
| -rw-r--r-- | arch/arm/mach-versatile/core.c | 5 |
2 files changed, 3 insertions, 7 deletions
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index a0724f2b24c..9f55f5ae104 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -232,8 +232,6 @@ static void __init intcp_init_irq(void) for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) { if (i == 11) i = 22; - if (i == IRQ_CP_CPPLDINT) - i++; if (i == 29) break; set_irq_chip(i, &pic_chip); @@ -259,8 +257,7 @@ static void __init intcp_init_irq(void) set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } - set_irq_handler(IRQ_CP_CPPLDINT, sic_handle_irq); - pic_unmask_irq(IRQ_CP_CPPLDINT); + set_irq_chained_handler(IRQ_CP_CPPLDINT, sic_handle_irq); } /* diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 799697d32de..cebd48a3dae 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -112,10 +112,9 @@ void __init versatile_init_irq(void) { unsigned int i; - vic_init(VA_VIC_BASE, IRQ_VIC_START, ~(1 << 31)); + vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0); - set_irq_handler(IRQ_VICSOURCE31, sic_handle_irq); - enable_irq(IRQ_VICSOURCE31); + set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq); /* Do second interrupt controller */ writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); |