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authorArchit Taneja <archit@ti.com>2011-05-06 11:45:49 +0530
committerTomi Valkeinen <tomi.valkeinen@ti.com>2011-05-11 14:20:52 +0300
commit9b372c2d9da43be00e8a267730a2428e0eae12e8 (patch)
treec95ccff308f5410fefc3d9d307e3a458ae3acf76 /README
parent5bdd3c9a7da3ddf820d9d479530ceecde9d4a316 (diff)
OMAP: DSS2: Clean up DISPC overlay register definitions
Move all DISPC register definitions to a new header dispc.h. There are separate register offset definitions for GFX, VID1 and VID2 pipeline share register definitions by using an argument. The introduction of VID3 pipeline on OMAP4 will not let us use the above method since VID3 pipe register offsets don't map with VID1 and VID2 offsets. Represent overlay registers as DISPC_OVL_XXXX(plane), where the plane argument tells the overlay. Register offsets are calculated as: DISPC_OVL_XXXX(plane) = DISPC_OVL_BASE(plane) + DISPC_XXXX_OFFSET(plane) Idea suggested by Tomi Valkeinen. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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