diff options
author | Jens Axboe <jens.axboe@oracle.com> | 2010-03-19 08:05:10 +0100 |
---|---|---|
committer | Jens Axboe <jens.axboe@oracle.com> | 2010-03-19 08:05:10 +0100 |
commit | b4b7a4ef097f288f724420b473dbf92a89c0ab7e (patch) | |
tree | 23ad8101e3e77c32a8d1e1b95a9c1cd7f7a475b7 /arch/arm/mach-pxa/include/mach | |
parent | e9ce335df51ff782035a15c261a3c0c9892a1767 (diff) | |
parent | a3d3203e4bb40f253b1541e310dc0f9305be7c84 (diff) |
Merge branch 'master' into for-linus
Conflicts:
block/Kconfig
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
Diffstat (limited to 'arch/arm/mach-pxa/include/mach')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/balloon3.h | 10 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/hardware.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/irqs.h | 153 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/lpd270.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/lubbock.h | 11 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mainstone.h | 17 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mfp-pxa25x.h | 32 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mfp-pxa27x.h | 27 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mxm8x10.h | 21 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pcm027.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/ssp.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/uncompress.h | 41 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/zeus.h | 3 |
13 files changed, 169 insertions, 160 deletions
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h index bfec09b1814..1a741065045 100644 --- a/arch/arm/mach-pxa/include/mach/balloon3.h +++ b/arch/arm/mach-pxa/include/mach/balloon3.h @@ -129,6 +129,16 @@ enum balloon3_features { #define CPLD_AROUTING_LOONR2INT_BIT 6 #define CPLD_AROUTING_LOONR2EXT_BIT 7 +/* Balloon3 Interrupts */ +#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) + +#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0) +#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1) + +#define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ) +#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) +#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) + extern int balloon3_has(enum balloon3_features feature); #endif diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index e741bf1bfb2..7515757d691 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h @@ -314,7 +314,6 @@ extern unsigned long get_clock_tick_rate(void); #define PCIBIOS_MIN_IO 0 #define PCIBIOS_MIN_MEM 0 #define pcibios_assign_all_busses() 1 -#define HAVE_ARCH_PCI_SET_DMA_MASK 1 #endif diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 3677a9af9c8..ffc8314520f 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -135,82 +135,6 @@ #define IRQ_BOARD_END (IRQ_BOARD_START + 16) #endif -#define IRQ_SA1111_START (IRQ_BOARD_END) -#define IRQ_GPAIN0 (IRQ_BOARD_END + 0) -#define IRQ_GPAIN1 (IRQ_BOARD_END + 1) -#define IRQ_GPAIN2 (IRQ_BOARD_END + 2) -#define IRQ_GPAIN3 (IRQ_BOARD_END + 3) -#define IRQ_GPBIN0 (IRQ_BOARD_END + 4) -#define IRQ_GPBIN1 (IRQ_BOARD_END + 5) -#define IRQ_GPBIN2 (IRQ_BOARD_END + 6) -#define IRQ_GPBIN3 (IRQ_BOARD_END + 7) -#define IRQ_GPBIN4 (IRQ_BOARD_END + 8) -#define IRQ_GPBIN5 (IRQ_BOARD_END + 9) -#define IRQ_GPCIN0 (IRQ_BOARD_END + 10) -#define IRQ_GPCIN1 (IRQ_BOARD_END + 11) -#define IRQ_GPCIN2 (IRQ_BOARD_END + 12) -#define IRQ_GPCIN3 (IRQ_BOARD_END + 13) -#define IRQ_GPCIN4 (IRQ_BOARD_END + 14) -#define IRQ_GPCIN5 (IRQ_BOARD_END + 15) -#define IRQ_GPCIN6 (IRQ_BOARD_END + 16) -#define IRQ_GPCIN7 (IRQ_BOARD_END + 17) -#define IRQ_MSTXINT (IRQ_BOARD_END + 18) -#define IRQ_MSRXINT (IRQ_BOARD_END + 19) -#define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20) -#define IRQ_TPTXINT (IRQ_BOARD_END + 21) -#define IRQ_TPRXINT (IRQ_BOARD_END + 22) -#define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23) -#define SSPXMTINT (IRQ_BOARD_END + 24) -#define SSPRCVINT (IRQ_BOARD_END + 25) -#define SSPROR (IRQ_BOARD_END + 26) -#define AUDXMTDMADONEA (IRQ_BOARD_END + 32) -#define AUDRCVDMADONEA (IRQ_BOARD_END + 33) -#define AUDXMTDMADONEB (IRQ_BOARD_END + 34) -#define AUDRCVDMADONEB (IRQ_BOARD_END + 35) -#define AUDTFSR (IRQ_BOARD_END + 36) -#define AUDRFSR (IRQ_BOARD_END + 37) -#define AUDTUR (IRQ_BOARD_END + 38) -#define AUDROR (IRQ_BOARD_END + 39) -#define AUDDTS (IRQ_BOARD_END + 40) -#define AUDRDD (IRQ_BOARD_END + 41) -#define AUDSTO (IRQ_BOARD_END + 42) -#define IRQ_USBPWR (IRQ_BOARD_END + 43) -#define IRQ_HCIM (IRQ_BOARD_END + 44) -#define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45) -#define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46) -#define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47) -#define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48) -#define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49) -#define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50) -#define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51) -#define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52) -#define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53) -#define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54) - -#define IRQ_LOCOMO_START (IRQ_BOARD_END) -#define IRQ_LOCOMO_KEY (IRQ_BOARD_END + 0) -#define IRQ_LOCOMO_GPIO0 (IRQ_BOARD_END + 1) -#define IRQ_LOCOMO_GPIO1 (IRQ_BOARD_END + 2) -#define IRQ_LOCOMO_GPIO2 (IRQ_BOARD_END + 3) -#define IRQ_LOCOMO_GPIO3 (IRQ_BOARD_END + 4) -#define IRQ_LOCOMO_GPIO4 (IRQ_BOARD_END + 5) -#define IRQ_LOCOMO_GPIO5 (IRQ_BOARD_END + 6) -#define IRQ_LOCOMO_GPIO6 (IRQ_BOARD_END + 7) -#define IRQ_LOCOMO_GPIO7 (IRQ_BOARD_END + 8) -#define IRQ_LOCOMO_GPIO8 (IRQ_BOARD_END + 9) -#define IRQ_LOCOMO_GPIO9 (IRQ_BOARD_END + 10) -#define IRQ_LOCOMO_GPIO10 (IRQ_BOARD_END + 11) -#define IRQ_LOCOMO_GPIO11 (IRQ_BOARD_END + 12) -#define IRQ_LOCOMO_GPIO12 (IRQ_BOARD_END + 13) -#define IRQ_LOCOMO_GPIO13 (IRQ_BOARD_END + 14) -#define IRQ_LOCOMO_GPIO14 (IRQ_BOARD_END + 15) -#define IRQ_LOCOMO_GPIO15 (IRQ_BOARD_END + 16) -#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17) -#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18) -#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19) -#define IRQ_LOCOMO_SPI_OVRN (IRQ_BOARD_END + 20) -#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21) - /* * Figure out the MAX IRQ number. * @@ -219,89 +143,16 @@ * Otherwise, we have the standard IRQs only. */ #ifdef CONFIG_SA1111 -#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) -#elif defined(CONFIG_SHARP_LOCOMO) -#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) +#define NR_IRQS (IRQ_BOARD_END + 55) #elif defined(CONFIG_PXA_HAVE_BOARD_IRQS) #define NR_IRQS (IRQ_BOARD_END) #else #define NR_IRQS (IRQ_BOARD_START) #endif -/* - * Board specific IRQs. Define them here. - * Do not surround them with ifdefs. - */ -#define LUBBOCK_IRQ(x) (IRQ_BOARD_START + (x)) -#define LUBBOCK_SD_IRQ LUBBOCK_IRQ(0) -#define LUBBOCK_SA1111_IRQ LUBBOCK_IRQ(1) -#define LUBBOCK_USB_IRQ LUBBOCK_IRQ(2) /* usb connect */ -#define LUBBOCK_ETH_IRQ LUBBOCK_IRQ(3) -#define LUBBOCK_UCB1400_IRQ LUBBOCK_IRQ(4) -#define LUBBOCK_BB_IRQ LUBBOCK_IRQ(5) -#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */ -#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6) - -#define LPD270_IRQ(x) (IRQ_BOARD_START + (x)) -#define LPD270_USBC_IRQ LPD270_IRQ(2) -#define LPD270_ETHERNET_IRQ LPD270_IRQ(3) -#define LPD270_AC97_IRQ LPD270_IRQ(4) - -#define MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x)) -#define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0) -#define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1) -#define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2) -#define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3) -#define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4) -#define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5) -#define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6) -#define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7) -#define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9) -#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10) -#define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11) -#define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13) -#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) -#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) - -/* Balloon3 Interrupts */ -#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) - -#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0) -#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1) - -#define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ) -#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) -#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) - -/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */ -#define IRQ_LOCOMO_KEY_BASE (IRQ_BOARD_START + 0) -#define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1) -#define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) -#define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) - -/* phyCORE-PXA270 (PCM027) Interrupts */ -#define PCM027_IRQ(x) (IRQ_BOARD_START + (x)) -#define PCM027_BTDET_IRQ PCM027_IRQ(0) -#define PCM027_FF_RI_IRQ PCM027_IRQ(1) -#define PCM027_MMCDET_IRQ PCM027_IRQ(2) -#define PCM027_PM_5V_IRQ PCM027_IRQ(3) - -/* ITE8152 irqs */ /* add IT8152 IRQs beyond BOARD_END */ #ifdef CONFIG_PCI_HOST_ITE8152 -#define IT8152_IRQ(x) (IRQ_BOARD_END + (x)) - -/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ -#define IT8152_LD_IRQ_COUNT 9 -#define IT8152_LP_IRQ_COUNT 16 -#define IT8152_PD_IRQ_COUNT 15 - -/* Priorities: */ -#define IT8152_PD_IRQ(i) IT8152_IRQ(i) -#define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT) -#define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT) - -#define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1) +#define IT8152_LAST_IRQ (IRQ_BOARD_END + 40) #if NR_IRQS < (IT8152_LAST_IRQ+1) #undef NR_IRQS diff --git a/arch/arm/mach-pxa/include/mach/lpd270.h b/arch/arm/mach-pxa/include/mach/lpd270.h index f89fb715266..0e6440c8168 100644 --- a/arch/arm/mach-pxa/include/mach/lpd270.h +++ b/arch/arm/mach-pxa/include/mach/lpd270.h @@ -34,5 +34,9 @@ #define LPD270_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */ #define LPD270_INT_USBC (1 << 2) /* USB client cable detection IRQ */ +#define LPD270_IRQ(x) (IRQ_BOARD_START + (x)) +#define LPD270_USBC_IRQ LPD270_IRQ(2) +#define LPD270_ETHERNET_IRQ LPD270_IRQ(3) +#define LPD270_AC97_IRQ LPD270_IRQ(4) #endif diff --git a/arch/arm/mach-pxa/include/mach/lubbock.h b/arch/arm/mach-pxa/include/mach/lubbock.h index 751b74811d0..a0d4247f08f 100644 --- a/arch/arm/mach-pxa/include/mach/lubbock.h +++ b/arch/arm/mach-pxa/include/mach/lubbock.h @@ -34,6 +34,17 @@ #define LUB_IRQ_SET_CLR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0d0) #define LUB_GP __LUB_REG(LUBBOCK_FPGA_PHYS + 0x100) +/* Board specific IRQs */ +#define LUBBOCK_IRQ(x) (IRQ_BOARD_START + (x)) +#define LUBBOCK_SD_IRQ LUBBOCK_IRQ(0) +#define LUBBOCK_SA1111_IRQ LUBBOCK_IRQ(1) +#define LUBBOCK_USB_IRQ LUBBOCK_IRQ(2) /* usb connect */ +#define LUBBOCK_ETH_IRQ LUBBOCK_IRQ(3) +#define LUBBOCK_UCB1400_IRQ LUBBOCK_IRQ(4) +#define LUBBOCK_BB_IRQ LUBBOCK_IRQ(5) +#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */ +#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6) + #ifndef __ASSEMBLY__ extern void lubbock_set_misc_wr(unsigned int mask, unsigned int set); #endif diff --git a/arch/arm/mach-pxa/include/mach/mainstone.h b/arch/arm/mach-pxa/include/mach/mainstone.h index 3461c4302ff..86e623abd64 100644 --- a/arch/arm/mach-pxa/include/mach/mainstone.h +++ b/arch/arm/mach-pxa/include/mach/mainstone.h @@ -117,4 +117,21 @@ #define MST_PCMCIA_PWR_VCC_33 0x8 /* voltage VCC = 3.3V */ #define MST_PCMCIA_PWR_VCC_50 0x4 /* voltage VCC = 5.0V */ +/* board specific IRQs */ +#define MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x)) +#define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0) +#define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1) +#define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2) +#define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3) +#define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4) +#define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5) +#define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6) +#define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7) +#define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9) +#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10) +#define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11) +#define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13) +#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) +#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) + #endif diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h index 9c787855cf2..cafadc33dfd 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h @@ -190,4 +190,36 @@ #define GPIO89_AC97_nRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH) #endif /* CONFIG_CPU_PXA26x */ +/* commonly used pin configurations */ +#define GPIOxx_LCD_16BPP \ + GPIO58_LCD_LDD_0, \ + GPIO59_LCD_LDD_1, \ + GPIO60_LCD_LDD_2, \ + GPIO61_LCD_LDD_3, \ + GPIO62_LCD_LDD_4, \ + GPIO63_LCD_LDD_5, \ + GPIO64_LCD_LDD_6, \ + GPIO65_LCD_LDD_7, \ + GPIO66_LCD_LDD_8, \ + GPIO67_LCD_LDD_9, \ + GPIO68_LCD_LDD_10, \ + GPIO69_LCD_LDD_11, \ + GPIO70_LCD_LDD_12, \ + GPIO71_LCD_LDD_13, \ + GPIO72_LCD_LDD_14, \ + GPIO73_LCD_LDD_15 + +#define GPIOxx_LCD_DSTN_16BPP \ + GPIOxx_LCD_16BPP, \ + GPIO74_LCD_FCLK, \ + GPIO75_LCD_LCLK, \ + GPIO76_LCD_PCLK + +#define GPIOxx_LCD_TFT_16BPP \ + GPIOxx_LCD_16BPP, \ + GPIO74_LCD_FCLK, \ + GPIO75_LCD_LCLK, \ + GPIO76_LCD_PCLK, \ + GPIO77_LCD_BIAS + #endif /* __ASM_ARCH_MFP_PXA25X_H */ diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h index 6543c05f47e..ec0f0b0b674 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h @@ -434,5 +434,32 @@ #define GPIO112_nMSINS MFP_CFG_IN(GPIO112, AF2) #define GPIO32_MSSCLK MFP_CFG_OUT(GPIO32, AF1, DRIVE_LOW) +/* commonly used pin configurations */ +#define GPIOxx_LCD_16BPP \ + GPIO58_LCD_LDD_0, \ + GPIO59_LCD_LDD_1, \ + GPIO60_LCD_LDD_2, \ + GPIO61_LCD_LDD_3, \ + GPIO62_LCD_LDD_4, \ + GPIO63_LCD_LDD_5, \ + GPIO64_LCD_LDD_6, \ + GPIO65_LCD_LDD_7, \ + GPIO66_LCD_LDD_8, \ + GPIO67_LCD_LDD_9, \ + GPIO68_LCD_LDD_10, \ + GPIO69_LCD_LDD_11, \ + GPIO70_LCD_LDD_12, \ + GPIO71_LCD_LDD_13, \ + GPIO72_LCD_LDD_14, \ + GPIO73_LCD_LDD_15 + +#define GPIOxx_LCD_TFT_16BPP \ + GPIOxx_LCD_16BPP, \ + GPIO74_LCD_FCLK, \ + GPIO75_LCD_LCLK, \ + GPIO76_LCD_PCLK, \ + GPIO77_LCD_BIAS + + extern int keypad_set_wake(unsigned int on); #endif /* __ASM_ARCH_MFP_PXA27X_H */ diff --git a/arch/arm/mach-pxa/include/mach/mxm8x10.h b/arch/arm/mach-pxa/include/mach/mxm8x10.h new file mode 100644 index 00000000000..ffa15665a41 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/mxm8x10.h @@ -0,0 +1,21 @@ +#ifndef __MACH_MXM_8X10_H +#define __MACH_MXM_8X10_H + +#define MXM_8X10_ETH_PHYS 0x13000000 + +#if defined(CONFIG_MMC) + +#define MXM_8X10_SD_nCD (72) +#define MXM_8X10_SD_WP (84) + +extern void mxm_8x10_mmc_init(void); +#else +static inline void mxm_8x10_mmc_init(void) {} +#endif + +extern void mxm_8x10_usb_host_init(void); +extern void mxm_8x10_ac97_init(void); + +extern void mxm_8x10_barebones_init(void); + +#endif /* __MACH_MXM_8X10_H */ diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h index 4dcd2e8baa6..04083263167 100644 --- a/arch/arm/mach-pxa/include/mach/pcm027.h +++ b/arch/arm/mach-pxa/include/mach/pcm027.h @@ -23,6 +23,13 @@ * Definitions of CPU card resources only */ +/* phyCORE-PXA270 (PCM027) Interrupts */ +#define PCM027_IRQ(x) (IRQ_BOARD_START + (x)) +#define PCM027_BTDET_IRQ PCM027_IRQ(0) +#define PCM027_FF_RI_IRQ PCM027_IRQ(1) +#define PCM027_MMCDET_IRQ PCM027_IRQ(2) +#define PCM027_PM_5V_IRQ PCM027_IRQ(3) + /* I2C RTC */ #define PCM027_RTC_IRQ_GPIO 0 #define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO) diff --git a/arch/arm/mach-pxa/include/mach/ssp.h b/arch/arm/mach-pxa/include/mach/ssp.h index cb5cb766f0f..be1be5b6db5 100644 --- a/arch/arm/mach-pxa/include/mach/ssp.h +++ b/arch/arm/mach-pxa/include/mach/ssp.h @@ -46,6 +46,7 @@ struct ssp_device { int drcmr_tx; }; +#ifdef CONFIG_PXA_SSP_LEGACY /* * SSP initialisation flags */ @@ -78,6 +79,7 @@ void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp); int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags); int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed); void ssp_exit(struct ssp_dev *dev); +#endif /* CONFIG_PXA_SSP_LEGACY */ /** * ssp_write_reg - Write to a SSP register diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h index 237734b5b1b..5ef91d9d17e 100644 --- a/arch/arm/mach-pxa/include/mach/uncompress.h +++ b/arch/arm/mach-pxa/include/mach/uncompress.h @@ -10,20 +10,41 @@ */ #include <linux/serial_reg.h> -#include <mach/regs-uart.h> #include <asm/mach-types.h> -#define __REG(x) ((volatile unsigned long *)x) +#define FFUART_BASE (0x40100000) +#define BTUART_BASE (0x40200000) +#define STUART_BASE (0x40700000) -static volatile unsigned long *UART = FFUART; +static unsigned long uart_base = FFUART_BASE; +static unsigned int uart_shift = 2; +static unsigned int uart_is_pxa = 1; + +static inline unsigned char uart_read(int offset) +{ + return *(volatile unsigned char *)(uart_base + (offset << uart_shift)); +} + +static inline void uart_write(unsigned char val, int offset) +{ + *(volatile unsigned char *)(uart_base + (offset << uart_shift)) = val; +} + +static inline int uart_is_enabled(void) +{ + /* assume enabled by default for non-PXA uarts */ + return uart_is_pxa ? uart_read(UART_IER) & UART_IER_UUE : 1; +} static inline void putc(char c) { - if (!(UART[UART_IER] & IER_UUE)) + if (!uart_is_enabled()) return; - while (!(UART[UART_LSR] & LSR_TDRQ)) + + while (!(uart_read(UART_LSR) & UART_LSR_THRE)) barrier(); - UART[UART_TX] = c; + + uart_write(c, UART_TX); } /* @@ -38,7 +59,13 @@ static inline void arch_decomp_setup(void) if (machine_is_littleton() || machine_is_intelmote2() || machine_is_csb726() || machine_is_stargate2() || machine_is_cm_x300() || machine_is_balloon3()) - UART = STUART; + uart_base = STUART_BASE; + + if (machine_is_arcom_zeus()) { + uart_base = 0x10000000; /* nCS4 */ + uart_shift = 1; + uart_is_pxa = 0; + } } /* diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h index c387046d2f2..6e119976003 100644 --- a/arch/arm/mach-pxa/include/mach/zeus.h +++ b/arch/arm/mach-pxa/include/mach/zeus.h @@ -58,6 +58,8 @@ #define ZEUS_EXT1_GPIO(x) (ZEUS_EXT1_GPIO_BASE + (x)) #define ZEUS_USER_GPIO(x) (ZEUS_USER_GPIO_BASE + (x)) +#define ZEUS_CAN_SHDN_GPIO ZEUS_EXT1_GPIO(2) + /* * CPLD registers: * Only 4 registers, but spreaded over a 32MB address space. @@ -68,7 +70,6 @@ #define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000) #define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000) #define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000) -#define ZEUS_CPLD_EXTWDOG (ZEUS_CPLD + 0x3000) /* CPLD register bits */ #define ZEUS_CPLD_CONTROL_CF_RST 0x01 |