diff options
author | Olof Johansson <olof@lixom.net> | 2012-03-08 08:53:14 -0800 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2012-03-08 08:53:14 -0800 |
commit | d60d506e6baaf423148c458df3ece0c1d440dce4 (patch) | |
tree | c25c44e70ebaaddcbe39559df5c5cd260e956be4 /arch/arm/mach-s3c24xx/irq-s3c2440.c | |
parent | 62f383435932ea3d271bee6b957de048452c1b16 (diff) | |
parent | 2e5ac9436645bb9fd2097868e228321f303c9c75 (diff) |
Merge branch 'next/cleanup-s3c24xx' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
* 'next/cleanup-s3c24xx' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (24 commits)
ARM: S3C24XX: remove call to s3c24xx_setup_clocks
ARM: S3C24XX: add get_rate for clk_p on S3C2416/2443
ARM: S3C24XX: add get_rate for clk_h on S3C2416/2443
ARM: S3C24XX: remove XXX_setup_clocks method from S3C2443
ARM: S3C24XX: remove obsolete S3C2416_DMA option
ARM: S3C24XX: Reuse S3C2443 dma for S3C2416
ARM: S3C24XX: Fix indentation of dma-s3c2443
ARM: S3C24XX: Move device setup files to mach directory
ARM: S3C24XX: Consolidate Simtec extensions
ARM: S3C24XX: move simtec-specific code to mach directory
ARM: S3C24XX: Move common-smdk code to mach directory
ARM: S3C24XX: Move s3c2443-clock.c to mach-s3c24xx
ARM: s3c2410_defconfig: update s3c2410_defconfig
ARM: S3C2443: move mach-s3c2443/* into mach-s3c24xx/
ARM: S3C2440: move mach-s3c2440/* into mach-s3c24xx/
ARM: S3C2416: move mach-s3c2416/* into mach-s3c24xx/
ARM: S3C2412: move mach-s3c2412/* into mach-s3c24xx/
ARM: S3C2410: move mach-s3c2410/* into mach-s3c24xx/
ARM: S3C24XX: change the ARCH_S3C2410 to ARCH_S3C24XX
ARM: S3C2410: move s3c2410_baseclk_add to clock.h
...
Diffstat (limited to 'arch/arm/mach-s3c24xx/irq-s3c2440.c')
-rw-r--r-- | arch/arm/mach-s3c24xx/irq-s3c2440.c | 128 |
1 files changed, 128 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/irq-s3c2440.c b/arch/arm/mach-s3c24xx/irq-s3c2440.c new file mode 100644 index 00000000000..4a18cde439c --- /dev/null +++ b/arch/arm/mach-s3c24xx/irq-s3c2440.c @@ -0,0 +1,128 @@ +/* linux/arch/arm/mach-s3c2440/irq.c + * + * Copyright (c) 2003-2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * +*/ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/device.h> +#include <linux/io.h> + +#include <mach/hardware.h> +#include <asm/irq.h> + +#include <asm/mach/irq.h> + +#include <mach/regs-irq.h> +#include <mach/regs-gpio.h> + +#include <plat/cpu.h> +#include <plat/pm.h> +#include <plat/irq.h> + +/* WDT/AC97 */ + +static void s3c_irq_demux_wdtac97(unsigned int irq, + struct irq_desc *desc) +{ + unsigned int subsrc, submsk; + + /* read the current pending interrupts, and the mask + * for what it is available */ + + subsrc = __raw_readl(S3C2410_SUBSRCPND); + submsk = __raw_readl(S3C2410_INTSUBMSK); + + subsrc &= ~submsk; + subsrc >>= 13; + subsrc &= 3; + + if (subsrc != 0) { + if (subsrc & 1) { + generic_handle_irq(IRQ_S3C2440_WDT); + } + if (subsrc & 2) { + generic_handle_irq(IRQ_S3C2440_AC97); + } + } +} + + +#define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0)) + +static void +s3c_irq_wdtac97_mask(struct irq_data *data) +{ + s3c_irqsub_mask(data->irq, INTMSK_WDT, 3 << 13); +} + +static void +s3c_irq_wdtac97_unmask(struct irq_data *data) +{ + s3c_irqsub_unmask(data->irq, INTMSK_WDT); +} + +static void +s3c_irq_wdtac97_ack(struct irq_data *data) +{ + s3c_irqsub_maskack(data->irq, INTMSK_WDT, 3 << 13); +} + +static struct irq_chip s3c_irq_wdtac97 = { + .irq_mask = s3c_irq_wdtac97_mask, + .irq_unmask = s3c_irq_wdtac97_unmask, + .irq_ack = s3c_irq_wdtac97_ack, +}; + +static int s3c2440_irq_add(struct device *dev, struct subsys_interface *sif) +{ + unsigned int irqno; + + printk("S3C2440: IRQ Support\n"); + + /* add new chained handler for wdt, ac7 */ + + irq_set_chip_and_handler(IRQ_WDT, &s3c_irq_level_chip, + handle_level_irq); + irq_set_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97); + + for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) { + irq_set_chip_and_handler(irqno, &s3c_irq_wdtac97, + handle_level_irq); + set_irq_flags(irqno, IRQF_VALID); + } + + return 0; +} + +static struct subsys_interface s3c2440_irq_interface = { + .name = "s3c2440_irq", + .subsys = &s3c2440_subsys, + .add_dev = s3c2440_irq_add, +}; + +static int s3c2440_irq_init(void) +{ + return subsys_interface_register(&s3c2440_irq_interface); +} + +arch_initcall(s3c2440_irq_init); + |